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SiStripSpyDigiConverter.h
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1 #ifndef DQM_SiStripMonitorHardware_SiStripSpyDigiConverter_H
2 #define DQM_SiStripMonitorHardware_SiStripSpyDigiConverter_H
3 
4 #include "boost/cstdint.hpp"
5 #include <memory>
6 #include <vector>
7 
10 
12 
13 // Forward define other classes
14 class SiStripFedCabling;
15 
16 namespace sistrip {
17 
26  {
27  public:
29 
30  //all methods are static so no instances are needed but allow anyway
33 
39  static std::unique_ptr<DSVRawDigis> extractPayloadDigis(const DSVRawDigis * inputScopeDigis,
40  std::vector<uint32_t> * pAPVAddresses,
41  const bool discardDigisWithAPVAddrErr,
42  const sistrip::SpyUtilities::FrameQuality & aQuality,
43  const uint16_t expectedPos);
44 
45  /* \brief Reorder from readout order to physical order */
46  static std::unique_ptr<DSVRawDigis> reorderDigis(const DSVRawDigis* inputPayloadDigis);
47 
48  /* \brief Merge channel digis into modules. */
49  static std::unique_ptr<DSVRawDigis> mergeModuleChannels(const DSVRawDigis* inputPhysicalOrderChannelDigis, const SiStripFedCabling& cabling);
50 
51 
52  private:
54 
55  static void processFED(const uint16_t aPreviousFedId,
56  const bool discardDigisWithAPVAddrErr,
57  std::vector<uint32_t> * pAPVAddresses,
58  std::vector<DetSetRawDigis> & outputData,
59  std::vector<uint16_t> & aAddrVec,
60  std::vector<uint16_t> & aHeaderBitVec,
61  std::vector<DSVRawDigis::const_iterator> & aFedScopeDigis
62  );
63 
64  }; // end of SpyDigiConverter class.
65 
66 } // end of sistrip namespace.
67 
68 #endif // DQM_SiStripMonitorHardware_SiStripSpyDigiConverter_H
static std::unique_ptr< DSVRawDigis > reorderDigis(const DSVRawDigis *inputPayloadDigis)
Converts scope mode like digis into virgin raw like digis by: -extracting the frame payload...
DSVRawDigis::detset DetSetRawDigis
sistrip classes
static std::unique_ptr< DSVRawDigis > extractPayloadDigis(const DSVRawDigis *inputScopeDigis, std::vector< uint32_t > *pAPVAddresses, const bool discardDigisWithAPVAddrErr, const sistrip::SpyUtilities::FrameQuality &aQuality, const uint16_t expectedPos)
Extract frames from the scope digis.
static void processFED(const uint16_t aPreviousFedId, const bool discardDigisWithAPVAddrErr, std::vector< uint32_t > *pAPVAddresses, std::vector< DetSetRawDigis > &outputData, std::vector< uint16_t > &aAddrVec, std::vector< uint16_t > &aHeaderBitVec, std::vector< DSVRawDigis::const_iterator > &aFedScopeDigis)
static std::unique_ptr< DSVRawDigis > mergeModuleChannels(const DSVRawDigis *inputPhysicalOrderChannelDigis, const SiStripFedCabling &cabling)
edm::DetSetVector< SiStripRawDigi > DSVRawDigis
Contains cabling info at the device level, including DetId, APV pair numbers, hardware addresses...