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#include <CalibFormats/SiPixelObjects/interface/PixelFEDCard.h>
" "
The structure which holds all the informations needed to setup a pixel FED. Danek Kotlinski 18/4/06
Definition at line 26 of file PixelFEDCard.h.
| PixelFEDCard::PixelFEDCard | ( | ) |
| pos::PixelFEDCard::PixelFEDCard | ( | std::string | filename | ) |
| pos::PixelFEDCard::PixelFEDCard | ( | std::vector< std::vector< std::string > > & | tab | ) |
| pos::PixelFEDCard::~PixelFEDCard | ( | ) | [inline] |
Definition at line 793 of file PixelFEDCard.cc.
References BlackHi, BlackLo, Ccntrl, ClkDes2, clkphs10_18, clkphs19_27, clkphs1_9, clkphs28_36, CoarseDel, DelayCh, Errlvl, FEDBASE_0, fedNumber, fifo3Wrnlvl, FineDes2Del, i, j, modeRegister, N_Pword, N_TBMmask, Nadcg, Nbaseln, NC_Pword, NC_TBMmask, NCadcg, NCbaseln, NCcntrl, NCfifo1Bzlvl, Ncntrl, Nfifo1Bzlvl, offs_dac, Ooslvl, opt_cap, opt_inadj, opt_ouadj, ROC_L0, ROC_L1, ROC_L2, ROC_L3, ROC_L4, S_Pword, S_TBMmask, Sadcg, Sbaseln, SC_Pword, SC_TBMmask, SCadcg, SCbaseln, SCcntrl, SCfifo1Bzlvl, Scntrl, Sfifo1Bzlvl, SpecialDac, TBM_L0, TBM_L1, TBM_L2, TBM_L3, TBM_L4, TRL_L0, TRL_L1, TRL_L2, TRL_L3, TRL_L4, and Ublack.
00794 { 00795 FEDBASE_0 = 0 ; 00796 fedNumber = 0 ; 00797 for(int i=0;i<36;i++){ 00798 NRocs[i] = 0; 00799 offs_dac[i] = 0; 00800 BlackHi[i] = 0; 00801 BlackLo[i] = 0; 00802 Ublack[i] = 0; 00803 DelayCh[i] = 0; 00804 TBM_L0[i] = 0; 00805 TBM_L1[i] = 0; 00806 TBM_L2[i] = 0; 00807 TBM_L3[i] = 0; 00808 TBM_L4[i] = 0; 00809 TRL_L0[i] = 0; 00810 TRL_L1[i] = 0; 00811 TRL_L2[i] = 0; 00812 TRL_L3[i] = 0; 00813 TRL_L4[i] = 0; 00814 } 00815 for(int i=0;i<3;i++){ 00816 opt_cap[i] = 0; 00817 opt_inadj[i] = 0; 00818 opt_ouadj[i] = 0; 00819 } 00820 clkphs1_9 = 0; 00821 clkphs10_18 = 0; 00822 clkphs19_27 = 0; 00823 clkphs28_36 = 0; 00824 00825 for(int i=0;i<36;i++) { 00826 for(int j=0;j<26;j++) { 00827 ROC_L0[i][j] = 0; 00828 ROC_L1[i][j] = 0; 00829 ROC_L2[i][j] = 0; 00830 ROC_L3[i][j] = 0; 00831 ROC_L4[i][j] = 0; 00832 } 00833 } 00834 Ncntrl = 0; 00835 NCcntrl = 0; 00836 SCcntrl = 0; 00837 Scntrl = 0; 00838 CoarseDel = 0; 00839 ClkDes2 = 0; 00840 FineDes2Del = 0; 00841 Ccntrl = 0; 00842 modeRegister = 0; 00843 Nadcg = 0; 00844 NCadcg = 0; 00845 SCadcg = 0; 00846 Sadcg = 0; 00847 Nbaseln = 0; 00848 NCbaseln = 0; 00849 SCbaseln = 0; 00850 Sbaseln = 0; 00851 N_TBMmask = 0; 00852 NC_TBMmask = 0; 00853 SC_TBMmask = 0; 00854 S_TBMmask = 0; 00855 N_Pword = 0; 00856 NC_Pword = 0; 00857 SC_Pword = 0; 00858 S_Pword = 0; 00859 SpecialDac = 0; 00860 Ooslvl = 0; 00861 Errlvl = 0; 00862 Nfifo1Bzlvl = 0; 00863 NCfifo1Bzlvl = 0; 00864 SCfifo1Bzlvl = 0; 00865 Sfifo1Bzlvl = 0; 00866 fifo3Wrnlvl = 0; 00867 }
| unsigned long long PixelFEDCard::enabledChannels | ( | ) |
Definition at line 1346 of file PixelFEDCard.cc.
References LL, NCcntrl, Ncntrl, SCcntrl, and Scntrl.
Referenced by setChannel(), and useChannel().
01346 { 01347 unsigned long long channels=0; 01348 // return a 64-bit word with low 36 bits set if a channel is enabled 01349 // if bits are set in the control registers, transfer of data from 01350 // fifo1 to fifo 2 is not done, meaning the channel is disabled. 01351 channels = (Ncntrl & 0x1ffLL); // Add LL for SLC4, d.k. 12/07 01352 channels += (NCcntrl & 0x1ffLL) << 9; 01353 channels += (SCcntrl & 0x1ffLL) << 18; 01354 channels += (Scntrl & 0x1ffLL) << 27; 01355 return ~channels; //bitwise complement to get enabled channels 01356 }
| void PixelFEDCard::readDBROCLevels | ( | std::vector< std::vector< std::string > > & | tableMat, | |
| int | first, | |||
| int | last | |||
| ) |
CONFIG_KEY_ID NUMBER(38) CONFIG_KEY VARCHAR2(80) VERSION VARCHAR2(40) KIND_OF_COND VARCHAR2(40) PXLFED_NAME VARCHAR2(200) FED_CHAN NUMBER(38) AOH_CHAN NUMBER(38) ROC_NAME VARCHAR2(187) HUB_ADDRS NUMBER(38) PORT_NUMBER NUMBER(10) I2C_ADDR NUMBER GEOM_ROC_NUM NUMBER(10) FED_ROC_NUM NUMBER(10) ROC_L0 VARCHAR2(200) ROC_L0[1-36][1-21/24/8/16] indexes taken from FED_CHAN and FED_ROC_NUM respec. ROC_L1 VARCHAR2(200) ROC_L1[1-36][1-21/24/8/16] indexes taken from FED_CHAN and FED_ROC_NUM respec. ROC_L2 VARCHAR2(200) ROC_L2[1-36][1-21/24/8/16] indexes taken from FED_CHAN and FED_ROC_NUM respec. ROC_L3 VARCHAR2(200) ROC_L3[1-36][1-21/24/8/16] indexes taken from FED_CHAN and FED_ROC_NUM respec. ROC_L4 VARCHAR2(200) ROC_L4[1-36][1-21/24/8/16] indexes taken from FED_CHAN and FED_ROC_NUM respec.
Definition at line 381 of file PixelFEDCard.cc.
References c, TestMuL1L2Filter_cff::cerr, lat::endl(), r, ROC_L0, ROC_L1, ROC_L2, ROC_L3, and ROC_L4.
00382 { 00383 string mthn = "[PixelFEDCard::readDBROCLevels()] "; 00384 map<string , int > colM; 00385 vector<string> colNames; 00386 00408 colNames.push_back("CONFIG_KEY_ID" ); 00409 colNames.push_back("CONFIG_KEY" ); 00410 colNames.push_back("VERSION" ); 00411 colNames.push_back("KIND_OF_COND" ); 00412 colNames.push_back("PXLFED_NAME" ); 00413 colNames.push_back("FED_CHAN" ); 00414 colNames.push_back("AOH_CHAN" ); 00415 colNames.push_back("ROC_NAME" ); 00416 colNames.push_back("HUB_ADDRS" ); 00417 colNames.push_back("PORT_NUMBER" ); 00418 colNames.push_back("ROC_I2C_ADDR" ); 00419 colNames.push_back("GEOM_ROC_NUM" ); 00420 colNames.push_back("FED_ROC_NUM" ); 00421 colNames.push_back("ROC_L0" ); 00422 colNames.push_back("ROC_L1" ); 00423 colNames.push_back("ROC_L2" ); 00424 colNames.push_back("ROC_L3" ); 00425 colNames.push_back("ROC_L4" ); 00426 00427 // Retrieve header row and cross check that everyfield is there. 00428 for(unsigned int c = 0 ; c < tableMat[firstRow].size() ; c++) 00429 { 00430 for(unsigned int n=0; n<colNames.size(); n++) 00431 { 00432 if(tableMat[firstRow][c] == colNames[n]){ 00433 colM[colNames[n]] = c; 00434 break; 00435 } 00436 } 00437 }//end for 00438 for(unsigned int n=0; n<colNames.size(); n++) 00439 { 00440 if(colM.find(colNames[n]) == colM.end()) 00441 { 00442 std::cerr << mthn << "\tCouldn't find in the database the column with name " << colNames[n] << std::endl; 00443 assert(0); 00444 } 00445 } 00446 // Address levels 1 per channel (36) per roc(max=26) 00447 // int ROC_L0[36][26],ROC_L1[36][26],ROC_L2[36][26],ROC_L3[36][26],ROC_L4[36][26]; 00448 00449 for(int r = firstRow + 1 ; r < lastRow ; r++) //Goes to every row of the Matrix (MUST BE 36, one for each FED channel) 00450 { 00451 ROC_L0[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1][atoi(tableMat[r][colM["FED_ROC_NUM"]].c_str())-1] = atoi(tableMat[r][colM["ROC_L0"]].c_str()) ; 00452 ROC_L1[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1][atoi(tableMat[r][colM["FED_ROC_NUM"]].c_str())-1] = atoi(tableMat[r][colM["ROC_L1"]].c_str()) ; 00453 ROC_L2[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1][atoi(tableMat[r][colM["FED_ROC_NUM"]].c_str())-1] = atoi(tableMat[r][colM["ROC_L2"]].c_str()) ; 00454 ROC_L3[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1][atoi(tableMat[r][colM["FED_ROC_NUM"]].c_str())-1] = atoi(tableMat[r][colM["ROC_L3"]].c_str()) ; 00455 ROC_L4[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1][atoi(tableMat[r][colM["FED_ROC_NUM"]].c_str())-1] = atoi(tableMat[r][colM["ROC_L4"]].c_str()) ; 00456 } 00457 00458 }
| void PixelFEDCard::readDBTBMLevels | ( | std::vector< std::vector< std::string > > & | tableMat, | |
| int | first, | |||
| int | last | |||
| ) |
CONFIG_KEY_ID NUMBER(38) CONFIG_KEY VARCHAR2(80) VERSION VARCHAR2(40) CONDITION_DATA_SET_ID NUMBER(38) KIND_OF_CONDITION_ID NUMBER(38) KIND_OF_COND VARCHAR2(40) PXLFED_NAME VARCHAR2(200) FED_CHAN NUMBER(38) TBM_PART_ID NUMBER(38) TBM_SER_NUM VARCHAR2(40) PANEL_NAME VARCHAR2(99) HUB_ADDRS NUMBER(38) TBMA_HEAD_L0 VARCHAR2(200) TBM_L0[1-36] index taken from FED_CHAN TBMA_HEAD_L1 VARCHAR2(200) TBM_L1[1-36] index taken from FED_CHAN TBMA_HEAD_L2 VARCHAR2(200) TBM_L2[1-36] index taken from FED_CHAN TBMA_HEAD_L3 VARCHAR2(200) TBM_L3[1-36] index taken from FED_CHAN TBMA_HEAD_L4 VARCHAR2(200) TBM_L4[1-36] index taken from FED_CHAN TBMA_TRAIL_L0 VARCHAR2(200) TRL_L0[1-36] index taken from FED_CHAN TBMA_TRAIL_L1 VARCHAR2(200) TRL_L1[1-36] index taken from FED_CHAN TBMA_TRAIL_L2 VARCHAR2(200) TRL_L2[1-36] index taken from FED_CHAN TBMA_TRAIL_L3 VARCHAR2(200) TRL_L3[1-36] index taken from FED_CHAN TBMA_TRAIL_L4 VARCHAR2(200) TRL_L4[1-36] index taken from FED_CHAN
Definition at line 291 of file PixelFEDCard.cc.
References c, TestMuL1L2Filter_cff::cerr, lat::endl(), r, TBM_L0, TBM_L1, TBM_L2, TBM_L3, TBM_L4, TRL_L0, TRL_L1, TRL_L2, TRL_L3, and TRL_L4.
00292 { 00293 string mthn = "[PixelFEDCard::readDBTBMLevels()] "; 00294 vector<string> ins = tableMat[firstRow]; 00295 map<string , int > colM; 00296 vector<string> colNames; 00297 00323 colNames.push_back("CONFIG_KEY_ID" ); 00324 colNames.push_back("CONFIG_KEY" ); 00325 colNames.push_back("VERSION" ); 00326 colNames.push_back("CONDITION_DATA_SET_ID" ); 00327 colNames.push_back("KIND_OF_CONDITION_ID" ); 00328 colNames.push_back("KIND_OF_COND" ); 00329 colNames.push_back("PXLFED_NAME" ); 00330 colNames.push_back("FED_CHAN" ); 00331 colNames.push_back("TBM_PART_ID" ); 00332 colNames.push_back("TBM_SER_NUM" ); 00333 colNames.push_back("PANEL_NAME" ); 00334 colNames.push_back("HUB_ADDRS" ); 00335 colNames.push_back("TBMA_HEAD_L0" ); 00336 colNames.push_back("TBMA_HEAD_L1" ); 00337 colNames.push_back("TBMA_HEAD_L2" ); 00338 colNames.push_back("TBMA_HEAD_L3" ); 00339 colNames.push_back("TBMA_HEAD_L4" ); 00340 colNames.push_back("TBMA_TRAIL_L0" ); 00341 colNames.push_back("TBMA_TRAIL_L1" ); 00342 colNames.push_back("TBMA_TRAIL_L2" ); 00343 colNames.push_back("TBMA_TRAIL_L3" ); 00344 colNames.push_back("TBMA_TRAIL_L4" ); 00345 00346 // Retrieve header row and cross check that everyfield is there. 00347 for(unsigned int c = 0 ; c < ins.size() ; c++) 00348 { 00349 for(unsigned int n=0; n<colNames.size(); n++) 00350 { 00351 if(tableMat[firstRow][c] == colNames[n]){ 00352 colM[colNames[n]] = c; 00353 break; 00354 } 00355 } 00356 }//end for 00357 for(unsigned int n=0; n<colNames.size(); n++) 00358 { 00359 if(colM.find(colNames[n]) == colM.end()) 00360 { 00361 std::cerr << mthn << "\tCouldn't find in the database the column with name " << colNames[n] << std::endl; 00362 assert(0); 00363 } 00364 } 00365 for(int r = firstRow + 1 ; r < lastRow ; r++) //Goes to every row of the Matrix (MUST BE 36, one for each FED channel) 00366 { 00367 //Signal levels for the TBM, one per channel 00368 TBM_L0[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1] = atoi(tableMat[r][colM["TBMA_HEAD_L0"]].c_str() ) ; 00369 TBM_L1[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1] = atoi(tableMat[r][colM["TBMA_HEAD_L1"]].c_str() ) ; 00370 TBM_L2[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1] = atoi(tableMat[r][colM["TBMA_HEAD_L2"]].c_str() ) ; 00371 TBM_L3[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1] = atoi(tableMat[r][colM["TBMA_HEAD_L3"]].c_str() ) ; 00372 TBM_L4[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1] = atoi(tableMat[r][colM["TBMA_HEAD_L4"]].c_str() ) ; 00373 TRL_L0[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1] = atoi(tableMat[r][colM["TBMA_TRAIL_L0"]].c_str() ) ; 00374 TRL_L1[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1] = atoi(tableMat[r][colM["TBMA_TRAIL_L1"]].c_str() ) ; 00375 TRL_L2[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1] = atoi(tableMat[r][colM["TBMA_TRAIL_L2"]].c_str() ) ; 00376 TRL_L3[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1] = atoi(tableMat[r][colM["TBMA_TRAIL_L3"]].c_str() ) ; 00377 TRL_L4[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1] = atoi(tableMat[r][colM["TBMA_TRAIL_L4"]].c_str() ) ; 00378 } 00379 }
| void PixelFEDCard::restoreBaselinAndChannelMasks | ( | ) |
Definition at line 1385 of file PixelFEDCard.cc.
References Nbaseln, Nbaseln_original, NCbaseln, NCbaseln_original, NCcntrl, NCcntrl_original, Ncntrl, Ncntrl_original, Sbaseln, Sbaseln_original, SCbaseln, SCbaseln_original, SCcntrl, SCcntrl_original, Scntrl, and Scntrl_original.
01385 { 01386 01387 Ncntrl=Ncntrl_original; 01388 NCcntrl=NCcntrl_original; 01389 SCcntrl=SCcntrl_original; 01390 Scntrl=Scntrl_original; 01391 01392 Nbaseln=Nbaseln_original; 01393 NCbaseln=NCbaseln_original; 01394 SCbaseln=SCbaseln_original; 01395 Sbaseln=Sbaseln_original; 01396 01397 01398 }
| void PixelFEDCard::restoreControlAndModeRegister | ( | ) |
Definition at line 1401 of file PixelFEDCard.cc.
References Ccntrl, Ccntrl_original, modeRegister, and modeRegister_original.
01401 { 01402 01403 Ccntrl=Ccntrl_original; 01404 modeRegister=modeRegister_original; 01405 01406 }
Definition at line 1363 of file PixelFEDCard.cc.
References enabledChannels(), LL, NCcntrl, Ncntrl, SCcntrl, and Scntrl.
Referenced by pos::PixelConfigurationVerifier::checkChannelEnable().
01363 { 01364 assert(iChannel>0&&iChannel<37); 01365 long long mask=enabledChannels(); 01366 long long bit=0x1LL<<(iChannel-1); 01367 if (mode) { 01368 mask=mask|bit; 01369 } 01370 else{ 01371 bit=~bit; 01372 mask=mask&bit; 01373 } 01374 mask=~mask; 01375 Ncntrl=mask & 0x1ffLL; 01376 mask=mask>>9; 01377 NCcntrl=mask & 0x1ffLL; 01378 mask=mask>>9; 01379 SCcntrl=mask & 0x1ffLL; 01380 mask=mask>>9; 01381 Scntrl=mask & 0x1ffLL; 01382 01383 }
Definition at line 1358 of file PixelFEDCard.cc.
References enabledChannels(), and LL.
Referenced by pos::PixelConfigurationVerifier::checkChannelEnable().
01358 { 01359 assert(iChannel>0&&iChannel<37); 01360 return (enabledChannels()>>(iChannel-1))&0x1LL; 01361 }
| void PixelFEDCard::writeASCII | ( | std::string | dir = "" |
) | const [virtual] |
Implements pos::PixelConfigBase.
Definition at line 870 of file PixelFEDCard.cc.
References BlackHi, BlackLo, Ccntrl, ClkDes2, clkphs10_18, clkphs19_27, clkphs1_9, clkphs28_36, CoarseDel, GenMuonPlsPt100GeV_cfg::cout, DelayCh, Errlvl, FEDBASE_0, fedNumber, FedTTCDelay, fifo3Wrnlvl, EgammaValidation_cff::filename, FineDes2Del, i, j, modeRegister, N_Pword, N_TBMmask, Nadcg, Nbaseln, NC_Pword, NC_TBMmask, NCadcg, NCbaseln, NCcntrl, NCfifo1Bzlvl, Ncntrl, Nfifo1Bzlvl, NULL, offs_dac, Ooslvl, opt_cap, opt_inadj, opt_ouadj, cmsRelvalreportInput::outfile, ROC_L0, ROC_L1, ROC_L2, ROC_L3, ROC_L4, s1, S_Pword, S_TBMmask, Sadcg, Sbaseln, SC_Pword, SC_TBMmask, SCadcg, SCbaseln, SCcntrl, SCfifo1Bzlvl, Scntrl, Sfifo1Bzlvl, SpecialDac, TBM_L0, TBM_L1, TBM_L2, TBM_L3, TBM_L4, TRL_L0, TRL_L1, TRL_L2, TRL_L3, TRL_L4, and Ublack.
00870 { 00871 00872 // cout << "PixelFEDCard::writeASCII"<<endl; 00873 00874 ostringstream s1; 00875 s1<<fedNumber; 00876 std::string fedNum=s1.str(); 00877 00878 if (dir!="") dir+="/"; 00879 00880 std::string filename=dir+"params_fed_"+fedNum+".dat"; 00881 00882 FILE *outfile = fopen((filename.c_str()),"w"); 00883 if (outfile == NULL) { 00884 cout<<"Could not open file:"<<filename<<" for writing"<<endl; 00885 return; 00886 } 00887 00888 //Fed Base Address 00889 fprintf(outfile,"FED Base address :0x%lx\n", 00890 FEDBASE_0); 00891 fprintf(outfile,"FEDID Number :0x%lx\n", 00892 fedNumber); 00893 00894 // Number of ROCs 00895 int ijx=0; 00896 for(int i=0;i<36;i++){ 00897 ijx=i+1; 00898 fprintf(outfile,"Number of ROCs Chnl %d:%d\n",ijx,NRocs[i]); 00899 } 00900 00901 //Settable optical input parameters 00902 fprintf(outfile,"Optical reciever 1 Capacitor Adjust(0-3):%d\n",opt_cap[0]); 00903 fprintf(outfile,"Optical reciever 2 Capacitor Adjust(0-3):%d\n",opt_cap[1]); 00904 fprintf(outfile,"Optical reciever 3 Capacitor Adjust(0-3):%d\n",opt_cap[2]); 00905 fprintf(outfile,"Optical reciever 1 Input Offset (0-15) :%d\n",opt_inadj[0]); 00906 fprintf(outfile,"Optical reciever 2 Input Offset (0-15) :%d\n",opt_inadj[1]); 00907 fprintf(outfile,"Optical reciever 3 Input Offset (0-15) :%d\n",opt_inadj[2]); 00908 fprintf(outfile,"Optical reciever 1 Output Offset (0-3) :%d\n",opt_ouadj[0]); 00909 fprintf(outfile,"Optical reciever 2 Output Offset (0-3) :%d\n",opt_ouadj[1]); 00910 fprintf(outfile,"Optical reciever 3 Output Offset (0-3) :%d\n",opt_ouadj[2]); 00911 00912 //input offset dac 00913 for(int i=0;i<36;i++) { 00914 fprintf(outfile,"Offset DAC channel %d:%d\n",i+1,offs_dac[i]); 00915 } 00916 00917 //clock phases 00918 fprintf(outfile,"Clock Phase Bits ch 1-9:0x%x\n",clkphs1_9 ); 00919 fprintf(outfile,"Clock Phase Bits ch 10-18:0x%x\n",clkphs10_18); 00920 fprintf(outfile,"Clock Phase Bits ch 19-27:0x%x\n",clkphs19_27); 00921 fprintf(outfile,"Clock Phase Bits ch 28-36:0x%x\n",clkphs28_36); 00922 00923 //Blacks 00924 for(int i=0;i<36;i++){ 00925 fprintf(outfile,"Black HiThold ch %d:%d \n",i+1,BlackHi[i]); 00926 fprintf(outfile,"Black LoThold ch %d:%d \n",i+1,BlackLo[i]); 00927 fprintf(outfile,"ULblack Thold ch %d:%d \n",i+1,Ublack[i]); 00928 } 00929 00930 //Channel delays 00931 for(int i=0;i<36;i++) { 00932 fprintf(outfile,"Delay channel %d(0-15):%d\n",i+1,DelayCh[i]); 00933 } 00934 00935 //Signal levels 00936 for(int i=0;i<36;i++) { 00937 fprintf(outfile,"TBM level 0 Channel %d:%d\n",i+1,TBM_L0[i]); 00938 fprintf(outfile,"TBM level 1 Channel %d:%d\n",i+1,TBM_L1[i]); 00939 fprintf(outfile,"TBM level 2 Channel %d:%d\n",i+1,TBM_L2[i]); 00940 fprintf(outfile,"TBM level 3 Channel %d:%d\n",i+1,TBM_L3[i]); 00941 fprintf(outfile,"TBM level 4 Channel %d:%d\n",i+1,TBM_L4[i]); 00942 00943 for(int j=0;j<NRocs[i];j++) { 00944 fprintf(outfile,"ROC%d level 0 Channel %d :%d\n", 00945 j,i+1,ROC_L0[i][j]); 00946 fprintf(outfile,"ROC%d level 1 Channel %d :%d\n", 00947 j,i+1,ROC_L1[i][j]); 00948 fprintf(outfile,"ROC%d level 2 Channel %d :%d\n", 00949 j,i+1,ROC_L2[i][j]); 00950 fprintf(outfile,"ROC%d level 3 Channel %d :%d\n", 00951 j,i+1,ROC_L3[i][j]); 00952 fprintf(outfile,"ROC%d level 4 Channel %d :%d\n", 00953 j,i+1,ROC_L4[i][j]); 00954 } 00955 00956 fprintf(outfile,"TRLR level 0 Channel %d:%d\n",i+1,TRL_L0[i]); 00957 fprintf(outfile,"TRLR level 1 Channel %d:%d\n",i+1,TRL_L1[i]); 00958 fprintf(outfile,"TRLR level 2 Channel %d:%d\n",i+1,TRL_L2[i]); 00959 fprintf(outfile,"TRLR level 3 Channel %d:%d\n",i+1,TRL_L3[i]); 00960 fprintf(outfile,"TRLR level 4 Channel %d:%d\n",i+1,TRL_L4[i]); 00961 } 00962 00963 00964 //These bits turn off(1) and on(0) channels 00965 fprintf(outfile,"Channel Enbable bits chnls 1-9 (on = 0):0x%x\n", 00966 Ncntrl); 00967 fprintf(outfile,"Channel Enbable bits chnls 10-18(on = 0):0x%x\n", 00968 NCcntrl); 00969 fprintf(outfile,"Channel Enbable bits chnls 19-27(on = 0):0x%x\n", 00970 SCcntrl); 00971 fprintf(outfile,"Channel Enbable bits chnls 28-36(on = 0):0x%x\n", 00972 Scntrl); 00973 00974 //These are delays to the TTCrx 00975 fprintf(outfile,"TTCrx Coarse Delay Register 2:%d\n",CoarseDel); 00976 fprintf(outfile,"TTCrc ClkDes2 Register 3:0x%x\n",ClkDes2); 00977 fprintf(outfile,"TTCrc Fine Dlay ClkDes2 Reg 1:%d\n",FineDes2Del); 00978 00979 // Control register 00980 fprintf(outfile,"Center Chip Control Reg:0x%x\n",Ccntrl); 00981 fprintf(outfile,"Initial Slink DAQ mode:%d\n",modeRegister); 00982 00983 //These bits set ADC Gain/Range 1Vpp(0) and 2Vpp(1) for channels 00984 fprintf(outfile,"Channel ADC Gain bits chnls 1-12(1Vpp = 0):0x%x\n", 00985 Nadcg); 00986 fprintf(outfile,"Channel ADC Gain bits chnls 13-20(1Vpp = 0):0x%x\n", 00987 NCadcg); 00988 fprintf(outfile,"Channel ADC Gain bits chnls 21-28(1Vpp = 0):0x%x\n", 00989 SCadcg); 00990 fprintf(outfile,"Channel ADC Gain bits chnls 29-36(1Vpp = 0):0x%x\n", 00991 Sadcg); 00992 00993 //These bits set Baseline adjustment value (common by FPGA)//can turn on by channel 00994 fprintf(outfile,"Channel Baseline Enbable chnls 1-9 (on = (0x1ff<<16)+):0x%x\n", 00995 Nbaseln); 00996 fprintf(outfile,"Channel Baseline Enbable chnls 10-18(on = (0x1ff<<16)+):0x%x\n", 00997 NCbaseln); 00998 fprintf(outfile,"Channel Baseline Enbable chnls 19-27(on = (0x1ff<<16)+):0x%x\n", 00999 SCbaseln); 01000 fprintf(outfile,"Channel Baseline Enbable chnls 28-36(on = (0x1ff<<16)+):0x%x\n", 01001 Sbaseln); 01002 01003 //These bits set TBM trailer mask (common by FPGA) 01004 fprintf(outfile,"TBM trailer mask chnls 1-9 (0xff = all masked):0x%x\n", 01005 N_TBMmask); 01006 fprintf(outfile,"TBM trailer mask chnls 10-18(0xff = all masked):0x%x\n", 01007 NC_TBMmask); 01008 fprintf(outfile,"TBM trailer mask chnls 19-27(0xff = all masked):0x%x\n", 01009 SC_TBMmask); 01010 fprintf(outfile,"TBM trailer mask chnls 28-36(0xff = all masked):0x%x\n", 01011 S_TBMmask); 01012 01013 //These bits set the Private fill/gap word value (common by FPGA) 01014 fprintf(outfile,"Private 8 bit word chnls 1-9 :0x%x\n", 01015 N_Pword); 01016 fprintf(outfile,"Private 8 bit word chnls 10-18:0x%x\n", 01017 NC_Pword); 01018 fprintf(outfile,"Private 8 bit word chnls 19-27:0x%x\n", 01019 SC_Pword); 01020 fprintf(outfile,"Private 8 bit word chnls 28-36:0x%x\n", 01021 S_Pword); 01022 01023 //These bit sets the special dac mode for random triggers 01024 fprintf(outfile,"Special Random testDAC mode (on = 0x1, off=0x0):0x%x\n", 01025 SpecialDac); 01026 01027 //These bits set the number of Out of consecutive out of sync events until a TTs OOs 01028 fprintf(outfile,"Number of Consecutive (max 1023) Out of Syncs till TTs OOS set:%d\n", 01029 Ooslvl); 01030 01031 //These bits set the number of Empty events until a TTs Error 01032 fprintf(outfile,"Number of Consecutive (max 1023) Empty events till TTs ERR set:%d\n", 01033 Errlvl); 01034 01035 //These bits set the Almost Full level in fifo-1, Almost full = TTs BUSY in fifo-1 N 01036 fprintf(outfile,"N Fifo-1 almost full level,sets TTs BUSY (max 1023):%d\n", 01037 Nfifo1Bzlvl); 01038 01039 //These bits set the Almost Full level in fifo-1, Almost full = TTs BUSY in fifo-1 NC 01040 fprintf(outfile,"NC Fifo-1 almost full level,sets TTs BUSY (max 1023):%d\n", 01041 NCfifo1Bzlvl); 01042 01043 //These bits set the Almost Full level in fifo-1, Almost full = TTs BUSY in fifo-1 SC 01044 fprintf(outfile,"SC Fifo-1 almost full level,sets TTs BUSY (max 1023):%d\n", 01045 SCfifo1Bzlvl); 01046 01047 //These bits set the Almost Full level in fifo-1, Almost full = TTs BUSY in fifo-1 S 01048 fprintf(outfile,"S Fifo-1 almost full level,sets TTs BUSY (max 1023):%d\n", 01049 Sfifo1Bzlvl); 01050 01051 //These bits set the Almost Full level in fifo-3, Almost full = TTs WARN in fifo-3 01052 fprintf(outfile,"Fifo-3 almost full level,sets TTs WARN (max 8191):%d\n", 01053 fifo3Wrnlvl); 01054 01055 fprintf(outfile,"FED Master delay 0=0,1=32,2=48,3=64:%d\n", 01056 FedTTCDelay); 01057 01058 int checkword=60508; 01059 fprintf(outfile,"Params FED file check word:%d\n", 01060 checkword); 01061 01062 fclose(outfile); 01063 01064 01065 }
| void PixelFEDCard::writeXML | ( | std::ofstream * | out | ) | const [virtual] |
Reimplemented from pos::PixelConfigBase.
Definition at line 1106 of file PixelFEDCard.cc.
References lat::endl(), and fedNumber.
01106 { 01107 std::string mthn = "[PixelFEDCard::writeXML()]\t\t\t " ; 01108 01109 *out << " <DATA>" << std::endl ; 01110 *out << " " << std::endl ; 01111 *out << " <PXLFED_NAME>PxlFED_" << fedNumber<< "</PXLFED_NAME>" << std::endl ; 01112 // *out << " <CRATE_NUMBER>1</CRATE_NUMBER>" << std::endl ; 01113 // *out << " <SLOT_NUMBER>5</SLOT_NUMBER> " << std::endl ; 01114 // *out << " <VME_ADDRESS>268435456</VME_ADDRESS>" << std::endl ; 01115 // *out << " <CRATE_LABEL>S1G03e</CRATE_LABEL>" << std::endl ; 01116 *out << "" << std::endl ; 01117 *out << " <CHANNEL_ID>1</CHANNEL_ID>" << std::endl ; 01118 *out << " <NUMBER_OF_ROCS>21</NUMBER_OF_ROCS>" << std::endl ; 01119 *out << " <CHANNEL_OFFSET_DAC_SETTINGS>0</CHANNEL_OFFSET_DAC_SETTINGS>" << std::endl ; 01120 *out << " <CHANNEL_DELAY_SETTINGS>3</CHANNEL_DELAY_SETTINGS>" << std::endl ; 01121 *out << " <CHANNEL_BLACK_HIGH>400</CHANNEL_BLACK_HIGH>" << std::endl ; 01122 *out << " <CHANNEL_BLACK_LOW>150</CHANNEL_BLACK_LOW>" << std::endl ; 01123 *out << " <CHANNEL_ULTRA_BLACK>120</CHANNEL_ULTRA_BLACK>" << std::endl ; 01124 *out << "" << std::endl ; 01125 *out << " <OPT1_CAP>0</OPT1_CAP>" << std::endl ; 01126 *out << " <OPT2_CAP>0</OPT2_CAP>" << std::endl ; 01127 *out << " <OPT3_CAP>0</OPT3_CAP>" << std::endl ; 01128 *out << " <OPT1_INP>0</OPT1_INP>" << std::endl ; 01129 *out << " <OPT2_INP>0</OPT2_INP>" << std::endl ; 01130 *out << " <OPT3_INP>0</OPT3_INP>" << std::endl ; 01131 *out << " <OPT1_OUT>0</OPT1_OUT>" << std::endl ; 01132 *out << " <OPT2_OUT>0</OPT2_OUT>" << std::endl ; 01133 *out << " <OPT3_OUT>0</OPT3_OUT>" << std::endl ; 01134 *out << " <NORTH_CLKPHB>511</NORTH_CLKPHB>" << std::endl ; 01135 *out << " <NORTHCENTER_CLKPHB>511</NORTHCENTER_CLKPHB>" << std::endl ; 01136 *out << " <SOUTHCENTER_CLKPHB>511</SOUTHCENTER_CLKPHB>" << std::endl ; 01137 *out << " <SOUTH_CLKPHB>511</SOUTH_CLKPHB>" << std::endl ; 01138 *out << " <NORTH_CTRL>0</NORTH_CTRL> " << std::endl ; 01139 *out << " <NORTHCENTER_CTRL>0</NORTHCENTER_CTRL>" << std::endl ; 01140 *out << " <SOUTHCENTER_CTRL>0</SOUTHCENTER_CTRL>" << std::endl ; 01141 *out << " <SOUTH_CTRL>0</SOUTH_CTRL>" << std::endl ; 01142 *out << " <REG1_TTCRX_FDLA>5</REG1_TTCRX_FDLA>" << std::endl ; 01143 *out << " <REG2_TTCRX_CDLA>0</REG2_TTCRX_CDLA>" << std::endl ; 01144 *out << " <REG3_TTCRX_CLKD2>155</REG3_TTCRX_CLKD2>" << std::endl ; 01145 *out << " <CENTER_CTRL>0</CENTER_CTRL>" << std::endl ; 01146 *out << " <CENTER_MODE>0</CENTER_MODE>" << std::endl ; 01147 *out << " <B1_ADCGN>0</B1_ADCGN>" << std::endl ; 01148 *out << " <B2_ADCGN>0</B2_ADCGN>" << std::endl ; 01149 *out << " <B3_ADCGN>0</B3_ADCGN>" << std::endl ; 01150 *out << " <B4_ADCGN>0</B4_ADCGN>" << std::endl ; 01151 *out << " <NORTH_BADJ>330</NORTH_BADJ>" << std::endl ; 01152 *out << " <NORTHCENTER_BADJ>330</NORTHCENTER_BADJ>" << std::endl ; 01153 *out << " <SOUTHCENTER_BADJ>330</SOUTHCENTER_BADJ>" << std::endl ; 01154 *out << " <SOUTH_BADJ>330</SOUTH_BADJ>" << std::endl ; 01155 *out << " <NORTH_TBMMASK>2</NORTH_TBMMASK>" << std::endl ; 01156 *out << " <NORTHCENTER_TBMMASK>2</NORTHCENTER_TBMMASK>" << std::endl ; 01157 *out << " <SOUTHCENTER_TBMMASK>2</SOUTHCENTER_TBMMASK>" << std::endl ; 01158 *out << " <SOUTH_TBMMASK>2</SOUTH_TBMMASK>" << std::endl ; 01159 *out << " <NORTH_PWORD>177</NORTH_PWORD>" << std::endl ; 01160 *out << " <NORTHCENTER_PWORD>178</NORTHCENTER_PWORD>" << std::endl ; 01161 *out << " <SOUTHCENTER_PWORD>179</SOUTHCENTER_PWORD>" << std::endl ; 01162 *out << " <SOUTH_PWORD>180</SOUTH_PWORD>" << std::endl ; 01163 *out << " <SPECDAC>0</SPECDAC>" << std::endl ; 01164 *out << " <OOS_LVL>0</OOS_LVL>" << std::endl ; 01165 *out << " <ERR_LVL>0</ERR_LVL>" << std::endl ; 01166 *out << " <NORTH_FIFO1_BZ_LVL>900</NORTH_FIFO1_BZ_LVL>" << std::endl ; 01167 *out << " <NORTHCENTER_FIFO1_BZ_LVL>900</NORTHCENTER_FIFO1_BZ_LVL>" << std::endl ; 01168 *out << " <SOUTHCENTER_FIFO1_BZ_LVL>900</SOUTHCENTER_FIFO1_BZ_LVL>" << std::endl ; 01169 *out << " <SOUTH_FIFO1_BZ_LVL>900</SOUTH_FIFO1_BZ_LVL>" << std::endl ; 01170 *out << " <FIFO3_WRN_LVL>7680</FIFO3_WRN_LVL> " << std::endl ; 01171 *out << " " << std::endl ; 01172 *out << " </DATA>" << std::endl ; 01173 *out << " " << std::endl ; 01174 }
| void PixelFEDCard::writeXML | ( | pos::PixelConfigKey | key, | |
| int | version, | |||
| std::string | path | |||
| ) | const [virtual] |
Reimplemented from pos::PixelConfigBase.
Definition at line 1188 of file PixelFEDCard.cc.
References GenMuonPlsPt100GeV_cfg::cout, lat::endl(), evf::getTime(), and out.
01188 { 01189 std::string mthn = "[PixelFEDCard::writeXML()]\t\t\t " ; 01190 std::stringstream fullPath ; 01191 01192 fullPath << path << "/fedcard.xml" ; 01193 std::cout << mthn << "Writing to: |" << fullPath.str() << "|" << std::endl ; 01194 01195 std::ofstream out(fullPath.str().c_str()) ; 01196 01197 out << "<ROOT>" << std::endl ; 01198 out << "" << std::endl ; 01199 out << " <HEADER>" << std::endl ; 01200 out << " <TYPE>" << std::endl ; 01201 out << " <EXTENSION_TABLE_NAME>FED_CONFIGURATION</EXTENSION_TABLE_NAME>" << std::endl ; 01202 out << " <NAME>Pixel FED Configuration</NAME>" << std::endl ; 01203 out << " </TYPE>" << std::endl ; 01204 out << " <RUN>" << std::endl ; 01205 out << " <RUN_TYPE>Pixel FED Configuration</RUN_TYPE>" << std::endl ; 01206 out << " <RUN_NUMBER>1</RUN_NUMBER>" << std::endl ; 01207 out << " <RUN_BEGIN_TIMESTAMP>" << PixelTimeFormatter::getTime() << "</RUN_BEGIN_TIMESTAMP>" << std::endl ; 01208 out << " <COMMENT_DESCRIPTION>Pixel FED Configuration</COMMENT_DESCRIPTION>" << std::endl ; 01209 out << " <LOCATION>CERN TAC</LOCATION>" << std::endl ; 01210 out << " <INITIATED_BY_USER>Dario Menasce</INITIATED_BY_USER>" << std::endl ; 01211 out << " </RUN>" << std::endl ; 01212 out << " </HEADER>" << std::endl ; 01213 out << "" << std::endl ; 01214 out << " <DATA_SET>" << std::endl ; 01215 out << "" << std::endl ; 01216 out << " <VERSION>T_E_S_T</VERSION>" << std::endl ; 01217 out << " <COMMENT_DESCRIPTION>Pixel FED Configuration</COMMENT_DESCRIPTION>" << std::endl ; 01218 out << "" << std::endl ; 01219 out << " <PART>" << std::endl ; 01220 out << " <NAME_LABEL>CMS-PIXEL-ROOT</NAME_LABEL>" << std::endl ; 01221 out << " <KIND_OF_PART>Detector ROOT</KIND_OF_PART>" << std::endl ; 01222 out << " </PART>" << std::endl ; 01223 out << "" << std::endl ; 01224 out << " <DATA>" << std::endl ; 01225 out << " <PXLFED_NAME>PxlFED_32</PXLFED_NAME>" << std::endl ; 01226 out << " <CRATE_NUMBER>1</CRATE_NUMBER>" << std::endl ; 01227 out << " <SLOT_NUMBER>5</SLOT_NUMBER> " << std::endl ; 01228 out << " <VME_ADDRESS>268435456</VME_ADDRESS>" << std::endl ; 01229 out << " <CRATE_LABEL>S1G03e</CRATE_LABEL>" << std::endl ; 01230 out << "" << std::endl ; 01231 out << " <CHANNEL_ID>1</CHANNEL_ID>" << std::endl ; 01232 out << " <NUMBER_OF_ROCS>21</NUMBER_OF_ROCS>" << std::endl ; 01233 out << " <CHANNEL_OFFSET_DAC_SETTINGS>0</CHANNEL_OFFSET_DAC_SETTINGS>" << std::endl ; 01234 out << " <CHANNEL_DELAY_SETTINGS>3</CHANNEL_DELAY_SETTINGS>" << std::endl ; 01235 out << " <CHANNEL_BLACK_HIGH>400</CHANNEL_BLACK_HIGH>" << std::endl ; 01236 out << " <CHANNEL_BLACK_LOW>150</CHANNEL_BLACK_LOW>" << std::endl ; 01237 out << " <CHANNEL_ULTRA_BLACK>120</CHANNEL_ULTRA_BLACK>" << std::endl ; 01238 out << "" << std::endl ; 01239 out << " <OPT1_CAP>0</OPT1_CAP>" << std::endl ; 01240 out << " <OPT2_CAP>0</OPT2_CAP>" << std::endl ; 01241 out << " <OPT3_CAP>0</OPT3_CAP>" << std::endl ; 01242 out << " <OPT1_INP>0</OPT1_INP>" << std::endl ; 01243 out << " <OPT2_INP>0</OPT2_INP>" << std::endl ; 01244 out << " <OPT3_INP>0</OPT3_INP>" << std::endl ; 01245 out << " <OPT1_OUT>0</OPT1_OUT>" << std::endl ; 01246 out << " <OPT2_OUT>0</OPT2_OUT>" << std::endl ; 01247 out << " <OPT3_OUT>0</OPT3_OUT>" << std::endl ; 01248 out << " <NORTH_CLKPHB>511</NORTH_CLKPHB>" << std::endl ; 01249 out << " <NORTHCENTER_CLKPHB>511</NORTHCENTER_CLKPHB>" << std::endl ; 01250 out << " <SOUTHCENTER_CLKPHB>511</SOUTHCENTER_CLKPHB>" << std::endl ; 01251 out << " <SOUTH_CLKPHB>511</SOUTH_CLKPHB>" << std::endl ; 01252 out << " <NORTH_CTRL>0</NORTH_CTRL> " << std::endl ; 01253 out << " <NORTHCENTER_CTRL>0</NORTHCENTER_CTRL>" << std::endl ; 01254 out << " <SOUTHCENTER_CTRL>0</SOUTHCENTER_CTRL>" << std::endl ; 01255 out << " <SOUTH_CTRL>0</SOUTH_CTRL>" << std::endl ; 01256 out << " <REG1_TTCRX_FDLA>5</REG1_TTCRX_FDLA>" << std::endl ; 01257 out << " <REG2_TTCRX_CDLA>0</REG2_TTCRX_CDLA>" << std::endl ; 01258 out << " <REG3_TTCRX_CLKD2>155</REG3_TTCRX_CLKD2>" << std::endl ; 01259 out << " <CENTER_CTRL>0</CENTER_CTRL>" << std::endl ; 01260 out << " <CENTER_MODE>0</CENTER_MODE>" << std::endl ; 01261 out << " <B1_ADCGN>0</B1_ADCGN>" << std::endl ; 01262 out << " <B2_ADCGN>0</B2_ADCGN>" << std::endl ; 01263 out << " <B3_ADCGN>0</B3_ADCGN>" << std::endl ; 01264 out << " <B4_ADCGN>0</B4_ADCGN>" << std::endl ; 01265 out << " <NORTH_BADJ>330</NORTH_BADJ>" << std::endl ; 01266 out << " <NORTHCENTER_BADJ>330</NORTHCENTER_BADJ>" << std::endl ; 01267 out << " <SOUTHCENTER_BADJ>330</SOUTHCENTER_BADJ>" << std::endl ; 01268 out << " <SOUTH_BADJ>330</SOUTH_BADJ>" << std::endl ; 01269 out << " <NORTH_TBMMASK>2</NORTH_TBMMASK>" << std::endl ; 01270 out << " <NORTHCENTER_TBMMASK>2</NORTHCENTER_TBMMASK>" << std::endl ; 01271 out << " <SOUTHCENTER_TBMMASK>2</SOUTHCENTER_TBMMASK>" << std::endl ; 01272 out << " <SOUTH_TBMMASK>2</SOUTH_TBMMASK>" << std::endl ; 01273 out << " <NORTH_PWORD>177</NORTH_PWORD>" << std::endl ; 01274 out << " <NORTHCENTER_PWORD>178</NORTHCENTER_PWORD>" << std::endl ; 01275 out << " <SOUTHCENTER_PWORD>179</SOUTHCENTER_PWORD>" << std::endl ; 01276 out << " <SOUTH_PWORD>180</SOUTH_PWORD>" << std::endl ; 01277 out << " <SPECDAC>0</SPECDAC>" << std::endl ; 01278 out << " <OOS_LVL>0</OOS_LVL>" << std::endl ; 01279 out << " <ERR_LVL>0</ERR_LVL>" << std::endl ; 01280 out << " <NORTH_FIFO1_BZ_LVL>900</NORTH_FIFO1_BZ_LVL>" << std::endl ; 01281 out << " <NORTHCENTER_FIFO1_BZ_LVL>900</NORTHCENTER_FIFO1_BZ_LVL>" << std::endl ; 01282 out << " <SOUTHCENTER_FIFO1_BZ_LVL>900</SOUTHCENTER_FIFO1_BZ_LVL>" << std::endl ; 01283 out << " <SOUTH_FIFO1_BZ_LVL>900</SOUTH_FIFO1_BZ_LVL>" << std::endl ; 01284 out << " <FIFO3_WRN_LVL>7680</FIFO3_WRN_LVL> " << std::endl ; 01285 out << " </DATA>" << std::endl ; 01286 /* 01287 out<< " <DATA> 01288 <OPT1_CAP>0</OPT1_CAP> 01289 <OPT2_CAP>0</OPT2_CAP> 01290 <OPT3_CAP>0</OPT3_CAP> 01291 <OPT1_INP>0</OPT1_INP> 01292 <OPT2_INP>0</OPT2_INP> 01293 <OPT3_INP>0</OPT3_INP> 01294 <OPT1_OUT>0</OPT1_OUT> 01295 <OPT2_OUT>0</OPT2_OUT> 01296 <OPT3_OUT>0</OPT3_OUT> 01297 <NORTH_CLKPHB>511</NORTH_CLKPHB> 01298 <NORTHCENTER_CLKPHB>511</NORTHCENTER_CLKPHB> 01299 <SOUTHCENTER_CLKPHB>511</SOUTHCENTER_CLKPHB> 01300 <SOUTH_CLKPHB>511</SOUTH_CLKPHB> 01301 <NORTH_CTRL>0</NORTH_CTRL> 01302 <NORTHCENTER_CTRL>0</NORTHCENTER_CTRL> 01303 <SOUTHCENTER_CTRL>0</SOUTHCENTER_CTRL> 01304 <SOUTH_CTRL>0</SOUTH_CTRL> 01305 <REG1_TTCRX_FDLA>5</REG1_TTCRX_FDLA> 01306 <REG2_TTCRX_CDLA>0</REG2_TTCRX_CDLA> 01307 <REG3_TTCRX_CLKD2>155</REG3_TTCRX_CLKD2> 01308 <CENTER_CTRL>0</CENTER_CTRL> 01309 <CENTER_MODE>0</CENTER_MODE> 01310 <B1_ADCGN>0</B1_ADCGN> 01311 <B2_ADCGN>0</B2_ADCGN> 01312 <B3_ADCGN>0</B3_ADCGN> 01313 <B4_ADCGN>0</B4_ADCGN> 01314 <NORTH_BADJ>330</NORTH_BADJ> 01315 <NORTHCENTER_BADJ>330</NORTHCENTER_BADJ> 01316 <SOUTHCENTER_BADJ>330</SOUTHCENTER_BADJ> 01317 <SOUTH_BADJ>330</SOUTH_BADJ> 01318 <NORTH_TBMMASK>2</NORTH_TBMMASK> 01319 <NORTHCENTER_TBMMASK>2</NORTHCENTER_TBMMASK> 01320 <SOUTHCENTER_TBMMASK>2</SOUTHCENTER_TBMMASK> 01321 <SOUTH_TBMMASK>2</SOUTH_TBMMASK> 01322 <NORTH_PWORD>177</NORTH_PWORD> 01323 <NORTHCENTER_PWORD>178</NORTHCENTER_PWORD> 01324 <SOUTHCENTER_PWORD>179</SOUTHCENTER_PWORD> 01325 <SOUTH_PWORD>180</SOUTH_PWORD> 01326 <SPECDAC>0</SPECDAC> 01327 <OOS_LVL>0</OOS_LVL> 01328 <ERR_LVL>0</ERR_LVL> 01329 <NORTH_FIFO1_BZ_LVL>900</NORTH_FIFO1_BZ_LVL> 01330 <NORTHCENTER_FIFO1_BZ_LVL>900</NORTHCENTER_FIFO1_BZ_LVL> 01331 <SOUTHCENTER_FIFO1_BZ_LVL>900</SOUTHCENTER_FIFO1_BZ_LVL> 01332 <SOUTH_FIFO1_BZ_LVL>900</SOUTH_FIFO1_BZ_LVL> 01333 <FIFO3_WRN_LVL>7680</FIFO3_WRN_LVL> 01334 </DATA> 01335 01336 </DATA_SET> 01337 out << " </DATA_SET>" << std::endl ; 01338 out << "</ROOT>" << std::endl ; 01339 01340 out.close() ; 01341 */ 01342 std::cout << mthn << "Data written" << std::endl ; 01343 }
| void PixelFEDCard::writeXMLHeader | ( | pos::PixelConfigKey | key, | |
| int | version, | |||
| std::string | path, | |||
| std::ofstream * | out | |||
| ) | const [virtual] |
Reimplemented from pos::PixelConfigBase.
Definition at line 1068 of file PixelFEDCard.cc.
References GenMuonPlsPt100GeV_cfg::cout, lat::endl(), and evf::getTime().
01068 { 01069 std::string mthn = "[PixelFEDCard::writeXMLHeader()]\t\t\t " ; 01070 std::stringstream fullPath ; 01071 01072 fullPath << path << "/fedcard.xml" ; 01073 std::cout << mthn << "Writing to: " << fullPath.str() << "" << std::endl ; 01074 01075 out->open(fullPath.str().c_str()) ; 01076 01077 *out << "<?xml version='1.0' encoding='UTF-8' standalone='yes'?>" << std::endl ; 01078 *out << "<ROOT>" << std::endl ; 01079 *out << "" << std::endl ; 01080 *out << " <HEADER>" << std::endl ; 01081 *out << " <TYPE>" << std::endl ; 01082 *out << " <EXTENSION_TABLE_NAME>FED_CONFIGURATION</EXTENSION_TABLE_NAME>" << std::endl ; 01083 *out << " <NAME>Pixel FED Configuration</NAME>" << std::endl ; 01084 *out << " </TYPE>" << std::endl ; 01085 *out << " <RUN>" << std::endl ; 01086 *out << " <RUN_TYPE>Pixel FED Configuration</RUN_TYPE>" << std::endl ; 01087 *out << " <RUN_NUMBER>1</RUN_NUMBER>" << std::endl ; 01088 *out << " <RUN_BEGIN_TIMESTAMP>" << PixelTimeFormatter::getTime() << "</RUN_BEGIN_TIMESTAMP>" << std::endl ; 01089 *out << " <COMMENT_DESCRIPTION>Pixel FED Configuration</COMMENT_DESCRIPTION>" << std::endl ; 01090 *out << " <LOCATION>CERN TAC</LOCATION>" << std::endl ; 01091 *out << " <INITIATED_BY_USER>Dario Menasce</INITIATED_BY_USER>" << std::endl ; 01092 *out << " </RUN>" << std::endl ; 01093 *out << " </HEADER>" << std::endl ; 01094 *out << "" << std::endl ; 01095 *out << " <DATA_SET>" << std::endl ; 01096 *out << "" << std::endl ; 01097 *out << " <VERSION>" << version << "</VERSION>" << std::endl ; 01098 *out << " <COMMENT_DESCRIPTION>Pixel FED Configuration</COMMENT_DESCRIPTION>" << std::endl ; 01099 *out << "" << std::endl ; 01100 *out << " <PART>" << std::endl ; 01101 *out << " <NAME_LABEL>CMS-PIXEL-ROOT</NAME_LABEL>" << std::endl ; 01102 *out << " <KIND_OF_PART>Detector ROOT</KIND_OF_PART>" << std::endl ; 01103 *out << " </PART>" << std::endl ; 01104 }
| void PixelFEDCard::writeXMLTrailer | ( | std::ofstream * | out | ) | const [virtual] |
Reimplemented from pos::PixelConfigBase.
Definition at line 1177 of file PixelFEDCard.cc.
References GenMuonPlsPt100GeV_cfg::cout, and lat::endl().
01177 { 01178 std::string mthn = "[PixelFEDCard::writeXMLTrailer()]\t\t\t " ; 01179 01180 *out << " </DATA_SET>" << std::endl ; 01181 *out << "</ROOT>" << std::endl ; 01182 01183 out->close() ; 01184 std::cout << mthn << "Data written" << std::endl ; 01185 }
Definition at line 104 of file PixelFEDCard.h.
Referenced by clear(), restoreControlAndModeRegister(), and writeASCII().
| unsigned long pos::PixelFEDCard::FEDBASE_0 |
| unsigned long pos::PixelFEDCard::fedNumber |
Definition at line 136 of file PixelFEDCard.h.
Referenced by pos::PixelConfigurationVerifier::checkChannelEnable(), clear(), writeASCII(), and writeXML().
Definition at line 107 of file PixelFEDCard.h.
Referenced by clear(), restoreControlAndModeRegister(), and writeASCII().
Definition at line 116 of file PixelFEDCard.h.
Referenced by clear(), restoreBaselinAndChannelMasks(), and writeASCII().
Definition at line 116 of file PixelFEDCard.h.
Referenced by clear(), restoreBaselinAndChannelMasks(), and writeASCII().
Definition at line 85 of file PixelFEDCard.h.
Referenced by clear(), enabledChannels(), restoreBaselinAndChannelMasks(), setChannel(), and writeASCII().
Definition at line 85 of file PixelFEDCard.h.
Referenced by clear(), enabledChannels(), restoreBaselinAndChannelMasks(), setChannel(), and writeASCII().
Definition at line 110 of file PixelFEDCard.h.
| int pos::PixelFEDCard::ROC_L0[36][26] |
Definition at line 81 of file PixelFEDCard.h.
Referenced by clear(), readDBROCLevels(), and writeASCII().
| int pos::PixelFEDCard::ROC_L1[36][26] |
Definition at line 81 of file PixelFEDCard.h.
Referenced by clear(), readDBROCLevels(), and writeASCII().
| int pos::PixelFEDCard::ROC_L2[36][26] |
Definition at line 81 of file PixelFEDCard.h.
Referenced by clear(), readDBROCLevels(), and writeASCII().
| int pos::PixelFEDCard::ROC_L3[36][26] |
Definition at line 81 of file PixelFEDCard.h.
Referenced by clear(), readDBROCLevels(), and writeASCII().
| int pos::PixelFEDCard::ROC_L4[36][26] |
Definition at line 81 of file PixelFEDCard.h.
Referenced by clear(), readDBROCLevels(), and writeASCII().
Definition at line 116 of file PixelFEDCard.h.
Referenced by clear(), restoreBaselinAndChannelMasks(), and writeASCII().
Definition at line 116 of file PixelFEDCard.h.
Referenced by clear(), restoreBaselinAndChannelMasks(), and writeASCII().
Definition at line 85 of file PixelFEDCard.h.
Referenced by clear(), enabledChannels(), restoreBaselinAndChannelMasks(), setChannel(), and writeASCII().
Definition at line 85 of file PixelFEDCard.h.
Referenced by clear(), enabledChannels(), restoreBaselinAndChannelMasks(), setChannel(), and writeASCII().
Definition at line 78 of file PixelFEDCard.h.
Referenced by clear(), readDBTBMLevels(), and writeASCII().
Definition at line 78 of file PixelFEDCard.h.
Referenced by clear(), readDBTBMLevels(), and writeASCII().
Definition at line 78 of file PixelFEDCard.h.
Referenced by clear(), readDBTBMLevels(), and writeASCII().
Definition at line 78 of file PixelFEDCard.h.
Referenced by clear(), readDBTBMLevels(), and writeASCII().
Definition at line 78 of file PixelFEDCard.h.
Referenced by clear(), readDBTBMLevels(), and writeASCII().
Definition at line 79 of file PixelFEDCard.h.
Referenced by clear(), readDBTBMLevels(), and writeASCII().
Definition at line 79 of file PixelFEDCard.h.
Referenced by clear(), readDBTBMLevels(), and writeASCII().
Definition at line 79 of file PixelFEDCard.h.
Referenced by clear(), readDBTBMLevels(), and writeASCII().
Definition at line 79 of file PixelFEDCard.h.
Referenced by clear(), readDBTBMLevels(), and writeASCII().
Definition at line 79 of file PixelFEDCard.h.
Referenced by clear(), readDBTBMLevels(), and writeASCII().
1.5.4