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CSCMotherboardME11.cc
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1 //-----------------------------------------------------------------------------
2 //
3 // Class: CSCMotherboardME11
4 //
5 // Description:
6 // Extended CSCMotherboard for ME11 to handle ME1a and ME1b separately
7 //
8 // Author List: Vadim Khotilovich 12 May 2009
9 //
10 //
11 //-----------------------------------------------------------------------------
12 
16 
17 
18 
19 // LUT for which ME1/1 wire group can cross which ME1/a halfstrip
20 // 1st index: WG number
21 // 2nd index: inclusive HS range
22 const int CSCMotherboardME11::lut_wg_vs_hs_me1a[48][2] = {
23 {0, 95},{0, 95},{0, 95},{0, 95},{0, 95},
24 {0, 95},{0, 95},{0, 95},{0, 95},{0, 95},
25 {0, 95},{0, 95},{0, 77},{0, 61},{0, 39},
26 {0, 22},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
27 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
28 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
29 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
30 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
31 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
32 {-1,-1},{-1,-1},{-1,-1} };
33 // a modified LUT for ganged ME1a
34 const int CSCMotherboardME11::lut_wg_vs_hs_me1ag[48][2] = {
35 {0, 31},{0, 31},{0, 31},{0, 31},{0, 31},
36 {0, 31},{0, 31},{0, 31},{0, 31},{0, 31},
37 {0, 31},{0, 31},{0, 31},{0, 31},{0, 31},
38 {0, 22},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
39 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
40 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
41 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
42 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
43 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
44 {-1,-1},{-1,-1},{-1,-1} };
45 
46 // LUT for which ME1/1 wire group can cross which ME1/b halfstrip
47 // 1st index: WG number
48 // 2nd index: inclusive HS range
49 const int CSCMotherboardME11::lut_wg_vs_hs_me1b[48][2] = {
50 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
51 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
52 {100, 127},{73, 127},{47, 127},{22, 127},{0, 127},
53 {0, 127},{0, 127},{0, 127},{0, 127},{0, 127},
54 {0, 127},{0, 127},{0, 127},{0, 127},{0, 127},
55 {0, 127},{0, 127},{0, 127},{0, 127},{0, 127},
56 {0, 127},{0, 127},{0, 127},{0, 127},{0, 127},
57 {0, 127},{0, 127},{0, 127},{0, 127},{0, 127},
58 {0, 127},{0, 127},{0, 127},{0, 127},{0, 105},
59 {0, 93},{0, 78},{0, 63} };
60 
61 
63  unsigned sector, unsigned subsector,
64  unsigned chamber,
65  const edm::ParameterSet& conf) :
66  CSCMotherboard(endcap, station, sector, subsector, chamber, conf)
67 {
68  edm::ParameterSet commonParams = conf.getParameter<edm::ParameterSet>("commonParam");
69 
70  // special configuration parameters for ME11 treatment
71  smartME1aME1b = commonParams.getParameter<bool>("smartME1aME1b");
72  disableME1a = commonParams.getParameter<bool>("disableME1a");
73  gangedME1a = commonParams.getParameter<bool>("gangedME1a");
74 
75  if (!isSLHC) edm::LogError("L1CSCTPEmulatorConfigError")
76  << "+++ Upgrade CSCMotherboardME11 constructed while isSLHC is not set! +++\n";
77  if (!smartME1aME1b) edm::LogError("L1CSCTPEmulatorConfigError")
78  << "+++ Upgrade CSCMotherboardME11 constructed while smartME1aME1b is not set! +++\n";
79 
80  edm::ParameterSet alctParams = conf.getParameter<edm::ParameterSet>("alctSLHC");
81  edm::ParameterSet clctParams = conf.getParameter<edm::ParameterSet>("clctSLHC");
82  edm::ParameterSet tmbParams = conf.getParameter<edm::ParameterSet>("tmbSLHC");
83 
84  clct1a.reset( new CSCCathodeLCTProcessor(endcap, station, sector, subsector, chamber, clctParams, commonParams, tmbParams) );
85  clct1a->setRing(4);
86 
87  match_earliest_alct_me11_only = tmbParams.getParameter<bool>("matchEarliestAlctME11Only");
88  match_earliest_clct_me11_only = tmbParams.getParameter<bool>("matchEarliestClctME11Only");
89 
90  // if true: use regular CLCT-to-ALCT matching in TMB
91  // if false: do ALCT-to-CLCT matching
92  clct_to_alct = tmbParams.getParameter<bool>("clctToAlct");
93 
94  // whether to not reuse CLCTs that were used by previous matching ALCTs
95  // in ALCT-to-CLCT algorithm
96  drop_used_clcts = tmbParams.getParameter<bool>("tmbDropUsedClcts");
97 
98  tmb_cross_bx_algo = tmbParams.getParameter<unsigned int>("tmbCrossBxAlgorithm");
99 
100  // maximum lcts per BX in ME11: 2, 3, 4 or 999
101  max_me11_lcts = tmbParams.getParameter<unsigned int>("maxME11LCTs");
102 
104  for (unsigned int m=2; m<match_trig_window_size; m+=2)
105  {
106  pref[m-1] = pref[0] - m/2;
107  pref[m] = pref[0] + m/2;
108  }
109 }
110 
111 
113 {
114  // Constructor used only for testing.
115 
116  clct1a.reset( new CSCCathodeLCTProcessor() );
117  clct1a->setRing(4);
118 
120  for (unsigned int m=2; m<match_trig_window_size; m+=2)
121  {
122  pref[m-1] = pref[0] - m/2;
123  pref[m] = pref[0] + m/2;
124  }
125 }
126 
127 
129 {
130 }
131 
132 
134 {
136  if (clct1a) clct1a->clear();
137  for (int bx = 0; bx < MAX_LCT_BINS; bx++)
138  {
139  //firstLCT1a[bx].clear();
140  //secondLCT1a[bx].clear();
141  for (unsigned int mbx = 0; mbx < match_trig_window_size; mbx++)
142  for (int i=0;i<2;i++)
143  {
144  allLCTs1b[bx][mbx][i].clear();
145  allLCTs1a[bx][mbx][i].clear();
146  }
147  }
148 }
149 
150 // Set configuration parameters obtained via EventSetup mechanism.
152 {
153  alct->setConfigParameters(conf);
154  clct->setConfigParameters(conf);
155  clct1a->setConfigParameters(conf);
156  // No config. parameters in DB for the TMB itself yet.
157 }
158 
159 
161  const CSCComparatorDigiCollection* compdc)
162 {
163  clear();
164 
165  if (!( alct && clct && clct1a && smartME1aME1b))
166  {
167  if (infoV >= 0) edm::LogError("L1CSCTPEmulatorSetupError")
168  << "+++ run() called for non-existing ALCT/CLCT processor! +++ \n";
169  return;
170  }
171 
172  alctV = alct->run(wiredc); // run anodeLCT
173  clctV1b = clct->run(compdc); // run cathodeLCT in ME1/b
174  clctV1a = clct1a->run(compdc); // run cathodeLCT in ME1/a
175 
176  //int n_clct_a=0, n_clct_b=0;
177  //if (clct1a->bestCLCT[6].isValid() && clct1a->bestCLCT[6].getBX()==6) n_clct_a++;
178  //if (clct1a->secondCLCT[6].isValid() && clct1a->secondCLCT[6].getBX()==6) n_clct_a++;
179 
180  int used_alct_mask[20], used_alct_mask_1a[20];
181  int used_clct_mask[20], used_clct_mask_1a[20];
182  for (int b=0;b<20;b++)
183  used_alct_mask[b] = used_alct_mask_1a[b] = used_clct_mask[b] = used_clct_mask_1a[b] = 0;
184 
185  // CLCT-centric CLCT-to-ALCT matching
186  if (clct_to_alct) for (int bx_clct = 0; bx_clct < CSCCathodeLCTProcessor::MAX_CLCT_BINS; bx_clct++)
187  {
188  // matching in ME1b
189  if (clct->bestCLCT[bx_clct].isValid())
190  {
191  int bx_alct_start = bx_clct - match_trig_window_size/2;
192  int bx_alct_stop = bx_clct + match_trig_window_size/2;
193  for (int bx_alct = bx_alct_start; bx_alct <= bx_alct_stop; bx_alct++)
194  {
195  if (bx_alct < 0 || bx_alct >= CSCAnodeLCTProcessor::MAX_ALCT_BINS) continue;
196  if (drop_used_alcts && used_alct_mask[bx_alct]) continue;
197  if (alct->bestALCT[bx_alct].isValid())
198  {
199  if (infoV > 1) LogTrace("CSCMotherboard")
200  << "Successful CLCT-ALCT match in ME1b: bx_clct = " << bx_clct
201  << "; match window: [" << bx_alct_start << "; " << bx_alct_stop
202  << "]; bx_alct = " << bx_alct;
203  int mbx = bx_alct_stop - bx_alct;
204  correlateLCTs(alct->bestALCT[bx_alct], alct->secondALCT[bx_alct],
205  clct->bestCLCT[bx_clct], clct->secondCLCT[bx_clct],
206  allLCTs1b[bx_alct][mbx][0], allLCTs1b[bx_alct][mbx][1], ME1B);
207  if (allLCTs1b[bx_alct][mbx][0].isValid())
208  {
209  used_alct_mask[bx_alct] += 1;
211  }
212  }
213  }
214  // Do not report CLCT-only LCT for ME1b
215  }
216  // matching in ME1a
217  if (clct1a->bestCLCT[bx_clct].isValid())
218  {
219  int bx_alct_start = bx_clct - match_trig_window_size/2;
220  int bx_alct_stop = bx_clct + match_trig_window_size/2;
221  for (int bx_alct = bx_alct_start; bx_alct <= bx_alct_stop; bx_alct++)
222  {
223  if (bx_alct < 0 || bx_alct >= CSCAnodeLCTProcessor::MAX_ALCT_BINS) continue;
224  if (drop_used_alcts && used_alct_mask_1a[bx_alct]) continue;
225  if (alct->bestALCT[bx_alct].isValid())
226  {
227  if (infoV > 1) LogTrace("CSCMotherboard")
228  << "Successful CLCT-ALCT match in ME1a: bx_clct = " << bx_clct
229  << "; match window: [" << bx_alct_start << "; " << bx_alct_stop
230  << "]; bx_alct = " << bx_alct;
231  int mbx = bx_alct_stop - bx_alct;
232  correlateLCTs(alct->bestALCT[bx_alct], alct->secondALCT[bx_alct],
233  clct1a->bestCLCT[bx_clct], clct1a->secondCLCT[bx_clct],
234  allLCTs1a[bx_alct][mbx][0], allLCTs1a[bx_alct][mbx][1], ME1A);
235  if (allLCTs1a[bx_alct][mbx][0].isValid())
236  {
237  used_alct_mask_1a[bx_alct] += 1;
239  }
240  }
241  }
242  // Do not report CLCT-only LCT for ME1b
243  }
244  // Do not attempt to make ALCT-only LCT for ME1b
245  } // end of CLCT-centric matching
246 
247  // ALCT-centric ALCT-to-CLCT matching
248  else for (int bx_alct = 0; bx_alct < CSCAnodeLCTProcessor::MAX_ALCT_BINS; bx_alct++)
249  {
250  if (alct->bestALCT[bx_alct].isValid())
251  {
252  int bx_clct_start = bx_alct - match_trig_window_size/2;
253  int bx_clct_stop = bx_alct + match_trig_window_size/2;
254 
255  // matching in ME1b
256  for (int bx_clct = bx_clct_start; bx_clct <= bx_clct_stop; bx_clct++)
257  {
258  if (bx_clct < 0 || bx_clct >= CSCCathodeLCTProcessor::MAX_CLCT_BINS) continue;
259  if (drop_used_clcts && used_clct_mask[bx_clct]) continue;
260  if (clct->bestCLCT[bx_clct].isValid())
261  {
262  if (infoV > 1) LogTrace("CSCMotherboard")
263  << "Successful ALCT-CLCT match in ME1b: bx_alct = " << bx_alct
264  << "; match window: [" << bx_clct_start << "; " << bx_clct_stop
265  << "]; bx_clct = " << bx_clct;
266  int mbx = bx_clct-bx_clct_start;
267  correlateLCTs(alct->bestALCT[bx_alct], alct->secondALCT[bx_alct],
268  clct->bestCLCT[bx_clct], clct->secondCLCT[bx_clct],
269  allLCTs1b[bx_alct][mbx][0], allLCTs1b[bx_alct][mbx][1], ME1B);
270  if (allLCTs1b[bx_alct][mbx][0].isValid())
271  {
272  used_clct_mask[bx_clct] += 1;
274  }
275  }
276  }
277 
278  // matching in ME1a
279  for (int bx_clct = bx_clct_start; bx_clct <= bx_clct_stop; bx_clct++)
280  {
281  if (bx_clct < 0 || bx_clct >= CSCCathodeLCTProcessor::MAX_CLCT_BINS) continue;
282  if (drop_used_clcts && used_clct_mask_1a[bx_clct]) continue;
283  if (clct1a->bestCLCT[bx_clct].isValid())
284  {
285  if (infoV > 1) LogTrace("CSCMotherboard")
286  << "Successful ALCT-CLCT match in ME1a: bx_alct = " << bx_alct
287  << "; match window: [" << bx_clct_start << "; " << bx_clct_stop
288  << "]; bx_clct = " << bx_clct;
289  int mbx = bx_clct-bx_clct_start;
290  correlateLCTs(alct->bestALCT[bx_alct], alct->secondALCT[bx_alct],
291  clct1a->bestCLCT[bx_clct], clct1a->secondCLCT[bx_clct],
292  allLCTs1a[bx_alct][mbx][0], allLCTs1a[bx_alct][mbx][1], ME1A);
293  if (allLCTs1a[bx_alct][mbx][0].isValid())
294  {
295  used_clct_mask_1a[bx_clct] += 1;
297  }
298  }
299  }
300  }
301  } // end of ALCT-centric matching
302 
303  // reduction of nLCTs per each BX
304  for (int bx = 0; bx < MAX_LCT_BINS; bx++)
305  {
306  // counting
307  unsigned int n1a=0, n1b=0;
308  for (unsigned int mbx = 0; mbx < match_trig_window_size; mbx++)
309  for (int i=0;i<2;i++)
310  {
311  int cbx = bx + mbx - match_trig_window_size/2;
312  if (allLCTs1b[bx][mbx][i].isValid())
313  {
314  n1b++;
315  if (infoV > 0) LogDebug("CSCMotherboard") << "1b LCT"<<i+1<<" "<<bx<<"/"<<cbx<<": "<<allLCTs1b[bx][mbx][i];
316  }
317  if (allLCTs1a[bx][mbx][i].isValid())
318  {
319  n1a++;
320  if (infoV > 0) LogDebug("CSCMotherboard") << "1a LCT"<<i+1<<" "<<bx<<"/"<<cbx<<": "<<allLCTs1a[bx][mbx][i];
321  }
322  }
323  if (infoV > 0 && n1a+n1b>0) LogDebug("CSCMotherboard") <<"bx "<<bx<<" nLCT:"<<n1a<<" "<<n1b<<" "<<n1a+n1b;
324 
325  // some simple cross-bx sorting algorithms
326  if (tmb_cross_bx_algo == 1 && (n1a>2 || n1b>2) )
327  {
328  n1a=0, n1b=0;
329  for (unsigned int mbx = 0; mbx < match_trig_window_size; mbx++)
330  for (int i=0;i<2;i++)
331  {
332  if (allLCTs1b[bx][pref[mbx]][i].isValid())
333  {
334  n1b++;
335  if (n1b>2) allLCTs1b[bx][pref[mbx]][i].clear();
336  }
337  if (allLCTs1a[bx][pref[mbx]][i].isValid())
338  {
339  n1a++;
340  if (n1a>2) allLCTs1a[bx][pref[mbx]][i].clear();
341  }
342  }
343 
344  if (infoV > 0) LogDebug("CSCMotherboard") <<"After x-bx sorting:";
345  n1a=0, n1b=0;
346  for (unsigned int mbx = 0; mbx < match_trig_window_size; mbx++)
347  for (int i=0;i<2;i++)
348  {
349  int cbx = bx + mbx - match_trig_window_size/2;
350  if (allLCTs1b[bx][mbx][i].isValid())
351  {
352  n1b++;
353  if (infoV > 0) LogDebug("CSCMotherboard") << "1b LCT"<<i+1<<" "<<bx<<"/"<<cbx<<": "<<allLCTs1b[bx][mbx][i];
354  }
355  if (allLCTs1a[bx][mbx][i].isValid())
356  {
357  n1a++;
358  if (infoV > 0) LogDebug("CSCMotherboard") << "1a LCT"<<i+1<<" "<<bx<<"/"<<cbx<<": "<<allLCTs1a[bx][mbx][i];
359  }
360  }
361  if (infoV > 0 && n1a+n1b>0) LogDebug("CSCMotherboard") <<"bx "<<bx<<" nnLCT:"<<n1a<<" "<<n1b<<" "<<n1a+n1b;
362  } // x-bx sorting
363 
364  // Maximum 2 or 3 per whole ME11 per BX case:
365  // (supposedly, now we should have max 2 per bx in each 1a and 1b)
366  if ( n1a+n1b > max_me11_lcts )
367  {
368  // do it simple so far: take all low eta 1/b stubs
369  unsigned int nLCT=n1b;
370  n1a=0;
371  // right now nLCT<=2; cut 1a if necessary
372  for (unsigned int mbx=0; mbx<match_trig_window_size; mbx++)
373  for (int i=0;i<2;i++)
374  if (allLCTs1a[bx][mbx][i].isValid()) {
375  nLCT++;
376  if (nLCT>max_me11_lcts) allLCTs1a[bx][mbx][i].clear();
377  else n1a++;
378  }
379  if (infoV > 0 && nLCT>0) LogDebug("CSCMotherboard") <<"bx "<<bx<<" nnnLCT:"<<n1a<<" "<<n1b<<" "<<n1a+n1b;
380  }
381  }// reduction per bx
382 
383  //if (infoV > 1) LogTrace("CSCMotherboardME11")<<"clct_count E:"<<theEndcap<<"S:"<<theStation<<"R:"<<1<<"C:"
384  // <<CSCTriggerNumbering::chamberFromTriggerLabels(theSector,theSubsector, theStation, theTrigChamber)
385  // <<" a "<<n_clct_a<<" b "<<n_clct_b<<" ab "<<n_clct_a+n_clct_b;
386 }
387 
388 
389 std::vector<CSCCorrelatedLCTDigi> CSCMotherboardME11::readoutLCTs1a()
390 {
391  return readoutLCTs(ME1A);
392 }
393 
394 
395 std::vector<CSCCorrelatedLCTDigi> CSCMotherboardME11::readoutLCTs1b()
396 {
397  return readoutLCTs(ME1B);
398 }
399 
400 
401 // Returns vector of read-out correlated LCTs, if any. Starts with
402 // the vector of all found LCTs and selects the ones in the read-out
403 // time window.
404 std::vector<CSCCorrelatedLCTDigi> CSCMotherboardME11::readoutLCTs(int me1ab)
405 {
406  std::vector<CSCCorrelatedLCTDigi> tmpV;
407 
408  // The start time of the L1A*LCT coincidence window should be related
409  // to the fifo_pretrig parameter, but I am not completely sure how.
410  // Just choose it such that the window is centered at bx=7. This may
411  // need further tweaking if the value of tmb_l1a_window_size changes.
412  //static int early_tbins = 4;
413  // The number of LCT bins in the read-out is given by the
414  // tmb_l1a_window_size parameter, forced to be odd
415  const int lct_bins =
417  const int late_tbins = early_tbins + lct_bins;
418 
419 
420  // Start from the vector of all found correlated LCTs and select
421  // those within the LCT*L1A coincidence window.
422  int bx_readout = -1;
423  std::vector<CSCCorrelatedLCTDigi> all_lcts;
424  if (me1ab == ME1A) all_lcts = getLCTs1a();
425  if (me1ab == ME1B) all_lcts = getLCTs1b();
426  std::vector <CSCCorrelatedLCTDigi>::const_iterator plct = all_lcts.begin();
427  for (; plct != all_lcts.end(); plct++)
428  {
429  if (!plct->isValid()) continue;
430 
431  int bx = (*plct).getBX();
432  // Skip LCTs found too early relative to L1Accept.
433  if (bx <= early_tbins) continue;
434 
435  // Skip LCTs found too late relative to L1Accept.
436  if (bx > late_tbins) continue;
437 
438  // If (readout_earliest_2) take only LCTs in the earliest bx in the read-out window:
439  // in digi->raw step, LCTs have to be packed into the TMB header, and
440  // currently there is room just for two.
441  if (readout_earliest_2 && (bx_readout == -1 || bx == bx_readout) )
442  {
443  tmpV.push_back(*plct);
444  if (bx_readout == -1) bx_readout = bx;
445  }
446  else tmpV.push_back(*plct);
447  }
448  return tmpV;
449 }
450 
451 
452 // Returns vector of found correlated LCTs, if any.
453 std::vector<CSCCorrelatedLCTDigi> CSCMotherboardME11::getLCTs1b()
454 {
455  std::vector<CSCCorrelatedLCTDigi> tmpV;
456 
457  for (int bx = 0; bx < MAX_LCT_BINS; bx++)
458  for (unsigned int mbx = 0; mbx < match_trig_window_size; mbx++)
459  for (int i=0;i<2;i++)
460  if (allLCTs1b[bx][mbx][i].isValid()) tmpV.push_back(allLCTs1b[bx][mbx][i]);
461  return tmpV;
462 }
463 
464 // Returns vector of found correlated LCTs, if any.
465 std::vector<CSCCorrelatedLCTDigi> CSCMotherboardME11::getLCTs1a()
466 {
467  std::vector<CSCCorrelatedLCTDigi> tmpV;
468 
469  // disabled ME1a
470  if (mpc_block_me1a || disableME1a) return tmpV;
471 
472  // Report all LCTs found.
473  for (int bx = 0; bx < MAX_LCT_BINS; bx++)
474  for (unsigned int mbx = 0; mbx < match_trig_window_size; mbx++)
475  for (int i=0;i<2;i++)
476  if (allLCTs1a[bx][mbx][i].isValid()) tmpV.push_back(allLCTs1a[bx][mbx][i]);
477  return tmpV;
478 }
479 
480 
482 {
483  if ( !c.isValid() || !a.isValid() ) return false;
484  int key_hs = c.getKeyStrip();
485  int key_wg = a.getKeyWG();
486  if ( me == ME1A )
487  {
488  if ( !gangedME1a )
489  {
490  // wrap around ME11 HS number for -z endcap
491  if (theEndcap==2) key_hs = 95 - key_hs;
492  if ( key_hs >= lut_wg_vs_hs_me1a[key_wg][0] &&
493  key_hs <= lut_wg_vs_hs_me1a[key_wg][1] ) return true;
494  return false;
495  }
496  else
497  {
498  if (theEndcap==2) key_hs = 31 - key_hs;
499  if ( key_hs >= lut_wg_vs_hs_me1ag[key_wg][0] &&
500  key_hs <= lut_wg_vs_hs_me1ag[key_wg][1] ) return true;
501  return false;
502  }
503  }
504  if ( me == ME1B)
505  {
506  if (theEndcap==2) key_hs = 127 - key_hs;
507  if ( key_hs >= lut_wg_vs_hs_me1b[key_wg][0] &&
508  key_hs <= lut_wg_vs_hs_me1b[key_wg][1] ) return true;
509  }
510  return false;
511 }
512 
513 
515  CSCALCTDigi secondALCT,
516  CSCCLCTDigi bestCLCT,
517  CSCCLCTDigi secondCLCT,
518  CSCCorrelatedLCTDigi& lct1,
519  CSCCorrelatedLCTDigi& lct2,
520  int me)
521 {
522  // assume that always anodeBestValid && cathodeBestValid
523 
524  if (secondALCT == bestALCT) secondALCT.clear();
525  if (secondCLCT == bestCLCT) secondCLCT.clear();
526 
527  int ok11 = doesALCTCrossCLCT( bestALCT, bestCLCT, me);
528  int ok12 = doesALCTCrossCLCT( bestALCT, secondCLCT, me);
529  int ok21 = doesALCTCrossCLCT( secondALCT, bestCLCT, me);
530  int ok22 = doesALCTCrossCLCT( secondALCT, secondCLCT, me);
531  int code = (ok11<<3) | (ok12<<2) | (ok21<<1) | (ok22);
532 
533  int dbg=0;
534  int ring = me;
536  CSCDetId did(theEndcap, theStation, ring, chamb, 0);
537  if (dbg) LogTrace("CSCMotherboardME11")<<"debug correlateLCTs in "<<did<<std::endl
538  <<"ALCT1: "<<bestALCT<<std::endl
539  <<"ALCT2: "<<secondALCT<<std::endl
540  <<"CLCT1: "<<bestCLCT<<std::endl
541  <<"CLCT2: "<<secondCLCT<<std::endl
542  <<"ok 11 12 21 22 code = "<<ok11<<" "<<ok12<<" "<<ok21<<" "<<ok22<<" "<<code<<std::endl;
543 
544  if ( code==0 ) return;
545 
546  // LUT defines correspondence between possible ok## combinations
547  // and resulting lct1 and lct2
548  int lut[16][2] = {
549  //ok: 11 12 21 22
550  {0 ,0 }, // 0 0 0 0
551  {22,0 }, // 0 0 0 1
552  {21,0 }, // 0 0 1 0
553  {21,22}, // 0 0 1 1
554  {12,0 }, // 0 1 0 0
555  {12,22}, // 0 1 0 1
556  {12,21}, // 0 1 1 0
557  {12,21}, // 0 1 1 1
558  {11,0 }, // 1 0 0 0
559  {11,22}, // 1 0 0 1
560  {11,21}, // 1 0 1 0
561  {11,22}, // 1 0 1 1
562  {11,12}, // 1 1 0 0
563  {11,22}, // 1 1 0 1
564  {11,12}, // 1 1 1 0
565  {11,22}, // 1 1 1 1
566  };
567 
568  if (dbg) LogTrace("CSCMotherboardME11")<<"lut 0 1 = "<<lut[code][0]<<" "<<lut[code][1]<<std::endl;
569 
570  switch (lut[code][0]) {
571  case 11:
572  lct1 = constructLCTs(bestALCT, bestCLCT, CSCCorrelatedLCTDigi::ALCTCLCT);
573  break;
574  case 12:
575  lct1 = constructLCTs(bestALCT, secondCLCT, CSCCorrelatedLCTDigi::ALCTCLCT);
576  break;
577  case 21:
578  lct1 = constructLCTs(secondALCT, bestCLCT, CSCCorrelatedLCTDigi::ALCTCLCT);
579  break;
580  case 22:
581  lct1 = constructLCTs(secondALCT, secondCLCT, CSCCorrelatedLCTDigi::ALCTCLCT);
582  break;
583  default: return;
584  }
585  lct1.setTrknmb(1);
586 
587  if (dbg) LogTrace("CSCMotherboardME11")<<"lct1: "<<lct1<<std::endl;
588 
589  switch (lut[code][1])
590  {
591  case 12:
592  lct2 = constructLCTs(bestALCT, secondCLCT, CSCCorrelatedLCTDigi::ALCTCLCT);
593  lct2.setTrknmb(2);
594  if (dbg) LogTrace("CSCMotherboardME11")<<"lct2: "<<lct2<<std::endl;
595  return;
596  case 21:
597  lct2 = constructLCTs(secondALCT, bestCLCT, CSCCorrelatedLCTDigi::ALCTCLCT);
598  lct2.setTrknmb(2);
599  if (dbg) LogTrace("CSCMotherboardME11")<<"lct2: "<<lct2<<std::endl;
600  return;
601  case 22:
602  lct2 = constructLCTs(secondALCT, secondCLCT, CSCCorrelatedLCTDigi::ALCTCLCT);
603  lct2.setTrknmb(2);
604  if (dbg) LogTrace("CSCMotherboardME11")<<"lct2: "<<lct2<<std::endl;
605  return;
606  default: return;
607  }
608  if (dbg) LogTrace("CSCMotherboardME11")<<"out of correlateLCTs"<<std::endl;
609 
610  return;
611 }
612 
#define LogDebug(id)
const unsigned theSector
T getParameter(std::string const &) const
std::vector< CSCCLCTDigi > clctV1a
CSCCorrelatedLCTDigi allLCTs1b[MAX_LCT_BINS][15][2]
void run(const CSCWireDigiCollection *wiredc, const CSCComparatorDigiCollection *compdc)
void setConfigParameters(const CSCDBL1TPParameters *conf)
std::vector< CSCCorrelatedLCTDigi > readoutLCTs()
unsigned int match_trig_window_size
const unsigned theTrigChamber
bool isValid() const
check ALCT validity (1 - valid ALCT)
Definition: CSCALCTDigi.h:30
int pref[MAX_LCT_BINS]
unsigned int max_me11_lcts
const unsigned theEndcap
void clear()
clear this ALCT
Definition: CSCALCTDigi.cc:35
static const int lut_wg_vs_hs_me1a[48][2]
std::vector< CSCCorrelatedLCTDigi > getLCTs1b()
std::unique_ptr< CSCCathodeLCTProcessor > clct1a
unsigned int mpc_block_me1a
unsigned int tmb_cross_bx_algo
CSCCorrelatedLCTDigi allLCTs1a[MAX_LCT_BINS][15][2]
const unsigned theStation
std::vector< CSCALCTDigi > alctV
CSCCorrelatedLCTDigi constructLCTs(const CSCALCTDigi &aLCT, const CSCCLCTDigi &cLCT, int)
const unsigned theSubsector
unsigned int tmb_l1a_window_size
bool isValid() const
check CLCT validity (1 - valid CLCT)
Definition: CSCCLCTDigi.h:30
static const int lut_wg_vs_hs_me1b[48][2]
static const int lut_wg_vs_hs_me1ag[48][2]
#define LogTrace(id)
double b
Definition: hdecay.h:120
std::vector< CSCCorrelatedLCTDigi > getLCTs1a()
std::vector< CSCCLCTDigi > clctV1b
std::unique_ptr< CSCAnodeLCTProcessor > alct
double a
Definition: hdecay.h:121
bool doesALCTCrossCLCT(CSCALCTDigi &a, CSCCLCTDigi &c, int me)
std::unique_ptr< CSCCathodeLCTProcessor > clct
std::vector< CSCCorrelatedLCTDigi > readoutLCTs1b()
void clear()
clear this CLCT
Definition: CSCCLCTDigi.cc:58
int getKeyStrip() const
Definition: CSCCLCTDigi.h:65
void setTrknmb(const uint16_t number)
Set track number (1,2) after sorting LCTs.
int getKeyWG() const
return key wire group
Definition: CSCALCTDigi.h:45
static int chamberFromTriggerLabels(int TriggerSector, int TriggerSubSector, int station, int TriggerCSCID)
std::vector< CSCCorrelatedLCTDigi > readoutLCTs1a()
void correlateLCTs(CSCALCTDigi bestALCT, CSCALCTDigi secondALCT, CSCCLCTDigi bestCLCT, CSCCLCTDigi secondCLCT, CSCCorrelatedLCTDigi &lct1, CSCCorrelatedLCTDigi &lct2, int me)