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CSCTFSectorProcessor.cc
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1 #include <L1Trigger/CSCTrackFinder/interface/CSCTFSectorProcessor.h>
2 #include <L1Trigger/CSCTrackFinder/interface/CSCTrackFinderDataTypes.h>
3 #include <DataFormats/MuonDetId/interface/CSCTriggerNumbering.h>
4 
5 #include <FWCore/MessageLogger/interface/MessageLogger.h>
6 
7 #include "CondFormats/L1TObjects/interface/L1MuCSCTFConfiguration.h"
8 #include "CondFormats/DataRecord/interface/L1MuCSCTFConfigurationRcd.h"
9 #include "FWCore/Framework/interface/ESHandle.h"
10 #include <stdlib.h>
11 #include <sstream>
12 #include <strings.h>
13 
14 const std::string CSCTFSectorProcessor::FPGAs[5] = {"F1","F2","F3","F4","F5"};
15 
16 CSCTFSectorProcessor::CSCTFSectorProcessor(const unsigned& endcap,
17  const unsigned& sector,
18  const edm::ParameterSet& pset,
19  bool tmb07,
20  const L1MuTriggerScales* scales,
21  const L1MuTriggerPtScale* ptScale)
22 {
23  m_endcap = endcap;
24  m_sector = sector;
25  TMB07 = tmb07;
26 
27  // allows a configurable option to handle unganged ME1a
28  m_gangedME1a = pset.getUntrackedParameter<bool>("gangedME1a", true);
29 
30  // Parameter below should always present in ParameterSet:
31  m_latency = pset.getParameter<unsigned>("CoreLatency");
32  m_minBX = pset.getParameter<int>("MinBX");
33  m_maxBX = pset.getParameter<int>("MaxBX");
34  initializeFromPSet = pset.getParameter<bool>("initializeFromPSet");
35  if( m_maxBX-m_minBX >= 7 ) edm::LogWarning("CSCTFTrackBuilder::ctor")<<" BX window width >= 7BX. Resetting m_maxBX="<<(m_maxBX=m_minBX+6);
36 
37  // All following parameters may appear in either ParameterSet of in EventSetup; uninitialize:
38  m_bxa_depth = -1;
39  m_allowALCTonly = -1;
40  m_allowCLCTonly = -1;
41  m_preTrigger = -1;
42 
43  for(int index=0; index<7; index++) m_etawin[index] = -1;
44  for(int index=0; index<8; index++) m_etamin[index] = -1;
45  for(int index=0; index<8; index++) m_etamax[index] = -1;
46 
47  m_mindphip=-1;
48  m_mindetap=-1;
49 
50  m_mindeta12_accp=-1;
51  m_maxdeta12_accp=-1;
52  m_maxdphi12_accp=-1;
53 
54  m_mindeta13_accp=-1;
55  m_maxdeta13_accp=-1;
56  m_maxdphi13_accp=-1;
57 
58  m_mindeta112_accp=-1;
59  m_maxdeta112_accp=-1;
60  m_maxdphi112_accp=-1;
61 
62  m_mindeta113_accp=-1;
63  m_maxdeta113_accp=-1;
64  m_maxdphi113_accp=-1;
65  m_mindphip_halo=-1;
66  m_mindetap_halo=-1;
67 
68  m_widePhi=-1;
69 
70  m_straightp=-1;
71  m_curvedp=-1;
72 
73  m_mbaPhiOff=-1;
74  m_mbbPhiOff=-1;
75 
76  kill_fiber = -1;
77  QualityEnableME1a = -1;
78  QualityEnableME1b = -1;
79  QualityEnableME1c = -1;
80  QualityEnableME1d = -1;
81  QualityEnableME1e = -1;
82  QualityEnableME1f = -1;
83  QualityEnableME2a = -1;
84  QualityEnableME2b = -1;
85  QualityEnableME2c = -1;
86  QualityEnableME3a = -1;
87  QualityEnableME3b = -1;
88  QualityEnableME3c = -1;
89  QualityEnableME4a = -1;
90  QualityEnableME4b = -1;
91  QualityEnableME4c = -1;
92 
93  run_core = -1;
94  trigger_on_ME1a = -1;
95  trigger_on_ME1b = -1;
96  trigger_on_ME2 = -1;
97  trigger_on_ME3 = -1;
98  trigger_on_ME4 = -1;
99  trigger_on_MB1a = -1;
100  trigger_on_MB1d = -1;
101 
102  singlesTrackOutput = 999;
103  rescaleSinglesPhi = -1;
104 
105  m_firmSP = -1;
106  m_firmFA = -1;
107  m_firmDD = -1;
108  m_firmVM = -1;
109 
110  initFail_ = false;
111 
112  isCoreVerbose = pset.getParameter<bool>("isCoreVerbose");
113 
114  if(initializeFromPSet) readParameters(pset);
115 
116 
117  // Sector Receiver LUTs initialization
118  edm::ParameterSet srLUTset = pset.getParameter<edm::ParameterSet>("SRLUT");
119  for(int i = 1; i <= 4; ++i)
120  {
121  if(i == 1)
122  for(int j = 0; j < 2; j++)
123  {
124  srLUTs_[FPGAs[j]] = new CSCSectorReceiverLUT(endcap, sector, j+1, i, srLUTset, TMB07);
125  }
126  else
127  srLUTs_[FPGAs[i]] = new CSCSectorReceiverLUT(endcap, sector, 0, i, srLUTset, TMB07);
128  }
129 
130  core_ = new CSCTFSPCoreLogic();
131 
132  // Pt LUTs initialization
133  if(initializeFromPSet){
134  edm::ParameterSet ptLUTset = pset.getParameter<edm::ParameterSet>("PTLUT");
135  ptLUT_ = new CSCTFPtLUT(ptLUTset, scales, ptScale);
136  LogDebug("CSCTFSectorProcessor") << "Using stand-alone PT LUT for endcap="<<m_endcap<<", sector="<<m_sector;
137  } else {
138  ptLUT_=0;
139  LogDebug("CSCTFSectorProcessor") << "Looking for PT LUT in EventSetup for endcap="<<m_endcap<<", sector="<<m_sector;
140  }
141 
142  // firmware map initialization
143  // all the information are based on the firmware releases
144  // documented at http://www.phys.ufl.edu/~uvarov/SP05/SP05.htm
145 
146  // map is <m_firmSP, core_version>
147  // it may happen that the same core is used for different firmware
148  // versions, e.g. change in the wrapper only
149 
150  // this mapping accounts for runs starting from 132440
151  // schema is year+month+day
152  firmSP_Map.insert(std::pair<int,int>(20100210,20100122));
153  firmSP_Map.insert(std::pair<int,int>(20100617,20100122));
154  firmSP_Map.insert(std::pair<int,int>(20100629,20100122));
155 
156  firmSP_Map.insert(std::pair<int,int>(20100728,20100728));
157 
158  firmSP_Map.insert(std::pair<int,int>(20100901,20100901));
159 
160  //testing firmwares
161  firmSP_Map.insert(std::pair<int,int>(20101011,20101011));
162  firmSP_Map.insert(std::pair<int,int>(20101210,20101210));
163  firmSP_Map.insert(std::pair<int,int>(20110204,20110118));
164  firmSP_Map.insert(std::pair<int,int>(20110322,20110118));
165  // 2012 core with non linear dphi
166  firmSP_Map.insert(std::pair<int,int>(20120131,20120131));
167  firmSP_Map.insert(std::pair<int,int>(20120227,20120131));
168  //2012 core: 4 station track at |eta|>2.1 -> ME2-ME3-ME4
169  firmSP_Map.insert(std::pair<int,int>(20120313,20120313));
170  firmSP_Map.insert(std::pair<int,int>(20120319,20120313));
171  //2012 core: 4 station track at |eta|>2.1 -> ME1-ME2-ME3 test
172  firmSP_Map.insert(std::pair<int,int>(20120730,20120730));
173  //2014 core: 4 station track at |eta|>2.1 -> ME1-ME2-ME3 test + correct F/R bit set
174  firmSP_Map.insert(std::pair<int,int>(20140424,20140424));
175  //2014 core: 4 station track at |eta|>2.1 -> ME1-ME2-ME3 test + correct F/R bit set + bug fix
176  firmSP_Map.insert(std::pair<int,int>(20140515,20140515));
177 }
178 
179 
180 void CSCTFSectorProcessor::initialize(const edm::EventSetup& c){
181  initFail_ = false;
182  if(!initializeFromPSet){
183  // Only pT lut can be initialized from EventSetup, all front LUTs are initialized locally from their parametrizations
184  LogDebug("CSCTFSectorProcessor") <<"Initializing endcap: "<<m_endcap<<" sector:"<<m_sector << "SP:" << (m_endcap-1)*6+(m_sector-1);
185  LogDebug("CSCTFSectorProcessor") << "Initializing pT LUT from EventSetup";
186 
187  ptLUT_ = new CSCTFPtLUT(c);
188 
189  // Extract from EventSetup alternative (to the one, used in constructor) ParameterSet
190  edm::ESHandle<L1MuCSCTFConfiguration> config;
191  c.get<L1MuCSCTFConfigurationRcd>().get(config);
192  // And initialize only those parameters, which left uninitialized during construction
193  readParameters(config.product()->parameters((m_endcap-1)*6+(m_sector-1)));
194  }
195 
196  // ---------------------------------------------------------------------------
197  // This part is added per Vasile's request.
198  // It will help people understanding the emulator configuration
199  LogDebug("CSCTFSectorProcessor") << "\n !!! CSCTF EMULATOR CONFIGURATION !!!"
200  << "\n\nCORE CONFIGURATION"
201  << "\n Coincidence Trigger? " << run_core
202  << "\n Singles in ME1a? " << trigger_on_ME1a
203  << "\n Singles in ME1b? " << trigger_on_ME1b
204  << "\n Singles in ME2? " << trigger_on_ME2
205  << "\n Singles in ME3? " << trigger_on_ME3
206  << "\n Singles in ME4? " << trigger_on_ME4
207  << "\n Singles in MB1a? " << trigger_on_MB1a
208  << "\n Singles in MB1d? " << trigger_on_MB1d
209 
210  << "\n BX Analyzer depth: assemble coinc. track with stubs in +/-" << m_bxa_depth << " Bxs"
211  << "\n Is Wide Phi Extrapolation (DeltaPhi valid up to ~15 degrees, otherwise ~7.67 degrees)? " << m_widePhi
212  << "\n PreTrigger=" << m_preTrigger
213 
214  << "\n CoreLatency=" << m_latency
215  << "\n Is Phi for singles rescaled? " << rescaleSinglesPhi
216 
217  << "\n\nVARIOUS CONFIGURATION PARAMETERS"
218  << "\n Allow ALCT only? " << m_allowALCTonly
219  << "\n Allow CLCT only? " << m_allowCLCTonly
220 
221  << "\nQualityEnableME1a (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME1a
222  << "\nQualityEnableME1b (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME1b
223  << "\nQualityEnableME1c (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME1c
224  << "\nQualityEnableME1d (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME1d
225  << "\nQualityEnableME1e (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME1e
226  << "\nQualityEnableME1f (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME1f
227  << "\nQualityEnableME2a (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME2a
228  << "\nQualityEnableME2b (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME2b
229  << "\nQualityEnableME2c (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME2c
230  << "\nQualityEnableME3a (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME3a
231  << "\nQualityEnableME3b (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME3b
232  << "\nQualityEnableME3c (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME3c
233  << "\nQualityEnableME4a (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME4a
234  << "\nQualityEnableME4b (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME4b
235  << "\nQualityEnableME4c (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME4c
236 
237  << "\nkill_fiber=" << kill_fiber
238  << "\nSingles Output Link=" << singlesTrackOutput
239 
240  //the DAT_ETA registers meaning are explained at Table 2 of
241  //http://www.phys.ufl.edu/~uvarov/SP05/LU-SP_ReferenceGuide_090915_Update.pdf
242 
243  << "\n\nDAT_ETA REGISTERS"
244  << "\nMinimum eta difference for track cancellation logic=" << m_mindetap
245  << "\nMinimum eta difference for halo track cancellation logic=" << m_mindetap_halo
246 
247  << "\nMinimum eta for ME1-ME2 collision tracks=" << m_etamin[0]
248  << "\nMinimum eta for ME1-ME3 collision tracks=" << m_etamin[1]
249  << "\nMinimum eta for ME2-ME3 collision tracks=" << m_etamin[2]
250  << "\nMinimum eta for ME2-ME4 collision tracks=" << m_etamin[3]
251  << "\nMinimum eta for ME3-ME4 collision tracks=" << m_etamin[4]
252  << "\nMinimum eta for ME1-ME2 collision tracks in overlap region=" << m_etamin[5]
253  << "\nMinimum eta for ME2-MB1 collision tracks=" << m_etamin[6]
254  << "\nMinimum eta for ME1-ME4 collision tracks=" << m_etamin[7]
255 
256  << "\nMinimum eta difference for ME1-ME2 (except ME1/1) halo tracks=" << m_mindeta12_accp
257  << "\nMinimum eta difference for ME1-ME3 (except ME1/1) halo tracks=" << m_mindeta13_accp
258  << "\nMinimum eta difference for ME1/1-ME2 halo tracks=" << m_mindeta112_accp
259  << "\nMinimum eta difference for ME1/1-ME3 halo tracks=" << m_mindeta113_accp
260 
261  << "\nMaximum eta for ME1-ME2 collision tracks=" << m_etamax[0]
262  << "\nMaximum eta for ME1-ME3 collision tracks=" << m_etamax[1]
263  << "\nMaximum eta for ME2-ME3 collision tracks=" << m_etamax[2]
264  << "\nMaximum eta for ME2-ME4 collision tracks=" << m_etamax[3]
265  << "\nMaximum eta for ME3-ME4 collision tracks=" << m_etamax[4]
266  << "\nMaximum eta for ME1-ME2 collision tracks in overlap region=" << m_etamax[5]
267  << "\nMaximum eta for ME2-MB1 collision tracks=" << m_etamax[6]
268  << "\nMaximum eta for ME1-ME4 collision tracks=" << m_etamax[7]
269 
270  << "\nMaximum eta difference for ME1-ME2 (except ME1/1) halo tracks=" << m_maxdeta12_accp
271  << "\nMaximum eta difference for ME1-ME3 (except ME1/1) halo tracks=" << m_maxdeta13_accp
272  << "\nMaximum eta difference for ME1/1-ME2 halo tracks=" << m_maxdeta112_accp
273  << "\nMaximum eta difference for ME1/1-ME3 halo tracks=" << m_maxdeta113_accp
274 
275  << "\nEta window for ME1-ME2 collision tracks=" << m_etawin[0]
276  << "\nEta window for ME1-ME3 collision tracks=" << m_etawin[1]
277  << "\nEta window for ME2-ME3 collision tracks=" << m_etawin[2]
278  << "\nEta window for ME2-ME4 collision tracks=" << m_etawin[3]
279  << "\nEta window for ME3-ME4 collision tracks=" << m_etawin[4]
280  << "\nEta window for ME1-ME2 collision tracks in overlap region=" << m_etawin[5]
281  << "\nEta window for ME1-ME4 collision tracks=" << m_etawin[6]
282 
283  << "\nMaximum phi difference for ME1-ME2 (except ME1/1) halo tracks=" << m_maxdphi12_accp
284  << "\nMaximum phi difference for ME1-ME3 (except ME1/1) halo tracks=" << m_maxdphi13_accp
285  << "\nMaximum phi difference for ME1/1-ME2 halo tracks=" << m_maxdphi112_accp
286  << "\nMaximum phi difference for ME1/1-ME3 halo tracks=" << m_maxdphi113_accp
287 
288  << "\nMinimum phi difference for track cancellation logic=" << m_mindphip
289  << "\nMinimum phi difference for halo track cancellation logic=" << m_mindphip_halo
290 
291  << "\nParameter for the correction of misaligned 1-2-3-4 straight tracks =" << m_straightp
292  << "\nParameter for the correction of misaligned 1-2-3-4 curved tracks=" << m_curvedp
293  << "\nPhi Offset for MB1A=" << m_mbaPhiOff
294  << "\nPhi Offset for MB1D=" << m_mbbPhiOff
295 
296  << "\nFirmware SP year+month+day:" << m_firmSP
297  << "\nFirmware FA year+month+day:" << m_firmFA
298  << "\nFirmware DD year+month+day:" << m_firmDD
299  << "\nFirmware VM year+month+day:" << m_firmVM;
300 
301 
302  printDisclaimer(m_firmSP,m_firmFA);
303 
304  // set core verbosity: for debugging only purpouses
305  // in general the output is handled to Alex Madorsky
306  core_ -> SetVerbose(isCoreVerbose);
307 
308  // Set the SP firmware
309  core_ -> SetSPFirmwareVersion (m_firmSP);
310 
311  // Set the firmware for the CORE
312  int firmVersCore = firmSP_Map.find(m_firmSP)->second;
313  core_ -> SetCoreFirmwareVersion (firmVersCore);
314  edm::LogInfo( "CSCTFSectorProcessor" ) << "\nCore Firmware is set to " << core_ -> GetCoreFirmwareVersion();
315  // ---------------------------------------------------------------------------
316 
317  // Check if parameters were not initialized in both: constuctor (from .cf? file) and initialize method (from EventSetup)
318  if(m_bxa_depth<0)
319  {
320  initFail_ = true;
321  edm::LogError("CSCTFSectorProcessor")<<"BXAdepth parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
322  }
323  if(m_allowALCTonly<0)
324  {
325  initFail_ = true;
326  edm::LogError("CSCTFSectorProcessor")<<"AllowALCTonly parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
327  }
328  if(m_allowCLCTonly<0)
329  {
330  initFail_ = true;
331  edm::LogError("CSCTFSectorProcessor")<<"AllowCLCTonly parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
332  }
333  if(m_preTrigger<0)
334  {
335  initFail_ = true;
336  edm::LogError("CSCTFSectorProcessor")<<"PreTrigger parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
337  }
338  if(m_mindphip<0)
339  {
340  initFail_ = true;
341  edm::LogError("CSCTFSectorProcessor")<<"mindphip parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
342  }
343  if(m_mindetap<0)
344  {
345  initFail_ = true;
346  edm::LogError("CSCTFSectorProcessor")<<"mindeta parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
347  }
348  if(m_straightp<0)
349  {
350  initFail_ = true;
351  edm::LogError("CSCTFSectorProcessor")<<"straightp parameter left unitialized for endcap="<<m_endcap<<", sector="<<m_sector;
352  }
353  if(m_curvedp<0)
354  {
355  initFail_ = true;
356  edm::LogError("CSCTFSectorProcessor")<<"curvedp parameter left unitialized for endcap="<<m_endcap<<",sector="<<m_sector;
357  }
358  if(m_mbaPhiOff<0)
359  {
360  initFail_ = true;
361  edm::LogError("CSCTFSectorProcessor")<<"mbaPhiOff parameter left unitialized for endcap="<<m_endcap<<",sector="<<m_sector;
362  }
363  if(m_mbbPhiOff<0)
364  {
365  initFail_ = true;
366  edm::LogError("CSCTFSectorProcessor")<<"mbbPhiOff parameter left unitialized for endcap="<<m_endcap<<",sector="<<m_sector;
367  }
368  if(m_mindeta12_accp<0)
369  {
370  initFail_ = true;
371  edm::LogError("CSCTFSectorProcessor")<<"mindeta_accp12 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
372  }
373  if(m_maxdeta12_accp<0)
374  {
375  initFail_ = true;
376  edm::LogError("CSCTFSectorProcessor")<<"maxdeta_accp12 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
377  }
378  if(m_maxdphi12_accp<0)
379  {
380  initFail_ = true;
381  edm::LogError("CSCTFSectorProcessor")<<"maxdphi_accp12 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
382  }
383  if(m_mindeta13_accp<0)
384  {
385  initFail_ = true;
386  edm::LogError("CSCTFSectorProcessor")<<"mindeta_accp13 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
387  }
388  if(m_maxdeta13_accp<0)
389  {
390  initFail_ = true;
391  edm::LogError("CSCTFSectorProcessor")<<"maxdeta_accp13 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
392  }
393  if(m_maxdphi13_accp<0)
394  {
395  initFail_ = true;
396  edm::LogError("CSCTFSectorProcessor")<<"maxdphi_accp13 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
397  }
398  if(m_mindeta112_accp<0)
399  {
400  initFail_ = true;
401  edm::LogError("CSCTFSectorProcessor")<<"mindeta_accp112 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
402  }
403  if(m_maxdeta112_accp<0)
404  {
405  initFail_ = true;
406  edm::LogError("CSCTFSectorProcessor")<<"maxdeta_accp112 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
407  }
408  if(m_maxdphi112_accp<0)
409  {
410  initFail_ = true;
411  edm::LogError("CSCTFSectorProcessor")<<"maxdphi_accp112 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
412  }
413  if(m_mindeta113_accp<0)
414  {
415  initFail_ = true;
416  edm::LogError("CSCTFSectorProcessor")<<"mindeta_accp113 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
417  }
418  if(m_maxdeta113_accp<0)
419  {
420  initFail_ = true;
421  edm::LogError("CSCTFSectorProcessor")<<"maxdeta_accp113 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
422  }
423  if(m_maxdphi113_accp<0)
424  {
425  initFail_ = true;
426  edm::LogError("CSCTFSectorProcessor")<<"maxdphi_accp113 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
427  }
428  if(m_mindphip_halo<0)
429  {
430  initFail_ = true;
431  edm::LogError("CSCTFSectorProcessor")<<"mindphip_halo parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
432  }
433  if(m_mindetap_halo<0)
434  {
435  initFail_ = true;
436  edm::LogError("CSCTFSectorProcessor")<<"mindetep_halo parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
437  }
438 
439  if(m_widePhi<0)
440  {
441  initFail_ = true;
442  edm::LogError("CSCTFSectorProcessor")<<"widePhi parameter left unitialized for endcap="<<m_endcap<<", sector="<<m_sector;
443  }
444 
445  for(int index=0; index<8; index++)
446  if(m_etamax[index]<0)
447  {
448  initFail_ = true;
449  edm::LogError("CSCTFSectorProcessor")<<"Some ("<<(8-index)<<") of EtaMax parameters left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
450  }
451  for(int index=0; index<8; index++)
452  if(m_etamin[index]<0)
453  {
454  initFail_ = true;
455  edm::LogError("CSCTFSectorProcessor")<<"Some ("<<(8-index)<<") of EtaMin parameters left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
456  }
457  for(int index=0; index<7; index++)
458  if(m_etawin[index]<0)
459  {
460  initFail_ = true;
461  edm::LogError("CSCTFSectorProcessor")<<"Some ("<<(6-index)<<") of EtaWindows parameters left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
462  }
463  if(kill_fiber<0)
464  {
465  initFail_ = true;
466  edm::LogError("CSCTFTrackBuilder")<<"kill_fiber parameter left uninitialized";
467  }
468  if(run_core<0)
469  {
470  initFail_ = true;
471  edm::LogError("CSCTFTrackBuilder")<<"run_core parameter left uninitialized";
472  }
473  if(trigger_on_ME1a<0)
474  {
475  initFail_ = true;
476  edm::LogError("CSCTFTrackBuilder")<<"trigger_on_ME1a parameter left uninitialized";
477  }
478  if(trigger_on_ME1b<0)
479  {
480  initFail_ = true;
481  edm::LogError("CSCTFTrackBuilder")<<"trigger_on_ME1b parameter left uninitialized";
482  }
483  if(trigger_on_ME2 <0)
484  {
485  initFail_ = true;
486  edm::LogError("CSCTFTrackBuilder")<<"trigger_on_ME2 parameter left uninitialized";
487  }
488  if(trigger_on_ME3 <0)
489  {
490  initFail_ = true;
491  edm::LogError("CSCTFTrackBuilder")<<"trigger_on_ME3 parameter left uninitialized";
492  }
493  if(trigger_on_ME4 <0)
494  {
495  initFail_ = true;
496  edm::LogError("CSCTFTrackBuilder")<<"trigger_on_ME4 parameter left uninitialized";
497  }
498  if(trigger_on_MB1a<0)
499  {
500  initFail_ = true;
501  edm::LogError("CSCTFTrackBuilder")<<"trigger_on_MB1a parameter left uninitialized";
502  }
503  if(trigger_on_MB1d<0)
504  {
505  initFail_ = true;
506  edm::LogError("CSCTFTrackBuilder")<<"trigger_on_MB1d parameter left uninitialized";
507  }
508  if( trigger_on_ME1a>0 || trigger_on_ME1b>0 ||trigger_on_ME2>0 ||
509  trigger_on_ME3>0 || trigger_on_ME4>0 ||trigger_on_MB1a>0 ||trigger_on_MB1d>0 )
510  {
511  if(singlesTrackOutput==999)
512  {
513  initFail_ = true;
514  edm::LogError("CSCTFTrackBuilder")<<"singlesTrackOutput parameter left uninitialized";
515  }
516  if(rescaleSinglesPhi<0)
517  {
518  initFail_ = true;
519  edm::LogError("CSCTFTrackBuilder")<<"rescaleSinglesPhi parameter left uninitialized";
520  }
521  }
522  if(QualityEnableME1a<0)
523  {
524  initFail_ = true;
525  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME1a parameter left uninitialized";
526  }
527  if(QualityEnableME1b<0)
528  {
529  initFail_ = true;
530  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME1b parameter left uninitialized";
531  }
532  if(QualityEnableME1c<0)
533  {
534  initFail_ = true;
535  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME1c parameter left uninitialized";
536  }
537  if(QualityEnableME1d<0)
538  {
539  initFail_ = true;
540  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME1d parameter left uninitialized";
541  }
542  if(QualityEnableME1e<0)
543  {
544  initFail_ = true;
545  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME1e parameter left uninitialized";
546  }
547  if(QualityEnableME1f<0)
548  {
549  initFail_ = true;
550  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME1f parameter left uninitialized";
551  }
552  if(QualityEnableME2a<0)
553  {
554  initFail_ = true;
555  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME2a parameter left uninitialized";
556  }
557  if(QualityEnableME2b<0)
558  {
559  initFail_ = true;
560  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME2b parameter left uninitialized";
561  }
562  if(QualityEnableME2c<0)
563  {
564  initFail_ = true;
565  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME2c parameter left uninitialized";
566  }
567  if(QualityEnableME3a<0)
568  {
569  initFail_ = true;
570  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME3a parameter left uninitialized";
571  }
572  if(QualityEnableME3b<0)
573  {
574  initFail_ = true;
575  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME3b parameter left uninitialized";
576  }
577  if(QualityEnableME3c<0)
578  {
579  initFail_ = true;
580  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME3c parameter left uninitialized";
581  }
582  if(QualityEnableME4a<0)
583  {
584  initFail_ = true;
585  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME4a parameter left uninitialized";
586  }
587  if(QualityEnableME4b<0)
588  {
589  initFail_ = true;
590  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME4b parameter left uninitialized";
591  }
592  if(QualityEnableME4c<0)
593  {
594  initFail_ = true;
595  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME4c parameter left uninitialized";
596  }
597 
598  if (m_firmSP<1)
599  {
600  initFail_ = true;
601  edm::LogError("CSCTFSectorProcessor")<< " firmwareSP parameter left uninitialized!!!\n";
602  }
603  if (m_firmFA<1)
604  {
605  initFail_ = true;
606  edm::LogError("CSCTFSectorProcessor")<< " firmwareFA parameter left uninitialized!!!\n";
607  }
608  if (m_firmDD<1)
609  {
610  initFail_ = true;
611  edm::LogError("CSCTFSectorProcessor")<< " firmwareDD parameter left uninitialized!!!\n";
612  }
613  if (m_firmVM<1)
614  {
615  initFail_ = true;
616  edm::LogError("CSCTFSectorProcessor")<< " firmwareVM parameter left uninitialized!!!\n";
617  }
618 
619  if ( (m_firmFA != m_firmDD) ||
620  (m_firmFA != m_firmVM) ||
621  (m_firmDD != m_firmVM) )
622  {
623  initFail_ = true;
624  edm::LogError("CSCTFSectorProcessor::initialize")<< " firmwareFA (=" << m_firmFA << "), "
625  << " firmwareDD (=" << m_firmDD << "), "
626  << " firmwareVM (=" << m_firmVM << ") are NOT identical: it shoultd NOT happen!\n";
627  }
628 
629 }
630 
631 void CSCTFSectorProcessor::readParameters(const edm::ParameterSet& pset){
632  m_bxa_depth = pset.getParameter<unsigned>("BXAdepth");
633  m_allowALCTonly = ( pset.getParameter<bool>("AllowALCTonly") ? 1 : 0 );
634  m_allowCLCTonly = ( pset.getParameter<bool>("AllowCLCTonly") ? 1 : 0 );
635  m_preTrigger = pset.getParameter<unsigned>("PreTrigger");
636 
637  std::vector<unsigned>::const_iterator iter;
638  int index=0;
639  std::vector<unsigned> etawins = pset.getParameter<std::vector<unsigned> >("EtaWindows");
640  for(iter=etawins.begin(),index=0; iter!=etawins.end()&&index<7; iter++,index++) m_etawin[index] = *iter;
641  std::vector<unsigned> etamins = pset.getParameter<std::vector<unsigned> >("EtaMin");
642  for(iter=etamins.begin(),index=0; iter!=etamins.end()&&index<8; iter++,index++) m_etamin[index] = *iter;
643  std::vector<unsigned> etamaxs = pset.getParameter<std::vector<unsigned> >("EtaMax");
644  for(iter=etamaxs.begin(),index=0; iter!=etamaxs.end()&&index<8; iter++,index++) m_etamax[index] = *iter;
645 
646  m_mindphip = pset.getParameter<unsigned>("mindphip");
647  m_mindetap = pset.getParameter<unsigned>("mindetap");
648  m_straightp = pset.getParameter<unsigned>("straightp");
649  m_curvedp = pset.getParameter<unsigned>("curvedp");
650  m_mbaPhiOff = pset.getParameter<unsigned>("mbaPhiOff");
651  m_mbbPhiOff = pset.getParameter<unsigned>("mbbPhiOff");
652  m_widePhi = pset.getParameter<unsigned>("widePhi");
653  m_mindeta12_accp = pset.getParameter<unsigned>("mindeta12_accp");
654  m_maxdeta12_accp = pset.getParameter<unsigned>("maxdeta12_accp");
655  m_maxdphi12_accp = pset.getParameter<unsigned>("maxdphi12_accp");
656  m_mindeta13_accp = pset.getParameter<unsigned>("mindeta13_accp");
657  m_maxdeta13_accp = pset.getParameter<unsigned>("maxdeta13_accp");
658  m_maxdphi13_accp = pset.getParameter<unsigned>("maxdphi13_accp");
659  m_mindeta112_accp = pset.getParameter<unsigned>("mindeta112_accp");
660  m_maxdeta112_accp = pset.getParameter<unsigned>("maxdeta112_accp");
661  m_maxdphi112_accp = pset.getParameter<unsigned>("maxdphi112_accp");
662  m_mindeta113_accp = pset.getParameter<unsigned>("mindeta113_accp");
663  m_maxdeta113_accp = pset.getParameter<unsigned>("maxdeta113_accp");
664  m_maxdphi113_accp = pset.getParameter<unsigned>("maxdphi113_accp");
665  m_mindphip_halo = pset.getParameter<unsigned>("mindphip_halo");
666  m_mindetap_halo = pset.getParameter<unsigned>("mindetap_halo");
667  kill_fiber = pset.getParameter<unsigned>("kill_fiber");
668  run_core = pset.getParameter<bool>("run_core");
669  trigger_on_ME1a = pset.getParameter<bool>("trigger_on_ME1a");
670  trigger_on_ME1b = pset.getParameter<bool>("trigger_on_ME1b");
671  trigger_on_ME2 = pset.getParameter<bool>("trigger_on_ME2");
672  trigger_on_ME3 = pset.getParameter<bool>("trigger_on_ME3");
673  trigger_on_ME4 = pset.getParameter<bool>("trigger_on_ME4");
674  trigger_on_MB1a = pset.getParameter<bool>("trigger_on_MB1a");
675  trigger_on_MB1d = pset.getParameter<bool>("trigger_on_MB1d");
676 
677  singlesTrackOutput = pset.getParameter<unsigned int>("singlesTrackOutput");
678  rescaleSinglesPhi = pset.getParameter<bool>("rescaleSinglesPhi");
679  QualityEnableME1a = pset.getParameter<unsigned int>("QualityEnableME1a");
680  QualityEnableME1b = pset.getParameter<unsigned int>("QualityEnableME1b");
681  QualityEnableME1c = pset.getParameter<unsigned int>("QualityEnableME1c");
682  QualityEnableME1d = pset.getParameter<unsigned int>("QualityEnableME1d");
683  QualityEnableME1e = pset.getParameter<unsigned int>("QualityEnableME1e");
684  QualityEnableME1f = pset.getParameter<unsigned int>("QualityEnableME1f");
685  QualityEnableME2a = pset.getParameter<unsigned int>("QualityEnableME2a");
686  QualityEnableME2b = pset.getParameter<unsigned int>("QualityEnableME2b");
687  QualityEnableME2c = pset.getParameter<unsigned int>("QualityEnableME2c");
688  QualityEnableME3a = pset.getParameter<unsigned int>("QualityEnableME3a");
689  QualityEnableME3b = pset.getParameter<unsigned int>("QualityEnableME3b");
690  QualityEnableME3c = pset.getParameter<unsigned int>("QualityEnableME3c");
691  QualityEnableME4a = pset.getParameter<unsigned int>("QualityEnableME4a");
692  QualityEnableME4b = pset.getParameter<unsigned int>("QualityEnableME4b");
693  QualityEnableME4c = pset.getParameter<unsigned int>("QualityEnableME4c");
694 
695  m_firmSP = pset.getParameter<unsigned int>("firmwareSP");
696  m_firmFA = pset.getParameter<unsigned int>("firmwareFA");
697  m_firmDD = pset.getParameter<unsigned int>("firmwareDD");
698  m_firmVM = pset.getParameter<unsigned int>("firmwareVM");
699 
700 }
701 
702 CSCTFSectorProcessor::~CSCTFSectorProcessor()
703 {
704  for(int i = 0; i < 5; ++i)
705  {
706  if(srLUTs_[FPGAs[i]]) delete srLUTs_[FPGAs[i]]; // delete the pointer
707  srLUTs_[FPGAs[i]] = NULL; // point it at a safe place
708  }
709 
710  delete core_;
711  core_ = NULL;
712 
713  if(ptLUT_) delete ptLUT_;
714  ptLUT_ = NULL;
715 }
716 
717 //returns 0 for no tracks, 1 tracks found, and -1 for "exception" (what used to throw an exception)
718 // on -1, Producer should produce empty collections for event
719 int CSCTFSectorProcessor::run(const CSCTriggerContainer<csctf::TrackStub>& stubs)
720 {
721  if(initFail_)
722  return -1;
723 
724  if( !ptLUT_ )
725  {
726  edm::LogError("CSCTFSectorProcessor::run()") << "No CSCTF PTLUTs: Initialize CSC TF LUTs first (missed call to CSCTFTrackProducer::beginJob?\n";
727  return -1;
728  }
729 
730 
731  l1_tracks.clear();
732  dt_stubs.clear();
733  stub_vec_filtered.clear();
734 
735  std::vector<csctf::TrackStub> stub_vec = stubs.get();
736 
740  for(std::vector<csctf::TrackStub>::const_iterator itr=stub_vec.begin(); itr!=stub_vec.end(); itr++)
741  switch( itr->station() ){
742  case 5: stub_vec_filtered.push_back(*itr); break; // DT stubs get filtered by the core controll register
743  case 4:
744  switch( itr->getMPCLink() ){
745  case 3: if( (kill_fiber&0x4000)==0 && QualityEnableME4c&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
746  case 2: if( (kill_fiber&0x2000)==0 && QualityEnableME4b&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
747  case 1: if( (kill_fiber&0x1000)==0 && QualityEnableME4a&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
748  default: edm::LogWarning("CSCTFSectorProcessor::run()") << "No MPC sorting for LCT: link="<<itr->getMPCLink()<<"\n";
749  }
750  break;
751  case 3:
752  switch( itr->getMPCLink() ){
753  case 3: if( (kill_fiber&0x0800)==0 && QualityEnableME3c&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
754  case 2: if( (kill_fiber&0x0400)==0 && QualityEnableME3b&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
755  case 1: if( (kill_fiber&0x0200)==0 && QualityEnableME3a&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
756  default: edm::LogWarning("CSCTFSectorProcessor::run()") << "No MPC sorting for LCT: link="<<itr->getMPCLink()<<"\n";
757  }
758  break;
759  case 2:
760  switch( itr->getMPCLink() ){
761  case 3: if( (kill_fiber&0x0100)==0 && QualityEnableME2c&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
762  case 2: if( (kill_fiber&0x0080)==0 && QualityEnableME2b&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
763  case 1: if( (kill_fiber&0x0040)==0 && QualityEnableME2a&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
764  default: edm::LogWarning("CSCTFSectorProcessor::run()") << "No MPC sorting for LCT: link="<<itr->getMPCLink()<<"\n";
765  }
766  break;
767  case 1:
768  switch( itr->getMPCLink() + (3*(CSCTriggerNumbering::triggerSubSectorFromLabels(CSCDetId(itr->getDetId().rawId())) - 1)) ){
769  case 6: if( (kill_fiber&0x0020)==0 && QualityEnableME1f&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
770  case 5: if( (kill_fiber&0x0010)==0 && QualityEnableME1e&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
771  case 4: if( (kill_fiber&0x0008)==0 && QualityEnableME1d&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
772  case 3: if( (kill_fiber&0x0004)==0 && QualityEnableME1c&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
773  case 2: if( (kill_fiber&0x0002)==0 && QualityEnableME1b&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
774  case 1: if( (kill_fiber&0x0001)==0 && QualityEnableME1a&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
775  default: edm::LogWarning("CSCTFSectorProcessor::run()") << "No MPC sorting for LCT: link="<<itr->getMPCLink()<<"\n";
776  }
777  break;
778  default: edm::LogWarning("CSCTFSectorProcessor::run()") << "Invalid station # encountered: "<<itr->station()<<"\n";
779  }
780 
789  for(std::vector<csctf::TrackStub>::iterator itr=stub_vec_filtered.begin(); itr!=stub_vec_filtered.end(); itr++)
790  {
791  if(itr->station() != 5)
792  {
793  CSCDetId id(itr->getDetId().rawId());
794  unsigned fpga = (id.station() == 1) ? CSCTriggerNumbering::triggerSubSectorFromLabels(id) - 1 : id.station();
795 
796  lclphidat lclPhi;
797  try {
798  lclPhi = srLUTs_[FPGAs[fpga]]->localPhi(itr->getStrip(), itr->getPattern(), itr->getQuality(), itr->getBend(), m_gangedME1a);
799  } catch( cms::Exception &e ) {
800  bzero(&lclPhi,sizeof(lclPhi));
801  edm::LogWarning("CSCTFSectorProcessor:run()") << "Exception from LocalPhi LUT in " << FPGAs[fpga]
802  << "(strip="<<itr->getStrip()<<",pattern="<<itr->getPattern()<<",quality="<<itr->getQuality()<<",bend="<<itr->getBend()<<")" <<std::endl;
803  }
804 
805  gblphidat gblPhi;
806  try {
807  unsigned csc_id = itr->cscid();
808  if (!m_gangedME1a) csc_id = itr->cscidSeparateME1a();
809  //std::cout << "station="<<id.station()<<" ring="<<id.ring()<<" strip="<<itr->getStrip()<<" WG="<<itr->getKeyWG()<<std::endl;
810  //std::cout << "csc_id=" << csc_id << std::endl;
811  gblPhi = srLUTs_[FPGAs[fpga]]->globalPhiME(lclPhi.phi_local, itr->getKeyWG(), csc_id, m_gangedME1a);
812 
813  } catch( cms::Exception &e ) {
814  bzero(&gblPhi,sizeof(gblPhi));
815  edm::LogWarning("CSCTFSectorProcessor:run()") << "Exception from GlobalPhi LUT in " << FPGAs[fpga]
816  << "(phi_local="<<lclPhi.phi_local<<",KeyWG="<<itr->getKeyWG()<<",csc="<<itr->cscid()<<")"<<std::endl;
817  }
818 
819  gbletadat gblEta;
820  try {
821  unsigned csc_id = itr->cscid();
822  if (!m_gangedME1a) csc_id = itr->cscidSeparateME1a();
823  gblEta = srLUTs_[FPGAs[fpga]]->globalEtaME(lclPhi.phi_bend_local, lclPhi.phi_local, itr->getKeyWG(), csc_id, m_gangedME1a);
824  //gblEta = srLUTs_[FPGAs[fpga]]->globalEtaME(lclPhi.phi_bend_local, lclPhi.phi_local, itr->getKeyWG(), itr->cscid());
825  } catch( cms::Exception &e ) {
826  bzero(&gblEta,sizeof(gblEta));
827  edm::LogWarning("CSCTFSectorProcessor:run()") << "Exception from GlobalEta LUT in " << FPGAs[fpga]
828  << "(phi_bend_local="<<lclPhi.phi_bend_local<<",phi_local="<<lclPhi.phi_local<<",KeyWG="<<itr->getKeyWG()<<",csc="<<itr->cscid()<<")"<<std::endl;
829  }
830 
831  gblphidat gblPhiDT;
832  try {
833  gblPhiDT = srLUTs_[FPGAs[fpga]]->globalPhiMB(lclPhi.phi_local, itr->getKeyWG(), itr->cscid(), m_gangedME1a);
834  } catch( cms::Exception &e ) {
835  bzero(&gblPhiDT,sizeof(gblPhiDT));
836  edm::LogWarning("CSCTFSectorProcessor:run()") << "Exception from GlobalPhi DT LUT in " << FPGAs[fpga]
837  << "(phi_local="<<lclPhi.phi_local<<",KeyWG="<<itr->getKeyWG()<<",csc="<<itr->cscid()<<")"<<std::endl;
838  }
839 
840  itr->setEtaPacked(gblEta.global_eta);
841 
842  if(itr->station() == 1 ) {
843  //&& itr->cscId() > 6) { //only ring 3
844  itr->setPhiPacked(gblPhiDT.global_phi);// convert the DT to convert
845  dt_stubs.push_back(*itr); // send stubs to DT
846  }
847 
848  //reconvert the ME1 LCT to the CSCTF units.
849  //the same iterator is used to fill two containers,
850  //the CSCTF one (stub_vec_filtered) and LCTs sent to DTTF (dt_stubs)
851  itr->setPhiPacked(gblPhi.global_phi);
852 
853  LogDebug("CSCTFSectorProcessor:run()") << "LCT found, processed by FPGA: " << FPGAs[fpga] << std::endl
854  << " LCT now has (eta, phi) of: (" << itr->etaValue() << "," << itr->phiValue() <<")\n";
855  }
856  }
857 
858  CSCTriggerContainer<csctf::TrackStub> processedStubs(stub_vec_filtered);
859 
866  std::vector<csc::L1Track> tftks;
867 
868  if(run_core){
869  core_->loadData(processedStubs, m_endcap, m_sector, m_minBX, m_maxBX, m_gangedME1a);
870  // core_->loadData(processedStubs, m_endcap, m_sector, m_minBX, m_maxBX, true);
871  if( core_->run(m_endcap, m_sector, m_latency,
872  m_etamin[0], m_etamin[1], m_etamin[2], m_etamin[3],
873  m_etamin[4], m_etamin[5], m_etamin[6], m_etamin[7],
874  m_etamax[0], m_etamax[1], m_etamax[2], m_etamax[3],
875  m_etamax[4], m_etamax[5], m_etamax[6], m_etamax[7],
876  m_etawin[0], m_etawin[1], m_etawin[2],
877  m_etawin[3], m_etawin[4], m_etawin[5], m_etawin[6],
878  m_mindphip, m_mindetap,
879  m_mindeta12_accp, m_maxdeta12_accp, m_maxdphi12_accp,
880  m_mindeta13_accp, m_maxdeta13_accp, m_maxdphi13_accp,
881  m_mindeta112_accp, m_maxdeta112_accp, m_maxdphi112_accp,
882  m_mindeta113_accp, m_maxdeta113_accp, m_maxdphi113_accp,
883  m_mindphip_halo, m_mindetap_halo,
884  m_straightp, m_curvedp,
885  m_mbaPhiOff, m_mbbPhiOff,
886  m_bxa_depth, m_allowALCTonly, m_allowCLCTonly, m_preTrigger, m_widePhi,
887  m_minBX, m_maxBX) )
888  {
889  l1_tracks = core_->tracks();
890  }
891 
892  tftks = l1_tracks.get();
893 
899  std::vector<csc::L1Track>::iterator titr = tftks.begin();
900 
901  for(; titr != tftks.end(); titr++)
902  {
903  ptadd thePtAddress(titr->ptLUTAddress());
904  ptdat thePtData = ptLUT_->Pt(thePtAddress);
905  if(thePtAddress.track_fr)
906  {
907  titr->setRank(thePtData.front_rank);
908  titr->setChargeValidPacked(thePtData.charge_valid_front);
909  }
910  else
911  {
912  titr->setRank(thePtData.rear_rank);
913  titr->setChargeValidPacked(thePtData.charge_valid_rear);
914  }
915 
916  if( ((titr->ptLUTAddress()>>16)&0xf)==15 )
917  {
918  int unmodBx = titr->bx();
919  titr->setBx(unmodBx+2);
920  }
921  }
922  } //end of if(run_core)
923 
924  l1_tracks = tftks;
925 
926 
927  // Add-on for singles:
928  CSCTriggerContainer<csctf::TrackStub> myStubContainer[7]; //[BX]
929  // Loop over CSC LCTs if triggering on them:
930  if( trigger_on_ME1a || trigger_on_ME1b || trigger_on_ME2 || trigger_on_ME3 || trigger_on_ME4 || trigger_on_MB1a || trigger_on_MB1d )
931  for(std::vector<csctf::TrackStub>::iterator itr=stub_vec_filtered.begin(); itr!=stub_vec_filtered.end(); itr++){
932  int station = itr->station()-1;
933  if(station != 4){
934  int subSector = CSCTriggerNumbering::triggerSubSectorFromLabels(CSCDetId(itr->getDetId().rawId()));
935  int mpc = ( subSector ? subSector-1 : station+1 );
936  if( (mpc==0&&trigger_on_ME1a) || (mpc==1&&trigger_on_ME1b) ||
937  (mpc==2&&trigger_on_ME2) || (mpc==3&&trigger_on_ME3) ||
938  (mpc==4&&trigger_on_ME4) ||
939  (mpc==5&& ( (trigger_on_MB1a&&subSector%2==1) || (trigger_on_MB1d&&subSector%2==0) ) ) ){
940  int bx = itr->getBX() - m_minBX;
941  if( bx<0 || bx>=7 ) edm::LogWarning("CSCTFTrackBuilder::buildTracks()") << " LCT BX is out of ["<<m_minBX<<","<<m_maxBX<<") range: "<<itr->getBX();
942  else
943  if( itr->isValid() ) myStubContainer[bx].push_back(*itr);
944  }
945  }
946  }
947 
948  // Core's input was loaded in a relative time window BX=[0-7)
949  // To relate it to time window of tracks (centred at BX=0) we introduce a shift:
950  int shift = (m_maxBX + m_minBX)/2 - m_minBX;
951 
952  // Now we put tracks from singles in a certain bx
953  // if there were no tracks from the core in this endcap/sector/bx
954  CSCTriggerContainer<csc::L1Track> tracksFromSingles;
955  for(int bx=0; bx<7; bx++)
956  if( myStubContainer[bx].get().size() ){ // VP in this bx
957  bool coreTrackExists = false;
958  // tracks are not ordered to be accessible by bx => loop them all
959  std::vector<csc::L1Track> tracks = l1_tracks.get();
960  for(std::vector<csc::L1Track>::iterator trk=tracks.begin(); trk<tracks.end(); trk++)
961  if( (trk->BX() == bx-shift && trk->outputLink() == singlesTrackOutput)
962  || (((trk->ptLUTAddress()>>16)&0xf)==15 && trk->BX()-2 == bx-shift) ){
963  coreTrackExists = true;
964  break;
965  }
966  if( coreTrackExists == false ){
967  csc::L1TrackId trackId(m_endcap,m_sector);
968  csc::L1Track track(trackId);
969  track.setBx(bx-shift);
970  track.setOutputLink(singlesTrackOutput);
971  //CSCCorrelatedLCTDigiCollection singles;
972  std::vector<csctf::TrackStub> stubs = myStubContainer[bx].get();
973  // Select best quality stub, and assign its eta/phi coordinates to the track
974  int qualityME=0, qualityMB=0, ME=100, MB=100, linkME=7;
975  std::vector<csctf::TrackStub>::const_iterator bestStub=stubs.end();
976  for(std::vector<csctf::TrackStub>::const_iterator st_iter=stubs.begin(); st_iter!=stubs.end(); st_iter++){
977  int station = st_iter->station()-1;
978  int subSector = CSCTriggerNumbering::triggerSubSectorFromLabels(CSCDetId(st_iter->getDetId().rawId()));
979  int mpc = ( subSector ? subSector-1 : station+1 );
980  // Sort MB stubs first (priority: quality OR MB1a > MB1b for the same quality)
981  if( mpc==5 && (st_iter->getQuality()>qualityMB || (st_iter->getQuality()==qualityMB&&subSector<MB)) ){
982  qualityMB = st_iter->getQuality();
983  MB = subSector;
984  if(ME>4) bestStub = st_iter; // do not select this stub if ME already had any candidate
985  }
986  // Sort ME stubs (priority: quality OR ME1a > ME1b > ME2 > ME3 > ME4 for the same quality)
987  if( mpc<5 && (st_iter->getQuality()> qualityME
988  || (st_iter->getQuality()==qualityME && mpc< ME)
989  || (st_iter->getQuality()==qualityME && mpc==ME && st_iter->getMPCLink()<linkME))) {
990  qualityME = st_iter->getQuality();
991  ME = mpc;
992  linkME = st_iter->getMPCLink();
993  bestStub = st_iter;
994  }
995  }
996  unsigned rescaled_phi = 999;
997  if (m_firmSP <= 20100210) {
998  // buggy implementation of the phi for singles in the wrapper...
999  // at the end data/emulator have to agree: e.g. wrong in the same way
1000  // BUG: getting the lowest 7 bits instead the 7 most significant ones.
1001  rescaled_phi = unsigned(24*(bestStub->phiPacked()&0x7f)/128.);
1002  }
1003  else {
1004  // correct implementation :-)
1005  rescaled_phi = unsigned(24*(bestStub->phiPacked()>>5)/128.);
1006  }
1007 
1008  unsigned unscaled_phi = bestStub->phiPacked()>>7 ;
1009  track.setLocalPhi(rescaleSinglesPhi?rescaled_phi:unscaled_phi);
1010  track.setEtaPacked((bestStub->etaPacked()>>2)&0x1f);
1011  switch( bestStub->station() ){
1012  case 1: track.setStationIds(bestStub->getMPCLink(),0,0,0,0); break;
1013  case 2: track.setStationIds(0,bestStub->getMPCLink(),0,0,0); break;
1014  case 3: track.setStationIds(0,0,bestStub->getMPCLink(),0,0); break;
1015  case 4: track.setStationIds(0,0,0,bestStub->getMPCLink(),0); break;
1016  case 5: track.setStationIds(0,0,0,0,bestStub->getMPCLink()); break;
1017  default: edm::LogError("CSCTFSectorProcessor::run()") << "Illegal LCT link="<<bestStub->station()<<"\n"; break;
1018  }
1019  // singles.insertDigi(CSCDetId(st_iter->getDetId().rawId()),*st_iter);
1020  //tracksFromSingles.push_back(L1CSCTrack(track,singles));
1021  track.setPtLUTAddress( (1<<16) | ((bestStub->etaPacked()<<9)&0xf000) );
1022  ptadd thePtAddress( track.ptLUTAddress() );
1023  ptdat thePtData = ptLUT_->Pt(thePtAddress);
1024  if( thePtAddress.track_fr ){
1025  track.setRank(thePtData.front_rank);
1026  track.setChargeValidPacked(thePtData.charge_valid_front);
1027  } else {
1028  track.setRank(thePtData.rear_rank);
1029  track.setChargeValidPacked(thePtData.charge_valid_rear);
1030  }
1031  tracksFromSingles.push_back(track);
1032  }
1033  }
1034  std::vector<csc::L1Track> single_tracks = tracksFromSingles.get();
1035  if( single_tracks.size() ) l1_tracks.push_many(single_tracks);
1036  // End of add-on for singles
1037 
1038  return (l1_tracks.get().size() > 0);
1039 }
1040 
1041 // according to the firmware versions print some more information
1042 void CSCTFSectorProcessor::printDisclaimer(int firmSP, int firmFA){
1043 
1044  edm::LogInfo( "CSCTFSectorProcessor" ) << "\n\n"
1045  << "******************************* \n"
1046  << "*** DISCLAIMER *** \n"
1047  << "******************************* \n"
1048  << "\n Firmware SP version (year+month+day)=" << firmSP
1049  << "\n Firmware FA/VM/DD version (year+month+day)=" << firmFA;
1050  if (firmSP==20100210)
1051  edm::LogInfo( "CSCTFSectorProcessor" ) << " -> KNOWN BUGS IN THE FIRMWARE:\n"
1052  << "\t * Wrong phi assignment for singles\n"
1053  << "\t * Wrapper passes to the core only even quality DT stubs\n"
1054  << "\n -> BUGS ARE GOING TO BE EMULATED BY THE SOFTWARE\n\n";
1055 
1056  else
1057  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t * Correct phi assignment for singles\n";
1058 
1059  if (firmSP==20100629){
1060  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t * Correct MB quality masking in the wrapper\n"
1061  << "\t * Core is 20100122\n";
1062  }
1063 
1064  if (firmSP==20100728)
1065  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t * Inverted MB clocks\n";
1066 
1067  if (firmSP==20100901)
1068  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t * Inverted charge bit\n";
1069 
1070  if (firmSP==20101011)
1071  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t **** WARNING THIS FIRMWARE IS UNDER TEST ****\n"
1072  << "\t * Added CSC-DT assembling tracks ME1-MB2/1 \n";
1073  if (firmSP==20101210)
1074  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t **** WARNING THIS FIRMWARE IS UNDER TEST ****\n"
1075  << "\t * New Ghost Busting Algorithm Removing Tracks\n"
1076  << "\t Sharing at Least One LCT\n";
1077 
1078  if (firmSP==20110118)
1079  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t **** WARNING THIS FIRMWARE IS UNDER TEST ****\n"
1080  << "\t * New Ghost Busting Algorithm Removing Tracks\n"
1081  << "\t Sharing at Least One LCT\n"
1082  << "\t * Passing CLCT and PhiBend for PT LUTs\n";
1083  if (firmSP==20120131)
1084  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t **** WARNING THIS FIRMWARE IS UNDER TEST ****\n"
1085  << "\t * non-linear dphi12 dphi23, use deta for PTLUTs \n";
1086 }
LogDebug
#define LogDebug(id)
Definition: PFTrackAlgoTools.cc:503
ptScale
const std::vector< Double_t > ptScale
Definition: Utilities.cc:32
edm::ParameterSet::getParameter
T getParameter(std::string const &) const
edm::ParameterSet::getUntrackedParameter
T getUntrackedParameter(std::string const &, T const &) const
csc::L1Track::setLocalPhi
void setLocalPhi(const unsigned &lphi)
Definition: L1Track.h:36
CSCTFSPCoreLogic::loadData
void loadData(const CSCTriggerContainer< csctf::TrackStub > &, const unsigned &endcap, const unsigned &sector, const int &minBX, const int &maxBX, const bool gangedME1a)
Definition: CSCTFSPCoreLogic.cc:23
CSCTriggerContainer::get
std::vector< T > get() const
Definition: CSCTriggerContainer.h:78
CSCTFPtLUT::Pt
ptdat Pt(const ptadd &) const
Definition: CSCTFPtLUT.cc:183
CSCTFSectorProcessor::dt_stubs
CSCTriggerContainer< csctf::TrackStub > dt_stubs
Definition: CSCTFSectorProcessor.h:98
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i
Definition: mps_fire.py:156
CSCTFSectorProcessor::core_
CSCTFSPCoreLogic * core_
Definition: CSCTFSectorProcessor.h:104
CSCTFSectorProcessor::readParameters
void readParameters(const edm::ParameterSet &pset)
Definition: CSCTFSectorProcessor.cc:631
CSCTFSectorProcessor::stub_vec_filtered
std::vector< csctf::TrackStub > stub_vec_filtered
Definition: CSCTFSectorProcessor.h:99
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string
Definition: AlCaHLTBitMon_QueryRunRegistry.py:255
CSCTFSectorProcessor::initialize
void initialize(const edm::EventSetup &c)
KK.
Definition: CSCTFSectorProcessor.cc:180
L1MuCSCTFConfiguration::parameters
edm::ParameterSet parameters(int sp) const
Definition: L1MuCSCTFConfiguration.cc:7
muonDTDigis_cfi.pset
pset
Definition: muonDTDigis_cfi.py:27
NULL
#define NULL
Definition: scimark2.h:8
csc::L1Track::setPtLUTAddress
void setPtLUTAddress(const unsigned &adr)
Definition: L1Track.h:58
CSCTFSectorProcessor::printDisclaimer
void printDisclaimer(int firmSP, int firmFA)
Definition: CSCTFSectorProcessor.cc:1042
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Definition: MillePedeFileConverter_cfg.py:37
CSCTFSectorProcessor::FPGAs
static const std::string FPGAs[5]
Definition: CSCTFSectorProcessor.h:101
L1MuRegionalCand::setChargeValidPacked
void setChargeValidPacked(unsigned valid)
Set Charge Valid.
Definition: L1MuRegionalCand.h:128
mps_alisetup.config
config
Definition: mps_alisetup.py:315
CSCTriggerContainer::push_back
void push_back(const T &data)
Definition: CSCTriggerContainer.h:44
CSCTFSectorProcessor::run
int run(const CSCTriggerContainer< csctf::TrackStub > &)
Definition: CSCTFSectorProcessor.cc:719
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void setRank(const unsigned &rank)
Definition: L1Track.h:33
ME
Definition: ME.h:11
L1MuRegionalCand::setBx
void setBx(int bx)
Set Bunch Crossing.
Definition: L1MuRegionalCand.h:113
CSCTFSPCoreLogic::run
bool run(const unsigned &endcap, const unsigned &sector, const unsigned &latency, const unsigned &etamin1, const unsigned &etamin2, const unsigned &etamin3, const unsigned &etamin4, const unsigned &etamin5, const unsigned &etamin6, const unsigned &etamin7, const unsigned &etamin8, const unsigned &etamax1, const unsigned &etamax2, const unsigned &etamax3, const unsigned &etamax4, const unsigned &etamax5, const unsigned &etamax6, const unsigned &etamax7, const unsigned &etamax8, const unsigned &etawin1, const unsigned &etawin2, const unsigned &etawin3, const unsigned &etawin4, const unsigned &etawin5, const unsigned &etawin6, const unsigned &etawin7, const unsigned &mindphip, const unsigned &mindetap, const unsigned &mindeta12_accp, const unsigned &maxdeta12_accp, const unsigned &maxdphi12_accp, const unsigned &mindeta13_accp, const unsigned &maxdeta13_accp, const unsigned &maxdphi13_accp, const unsigned &mindeta112_accp, const unsigned &maxdeta112_accp, const unsigned &maxdphi112_accp, const unsigned &mindeta113_accp, const unsigned &maxdeta113_accp, const unsigned &maxdphi113_accp, const unsigned &mindphip_halo, const unsigned &mindetap_halo, const unsigned &straightp, const unsigned &curvedp, const unsigned &mbaPhiOff, const unsigned &mbbPhiOff, const unsigned &m_extend_length, const unsigned &m_allowALCTonly, const unsigned &m_allowCLCTonly, const unsigned &m_preTrigger, const unsigned &m_widePhi, const int &minBX, const int &maxBX)
Definition: CSCTFSPCoreLogic.cc:291
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unsigned ptLUTAddress() const
Definition: L1Track.h:56
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CSCTriggerContainer< csc::L1Track > l1_tracks
Definition: CSCTFSectorProcessor.h:97
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void push_many(const std::vector< T > &data)
Definition: CSCTriggerContainer.h:45
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std::map< std::string, CSCSectorReceiverLUT * > srLUTs_
Definition: CSCTFSectorProcessor.h:103
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class pt_address ptadd
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class pt_data ptdat
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Definition: HiIsolationCommonParameters_cff.py:9
CSCTFSectorProcessor::CSCTFSectorProcessor
CSCTFSectorProcessor(const unsigned &endcap, const unsigned &sector, const edm::ParameterSet &pset, bool tmb07, const L1MuTriggerScales *scales, const L1MuTriggerPtScale *ptScale)
Definition: CSCTFSectorProcessor.cc:16
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class global_phi_data gblphidat
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const T & get() const
Definition: EventSetup.h:55
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void setOutputLink(unsigned oPL)
Definition: L1Track.h:62
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class local_phi_data lclphidat
Data Types.
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static int triggerSubSectorFromLabels(int station, int chamber)
Definition: CSCTriggerNumbering.cc:118
CSCTFSectorProcessor::tracks
CSCTriggerContainer< csc::L1Track > tracks() const
Definition: CSCTFSectorProcessor.h:46
ME
MonitorElement ME
Definition: TrackingDQMClientHeavyIons.cc:21
L1MuRegionalCand::setEtaPacked
void setEtaPacked(unsigned eta)
Set Eta: 6-bit code.
Definition: L1MuRegionalCand.h:131
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static unsigned int const shift
Definition: LuminosityBlockID.cc:9
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void setStationIds(const unsigned &me1, const unsigned &me2, const unsigned &me3, const unsigned &me4, const unsigned &mb1)
Definition: L1Track.cc:123
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CSCTriggerContainer< csc::L1Track > tracks()
Definition: CSCTFSPCoreLogic.cc:1230
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class global_eta_data gbletadat
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T const * product() const
Definition: ESHandle.h:86
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Definition: hcalTTPDigis_cfi.py:7
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std::map< int, int > firmSP_Map
Definition: CSCTFSectorProcessor.h:108
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