CMS 3D CMS Logo

SiStripRawToDigiUnpacker.h
Go to the documentation of this file.
1 
2 #ifndef EventFilter_SiStripRawToDigi_SiStripRawToDigiUnpacker_H
3 #define EventFilter_SiStripRawToDigi_SiStripRawToDigiUnpacker_H
4 
10 #include "boost/cstdint.hpp"
11 #include <iostream>
12 #include <string>
13 #include <vector>
14 
16 namespace sistrip { class RawToClustersLazyUnpacker; }
17 namespace sistrip { class RawToDigiUnpacker; }
18 
21 class FEDRawData;
22 class SiStripDigi;
23 class SiStripRawDigi;
25 class SiStripFedCabling;
26 
27 namespace sistrip {
28 
30 
31  friend class RawToClustersLazyUnpacker;
32 
33  public:
34 
37 
39  RawToDigiUnpacker( int16_t appended_bytes, int16_t fed_buffer_dump_freq, int16_t fed_event_dump_freq, int16_t trigger_fed_id, bool using_fed_key,
40  bool unpack_bad_channels, bool mark_missing_feds, const uint32_t errorThreshold );
41 
44 
46  void createDigis( const SiStripFedCabling&, const FEDRawDataCollection&, SiStripEventSummary&, RawDigis& scope_mode, RawDigis& virgin_raw, RawDigis& proc_raw, Digis& zero_suppr, DetIdCollection&, RawDigis& common_mode );
47 
49  void triggerFed( const FEDRawDataCollection&, SiStripEventSummary&, const uint32_t& event );
50 
52  void locateStartOfFedBuffer( const uint16_t& fed_id, const FEDRawData& input, FEDRawData& output );
53 
55  inline void quiet( bool );
56 
58  inline void useDaqRegister( bool );
59 
60  inline void extractCm( bool );
61 
62  inline void doFullCorruptBufferChecks( bool );
63 
64  inline void doAPVEmulatorCheck( bool );
65 
66  inline void legacy( bool );
67 
68  private:
69 
71  void update( RawDigis& scope_mode, RawDigis& virgin_raw, RawDigis& proc_raw, Digis& zero_suppr, RawDigis& common_mode );
72 
75 
77  void updateEventSummary( const sistrip::FEDBuffer&, SiStripEventSummary& );
78 
80  inline void readoutOrder( uint16_t& physical_order, uint16_t& readout_order );
81 
83  inline void physicalOrder( uint16_t& readout_order, uint16_t& physical_order );
84 
86  inline sistrip::FedBufferFormat fedBufferFormat( const uint16_t& register_value );
87 
89  inline sistrip::FedReadoutMode fedReadoutMode( const uint16_t& register_value );
90 
92  static void dumpRawData( uint16_t fed_id, const FEDRawData&, std::stringstream& );
93 
95  void handleException( std::string method_name, std::string extra_info = "" );
96 
98  void cleanupWorkVectors();
99 
101  class Registry {
102  public:
104  Registry(uint32_t aDetid, uint16_t firstStrip, size_t indexInVector, uint16_t numberOfDigis) :
105  detid(aDetid), first(firstStrip), index(indexInVector), length(numberOfDigis) {}
107  bool operator<(const Registry &other) const {return (detid != other.detid ? detid < other.detid : first < other.first);}
109  uint32_t detid;
110  uint16_t first;
111  size_t index;
112  uint16_t length;
113  };
114 
116  int16_t headerBytes_;
119  int16_t triggerFedId_;
123 
125  uint32_t event_;
126  bool once_;
127  bool first_;
129  bool quiet_;
130  bool extractCm_;
133  bool legacy_;
134  uint32_t errorThreshold_;
135 
137  std::vector<Registry> zs_work_registry_;
138  std::vector<Registry> virgin_work_registry_;
139  std::vector<Registry> scope_work_registry_;
140  std::vector<Registry> proc_work_registry_;
141  std::vector<Registry> cm_work_registry_;
142 
144  std::vector<SiStripDigi> zs_work_digis_;
145  std::vector<SiStripRawDigi> virgin_work_digis_;
146  std::vector<SiStripRawDigi> scope_work_digis_;
147  std::vector<SiStripRawDigi> proc_work_digis_;
148  std::vector<SiStripRawDigi> cm_work_digis_;
149  };
150 
151 }
152 
153 void sistrip::RawToDigiUnpacker::readoutOrder( uint16_t& physical_order, uint16_t& readout_order )
154 {
155  readout_order = ( 4*((static_cast<uint16_t>((static_cast<float>(physical_order)/8.0)))%4) + static_cast<uint16_t>(static_cast<float>(physical_order)/32.0) + 16*(physical_order%8) );
156 }
157 
158 void sistrip::RawToDigiUnpacker::physicalOrder( uint16_t& readout_order, uint16_t& physical_order )
159 {
160  physical_order = ( (32 * (readout_order%4)) + (8 * static_cast<uint16_t>(static_cast<float>(readout_order)/4.0)) - (31 * static_cast<uint16_t>(static_cast<float>(readout_order)/16.0)) );
161 }
162 
164 {
165  if ( (register_value&0xF) == 0x1 ) { return sistrip::FULL_DEBUG_FORMAT; }
166  else if ( (register_value&0xF) == 0x2 ) { return sistrip::APV_ERROR_FORMAT; }
167  else if ( (register_value&0xF) == 0x0 ) { return sistrip::UNDEFINED_FED_BUFFER_FORMAT; }
168  else { return sistrip::UNKNOWN_FED_BUFFER_FORMAT; }
169 }
170 
172 {
173  return static_cast<sistrip::FedReadoutMode>(register_value&0xF);
174 }
175 
176 void sistrip::RawToDigiUnpacker::quiet( bool quiet ) { quiet_ = quiet; }
177 
178 void sistrip::RawToDigiUnpacker::useDaqRegister( bool use ) { useDaqRegister_ = use; }
179 
180 void sistrip::RawToDigiUnpacker::extractCm( bool extract_cm ) { extractCm_ = extract_cm; }
181 
182 void sistrip::RawToDigiUnpacker::doFullCorruptBufferChecks( bool do_full_corrupt_buffer_checks ) { doFullCorruptBufferChecks_ = do_full_corrupt_buffer_checks; }
183 
184 void sistrip::RawToDigiUnpacker::doAPVEmulatorCheck( bool do_APVEmulator_check) { doAPVEmulatorCheck_ = do_APVEmulator_check; }
185 
186 void sistrip::RawToDigiUnpacker::legacy( bool legacy ) { legacy_ = legacy; }
187 
188 #endif // EventFilter_SiStripRawToDigi_SiStripRawToDigiUnpacker_H
189 
190 
191 
#define dso_hidden
void useDaqRegister(bool)
EventSummary update request -> not yet implemented for FEDBuffer class.
std::vector< Registry > proc_work_registry_
std::vector< SiStripDigi > zs_work_digis_
digi collections
std::vector< Registry > scope_work_registry_
std::vector< Registry > zs_work_registry_
registries
Registry(uint32_t aDetid, uint16_t firstStrip, size_t indexInVector, uint16_t numberOfDigis)
constructor
void physicalOrder(uint16_t &readout_order, uint16_t &physical_order)
order of strips
sistrip::FedBufferFormat fedBufferFormat(const uint16_t &register_value)
returns buffer format
sistrip classes
private class to register start and end index of digis in a collection
static std::string const input
Definition: EdmProvDump.cc:44
std::vector< SiStripRawDigi > virgin_work_digis_
void readoutOrder(uint16_t &physical_order, uint16_t &readout_order)
order of strips
edm::DetSetVector< SiStripRawDigi > RawDigis
std::vector< SiStripRawDigi > scope_work_digis_
A Digi for the silicon strip detector, containing both strip and adc information, and suitable for st...
Definition: SiStripDigi.h:12
std::vector< SiStripRawDigi > proc_work_digis_
std::vector< SiStripRawDigi > cm_work_digis_
Contains cabling info at the device level, including DetId, APV pair numbers, hardware addresses...
#define update(a, b)
bool operator<(const Registry &other) const
< operator to sort registries
std::vector< Registry > cm_work_registry_
edm::DetSetVector< SiStripDigi > Digis
A Digi for the silicon strip detector, containing only adc information, and suitable for storing raw ...
std::vector< Registry > virgin_work_registry_
Definition: event.py:1
sistrip::FedReadoutMode fedReadoutMode(const uint16_t &register_value)
returns buffer readout mode