185 unsigned sector,
unsigned subsector,
189 theEndcap(endcap), theStation(station), theSector(sector),
190 theSubsector(subsector), theTrigChamber(chamber) {
191 static bool config_dumped =
false;
198 conf.
getParameter<
unsigned int>(
"alctNplanesHitPretrig");
200 conf.
getParameter<
unsigned int>(
"alctNplanesHitPattern");
202 conf.
getParameter<
unsigned int>(
"alctNplanesHitAccelPretrig");
204 conf.
getParameter<
unsigned int>(
"alctNplanesHitAccelPattern");
228 int fpga_latency = 6;
229 if (early_tbins<0) early_tbins = fifo_pretrig - fpga_latency;
245 if ((infoV > 0 || isSLHC) && !config_dumped) {
248 config_dumped =
true;
286 static bool config_dumped =
false;
301 if (!config_dumped) {
304 config_dumped =
true;
353 static bool config_dumped =
false;
368 if (!config_dumped) {
371 config_dumped =
true;
379 static const unsigned int max_fifo_tbins = 1 << 5;
380 static const unsigned int max_fifo_pretrig = 1 << 5;
381 static const unsigned int max_drift_delay = 1 << 2;
382 static const unsigned int max_nplanes_hit_pretrig = 1 << 3;
383 static const unsigned int max_nplanes_hit_pattern = 1 << 3;
384 static const unsigned int max_nplanes_hit_accel_pretrig = 1 << 3;
385 static const unsigned int max_nplanes_hit_accel_pattern = 1 << 3;
386 static const unsigned int max_trig_mode = 1 << 2;
387 static const unsigned int max_accel_mode = 1 << 2;
388 static const unsigned int max_l1a_window_width =
MAX_ALCT_BINS;
394 <<
", exceeds max allowed, " << max_fifo_tbins-1 <<
" +++\n" 395 <<
"+++ Try to proceed with the default value, fifo_tbins=" 402 <<
", exceeds max allowed, " << max_fifo_pretrig-1 <<
" +++\n" 403 <<
"+++ Try to proceed with the default value, fifo_pretrig=" 410 <<
", exceeds max allowed, " << max_drift_delay-1 <<
" +++\n" 411 <<
"+++ Try to proceed with the default value, drift_delay=" 418 <<
", exceeds max allowed, " << max_nplanes_hit_pretrig-1 <<
" +++\n" 419 <<
"+++ Try to proceed with the default value, nplanes_hit_pretrig=" 426 <<
", exceeds max allowed, " << max_nplanes_hit_pattern-1 <<
" +++\n" 427 <<
"+++ Try to proceed with the default value, nplanes_hit_pattern=" 433 <<
"+++ Value of nplanes_hit_accel_pretrig, " 435 << max_nplanes_hit_accel_pretrig-1 <<
" +++\n" 436 <<
"+++ Try to proceed with the default value, " 442 <<
"+++ Value of nplanes_hit_accel_pattern, " 444 << max_nplanes_hit_accel_pattern-1 <<
" +++\n" 445 <<
"+++ Try to proceed with the default value, " 451 <<
"+++ Value of trig_mode, " <<
trig_mode 452 <<
", exceeds max allowed, " << max_trig_mode-1 <<
" +++\n" 453 <<
"+++ Try to proceed with the default value, trig_mode=" 460 <<
", exceeds max allowed, " << max_accel_mode-1 <<
" +++\n" 461 <<
"+++ Try to proceed with the default value, accel_mode=" 468 <<
", exceeds max allowed, " << max_l1a_window_width-1 <<
" +++\n" 469 <<
"+++ Try to proceed with the default value, l1a_window_width=" 484 if (pattern == 0)
quality[wire][0] = -999;
491 std::vector<CSCALCTDigi>
498 static bool config_dumped =
false;
502 config_dumped =
true;
517 <<
" found in ME" << ((
theEndcap == 1) ?
"+" :
"-")
523 <<
"+++ CSC geometry looks garbled; no emulation possible +++\n";
529 <<
"+++ ME" << ((
theEndcap == 1) ?
"+" :
"-")
533 <<
" is not defined in current geometry! +++\n" 534 <<
"+++ CSC geometry looks garbled; no emulation possible +++\n";
541 <<
"+++ ME" << ((
theEndcap == 1) ?
"+" :
"-")
546 <<
"; ALCT emulation skipped! +++";
547 std::vector<CSCALCTDigi> emptyV;
563 const unsigned int min_layers =
571 unsigned int layersHit = 0;
574 if (!wire[i_layer][i_wire].
empty()) {layersHit++;
break;}
577 if (layersHit >= min_layers)
run(wire);
581 std::vector<CSCALCTDigi> tmpV =
getALCTs();
600 if (!chamber_empty) {
602 unsigned int start_bx = 0;
604 while (start_bx < stop_bx) {
639 digiV[i_layer].clear();
654 <<
"found " <<
digiV[i_layer].size()
655 <<
" wire digi(s) in layer " << i_layer <<
" of ME" 659 for (std::vector<CSCWireDigi>::iterator pld =
digiV[i_layer].
begin();
660 pld !=
digiV[i_layer].end(); pld++) {
661 LogTrace(
"CSCAnodeLCTProcessor") <<
" " << (*pld);
674 digiIt != rwired.second; ++digiIt) {
675 digiV[
id.layer()-1].push_back(*digiIt);
686 for (std::vector<CSCWireDigi>::iterator pld =
digiV[i_layer].
begin();
687 pld !=
digiV[i_layer].end(); pld++) {
688 int i_wire = pld->getWireGroup()-1;
689 std::vector<int> bx_times = pld->getTimeBinsOn();
694 <<
"+++ Found wire digi with wrong wire number = " << i_wire
695 <<
" (max wires = " <<
numWireGroups <<
"); skipping it... +++\n";
705 int last_time = -999;
707 wire[i_layer][i_wire].push_back(0);
708 wire[i_layer][i_wire].push_back(6);
711 for (
unsigned int i = 0;
i < bx_times.size();
i++) {
713 if (
i > 0 && bx_times[
i] == (bx_times[
i-1]+1))
continue;
716 <<
"Digi on layer " << i_layer <<
" wire " << i_wire
717 <<
" at time " << bx_times[
i];
722 if (last_time < 0 || ((bx_times[
i]-last_time) >= 6) ) {
723 wire[i_layer][i_wire].push_back(bx_times[
i]);
724 last_time = bx_times[
i];
729 <<
"+++ Skipping wire digi: wire = " << i_wire
730 <<
" layer = " << i_layer <<
", bx = " << bx_times[
i] <<
" +++";
745 bool chamber_empty =
true;
746 int i_wire, i_layer, digi_num;
747 static unsigned int bits_in_pulse = 8*
sizeof(
pulse[0][0]);
751 pulse[i_layer][i_wire] = 0;
755 for (
int j = 0;
j < 3;
j++)
quality[i_wire][
j] = -999;
761 if (wire[i_layer][i_wire].
size() > 0) {
762 std::vector<int> bx_times = wire[i_layer][i_wire];
763 for (
unsigned int i = 0;
i < bx_times.size();
i++) {
765 if (bx_times[
i] < 0 || bx_times[
i] +
hit_persist >= bits_in_pulse) {
767 <<
"+++ BX time of wire digi (wire = " << i_wire
768 <<
" layer = " << i_layer <<
") bx = " << bx_times[
i]
769 <<
" is not within the range (0-" << bits_in_pulse
770 <<
"] allowed for pulse extension. Skip this digi! +++\n";
775 if (chamber_empty) chamber_empty =
false;
778 for (
unsigned int bx = bx_times[
i];
780 pulse[i_layer][i_wire] =
pulse[i_layer][i_wire] | (1 << bx);
785 <<
"Wire digi: layer " << i_layer
786 <<
" digi #" << ++digi_num <<
" wire group " << i_wire
787 <<
" time " << bx_times[
i];
789 std::ostringstream strstrm;
790 for (
int i = 1;
i <= 32;
i++) {
791 strstrm << ((pulse[i_layer][i_wire]>>(32-
i)) & 1);
793 LogTrace(
"CSCAnodeLCTProcessor") <<
" Pulse: " << strstrm.str();
801 if (
infoV > 1 && !chamber_empty) {
805 return chamber_empty;
813 unsigned int layers_hit;
815 int this_layer, this_wire;
818 const unsigned int nplanes_hit_pretrig_acc =
830 for (
unsigned int bx_time = start_bx; bx_time < stop_bx; bx_time++) {
833 hit_layer[i_layer] =
false;
842 if (((
pulse[this_layer][this_wire] >> bx_time) & 1) == 1) {
844 if (hit_layer[this_layer] ==
false){
845 hit_layer[this_layer] =
true;
851 if (layers_hit >= pretrig_thresh[i_pattern]) {
855 <<
"Pretrigger was satisfied for wire: " << key_wire
856 <<
" pattern: " << i_pattern
857 <<
" bx_time: " << bx_time;
878 unsigned int temp_quality;
879 int this_layer, this_wire, delta_wire;
882 const unsigned int nplanes_hit_pattern_acc =
888 const std::string ptn_label[] = {
"Accelerator",
"CollisionA",
"CollisionB"};
893 hit_layer[i_layer] =
false;
895 double num_pattern_hits=0., times_sum=0.;
896 std::multiset<int> mset_for_median;
897 mset_for_median.clear();
903 this_wire = delta_wire + key_wire;
908 if ( ( (
pulse[this_layer][this_wire] >>
913 if (hit_layer[this_layer] ==
false){
916 hit_layer[this_layer] =
true;
919 <<
"bx_time: " <<
first_bx[key_wire]
920 <<
" pattern: " << i_pattern <<
" keywire: " << key_wire
921 <<
" layer: " << this_layer
922 <<
" quality: " << temp_quality;
926 if (
abs(delta_wire)<2) {
931 if (((
pulse[this_layer][this_wire] >> (first_bx_layer-1)) & 1) == 1) first_bx_layer--;
934 times_sum += (double)first_bx_layer;
935 num_pattern_hits += 1.;
936 mset_for_median.insert(first_bx_layer);
939 <<
" 1st bx in layer: "<<first_bx_layer
940 <<
" sum bx: "<<times_sum
941 <<
" #pat. hits: "<<num_pattern_hits;
949 const int sz = mset_for_median.size();
951 std::multiset<int>::iterator im = mset_for_median.begin();
952 if (sz > 1) std::advance(im,sz/2-1);
959 for (im = mset_for_median.begin(); im != mset_for_median.end(); im++)
960 sprintf(bxs,
"%s %d", bxs, *im);
966 if (temp_quality >= pattern_thresh[i_pattern]) {
972 temp_quality -= (pattern_thresh[i_pattern]-1);
980 else if (temp_quality > 3) Q = temp_quality - 3;
985 if (i_pattern == 0) {
987 quality[key_wire][0] = temp_quality;
991 if (static_cast<int>(temp_quality) >
quality[key_wire][1]) {
992 quality[key_wire][1] = temp_quality;
993 quality[key_wire][2] = i_pattern-1;
998 <<
"Pattern found; keywire: " << key_wire
999 <<
" type: " << ptn_label[i_pattern]
1000 <<
" quality: " << temp_quality <<
"\n";
1005 if (
quality[key_wire][2] == 0)
1007 <<
"Collision Pattern A is chosen" <<
"\n";
1008 else if (
quality[key_wire][2] == 1)
1010 <<
"Collision Pattern B is chosen" <<
"\n";
1025 for (
int key_wire = 0; key_wire <
numWireGroups; key_wire++) {
1026 for (
int i_pattern = 0; i_pattern < 2; i_pattern++) {
1027 ghost_cleared[key_wire][i_pattern] = 0;
1030 int qual_this =
quality[key_wire][i_pattern];
1031 if (qual_this > 0) {
1034 int qual_prev = (key_wire > 0) ?
quality[key_wire-1][i_pattern] : 0;
1035 if (qual_prev > 0) {
1044 if (qual_prev >= qual_this) ghost_cleared[key_wire][i_pattern] = 1;
1053 (qual_prev > qual_this) )
1054 ghost_cleared[key_wire][i_pattern] = 1;
1060 if (ghost_cleared[key_wire][i_pattern] == 1) {
1062 << ((i_pattern == 0) ?
"Accelerator" :
"Collision")
1063 <<
" pattern ghost cancelled on key_wire " << key_wire <<
" q="<<qual_this
1064 <<
" by wire " << key_wire-1<<
" q="<<qual_prev;
1069 (key_wire < numWireGroups-1) ?
quality[key_wire+1][i_pattern] : 0;
1070 if (qual_next > 0) {
1074 if (qual_next > qual_this) ghost_cleared[key_wire][i_pattern] = 1;
1083 (qual_next >= qual_this) )
1084 ghost_cleared[key_wire][i_pattern] = 1;
1087 if (ghost_cleared[key_wire][i_pattern] == 1) {
1089 << ((i_pattern == 0) ?
"Accelerator" :
"Collision")
1090 <<
" pattern ghost cancelled on key_wire " << key_wire <<
" q="<<qual_this
1091 <<
" by wire " << key_wire+1<<
" q="<<qual_next;
1100 for (
int key_wire = 0; key_wire <
numWireGroups; key_wire++) {
1101 for (
int i_pattern = 0; i_pattern < 2; i_pattern++) {
1102 if (ghost_cleared[key_wire][i_pattern] > 0) {
1103 clear(key_wire, i_pattern);
1121 for (
int key_wire = 0; key_wire <
numWireGroups; key_wire++) {
1122 for (
int i_pattern = 0; i_pattern < 2; i_pattern++) {
1123 ghost_cleared[key_wire][i_pattern] = 0;
1126 int qual_this =
quality[key_wire][i_pattern];
1127 if (qual_this > 0) {
1132 int qual_prev = (key_wire > 0) ?
quality[key_wire-1][i_pattern] : 0;
1133 if (qual_prev > 0) {
1139 if (
runME21ILT_ or runME3141ILT_) qual_prev = (qual_prev & 0x03);
1148 if (qual_prev > qual_this) ghost_cleared[key_wire][i_pattern] = 1;
1157 (qual_prev > qual_this) )
1158 ghost_cleared[key_wire][i_pattern] = 1;
1164 if (ghost_cleared[key_wire][i_pattern] == 1) {
1166 << ((i_pattern == 0) ?
"Accelerator" :
"Collision")
1167 <<
" pattern ghost cancelled on key_wire " << key_wire <<
" q="<<qual_this
1168 <<
" by wire " << key_wire-1<<
" q="<<qual_prev<<
" dt="<<
dt;
1174 (key_wire < numWireGroups-1) ?
quality[key_wire+1][i_pattern] : 0;
1175 if (qual_next > 0) {
1182 qual_next = (qual_next & 0x03);
1185 if (qual_next >= qual_this) ghost_cleared[key_wire][i_pattern] = 1;
1194 (qual_next >= qual_this) )
1195 ghost_cleared[key_wire][i_pattern] = 1;
1198 if (ghost_cleared[key_wire][i_pattern] == 1) {
1200 << ((i_pattern == 0) ?
"Accelerator" :
"Collision")
1201 <<
" pattern ghost cancelled on key_wire " << key_wire <<
" q="<<qual_this
1202 <<
" by wire " << key_wire+1<<
" q="<<qual_next<<
" dt="<<
dt;
1211 for (
int key_wire = 0; key_wire <
numWireGroups; key_wire++) {
1212 for (
int i_pattern = 0; i_pattern < 2; i_pattern++) {
1213 if (ghost_cleared[key_wire][i_pattern] > 0) {
1214 clear(key_wire, i_pattern);
1224 std::vector<CSCALCTDigi> lct_list;
1234 if (
infoV>1)
LogTrace(
"CSCAnodeLCTProcessor")<<
" bx="<<bx<<
" fbx="<<fbx;
1239 if (
infoV>1)
LogTrace(
"CSCAnodeLCTProcessor")<<
" bx="<<bx<<
" fbx="<<fbx;
1242 int qual = (
quality[i_wire][0] & 0x03);
1245 lct_list.push_back(lct_info);
1250 int qual = (
quality[i_wire][1] & 0x03);
1253 lct_list.push_back(lct_info);
1254 if (
infoV>1)
LogTrace(
"CSCAnodeLCTProcessor")<<
" got lct_info: "<<lct_info;
1267 int n_alct_all=0, n_alct=0;
1268 for (std::vector <CSCALCTDigi>::const_iterator plct = lct_list.begin(); plct != lct_list.end(); plct++)
1269 if (plct->isValid() && plct->getBX()==6) n_alct_all++;
1270 for (std::vector <CSCALCTDigi>::const_iterator plct = fourBest.begin(); plct != fourBest.end(); plct++)
1271 if (plct->isValid() && plct->getBX()==6) n_alct++;
1274 <<
" all "<<n_alct_all<<
" found "<<n_alct;
1279 for (std::vector<CSCALCTDigi>::const_iterator plct = fourBest.begin();
1280 plct != fourBest.end(); plct++) {
1282 int bx = plct->getBX();
1285 <<
"+++ Bx of ALCT candidate, " << bx <<
", exceeds max allowed, " 1310 if (first_bx < MAX_ALCT_BINS) {
1347 const std::vector<CSCALCTDigi>& all_alcts) {
1353 LogTrace(
"CSCAnodeLCTProcessor") << all_alcts.size() <<
1354 " ALCTs at the input of best-track selector: ";
1355 for (std::vector <CSCALCTDigi>::const_iterator plct = all_alcts.begin();
1356 plct != all_alcts.end(); plct++) {
1357 if (!plct->isValid())
continue;
1358 LogTrace(
"CSCAnodeLCTProcessor") << (*plct);
1363 for (std::vector <CSCALCTDigi>::const_iterator plct = all_alcts.begin();
1364 plct != all_alcts.end(); plct++) {
1365 if (!plct->isValid())
continue;
1374 int bx = (*plct).
getBX();
1375 int accel = (*plct).getAccelerator();
1376 int qual = (*plct).getQuality();
1377 int wire = (*plct).getKeyWG();
1378 bool vA = tA[bx][accel].
isValid();
1379 bool vB = tB[bx][accel].
isValid();
1384 if (!vA || qual > qA || (qual == qA && wire > wA)) {
1385 tA[bx][accel] = *plct;
1387 if (!vB || qual > qB || (qual == qB && wire < wB)) {
1388 tB[bx][accel] = *plct;
1393 for (
int accel = 0; accel <= 1; accel++) {
1395 if (tA[bx][accel].isValid()) {
1397 LogTrace(
"CSCAnodeLCTProcessor") <<
"tA: " << tA[bx][accel];
1398 LogTrace(
"CSCAnodeLCTProcessor") <<
"tB: " << tB[bx][accel];
1400 bestALCTs[bx][accel] = tA[bx][accel];
1403 if (tA[bx][accel] != tB[bx][accel] &&
1404 tA[bx][accel].getQuality() == tB[bx][accel].getQuality()) {
1405 secondALCTs[bx][accel] = tB[bx][accel];
1412 for (std::vector <CSCALCTDigi>::const_iterator plct =
1413 all_alcts.begin(); plct != all_alcts.end(); plct++) {
1414 if ((*plct).isValid() &&
1415 (*plct).getAccelerator() == accel && (*plct).getBX() == bx &&
1416 (*plct).getQuality() < bestALCTs[bx][accel].
getQuality() &&
1417 (*plct).getQuality() >= secondALCTs[bx][accel].
getQuality() &&
1418 (*plct).getKeyWG() >= secondALCTs[bx][accel].
getKeyWG()) {
1419 secondALCTs[bx][accel] = *plct;
1428 std::vector<CSCALCTDigi> fourBest;
1430 for (
int i = 0;
i < 2;
i++) {
1431 if (bestALCTs[bx][
i].isValid()) fourBest.push_back(bestALCTs[bx][
i]);
1433 for (
int i = 0;
i < 2;
i++) {
1434 if (secondALCTs[bx][
i].isValid()) fourBest.push_back(secondALCTs[bx][
i]);
1439 LogTrace(
"CSCAnodeLCTProcessor") << fourBest.size() <<
" ALCTs selected: ";
1440 for (std::vector<CSCALCTDigi>::const_iterator plct = fourBest.begin();
1441 plct != fourBest.end(); plct++) {
1442 LogTrace(
"CSCAnodeLCTProcessor") << (*plct);
1454 bool returnValue =
false;
1460 if (lhsALCT.
getBX() < rhsALCT.
getBX()) {returnValue =
true;}
1461 if (lhsALCT.
getBX() != rhsALCT.
getBX()) {
return returnValue;}
1466 if (qual1 > qual2) {returnValue =
true;}
1470 else if (qual1 == qual2 &&
1474 {returnValue =
true;}
1490 if (
quality[key_wire][1] > 0) {
1493 <<
"trigMode(): collision track " << key_wire <<
" disabled" <<
"\n";
1498 if (
quality[key_wire][0] > 0) {
1501 <<
"trigMode(): accelerator track " << key_wire <<
" disabled" <<
"\n";
1510 <<
"trigMode(): collision track " << key_wire <<
" disabled" <<
"\n";
1520 int promotionBit = 1 << 2;
1526 if (
quality[key_wire][0] > 0) {
1529 <<
"alctMode(): accelerator track " << key_wire <<
" ignored" <<
"\n";
1534 if (
quality[key_wire][1] > 0) {
1535 quality[key_wire][1] += promotionBit;
1537 <<
"alctMode(): collision track " << key_wire <<
" promoted" <<
"\n";
1542 if (
quality[key_wire][0] > 0) {
1543 quality[key_wire][0] += promotionBit;
1545 <<
"alctMode(): accelerator track " << key_wire <<
" promoted"<<
"\n";
1550 if (
quality[key_wire][1] > 0) {
1553 <<
"alctMode(): collision track " << key_wire <<
" ignored" <<
"\n";
1561 std::ostringstream strm;
1563 strm <<
"++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n";
1564 strm <<
"+ ALCT configuration parameters: +\n";
1565 strm <<
"++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n";
1566 strm <<
" fifo_tbins [total number of time bins in DAQ readout] = " 1568 strm <<
" fifo_pretrig [start time of anode raw hits in DAQ readout] = " 1570 strm <<
" drift_delay [drift delay after pre-trigger, in 25 ns bins] = " 1572 strm <<
" nplanes_hit_pretrig [min. number of layers hit for pre-trigger] = " 1574 strm <<
" nplanes_hit_pattern [min. number of layers hit for trigger] = " 1576 strm <<
" nplanes_hit_accel_pretrig [min. number of layers hit for accel." 1578 strm <<
" nplanes_hit_accel_pattern [min. number of layers hit for accel." 1580 strm <<
" trig_mode [enabling/disabling collision/accelerator tracks] = " 1582 strm <<
" accel_mode [preference to collision/accelerator tracks] = " 1584 strm <<
" l1a_window_width [L1Accept window width, in 25 ns bins] = " 1586 strm <<
"++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n";
1587 LogDebug(
"CSCAnodeLCTProcessor") << strm.str();
1594 <<
"ME" << ((
theEndcap == 1) ?
"+" :
"-")
1598 std::ostringstream strstrm;
1600 if (i_wire%10 == 0) {
1601 if (i_wire < 100) strstrm << i_wire/10;
1602 else strstrm << (i_wire-100)/10;
1604 else strstrm <<
" ";
1608 strstrm << i_wire%10;
1613 if (wire[i_layer][i_wire].
size() > 0) {
1614 std::vector<int> bx_times = wire[i_layer][i_wire];
1615 strstrm << std::hex << bx_times[0] <<
std::dec;
1622 LogTrace(
"CSCAnodeLCTProcessor") << strstrm.str();
1628 std::vector<CSCALCTDigi> tmpV;
1633 static int lct_bins =
1638 static int ifois = 0;
1648 <<
"; in-time ALCTs are not getting read-out!!! +++" <<
"\n";
1653 <<
"+++ Allowed range of time bins, [0-" << late_tbins
1655 <<
"+++ Set late_tbins to max allowed +++\n";
1656 late_tbins = MAX_ALCT_BINS-1;
1663 std::vector<CSCALCTDigi> all_alcts =
getALCTs();
1664 for (std::vector <CSCALCTDigi>::const_iterator plct = all_alcts.begin();
1665 plct != all_alcts.end(); plct++) {
1666 if (!plct->isValid())
continue;
1668 int bx = (*plct).getBX();
1672 <<
" Do not report ALCT on keywire " << plct->getKeyWG()
1673 <<
": found at bx " << bx <<
", whereas the earliest allowed bx is " 1679 if (bx > late_tbins) {
1681 <<
" Do not report ALCT on keywire " << plct->getKeyWG()
1682 <<
": found at bx " << bx <<
", whereas the latest allowed bx is " 1687 tmpV.push_back(*plct);
1694 std::vector<CSCALCTDigi> tmpV;
1709 std::ostringstream strstrm_header;
1711 <<
"\n" <<
"Pattern: " << i_pattern <<
" Key wire: " << key_wire;
1712 for (
int i = 1;
i <= 32;
i++) {
1713 strstrm_header << ((32-
i)%10);
1715 LogTrace(
"CSCAnodeLCTProcessor") << strstrm_header.str();
1718 std::ostringstream strstrm_pulse;
1722 for (
int i = 1;
i <= 32;
i++) {
1723 strstrm_pulse << ((pulse[this_layer][this_wire]>>(32-
i)) & 1);
1726 << strstrm_pulse.str() <<
" on layer " << this_layer;
1731 <<
"-------------------------------------------";
T getParameter(std::string const &) const
int ghost_cancellation_bx_depth
void showPatterns(const int key_wire)
void readWireDigis(std::vector< int > wire[CSCConstants::NUM_LAYERS][CSCConstants::MAX_NUM_WIRES])
bool existsAs(std::string const ¶meterName, bool trackiness=true) const
checks if a parameter exists as a given type
int quality[CSCConstants::MAX_NUM_WIRES][3]
unsigned int alctDriftDelay() const
CSCChamber * chamber(unsigned endcap, unsigned station, unsigned sector, unsigned subsector, unsigned tcscid) const
Return the CSCChamber for a corresponding endcap/station/sector/subsector/trigger cscid...
void checkConfigParameters()
int first_bx_corrected[CSCConstants::MAX_NUM_WIRES]
static const int time_weights[NUM_PATTERN_WIRES]
static const unsigned int def_drift_delay
static const unsigned int def_fifo_tbins
CSCALCTDigi bestALCT[MAX_ALCT_BINS]
CSCALCTDigi secondALCT[MAX_ALCT_BINS]
static const int pattern_mask_slim[CSCConstants::NUM_ALCT_PATTERNS][NUM_PATTERN_WIRES]
bool getDigis(const CSCWireDigiCollection *wiredc)
bool isValid() const
check ALCT validity (1 - valid ALCT)
unsigned int nplanes_hit_pattern
void clear()
clear this ALCT
const unsigned theTrigChamber
unsigned int alctNplanesHitPretrig() const
void setConfigParameters(const CSCDBL1TPParameters *conf)
void trigMode(const int key_wire)
int numberOfWireGroups() const
static int ringFromTriggerLabels(int station, int triggerCSCID)
void ghostCancellationLogicSLHC()
static const unsigned int def_accel_mode
unsigned int alctL1aWindowWidth() const
int getFullBX() const
return 12-bit full BX.
void ghostCancellationLogic()
static const unsigned int def_nplanes_hit_accel_pretrig
static const unsigned int def_fifo_pretrig
static CSCTriggerGeomManager * get()
static const int pattern_mask_r1[CSCConstants::NUM_ALCT_PATTERNS][NUM_PATTERN_WIRES]
The Signals That Services Can Subscribe To This is based on ActivityRegistry and is current per Services can connect to the signals distributed by the ActivityRegistry in order to monitor the activity of the application Each possible callback has some defined which we here list in angle e< void, edm::EventID const &, edm::Timestamp const & > We also list in braces which AR_WATCH_USING_METHOD_ is used for those or
void accelMode(const int key_wire)
Abs< T >::type abs(const T &t)
const CSCLayer * layer(CSCDetId id) const
Return the layer corresponding to the given id.
unsigned int l1a_window_width
static const unsigned int def_nplanes_hit_pattern
static const int pattern_envelope[CSCConstants::NUM_ALCT_PATTERNS][NUM_PATTERN_WIRES]
unsigned int alctTrigMode() const
bool preTrigger(const int key_wire, const int start_bx)
static const int pattern_mask_open[CSCConstants::NUM_ALCT_PATTERNS][NUM_PATTERN_WIRES]
bool pulseExtension(const std::vector< int > wire[CSCConstants::NUM_LAYERS][CSCConstants::MAX_NUM_WIRES])
int getBX() const
return BX - five low bits of BXN counter tagged by the ALCT
static const unsigned int def_l1a_window_width
bool ghost_cancellation_side_quality
int getQuality() const
return quality of a pattern
bool isBetterALCT(const CSCALCTDigi &lhsALCT, const CSCALCTDigi &rhsALCT)
unsigned int alctAccelMode() const
static const unsigned int def_trig_mode
int getAccelerator() const
static const unsigned int def_nplanes_hit_accel_pattern
unsigned int alctFifoPretrig() const
std::vector< CSCALCTDigi > readoutALCTs()
unsigned int alctNplanesHitAccelPretrig() const
void setDefaultConfigParameters()
const unsigned theStation
std::vector< CSCWireDigi >::const_iterator const_iterator
unsigned int alctNplanesHitAccelPattern() const
std::vector< CSCALCTDigi > bestTrackSelector(const std::vector< CSCALCTDigi > &all_alcts)
unsigned int fifo_pretrig
int first_bx[CSCConstants::MAX_NUM_WIRES]
void dumpConfigParams() const
std::pair< const_iterator, const_iterator > Range
void dumpDigis(const std::vector< int > wire[CSCConstants::NUM_LAYERS][CSCConstants::MAX_NUM_WIRES]) const
void setTrknmb(const uint16_t number)
Set track number (1,2) after sorting ALCTs.
void setFullBX(const uint16_t fullbx)
Set 12-bit full BX.
const unsigned theSubsector
unsigned int pulse[CSCConstants::NUM_LAYERS][CSCConstants::MAX_NUM_WIRES]
unsigned int alctNplanesHitPattern() const
bool patternDetection(const int key_wire)
unsigned int nplanes_hit_accel_pattern
std::vector< CSCALCTDigi > run(const CSCWireDigiCollection *wiredc)
unsigned int pretrig_extra_deadtime
int getKeyWG() const
return key wire group
const CSCLayerGeometry * geometry() const
std::vector< CSCWireDigi > digiV[CSCConstants::NUM_LAYERS]
static int chamberFromTriggerLabels(int TriggerSector, int TriggerSubSector, int station, int TriggerCSCID)
unsigned int nplanes_hit_pretrig
int pattern_mask[CSCConstants::NUM_ALCT_PATTERNS][NUM_PATTERN_WIRES]
std::vector< CSCALCTDigi > getALCTs()
static const unsigned int def_nplanes_hit_pretrig
unsigned int nplanes_hit_accel_pretrig
unsigned int alctFifoTbins() const