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L1GtHwValidation Class Reference

#include <L1GtHwValidation.h>

Inheritance diagram for L1GtHwValidation:
DQMEDAnalyzer edm::stream::EDAnalyzer< edm::RunSummaryCache< dqmDetails::NoCache >, edm::LuminosityBlockSummaryCache< dqmDetails::NoCache > > edm::stream::EDAnalyzerBase edm::EDConsumerBase

Public Member Functions

 L1GtHwValidation (const edm::ParameterSet &)
 
virtual ~L1GtHwValidation ()
 
- Public Member Functions inherited from DQMEDAnalyzer
virtual void beginRun (edm::Run const &, edm::EventSetup const &) final
 
virtual void beginStream (edm::StreamID id) final
 
 DQMEDAnalyzer (void)
 
virtual void endLuminosityBlockSummary (edm::LuminosityBlock const &, edm::EventSetup const &, dqmDetails::NoCache *) const final
 
virtual void endRunSummary (edm::Run const &, edm::EventSetup const &, dqmDetails::NoCache *) const final
 
uint32_t streamId () const
 
- Public Member Functions inherited from edm::stream::EDAnalyzer< edm::RunSummaryCache< dqmDetails::NoCache >, edm::LuminosityBlockSummaryCache< dqmDetails::NoCache > >
 EDAnalyzer ()=default
 
- Public Member Functions inherited from edm::stream::EDAnalyzerBase
void callWhenNewProductsRegistered (std::function< void(BranchDescription const &)> const &func)
 
 EDAnalyzerBase ()
 
ModuleDescription const & moduleDescription () const
 
virtual ~EDAnalyzerBase ()
 
- Public Member Functions inherited from edm::EDConsumerBase
std::vector< ConsumesInfoconsumesInfo () const
 
 EDConsumerBase ()
 
ProductHolderIndexAndSkipBit indexFrom (EDGetToken, BranchType, TypeID const &) const
 
void itemsMayGet (BranchType, std::vector< ProductHolderIndexAndSkipBit > &) const
 
void itemsToGet (BranchType, std::vector< ProductHolderIndexAndSkipBit > &) const
 
std::vector
< ProductHolderIndexAndSkipBit >
const & 
itemsToGetFromEvent () const
 
void labelsForToken (EDGetToken iToken, Labels &oLabels) const
 
void modulesDependentUpon (std::string const &iProcessName, std::string const &iModuleLabel, bool iPrint, std::vector< char const * > &oModuleLabels) const
 
void modulesWhoseProductsAreConsumed (std::vector< ModuleDescription const * > &modules, ProductRegistry const &preg, std::map< std::string, ModuleDescription const * > const &labelsToDesc, std::string const &processName) const
 
bool registeredToConsume (ProductHolderIndex, bool, BranchType) const
 
bool registeredToConsumeMany (TypeID const &, BranchType) const
 
void updateLookup (BranchType iBranchType, ProductHolderIndexHelper const &)
 
virtual ~EDConsumerBase ()
 

Protected Member Functions

virtual void beginLuminosityBlock (const edm::LuminosityBlock &, const edm::EventSetup &)
 
virtual void bookHistograms (DQMStore::IBooker &ibooker, const edm::Run &, const edm::EventSetup &) override
 
virtual void dqmBeginRun (const edm::Run &, const edm::EventSetup &)
 
- Protected Member Functions inherited from edm::EDConsumerBase
template<typename ProductType , BranchType B = InEvent>
EDGetTokenT< ProductType > consumes (edm::InputTag const &tag)
 
EDGetToken consumes (const TypeToGet &id, edm::InputTag const &tag)
 
template<BranchType B>
EDGetToken consumes (TypeToGet const &id, edm::InputTag const &tag)
 
ConsumesCollector consumesCollector ()
 Use a ConsumesCollector to gather consumes information from helper functions. More...
 
template<typename ProductType , BranchType B = InEvent>
void consumesMany ()
 
void consumesMany (const TypeToGet &id)
 
template<BranchType B>
void consumesMany (const TypeToGet &id)
 
template<typename ProductType , BranchType B = InEvent>
EDGetTokenT< ProductType > mayConsume (edm::InputTag const &tag)
 
EDGetToken mayConsume (const TypeToGet &id, edm::InputTag const &tag)
 
template<BranchType B>
EDGetToken mayConsume (const TypeToGet &id, edm::InputTag const &tag)
 

Private Member Functions

virtual void analyze (const edm::Event &, const edm::EventSetup &)
 
virtual void compareDaqRecord (const edm::Event &, const edm::EventSetup &)
 L1 GT DAQ record comparison. More...
 
virtual void compareEvmRecord (const edm::Event &, const edm::EventSetup &)
 L1 GT EVM record comparison. More...
 
virtual void compareFDL (const edm::Event &, const edm::EventSetup &, const L1GtFdlWord &, const L1GtFdlWord &, const int)
 compare the FDL board More...
 
virtual void compareGt_Gct (const edm::Event &, const edm::EventSetup &)
 
virtual void compareGTFE (const edm::Event &, const edm::EventSetup &, const L1GtfeWord &, const L1GtfeWord &, const int)
 compare the GTFE board More...
 
virtual void comparePSB (const edm::Event &, const edm::EventSetup &, const L1GtPsbWord &, const L1GtPsbWord &)
 compare the PSB board More...
 
virtual void compareTCS (const edm::Event &, const edm::EventSetup &, const L1TcsWord &, const L1TcsWord &)
 compare the TCS board More...
 
bool excludedAlgo (const int &) const
 exclusion status for algorithm with bit i More...
 
void excludedAlgoList ()
 exclude from comparison some bits with known disagreement - bit list More...
 
bool matchCondCategory (const L1GtConditionCategory &, const L1GtConditionCategory &)
 book all histograms for the module More...
 
bool matchCondL1GtObject (const std::vector< L1GtObject > &, const L1GtObject &)
 
bool matchCondType (const L1GtConditionType &, const L1GtConditionType &)
 

Private Attributes

bool m_agree
 internal members More...
 
bool m_dataOnly
 
bool m_dataOnlyMask
 
std::string m_dirName
 directory name for L1Extra plots More...
 
bool m_emulOnly
 
bool m_emulOnlyMask
 
std::vector< int > m_excludeAlgoTrigByBit
 exclude algorithm triggers from comparison data - emulator by algorithm bit number More...
 
std::vector< std::string > m_excludeAlgoTrigByName
 exclude algorithm triggers from comparison data - emulator by algorithm name More...
 
std::vector< edm::ParameterSetm_excludeCondCategTypeObject
 
std::vector< int > m_excludedAlgoList
 
MonitorElementm_excludedAlgorithmsAgreement
 
std::vector
< L1GtConditionCategory
m_excludedCondCategory
 excluded condition categories More...
 
std::vector< L1GtConditionTypem_excludedCondType
 excluded condition types More...
 
std::vector< L1GtObjectm_excludedL1GtObject
 excluded L1 GT objects More...
 
MonitorElementm_fdlDataAlgoDecision [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlDataAlgoDecision_Err [NumberOfGtRecords]
 
MonitorElementm_fdlDataAlgoDecision_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlDataAlgoDecisionMask [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlDataAlgoDecisionMask_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlDataAlgoDecisionPrescaled [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlDataAlgoDecisionPrescaled_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlDataAlgoDecisionPrescaledMask_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlDataAlgoDecisionUnprescaled [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlDataAlgoDecisionUnprescaled_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlDataAlgoDecisionUnprescaledMask_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlDataEmul [TotalBxInEvent][NumberOfGtRecords]
 FDL (0 for DAQ, 1 for EVM record) More...
 
MonitorElementm_fdlDataEmul_Err [NumberOfGtRecords]
 
MonitorElementm_fdlDataEmulAlgoDecision [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlDataEmulAlgoDecision_Err [NumberOfGtRecords]
 
MonitorElementm_fdlDataEmulAlgoDecisionMask [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlDataEmulAlgoDecisionPrescaled [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlDataEmulAlgoDecisionUnprescaled [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlDataEmulAlgoDecisionUnprescaledAllowed [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlDataEmulTechDecision [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlDataEmulTechDecision_Err [NumberOfGtRecords]
 
MonitorElementm_fdlDataEmulTechDecisionMask [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlDataTechDecision [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlDataTechDecision_Err [NumberOfGtRecords]
 
MonitorElementm_fdlDataTechDecisionMask [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlEmulAlgoDecision [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlEmulAlgoDecision_Err [NumberOfGtRecords]
 
MonitorElementm_fdlEmulAlgoDecision_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlEmulAlgoDecisionMask [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlEmulAlgoDecisionMask_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlEmulAlgoDecisionPrescaled [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlEmulAlgoDecisionPrescaled_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlEmulAlgoDecisionPrescaledMask_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlEmulAlgoDecisionUnprescaled [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlEmulAlgoDecisionUnprescaled_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlEmulAlgoDecisionUnprescaledMask_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlEmulTechDecision [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_fdlEmulTechDecision_Err [NumberOfGtRecords]
 
MonitorElementm_fdlEmulTechDecisionMask [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElementm_gtErrorFlag
 PSB. More...
 
MonitorElementm_gtfeDataEmul [NumberOfGtRecords]
 histograms More...
 
edm::InputTag m_l1GctDataInputTag
 input tag for the L1 GCT hardware record More...
 
edm::InputTag m_l1GtDataDaqInputTag
 input tag for the L1 GT hardware DAQ record More...
 
edm::EDGetTokenT
< L1GlobalTriggerReadoutRecord
m_l1GtDataDaqInputToken_
 
edm::InputTag m_l1GtDataEvmInputTag
 input tag for the L1 GT hardware EVM record More...
 
edm::EDGetTokenT
< L1GlobalTriggerEvmReadoutRecord
m_l1GtDataEvmInputToken_
 
edm::InputTag m_l1GtEmulDaqInputTag
 input tag for the L1 GT emulator DAQ record More...
 
edm::EDGetTokenT
< L1GlobalTriggerReadoutRecord
m_l1GtEmulDaqInputToken_
 
edm::InputTag m_l1GtEmulEvmInputTag
 input tag for the L1 GT emulator EVM record More...
 
edm::EDGetTokenT
< L1GlobalTriggerEvmReadoutRecord
m_l1GtEmulEvmInputToken_
 
const L1GtTriggerMenum_l1GtMenu
 trigger menu More...
 
unsigned long long m_l1GtMenuCacheID
 
const L1GtPrescaleFactorsm_l1GtPfAlgo
 prescale factors More...
 
unsigned long long m_l1GtPfAlgoCacheID
 
const L1GtPrescaleFactorsm_l1GtPfTech
 
unsigned long long m_l1GtPfTechCacheID
 
const L1GtTriggerMaskm_l1GtTmAlgo
 trigger masks More...
 
unsigned long long m_l1GtTmAlgoCacheID
 
const L1GtTriggerMaskm_l1GtTmTech
 
unsigned long long m_l1GtTmTechCacheID
 
std::ostringstream m_myCoutStream
 
int m_nrDataEventError
 counters More...
 
int m_nrEmulEventError
 
int m_nrEvJob
 
int m_nrEvRun
 
const std::vector< std::vector
< int > > * 
m_prescaleFactorsAlgoTrig
 
const std::vector< std::vector
< int > > * 
m_prescaleFactorsTechTrig
 
std::vector< unsigned int > m_triggerMaskAlgoTrig
 
std::vector< unsigned int > m_triggerMaskTechTrig
 

Static Private Attributes

static const int NumberOfGtRecords = 2
 
static const int TotalBxInEvent = 5
 

Additional Inherited Members

- Public Types inherited from edm::stream::EDAnalyzer< edm::RunSummaryCache< dqmDetails::NoCache >, edm::LuminosityBlockSummaryCache< dqmDetails::NoCache > >
typedef CacheContexts< T...> CacheTypes
 
typedef CacheTypes::GlobalCache GlobalCache
 
typedef AbilityChecker< T...> HasAbility
 
typedef
CacheTypes::LuminosityBlockCache 
LuminosityBlockCache
 
typedef
LuminosityBlockContextT
< LuminosityBlockCache,
RunCache, GlobalCache
LuminosityBlockContext
 
typedef
CacheTypes::LuminosityBlockSummaryCache 
LuminosityBlockSummaryCache
 
typedef CacheTypes::RunCache RunCache
 
typedef RunContextT< RunCache,
GlobalCache
RunContext
 
typedef CacheTypes::RunSummaryCache RunSummaryCache
 
- Public Types inherited from edm::stream::EDAnalyzerBase
typedef EDAnalyzerAdaptorBase ModuleType
 
- Public Types inherited from edm::EDConsumerBase
typedef ProductLabels Labels
 
- Static Public Member Functions inherited from DQMEDAnalyzer
static std::shared_ptr
< dqmDetails::NoCache
globalBeginLuminosityBlockSummary (edm::LuminosityBlock const &, edm::EventSetup const &, LuminosityBlockContext const *)
 
static std::shared_ptr
< dqmDetails::NoCache
globalBeginRunSummary (edm::Run const &, edm::EventSetup const &, RunContext const *)
 
static void globalEndLuminosityBlockSummary (edm::LuminosityBlock const &, edm::EventSetup const &, LuminosityBlockContext const *, dqmDetails::NoCache *)
 
static void globalEndRunSummary (edm::Run const &, edm::EventSetup const &, RunContext const *, dqmDetails::NoCache *)
 
- Static Public Member Functions inherited from edm::stream::EDAnalyzerBase
static const std::string & baseType ()
 
static void fillDescriptions (ConfigurationDescriptions &descriptions)
 
static void prevalidate (ConfigurationDescriptions &descriptions)
 

Detailed Description

Description: compare hardware records with emulator records for L1 GT records.

Implementation: Get the L1 GT records from data and from emulator. Compare every board between data and emulator.

Author
: Vasile Mihai Ghete - HEPHY Vienna

$Date$

Description: compare hardware records with emulator records for L1 GT records.

Implementation: Get the L1 GT records from data and from emulator. Compare every board between data and emulator.

Author
: Vasile Mihai Ghete - HEPHY Vienna

Definition at line 56 of file L1GtHwValidation.h.

Constructor & Destructor Documentation

L1GtHwValidation::L1GtHwValidation ( const edm::ParameterSet paramSet)
explicit

Definition at line 52 of file L1GtHwValidation.cc.

References CondNull, edm::ParameterSet::getParameter(), l1GtConditionCategoryStringToEnum(), l1GtConditionTypeStringToEnum(), l1GtObjectStringToEnum(), LogDebug, m_excludeCondCategTypeObject, m_excludedCondCategory, m_excludedCondType, m_excludedL1GtObject, m_l1GctDataInputTag, m_l1GtDataDaqInputTag, m_l1GtDataDaqInputToken_, m_l1GtDataEvmInputTag, m_l1GtDataEvmInputToken_, m_l1GtEmulDaqInputTag, m_l1GtEmulDaqInputToken_, m_l1GtEmulEvmInputTag, m_l1GtEmulEvmInputToken_, ObjNull, AlCaHLTBitMon_QueryRunRegistry::string, and TypeNull.

52  :
53  //
54  // input tag for the L1 GT hardware DAQ record
56  "L1GtDataDaqInputTag")),
57  // input tag for the L1 GT hardware EVM record
59  "L1GtDataEvmInputTag")),
60  // input tag for the L1 GT emulator DAQ record
62  "L1GtEmulDaqInputTag")),
63  // input tag for the L1 GT emulator EVM record
65  "L1GtEmulEvmInputTag")),
66  // input tag for the L1 GCT hardware record
68  "L1GctDataInputTag")),
69  //
70  m_dirName(paramSet.getUntrackedParameter("DirName", std::string(
71  "L1TEMU/GTexpert"))),
72  //
73  m_excludeCondCategTypeObject(paramSet.getParameter<std::vector<edm::ParameterSet> >(
74  "ExcludeCondCategTypeObject")),
75  //
76  m_excludeAlgoTrigByName(paramSet.getParameter<std::vector<std::string> >(
77  "ExcludeAlgoTrigByName")),
78  //
79  m_excludeAlgoTrigByBit(paramSet.getParameter<std::vector<int> >(
80  "ExcludeAlgoTrigByBit")),
81  //
82  // initialize counters
85  // cache
88  m_l1GtTmTechCacheID(0ULL),
89  //
90  m_agree(true),
91  m_dataOnly(false),
92  m_emulOnly(false),
93  m_dataOnlyMask(false),
94  m_emulOnlyMask(false),
95  //
96  m_nrEvJob(0), m_nrEvRun(0) {
97 
98 
99  for (std::vector<edm::ParameterSet>::const_iterator
100  itExclud = m_excludeCondCategTypeObject.begin();
101  itExclud != m_excludeCondCategTypeObject.end();
102  ++itExclud) {
103 
104  if (!(itExclud->getParameter<std::string> ("ExcludedCondCategory")).empty()) {
105 
107  itExclud->getParameter<std::string>("ExcludedCondCategory")));
108 
109  } else {
110  m_excludedCondCategory.push_back(CondNull);
111  }
112 
113  if (!(itExclud->getParameter<std::string>("ExcludedCondType")).empty() ) {
114 
116  itExclud->getParameter<std::string> ("ExcludedCondType")));
117 
118  } else {
119  m_excludedCondType.push_back(TypeNull);
120  }
121 
122  if (!(itExclud->getParameter<std::string>("ExcludedL1GtObject")).empty() ) {
123 
125  itExclud->getParameter<std::string> ("ExcludedL1GtObject")));
126 
127  } else {
128  m_excludedL1GtObject.push_back(ObjNull);
129  }
130  }
131 
132 
133  LogDebug("L1GtHwValidation")
134  << "\nInput tag for the L1 GT DAQ hardware record: "
136  << "\nInput tag for the L1 GT EVM hardware record: "
138  << "\nInput tag for the L1 GT DAQ emulator records: "
140  << "\nInput tag for the L1 GT EVM emulator records: "
142  << "\nInput tag for the L1 GCT hardware record: "
143  << m_l1GctDataInputTag << std::endl;
144 
145  // FIXME print in debug mode ExcludeCondCategTypeObject, ExcludeAlgoTrigByName, etc
146 
147  //set Token(-s)
148  m_l1GtDataDaqInputToken_ = consumes<L1GlobalTriggerReadoutRecord>(paramSet.getParameter<edm::InputTag>("L1GtDataDaqInputTag"));
149  m_l1GtEmulDaqInputToken_ = consumes<L1GlobalTriggerReadoutRecord>(paramSet.getParameter<edm::InputTag>("L1GtEmulDaqInputTag"));
150  m_l1GtDataEvmInputToken_ = consumes<L1GlobalTriggerEvmReadoutRecord>(paramSet.getParameter<edm::InputTag>("L1GtDataEvmInputTag"));
151  m_l1GtEmulEvmInputToken_ = consumes<L1GlobalTriggerEvmReadoutRecord>(paramSet.getParameter<edm::InputTag>("L1GtEmulEvmInputTag"));
152 }
#define LogDebug(id)
T getParameter(std::string const &) const
T getUntrackedParameter(std::string const &, T const &) const
edm::EDGetTokenT< L1GlobalTriggerEvmReadoutRecord > m_l1GtDataEvmInputToken_
std::vector< L1GtConditionType > m_excludedCondType
excluded condition types
edm::InputTag m_l1GtEmulEvmInputTag
input tag for the L1 GT emulator EVM record
unsigned long long m_l1GtMenuCacheID
std::vector< int > m_excludeAlgoTrigByBit
exclude algorithm triggers from comparison data - emulator by algorithm bit number ...
unsigned long long m_l1GtTmAlgoCacheID
L1GtConditionType l1GtConditionTypeStringToEnum(const std::string &)
L1GtObject l1GtObjectStringToEnum(const std::string &)
Definition: L1GtObject.cc:24
std::vector< L1GtObject > m_excludedL1GtObject
excluded L1 GT objects
std::vector< std::string > m_excludeAlgoTrigByName
exclude algorithm triggers from comparison data - emulator by algorithm name
bool m_agree
internal members
edm::InputTag m_l1GtEmulDaqInputTag
input tag for the L1 GT emulator DAQ record
L1GtConditionCategory l1GtConditionCategoryStringToEnum(const std::string &)
edm::EDGetTokenT< L1GlobalTriggerReadoutRecord > m_l1GtDataDaqInputToken_
edm::EDGetTokenT< L1GlobalTriggerEvmReadoutRecord > m_l1GtEmulEvmInputToken_
unsigned long long m_l1GtPfAlgoCacheID
edm::InputTag m_l1GtDataDaqInputTag
input tag for the L1 GT hardware DAQ record
edm::EDGetTokenT< L1GlobalTriggerReadoutRecord > m_l1GtEmulDaqInputToken_
std::vector< L1GtConditionCategory > m_excludedCondCategory
excluded condition categories
int m_nrDataEventError
counters
unsigned long long m_l1GtTmTechCacheID
edm::InputTag m_l1GctDataInputTag
input tag for the L1 GCT hardware record
std::vector< edm::ParameterSet > m_excludeCondCategTypeObject
edm::InputTag m_l1GtDataEvmInputTag
input tag for the L1 GT hardware EVM record
unsigned long long m_l1GtPfTechCacheID
std::string m_dirName
directory name for L1Extra plots
L1GtHwValidation::~L1GtHwValidation ( )
virtual

Definition at line 155 of file L1GtHwValidation.cc.

155  {
156  // empty
157 }

Member Function Documentation

void L1GtHwValidation::analyze ( const edm::Event iEvent,
const edm::EventSetup evSetup 
)
privatevirtual

Implements edm::stream::EDAnalyzerBase.

Definition at line 2248 of file L1GtHwValidation.cc.

References compareDaqRecord(), compareEvmRecord(), compareGt_Gct(), m_nrEvJob, and m_nrEvRun.

2249  {
2250 
2251  ++m_nrEvJob;
2252  ++m_nrEvRun;
2253 
2254  // L1 GT DAQ record comparison
2255  compareDaqRecord(iEvent, evSetup);
2256 
2257  // L1 GT EVM record comparison
2258  compareEvmRecord(iEvent, evSetup);
2259 
2260  // GCT collections from L1 GT PSB versus unpacked GCT
2261  compareGt_Gct(iEvent, evSetup);
2262 
2263 }
virtual void compareEvmRecord(const edm::Event &, const edm::EventSetup &)
L1 GT EVM record comparison.
virtual void compareGt_Gct(const edm::Event &, const edm::EventSetup &)
virtual void compareDaqRecord(const edm::Event &, const edm::EventSetup &)
L1 GT DAQ record comparison.
void L1GtHwValidation::beginLuminosityBlock ( const edm::LuminosityBlock l,
const edm::EventSetup evSetup 
)
protectedvirtual

Reimplemented from edm::stream::EDAnalyzerBase.

Definition at line 164 of file L1GtHwValidation.cc.

164  {
165 
166 }
void L1GtHwValidation::bookHistograms ( DQMStore::IBooker ibooker,
const edm::Run iRun,
const edm::EventSetup evSetup 
)
overrideprotectedvirtual

Implements DQMEDAnalyzer.

Definition at line 168 of file L1GtHwValidation.cc.

References DQMStore::IBooker::book1D(), excludedAlgoList(), edm::EventSetup::get(), L1GtTriggerMenu::gtAlgorithmMap(), L1GtPrescaleFactors::gtPrescaleFactors(), L1GtTriggerMask::gtTriggerMask(), L1GtTriggerMenu::gtTriggerMenuImplementation(), LogDebug, m_dirName, m_excludedAlgoList, m_excludedAlgorithmsAgreement, m_fdlDataAlgoDecision, m_fdlDataAlgoDecision_Err, m_fdlDataAlgoDecision_NoMatch, m_fdlDataAlgoDecisionMask, m_fdlDataAlgoDecisionMask_NoMatch, m_fdlDataAlgoDecisionPrescaled, m_fdlDataAlgoDecisionPrescaled_NoMatch, m_fdlDataAlgoDecisionPrescaledMask_NoMatch, m_fdlDataAlgoDecisionUnprescaled, m_fdlDataAlgoDecisionUnprescaled_NoMatch, m_fdlDataAlgoDecisionUnprescaledMask_NoMatch, m_fdlDataEmul, m_fdlDataEmul_Err, m_fdlDataEmulAlgoDecision, m_fdlDataEmulAlgoDecision_Err, m_fdlDataEmulAlgoDecisionMask, m_fdlDataEmulAlgoDecisionPrescaled, m_fdlDataEmulAlgoDecisionUnprescaled, m_fdlDataEmulAlgoDecisionUnprescaledAllowed, m_fdlDataEmulTechDecision, m_fdlDataEmulTechDecision_Err, m_fdlDataEmulTechDecisionMask, m_fdlDataTechDecision, m_fdlDataTechDecision_Err, m_fdlDataTechDecisionMask, m_fdlEmulAlgoDecision, m_fdlEmulAlgoDecision_Err, m_fdlEmulAlgoDecision_NoMatch, m_fdlEmulAlgoDecisionMask, m_fdlEmulAlgoDecisionMask_NoMatch, m_fdlEmulAlgoDecisionPrescaled, m_fdlEmulAlgoDecisionPrescaled_NoMatch, m_fdlEmulAlgoDecisionPrescaledMask_NoMatch, m_fdlEmulAlgoDecisionUnprescaled, m_fdlEmulAlgoDecisionUnprescaled_NoMatch, m_fdlEmulAlgoDecisionUnprescaledMask_NoMatch, m_fdlEmulTechDecision, m_fdlEmulTechDecision_Err, m_fdlEmulTechDecisionMask, m_gtErrorFlag, m_gtfeDataEmul, m_l1GtMenu, m_l1GtMenuCacheID, m_l1GtPfAlgo, m_l1GtPfAlgoCacheID, m_l1GtPfTech, m_l1GtPfTechCacheID, m_l1GtTmAlgo, m_l1GtTmAlgoCacheID, m_l1GtTmTech, m_l1GtTmTechCacheID, m_nrEvRun, m_prescaleFactorsAlgoTrig, m_prescaleFactorsTechTrig, m_triggerMaskAlgoTrig, m_triggerMaskTechTrig, NumberOfGtRecords, L1GlobalTriggerReadoutSetup::NumberPhysTriggers, L1GlobalTriggerReadoutSetup::NumberTechnicalTriggers, edm::ESHandle< class >::product(), MonitorElement::setBinLabel(), DQMStore::IBooker::setCurrentFolder(), contentValuesCheck::ss, AlCaHLTBitMon_QueryRunRegistry::string, and TotalBxInEvent.

168  {
169 
170  ibooker.setCurrentFolder(m_dirName);
171 
172  // histograms
173 
174  const unsigned int numberTechTriggers = L1GlobalTriggerReadoutSetup::NumberTechnicalTriggers;
175 
176  const unsigned int numberAlgoTriggers = L1GlobalTriggerReadoutSetup::NumberPhysTriggers;
177 
178  for (int iRec = 0; iRec < NumberOfGtRecords; ++iRec) {
179 
180  std::string recString;
181  if (iRec == 0) {
182  recString = "Daq_";
183  ibooker.setCurrentFolder(m_dirName + "/DAQ/");
184 
185  } else {
186  recString = "Evm_";
187  ibooker.setCurrentFolder(m_dirName + "/EVM/");
188  }
189 
190  std::string hName;
191  const char* histName;
192 
193  hName = recString + "gtfeDataEmul";
194  histName = hName.c_str();
195 
196  // GTFE histograms
197  m_gtfeDataEmul[iRec] = ibooker.book1D(histName, "GTFE data vs emul mismatch", 8, 0., 7.);
198  m_gtfeDataEmul[iRec]->setBinLabel(1, "BoardId", 1);
199  m_gtfeDataEmul[iRec]->setBinLabel(2, "RecordLength1", 1);
200  m_gtfeDataEmul[iRec]->setBinLabel(3, "RecordLength0", 1);
201  m_gtfeDataEmul[iRec]->setBinLabel(4, "BxNr", 1);
202  m_gtfeDataEmul[iRec]->setBinLabel(5, "SetupVersion", 1);
203  m_gtfeDataEmul[iRec]->setBinLabel(6, "DaqActiveBoards", 1);
204  m_gtfeDataEmul[iRec]->setBinLabel(7, "AltNrBxBoard", 1);
205  m_gtfeDataEmul[iRec]->setBinLabel(8, "TotalTriggerNr", 1);
206 
207  // FDL histograms
208 
209  for (int iHist = 0; iHist < TotalBxInEvent; ++iHist) {
210 
211  // convert [0, TotalBxInEvent] to [-X, +X] and add to histogram name
212  int iIndex = iHist - ((TotalBxInEvent + 1) / 2 - 1);
213  int hIndex = (iIndex + 16) % 16;
214 
215  std::stringstream ss;
216  std::string str;
217  ss << std::uppercase << std::hex << hIndex;
218  ss >> str;
219 
220  if (iRec == 0) {
221  ibooker.setCurrentFolder(m_dirName + "/DAQ/BxInEvent_" + str);
222 
223  } else {
224  ibooker.setCurrentFolder(m_dirName + "/EVM/BxInEvent_" + str);
225  }
226 
227  hName = recString + "FdlDataEmul_" + str;
228  histName = hName.c_str();
229 
230  std::string hTitle = "FDL data vs emul mismatch for BxInEvent = " + str;
231  const char* histTitle = hTitle.c_str();
232 
233  //
234 
235  m_fdlDataEmul[iHist][iRec] = ibooker.book1D(histName, histTitle, 13, 0., 13.);
236  m_fdlDataEmul[iHist][iRec]->setBinLabel(1, "BoardId", 1);
237  m_fdlDataEmul[iHist][iRec]->setBinLabel(2, "BxInEvent", 1);
238  m_fdlDataEmul[iHist][iRec]->setBinLabel(3, "BxNr", 1);
239  m_fdlDataEmul[iHist][iRec]->setBinLabel(4, "EventNr", 1);
240  m_fdlDataEmul[iHist][iRec]->setBinLabel(5, "TechTrigger", 1);
241  m_fdlDataEmul[iHist][iRec]->setBinLabel(6, "TechTriggerMask", 1);
242  m_fdlDataEmul[iHist][iRec]->setBinLabel(7, "AlgoTrigger", 1);
243  m_fdlDataEmul[iHist][iRec]->setBinLabel(8, "AlgoTriggerMask", 1);
244  m_fdlDataEmul[iHist][iRec]->setBinLabel(9, "AlgoExtend", 1);
245  m_fdlDataEmul[iHist][iRec]->setBinLabel(10, "NoAlgo", 1);
246  m_fdlDataEmul[iHist][iRec]->setBinLabel(11, "FinalORAllParts", 1);
247  m_fdlDataEmul[iHist][iRec]->setBinLabel(12, "FinalORPhysPart", 1);
248  m_fdlDataEmul[iHist][iRec]->setBinLabel(13, "LocalBxNr", 1);
249 
250  // algorithm decision
251  // data
252  hName = recString + "Data_AlgoDecision_" + str;
253  histName = hName.c_str();
254 
255  hTitle = "Data: algorithm decision word for BxInEvent = " + str;
256  histTitle = hTitle.c_str();
257 
258  m_fdlDataAlgoDecision[iHist][iRec] = ibooker.book1D(histName,histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
259 
260  // emul
261  hName = recString + "Emul_AlgoDecision_" + str;
262  histName = hName.c_str();
263 
264  hTitle = "Emul: algorithm decision word for BxInEvent = " + str;
265  histTitle = hTitle.c_str();
266 
267  m_fdlEmulAlgoDecision[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
268 
269  // algorithm decision for prescaled algorithms
270  // data
271  hName = recString + "Data_AlgoDecision_Prescaled_" + str;
272  histName = hName.c_str();
273 
274  hTitle = "Data: prescaled algorithms: algorithm decision for BxInEvent = " + str;
275  histTitle = hTitle.c_str();
276 
277  m_fdlDataAlgoDecisionPrescaled[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
278 
279  // emul
280  hName = recString + "Emul_AlgoDecision_Prescaled_" + str;
281  histName = hName.c_str();
282 
283  hTitle
284  = "Emul: prescaled algorithms: algorithm decision for BxInEvent = "
285  + str;
286  histTitle = hTitle.c_str();
287 
288  m_fdlEmulAlgoDecisionPrescaled[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0.,numberAlgoTriggers);
289 
290  // algorithm decision for unprescaled algorithms
291  // data
292  hName = recString + "Data_AlgoDecision_Unprescaled_" + str;
293  histName = hName.c_str();
294 
295  hTitle
296  = "Data: unprescaled algorithms: algorithm decision for BxInEvent = "
297  + str;
298  histTitle = hTitle.c_str();
299 
300  m_fdlDataAlgoDecisionUnprescaled[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
301 
302  // emul
303  hName = recString + "Emul_AlgoDecision_Unprescaled_" + str;
304  histName = hName.c_str();
305 
306  hTitle = "Emul: unprescaled algorithms: algorithm decision for BxInEvent = " + str;
307  histTitle = hTitle.c_str();
308 
309  m_fdlEmulAlgoDecisionUnprescaled[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
310 
311  // algorithm decision after masking (partition physics)
312  // data
313  hName = recString + "Data_AlgoDecisionAfterMask_" + str;
314  histName = hName.c_str();
315 
316  hTitle = "Data, physics partition: algorithm decision word after mask for BxInEvent = " + str;
317  histTitle = hTitle.c_str();
318 
319  m_fdlDataAlgoDecisionMask[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
320 
321  // emul
322  hName = recString + "Emul_AlgoDecisionAfterMask_" + str;
323  histName = hName.c_str();
324 
325  hTitle = "Emul, physics partition: algorithm decision word after mask for BxInEvent = " + str;
326  histTitle = hTitle.c_str();
327 
328  m_fdlEmulAlgoDecisionMask[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
329 
330  //
331  hName = recString + "DataEmul_AlgoDecision_" + str;
332  histName = hName.c_str();
333 
334  hTitle = "Data vs emul: non-matching algorithm decision word for BxInEvent = " + str;
335  histTitle = hTitle.c_str();
336 
337  m_fdlDataEmulAlgoDecision[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
338 
339  //
340  hName = recString + "DataEmul_AlgoDecision_Prescaled_" + str;
341  histName = hName.c_str();
342 
343  hTitle = "Data vs emul: prescaled algorithms with non-matching decision for BxInEvent = " + str;
344  histTitle = hTitle.c_str();
345 
346  m_fdlDataEmulAlgoDecisionPrescaled[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
347 
348  //
349  hName = recString + "DataEmul_AlgoDecision_Unprescaled_" + str;
350  histName = hName.c_str();
351 
352  hTitle = "Data vs emul: unprescaled algorithms with non-matching decision for BxInEvent = " + str;
353  histTitle = hTitle.c_str();
354 
355  m_fdlDataEmulAlgoDecisionUnprescaled[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
356 
357  //
358  hName = recString + "DataEmul_AlgoDecision_Unprescaled_Allowed_" + str;
359  histName = hName.c_str();
360 
361  hTitle = "Data vs emul: unprescaled algorithms not excluded with non-matching decision for BxInEvent = " + str;
362  histTitle = hTitle.c_str();
363 
364  m_fdlDataEmulAlgoDecisionUnprescaledAllowed[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
365 
366  //
367  hName = recString + "Data_AlgoDecision_NoMatch_" + str;
368  histName = hName.c_str();
369 
370  hTitle = "Data: algorithm decision for non-matching cases for BxInEvent = " + str;
371  histTitle = hTitle.c_str();
372 
373  m_fdlDataAlgoDecision_NoMatch[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
374 
375  //
376  hName = recString + "Emul_AlgoDecision_NoMatch_" + str;
377  histName = hName.c_str();
378 
379  hTitle
380  = "Emul: algorithm decision for non-matching cases for BxInEvent = "
381  + str;
382  histTitle = hTitle.c_str();
383 
384  m_fdlEmulAlgoDecision_NoMatch[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
385 
386  // prescaled algorithms
387  hName = recString + "Data_AlgoDecision_Prescaled_NoMatch_" + str;
388  histName = hName.c_str();
389 
390  hTitle = "Data: prescaled algorithms: non-matching algorithm decision for BxInEvent = " + str;
391  histTitle = hTitle.c_str();
392 
393  m_fdlDataAlgoDecisionPrescaled_NoMatch[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
394 
395  //
396  hName = recString + "Emul_AlgoDecision_Prescaled_NoMatch_" + str;
397  histName = hName.c_str();
398 
399  hTitle = "Emul: prescaled algorithms: non-matching algorithm decision for BxInEvent = " + str;
400  histTitle = hTitle.c_str();
401 
402  m_fdlEmulAlgoDecisionPrescaled_NoMatch[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
403 
404 
405  // unprescaled algorithms - non-matching
406  hName = recString + "Data_AlgoDecision_Unprescaled_NoMatch_" + str;
407  histName = hName.c_str();
408 
409  hTitle = "Data: unprescaled algorithms: non-matching algorithm decision for BxInEvent = " + str;
410  histTitle = hTitle.c_str();
411 
412  m_fdlDataAlgoDecisionUnprescaled_NoMatch[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
413 
414  //
415  hName = recString + "Emul_AlgoDecision_Unprescaled_NoMatch_" + str;
416  histName = hName.c_str();
417 
418  hTitle = "Emul: unprescaled algorithms: non-matching algorithm decision for BxInEvent = " + str;
419  histTitle = hTitle.c_str();
420 
421  m_fdlEmulAlgoDecisionUnprescaled_NoMatch[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
422 
423 
424 
425  //
426  hName = recString + "Data_AlgoDecisionMask_NoMatch_" + str;
427  histName = hName.c_str();
428 
429  hTitle = "Data: algorithm decision for non-matching cases after mask for BxInEvent = " + str;
430  histTitle = hTitle.c_str();
431 
432  m_fdlDataAlgoDecisionMask_NoMatch[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
433 
434  //
435  hName = recString + "Emul_AlgoDecisionMask_NoMatch_" + str;
436  histName = hName.c_str();
437 
438  hTitle = "Emul: algorithm decision for non-matching cases after mask for BxInEvent = " + str;
439  histTitle = hTitle.c_str();
440 
441  m_fdlEmulAlgoDecisionMask_NoMatch[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
442 
443  // prescaled algorithms
444  hName = recString + "Data_AlgoDecisionMask_Prescaled_NoMatch_" + str;
445  histName = hName.c_str();
446 
447  hTitle = "Data: prescaled algorithms: non-matching algorithm decision after mask for BxInEvent = " + str;
448  histTitle = hTitle.c_str();
449 
450  m_fdlDataAlgoDecisionPrescaledMask_NoMatch[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
451 
452  //
453  hName = recString + "Emul_AlgoDecision_PrescaledMask_NoMatch_" + str;
454  histName = hName.c_str();
455 
456  hTitle = "Emul: prescaled algorithms: non-matching algorithm decision after mask for BxInEvent = " + str;
457  histTitle = hTitle.c_str();
458 
459  m_fdlEmulAlgoDecisionPrescaledMask_NoMatch[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
460 
461 
462  // unprescaled algorithms - non-matching
463  hName = recString + "Data_AlgoDecision_UnprescaledMask_NoMatch_" + str;
464  histName = hName.c_str();
465 
466  hTitle = "Data: unprescaled algorithms: non-matching algorithm decision after mask for BxInEvent = " + str;
467  histTitle = hTitle.c_str();
468 
469  m_fdlDataAlgoDecisionUnprescaledMask_NoMatch[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
470 
471  //
472  hName = recString + "Emul_AlgoDecision_UnprescaledMask_NoMatch_" + str;
473  histName = hName.c_str();
474 
475  hTitle
476  = "Emul: unprescaled algorithms: non-matching algorithm decision after mask for BxInEvent = "
477  + str;
478  histTitle = hTitle.c_str();
479 
480  m_fdlEmulAlgoDecisionUnprescaledMask_NoMatch[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
481 
482 
483 
484  //
485  hName = recString + "DataEmul_AlgoDecisionAfterMask_" + str;
486  histName = hName.c_str();
487 
488  hTitle = "Data vs emul, physics partition: non-matching algorithm decision word after mask for BxInEvent = " + str;
489  histTitle = hTitle.c_str();
490 
491  m_fdlDataEmulAlgoDecisionMask[iHist][iRec] = ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
492 
493  // technical trigger decision
494  // data
495  hName = recString + "Data_TechDecision_" + str;
496  histName = hName.c_str();
497 
498  hTitle = "Data technical trigger decision word for BxInEvent = " + str;
499  histTitle = hTitle.c_str();
500 
501  m_fdlDataTechDecision[iHist][iRec] = ibooker.book1D(histName, histTitle, numberTechTriggers, 0., numberTechTriggers);
502 
503  // emul
504  hName = recString + "Emul_TechDecision_" + str;
505  histName = hName.c_str();
506 
507  hTitle = "Emul: technical trigger decision word for BxInEvent = " + str;
508  histTitle = hTitle.c_str();
509 
510  m_fdlEmulTechDecision[iHist][iRec] = ibooker.book1D(histName,histTitle, numberTechTriggers, 0., numberTechTriggers);
511 
512  // technical trigger decision after masking (partition physics)
513  hName = recString + "Data_TechDecisionAfterMask_" + str;
514  histName = hName.c_str();
515 
516  hTitle = "Data technical trigger decision word after mask for BxInEvent = " + str;
517  histTitle = hTitle.c_str();
518 
519  m_fdlDataTechDecisionMask[iHist][iRec] = ibooker.book1D(histName, histTitle, numberTechTriggers, 0., numberTechTriggers);
520 
521  //
522  hName = recString + "Emul_TechDecisionAfterMask_" + str;
523  histName = hName.c_str();
524 
525  hTitle
526  = "Emul: technical trigger decision word after mask for BxInEvent = "
527  + str;
528  histTitle = hTitle.c_str();
529 
530  m_fdlEmulTechDecisionMask[iHist][iRec] = ibooker.book1D(histName, histTitle, numberTechTriggers, 0., numberTechTriggers);
531 
532  //
533  hName = recString + "DataEmul_TechDecision_" + str;
534  histName = hName.c_str();
535 
536  hTitle = "Data vs emul: non-matching technical trigger decision word for BxInEvent = " + str;
537  histTitle = hTitle.c_str();
538 
539  m_fdlDataEmulTechDecision[iHist][iRec] = ibooker.book1D(histName, histTitle, numberTechTriggers, 0., numberTechTriggers);
540 
541  hName = recString + "DataEmul_TechDecisionAfterMask_" + str;
542  histName = hName.c_str();
543 
544  hTitle = "Data vs emul: non-matching technical trigger decision word after mask for BxInEvent = " + str;
545  histTitle = hTitle.c_str();
546 
547  m_fdlDataEmulTechDecisionMask[iHist][iRec] = ibooker.book1D(histName, histTitle, numberTechTriggers, 0., numberTechTriggers);
548 
549  }
550 
551  if (iRec == 0) {
552  ibooker.setCurrentFolder(m_dirName + "/DAQ/");
553 
554  } else {
555  ibooker.setCurrentFolder(m_dirName + "/EVM/");
556  }
557 
558  hName = recString + "FdlDataEmul_Err";
559  histName = hName.c_str();
560 
561  m_fdlDataEmul_Err[iRec] = ibooker.book1D(histName, "FDL data vs emul mismatch for non-matching BxInEvent in FDL payload", 13, 0., 13.);
562  m_fdlDataEmul_Err[iRec]->setBinLabel(1, "BoardId", 1);
563  m_fdlDataEmul_Err[iRec]->setBinLabel(2, "BxInEvent", 1);
564  m_fdlDataEmul_Err[iRec]->setBinLabel(3, "BxNr", 1);
565  m_fdlDataEmul_Err[iRec]->setBinLabel(4, "EventNr", 1);
566  m_fdlDataEmul_Err[iRec]->setBinLabel(5, "TechTrigger", 1);
567  m_fdlDataEmul_Err[iRec]->setBinLabel(6, "TechTriggerMask", 1);
568  m_fdlDataEmul_Err[iRec]->setBinLabel(7, "AlgoTrigger", 1);
569  m_fdlDataEmul_Err[iRec]->setBinLabel(8, "AlgoTriggerMask", 1);
570  m_fdlDataEmul_Err[iRec]->setBinLabel(9, "AlgoExtend", 1);
571  m_fdlDataEmul_Err[iRec]->setBinLabel(10, "NoAlgo", 1);
572  m_fdlDataEmul_Err[iRec]->setBinLabel(11, "FinalORAllParts", 1);
573  m_fdlDataEmul_Err[iRec]->setBinLabel(12, "FinalORPhysPart", 1);
574  m_fdlDataEmul_Err[iRec]->setBinLabel(13, "LocalBxNr", 1);
575 
576  hName = recString + "FdlDataAlgoDecision_Err";
577  histName = hName.c_str();
578 
579  m_fdlDataAlgoDecision_Err[iRec] = ibooker.book1D(histName, "Data: algorithm trigger decision word, non-matching BxInEvent", numberAlgoTriggers, 0., numberAlgoTriggers);
580 
581  //
582  hName = recString + "Emul_AlgoDecision_Err";
583  histName = hName.c_str();
584 
585  m_fdlEmulAlgoDecision_Err[iRec] = ibooker.book1D(histName, "Emul: algorithm trigger decision word, non-matching BxInEvent", numberAlgoTriggers, 0., numberAlgoTriggers);
586 
587  hName = recString + "DataEmul_AlgoDecision_Err";
588  histName = hName.c_str();
589 
590  m_fdlDataEmulAlgoDecision_Err[iRec] = ibooker.book1D(histName, "Data vs emul: algorithm trigger decision word, non-matching BxInEvent", numberAlgoTriggers, 0., numberAlgoTriggers);
591 
592  //
593  hName = recString + "Data_TechDecision_Err";
594  histName = hName.c_str();
595 
596  m_fdlDataTechDecision_Err[iRec] = ibooker.book1D(histName, "Data: technical trigger decision word, non-matching BxInEvent", numberTechTriggers, 0., numberTechTriggers);
597 
598  hName = recString + "Emul_TechDecision_Err";
599  histName = hName.c_str();
600 
601  m_fdlEmulTechDecision_Err[iRec] = ibooker.book1D(histName, "Emul: technical trigger decision word, non-matching BxInEvent", numberTechTriggers, 0., numberTechTriggers);
602 
603  hName = recString + "DataEmul_TechDecision_Err";
604  histName = hName.c_str();
605 
606  m_fdlDataEmulTechDecision_Err[iRec] = ibooker.book1D(histName, "Data vs emul: technical trigger decision word, non-matching BxInEvent", numberTechTriggers, 0., numberTechTriggers);
607 
608  }
609 
610  ibooker.setCurrentFolder(m_dirName);
611 
612  //
613  m_excludedAlgorithmsAgreement = ibooker.book1D("ExcludedAlgorithmsFromAgreement", "Algorithms excluded from data versus emulator agreement flag", numberAlgoTriggers, 0., numberAlgoTriggers);
614 
615  //
616 
617  m_gtErrorFlag = ibooker.book1D("GTErrorFlag", "L1 GT error flag for data versus emulator comparison", 5, 0., 5);
618 
619  m_gtErrorFlag->setBinLabel(1, "Agree", 1);
620  m_gtErrorFlag->setBinLabel(2, "", 1);
621  m_gtErrorFlag->setBinLabel(3, "", 1);
622  m_gtErrorFlag->setBinLabel(4, "Data only", 1);
623  m_gtErrorFlag->setBinLabel(5, "Emul only", 1);
624 
625 
626  m_nrEvRun = 0;
627 
628  // get / update the trigger menu from the EventSetup
629  // local cache & check on cacheIdentifier
630 
631  unsigned long long l1GtMenuCacheID =
632  evSetup.get<L1GtTriggerMenuRcd>().cacheIdentifier();
633 
634  if (m_l1GtMenuCacheID != l1GtMenuCacheID) {
635 
637  evSetup.get<L1GtTriggerMenuRcd>().get(l1GtMenu);
638  m_l1GtMenu = l1GtMenu.product();
639 
640  // compute the list of algorithms excluded from the computing of the agreement flag
641  m_excludedAlgoList.clear();
643 
644  m_l1GtMenuCacheID = l1GtMenuCacheID;
645 
646  }
647 
648 
649 
650  // FIXME when the menu changes, make a copy of histograms, and clear the old one
651  // otherwise the labels are wrong
652 
653  LogDebug("L1GtHwValidation") << "\nUsing L1 menu: \n "
655  << std::endl;
656 
657  const AlgorithmMap& algorithmMap = m_l1GtMenu->gtAlgorithmMap();
658 
659  for (CItAlgo itAlgo = algorithmMap.begin(); itAlgo != algorithmMap.end(); itAlgo++) {
660 
661  const int algBitNumber = (itAlgo->second).algoBitNumber();
662 
663  std::stringstream ss;
664  std::string algBitString;
665  ss << std::uppercase << algBitNumber;
666  ss >> algBitString;
667 
668  const std::string& aName = algBitString + " " + itAlgo->first;
669  const char* algName = aName.c_str();
670 
671  for (int iRec = 0; iRec < NumberOfGtRecords; ++iRec) {
672  for (int iBxInEvent = 0; iBxInEvent < TotalBxInEvent; ++iBxInEvent) {
673 
674 
675  // convert [0, TotalBxInEvent] to [-X, +X]
676  int iIndex = iBxInEvent - ((TotalBxInEvent + 1) / 2 - 1);
677  int hIndex = (iIndex + 16) % 16;
678 
679  std::stringstream ss;
680  std::string str;
681  ss << std::uppercase << std::hex << hIndex;
682  ss >> str;
683 
684  if (iRec == 0) {
685  //if (m_dbe) {
686  ibooker.setCurrentFolder(m_dirName + "/DAQ/BxInEvent_" + str);
687  //}
688 
689  } else {
690  //if (m_dbe) {
691  ibooker.setCurrentFolder(m_dirName + "/EVM/BxInEvent_" + str);
692  //}
693  }
694 
695 
696  m_fdlDataAlgoDecision[iBxInEvent][iRec]->setBinLabel(
697  algBitNumber + 1, algName, 1);
698  m_fdlDataAlgoDecisionPrescaled[iBxInEvent][iRec]->setBinLabel(
699  algBitNumber + 1, algName, 1);
701  algBitNumber + 1, algName, 1);
702  m_fdlDataAlgoDecisionMask[iBxInEvent][iRec]->setBinLabel(
703  algBitNumber + 1, algName, 1);
704  m_fdlDataAlgoDecision_NoMatch[iBxInEvent][iRec]->setBinLabel(
705  algBitNumber + 1, algName, 1);
706 
707  m_fdlEmulAlgoDecision[iBxInEvent][iRec]->setBinLabel(
708  algBitNumber + 1, algName, 1);
709  m_fdlEmulAlgoDecisionPrescaled[iBxInEvent][iRec]->setBinLabel(
710  algBitNumber + 1, algName, 1);
712  algBitNumber + 1, algName, 1);
713  m_fdlEmulAlgoDecisionMask[iBxInEvent][iRec]->setBinLabel(
714  algBitNumber + 1, algName, 1);
715  m_fdlEmulAlgoDecision_NoMatch[iBxInEvent][iRec]->setBinLabel(
716  algBitNumber + 1, algName, 1);
717 
718  m_fdlDataEmulAlgoDecision[iBxInEvent][iRec]->setBinLabel(
719  algBitNumber + 1, algName, 1);
721  algBitNumber + 1, algName, 1);
723  algBitNumber + 1, algName, 1);
725  algBitNumber + 1, algName, 1);
726  m_fdlDataEmulAlgoDecisionMask[iBxInEvent][iRec]->setBinLabel(
727  algBitNumber + 1, algName, 1);
728  }
729 
730 
731  if (iRec == 0) {
732  ibooker.setCurrentFolder(m_dirName + "/DAQ/");
733 
734  } else {
735  ibooker.setCurrentFolder(m_dirName + "/EVM/");
736  }
737 
738 
739  m_fdlDataAlgoDecision_Err[iRec]->setBinLabel(algBitNumber + 1, algName, 1);
740 
741  m_fdlEmulAlgoDecision_Err[iRec]->setBinLabel(algBitNumber + 1, algName, 1);
742 
743  m_fdlDataEmulAlgoDecision_Err[iRec]->setBinLabel(algBitNumber + 1, algName, 1);
744  }
745 
746  //
747  for (std::vector<int>::const_iterator itAlgo = m_excludedAlgoList.begin(); itAlgo!= m_excludedAlgoList.end(); ++itAlgo) {
748 
749  if (algBitNumber == *itAlgo) {
750  m_excludedAlgorithmsAgreement->setBinLabel(algBitNumber + 1, algName, 1);
751  }
752  }
753 
754 
755  }
756 
757  // get / update the prescale factors from the EventSetup
758  // local cache & check on cacheIdentifier
759 
760  unsigned long long l1GtPfAlgoCacheID = evSetup.get<
761  L1GtPrescaleFactorsAlgoTrigRcd>().cacheIdentifier();
762 
763  if (m_l1GtPfAlgoCacheID != l1GtPfAlgoCacheID) {
764 
766  evSetup.get<L1GtPrescaleFactorsAlgoTrigRcd>().get(l1GtPfAlgo);
767  m_l1GtPfAlgo = l1GtPfAlgo.product();
768 
770 
771  m_l1GtPfAlgoCacheID = l1GtPfAlgoCacheID;
772 
773  }
774 
775  unsigned long long l1GtPfTechCacheID = evSetup.get<
776  L1GtPrescaleFactorsTechTrigRcd>().cacheIdentifier();
777 
778  if (m_l1GtPfTechCacheID != l1GtPfTechCacheID) {
779 
781  evSetup.get<L1GtPrescaleFactorsTechTrigRcd>().get(l1GtPfTech);
782  m_l1GtPfTech = l1GtPfTech.product();
783 
785 
786  m_l1GtPfTechCacheID = l1GtPfTechCacheID;
787 
788  }
789 
790  // get / update the trigger mask from the EventSetup
791  // local cache & check on cacheIdentifier
792 
793  unsigned long long l1GtTmAlgoCacheID = evSetup.get<
794  L1GtTriggerMaskAlgoTrigRcd>().cacheIdentifier();
795 
796  if (m_l1GtTmAlgoCacheID != l1GtTmAlgoCacheID) {
797 
799  evSetup.get<L1GtTriggerMaskAlgoTrigRcd>().get(l1GtTmAlgo);
800  m_l1GtTmAlgo = l1GtTmAlgo.product();
801 
803 
804  m_l1GtTmAlgoCacheID = l1GtTmAlgoCacheID;
805 
806  }
807 
808  unsigned long long l1GtTmTechCacheID = evSetup.get<
809  L1GtTriggerMaskTechTrigRcd>().cacheIdentifier();
810 
811  if (m_l1GtTmTechCacheID != l1GtTmTechCacheID) {
812 
814  evSetup.get<L1GtTriggerMaskTechTrigRcd>().get(l1GtTmTech);
815  m_l1GtTmTech = l1GtTmTech.product();
816 
818 
819  m_l1GtTmTechCacheID = l1GtTmTechCacheID;
820 
821  }
822 
823 }
#define LogDebug(id)
MonitorElement * m_fdlDataEmulAlgoDecision[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataAlgoDecisionPrescaledMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlEmulAlgoDecisionUnprescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
const L1GtTriggerMask * m_l1GtTmTech
MonitorElement * m_fdlDataAlgoDecision_Err[NumberOfGtRecords]
const std::vector< std::vector< int > > * m_prescaleFactorsAlgoTrig
MonitorElement * m_gtErrorFlag
PSB.
std::map< std::string, L1GtAlgorithm > AlgorithmMap
map containing the algorithms
static const unsigned int NumberTechnicalTriggers
MonitorElement * m_fdlEmulTechDecision[TotalBxInEvent][NumberOfGtRecords]
void setBinLabel(int bin, const std::string &label, int axis=1)
set bin label for x, y or z axis (axis=1, 2, 3 respectively)
MonitorElement * m_fdlDataEmulAlgoDecisionPrescaled[TotalBxInEvent][NumberOfGtRecords]
const std::string & gtTriggerMenuImplementation() const
MonitorElement * m_fdlDataEmulAlgoDecisionUnprescaledAllowed[TotalBxInEvent][NumberOfGtRecords]
void excludedAlgoList()
exclude from comparison some bits with known disagreement - bit list
MonitorElement * m_fdlDataAlgoDecisionUnprescaledMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlEmulAlgoDecisionMask[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataAlgoDecisionUnprescaled[TotalBxInEvent][NumberOfGtRecords]
unsigned long long m_l1GtMenuCacheID
const L1GtPrescaleFactors * m_l1GtPfTech
MonitorElement * m_fdlEmulAlgoDecisionPrescaledMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
AlgorithmMap::const_iterator CItAlgo
iterators through map containing the algorithms
unsigned long long m_l1GtTmAlgoCacheID
MonitorElement * m_fdlEmulTechDecisionMask[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataAlgoDecisionPrescaled[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataAlgoDecisionMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_gtfeDataEmul[NumberOfGtRecords]
histograms
MonitorElement * m_fdlDataAlgoDecisionUnprescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
std::vector< unsigned int > m_triggerMaskTechTrig
MonitorElement * m_fdlDataEmulAlgoDecisionMask[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataAlgoDecisionPrescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
const std::vector< unsigned int > & gtTriggerMask() const
get the trigger mask
MonitorElement * m_excludedAlgorithmsAgreement
const L1GtTriggerMask * m_l1GtTmAlgo
trigger masks
MonitorElement * m_fdlDataEmulTechDecision[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlEmulAlgoDecisionUnprescaledMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * book1D(Args &&...args)
Definition: DQMStore.h:115
MonitorElement * m_fdlDataTechDecision_Err[NumberOfGtRecords]
MonitorElement * m_fdlDataAlgoDecision[TotalBxInEvent][NumberOfGtRecords]
static const unsigned int NumberPhysTriggers
static const int TotalBxInEvent
MonitorElement * m_fdlEmulAlgoDecisionUnprescaled[TotalBxInEvent][NumberOfGtRecords]
const L1GtTriggerMenu * m_l1GtMenu
trigger menu
MonitorElement * m_fdlEmulAlgoDecision_Err[NumberOfGtRecords]
unsigned long long m_l1GtPfAlgoCacheID
MonitorElement * m_fdlDataTechDecisionMask[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataAlgoDecision_NoMatch[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataEmul[TotalBxInEvent][NumberOfGtRecords]
FDL (0 for DAQ, 1 for EVM record)
MonitorElement * m_fdlDataEmul_Err[NumberOfGtRecords]
void setCurrentFolder(const std::string &fullpath)
Definition: DQMStore.cc:276
const std::vector< std::vector< int > > & gtPrescaleFactors() const
get the prescale factors by reference
const T & get() const
Definition: EventSetup.h:56
T const * product() const
Definition: ESHandle.h:86
MonitorElement * m_fdlEmulAlgoDecisionMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
unsigned long long m_l1GtTmTechCacheID
MonitorElement * m_fdlEmulTechDecision_Err[NumberOfGtRecords]
MonitorElement * m_fdlDataEmulAlgoDecision_Err[NumberOfGtRecords]
const AlgorithmMap & gtAlgorithmMap() const
get / set the algorithm map (by name)
static const int NumberOfGtRecords
MonitorElement * m_fdlDataTechDecision[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlEmulAlgoDecision[TotalBxInEvent][NumberOfGtRecords]
const std::vector< std::vector< int > > * m_prescaleFactorsTechTrig
MonitorElement * m_fdlEmulAlgoDecision_NoMatch[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataEmulTechDecisionMask[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataAlgoDecisionMask[TotalBxInEvent][NumberOfGtRecords]
std::vector< unsigned int > m_triggerMaskAlgoTrig
std::vector< int > m_excludedAlgoList
MonitorElement * m_fdlDataEmulTechDecision_Err[NumberOfGtRecords]
MonitorElement * m_fdlEmulAlgoDecisionPrescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
const L1GtPrescaleFactors * m_l1GtPfAlgo
prescale factors
unsigned long long m_l1GtPfTechCacheID
MonitorElement * m_fdlEmulAlgoDecisionPrescaled[TotalBxInEvent][NumberOfGtRecords]
std::string m_dirName
directory name for L1Extra plots
MonitorElement * m_fdlDataEmulAlgoDecisionUnprescaled[TotalBxInEvent][NumberOfGtRecords]
void L1GtHwValidation::compareDaqRecord ( const edm::Event iEvent,
const edm::EventSetup evSetup 
)
privatevirtual

L1 GT DAQ record comparison.

Definition at line 1982 of file L1GtHwValidation.cc.

References L1GtPsbWord::boardId(), L1GtPsbWord::bxInEvent(), compareFDL(), compareGTFE(), comparePSB(), TauDecayModes::dec, MonitorElement::Fill(), edm::Event::getByToken(), edm::HandleBase::isValid(), LogDebug, m_agree, m_dataOnly, m_dataOnlyMask, m_emulOnly, m_emulOnlyMask, m_gtErrorFlag, m_l1GtDataDaqInputToken_, m_l1GtEmulDaqInputToken_, m_myCoutStream, m_nrDataEventError, and m_nrEmulEventError.

Referenced by analyze().

1982  {
1983 
1984  // formal index for DAQ record
1985  int iRec = 0;
1986 
1987  // reset the flags - they are used for DAQ recor only
1988  m_agree = true;
1989  m_dataOnly = false;
1990  m_emulOnly = false;
1991  m_dataOnlyMask = false;
1992  m_emulOnlyMask = false;
1993 
1994 
1995  // get the L1 GT hardware DAQ record L1GlobalTriggerReadoutRecord
1996  edm::Handle<L1GlobalTriggerReadoutRecord> gtReadoutRecordData;
1997  iEvent.getByToken(m_l1GtDataDaqInputToken_, gtReadoutRecordData);
1998 
1999  bool validData = false;
2000 
2001  if (!gtReadoutRecordData.isValid()) {
2003  } else {
2004  validData = true;
2005  }
2006 
2007  // get the L1 GT emulator DAQ record L1GlobalTriggerReadoutRecord
2008  edm::Handle<L1GlobalTriggerReadoutRecord> gtReadoutRecordEmul;
2009  iEvent.getByToken(m_l1GtEmulDaqInputToken_, gtReadoutRecordEmul);
2010 
2011  bool validEmul = false;
2012 
2013  if (!gtReadoutRecordEmul.isValid()) {
2015  } else {
2016  validEmul = true;
2017  }
2018 
2019  if ((!validData) || (!validEmul)) {
2020  edm::LogWarning("L1GtHwValidation")
2021  << "\n No valid product found: DAQ L1GlobalTriggerReadoutRecord"
2022  << "\n Data validity [1 = true; 0 = false]: " << validData
2023  << "\n Emulator validity: [1 = true; 0 = false]: "
2024  << validEmul << "\n DAQ histograms will not be filled.\n"
2025  << std::endl;
2026 
2027  return;
2028  }
2029 
2030  // compare GTFE
2031  const L1GtfeWord& gtfeBlockData = gtReadoutRecordData->gtfeWord();
2032  const L1GtfeWord& gtfeBlockEmul = gtReadoutRecordEmul->gtfeWord();
2033 
2034  compareGTFE(iEvent, evSetup, gtfeBlockData, gtfeBlockEmul, iRec);
2035 
2036  // FDL comparison
2037  const std::vector<L1GtFdlWord>& gtFdlVectorData =
2038  gtReadoutRecordData->gtFdlVector();
2039  const std::vector<L1GtFdlWord>& gtFdlVectorEmul =
2040  gtReadoutRecordEmul->gtFdlVector();
2041 
2042  int gtFdlVectorDataSize = gtFdlVectorData.size();
2043  int gtFdlVectorEmulSize = gtFdlVectorEmul.size();
2044 
2045  if (gtFdlVectorDataSize == gtFdlVectorEmulSize) {
2046  m_myCoutStream << "\nData and emulated FDL vector size: identical.\n";
2047  m_myCoutStream << " Size: " << gtFdlVectorDataSize << std::endl;
2048 
2049  for (int iFdl = 0; iFdl < gtFdlVectorDataSize; ++iFdl) {
2050 
2051  const L1GtFdlWord& fdlBlockData = gtFdlVectorData[iFdl];
2052  const L1GtFdlWord& fdlBlockEmul = gtFdlVectorEmul[iFdl];
2053 
2054  compareFDL(iEvent, evSetup, fdlBlockData, fdlBlockEmul, iRec);
2055  }
2056  } else {
2057  m_myCoutStream << "\nData and emulated FDL vector size: different.\n";
2058  m_myCoutStream << " Data: size = " << gtFdlVectorDataSize << std::endl;
2059  m_myCoutStream << " Emul: size = " << gtFdlVectorEmulSize << std::endl;
2060 
2061  }
2062 
2063  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
2064 
2065  m_myCoutStream.str("");
2066  m_myCoutStream.clear();
2067 
2068  // PSB comparison
2069  const std::vector<L1GtPsbWord>& gtPsbVectorData =
2070  gtReadoutRecordData->gtPsbVector();
2071  const std::vector<L1GtPsbWord>& gtPsbVectorEmul =
2072  gtReadoutRecordEmul->gtPsbVector();
2073 
2074  int gtPsbVectorDataSize = gtPsbVectorData.size();
2075  int gtPsbVectorEmulSize = gtPsbVectorEmul.size();
2076 
2077  if (gtPsbVectorDataSize == gtPsbVectorEmulSize) {
2078  m_myCoutStream << "\nData and emulated PSB vector size: identical.\n";
2079  m_myCoutStream << " Size: " << gtPsbVectorDataSize << std::endl;
2080  } else {
2081  m_myCoutStream << "\nData and emulated PSB vector size: different.\n";
2082  m_myCoutStream << " Data: size = " << gtPsbVectorDataSize << std::endl;
2083  m_myCoutStream << " Emul: size = " << gtPsbVectorEmulSize << std::endl;
2084 
2085  }
2086 
2087  // the order of PSB block in the gtPsbVector is different in emulator and in data
2088  // in emulator: all active PSB in one BxInEvent, ordered L1A-1, L1A, L1A+1
2089  // in unpacker: every PSB in all BxInEvent
2090  for (int iPsb = 0; iPsb < gtPsbVectorDataSize; ++iPsb) {
2091 
2092  const L1GtPsbWord& psbBlockData = gtPsbVectorData[iPsb];
2093  const boost::uint16_t boardIdData = psbBlockData.boardId();
2094  const int bxInEventData = psbBlockData.bxInEvent();
2095 
2096  // search the corresponding PSB in the emulated record using the
2097  // BoardId and the BxInEvent
2098 
2099  bool foundPSB = false;
2100 
2101  for (int iPsbF = 0; iPsbF < gtPsbVectorEmulSize; ++iPsbF) {
2102 
2103  const L1GtPsbWord& psbBlockEmul = gtPsbVectorEmul[iPsbF];
2104  const boost::uint16_t boardIdEmul = psbBlockEmul.boardId();
2105  const int bxInEventEmul = psbBlockEmul.bxInEvent();
2106 
2107  if ((boardIdEmul == boardIdData)
2108  && (bxInEventData == bxInEventEmul)) {
2109 
2110  foundPSB = true;
2111 
2112  // compare the boards
2113  comparePSB(iEvent, evSetup, psbBlockData, psbBlockEmul);
2114  }
2115 
2116  }
2117 
2118  if (!foundPSB) {
2119  m_myCoutStream << "\nNo emulated PSB with boardId() = " << std::hex
2120  << "0x" << std::setw(4) << std::setfill('0') << boardIdData
2121  << std::setfill(' ') << std::dec << " and BxInEvent = "
2122  << bxInEventData << " was found";
2123 
2124  }
2125 
2126  }
2127 
2128  edm::LogInfo("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
2129 
2130  m_myCoutStream.str("");
2131  m_myCoutStream.clear();
2132 
2133  // fill the m_gtErrorFlag histogram (only for L1 GT DAQ record)
2134 
2135  if (m_agree) {
2136  m_gtErrorFlag->Fill(0.0001);
2137  }
2138 
2139  if (m_dataOnly || m_dataOnlyMask) {
2140  m_gtErrorFlag->Fill(3.0001);
2141  }
2142 
2143  if (m_emulOnly || m_emulOnlyMask) {
2144  m_gtErrorFlag->Fill(4.0001);
2145  }
2146 
2147 }
#define LogDebug(id)
const cms_uint16_t boardId() const
get/set board ID
Definition: L1GtPsbWord.h:66
virtual void compareGTFE(const edm::Event &, const edm::EventSetup &, const L1GtfeWord &, const L1GtfeWord &, const int)
compare the GTFE board
virtual void comparePSB(const edm::Event &, const edm::EventSetup &, const L1GtPsbWord &, const L1GtPsbWord &)
compare the PSB board
MonitorElement * m_gtErrorFlag
PSB.
bool getByToken(EDGetToken token, Handle< PROD > &result) const
Definition: Event.h:462
virtual void compareFDL(const edm::Event &, const edm::EventSetup &, const L1GtFdlWord &, const L1GtFdlWord &, const int)
compare the FDL board
void Fill(long long x)
bool m_agree
internal members
edm::EDGetTokenT< L1GlobalTriggerReadoutRecord > m_l1GtDataDaqInputToken_
bool isValid() const
Definition: HandleBase.h:75
edm::EDGetTokenT< L1GlobalTriggerReadoutRecord > m_l1GtEmulDaqInputToken_
std::ostringstream m_myCoutStream
int m_nrDataEventError
counters
const int bxInEvent() const
get/set bunch cross in the GT event record
Definition: L1GtPsbWord.h:87
void L1GtHwValidation::compareEvmRecord ( const edm::Event iEvent,
const edm::EventSetup evSetup 
)
privatevirtual

L1 GT EVM record comparison.

Definition at line 2150 of file L1GtHwValidation.cc.

References compareFDL(), compareGTFE(), edm::Event::getByToken(), edm::HandleBase::isValid(), LogDebug, m_l1GtDataEvmInputToken_, m_l1GtEmulEvmInputToken_, m_myCoutStream, m_nrDataEventError, and m_nrEmulEventError.

Referenced by analyze().

2151  {
2152 
2153  // formal index for EVM record
2154  int iRec = 1;
2155 
2156  // get the L1 GT hardware EVM record L1GlobalTriggerEvmReadoutRecord
2158  iEvent.getByToken(m_l1GtDataEvmInputToken_, gtReadoutRecordData);
2159 
2160  bool validData = false;
2161 
2162  if (!gtReadoutRecordData.isValid()) {
2164  } else {
2165  validData = true;
2166  }
2167 
2168  // get the L1 GT emulator EVM record L1GlobalTriggerEvmReadoutRecord
2170  iEvent.getByToken(m_l1GtEmulEvmInputToken_, gtReadoutRecordEmul);
2171 
2172  bool validEmul = false;
2173 
2174  if (!gtReadoutRecordEmul.isValid()) {
2176  } else {
2177  validEmul = true;
2178  }
2179 
2180  if ((!validData) || (!validEmul)) {
2181  edm::LogWarning("L1GtHwValidation")
2182  << "\n No valid product found: EVM L1GlobalTriggerEvmReadoutRecord"
2183  << "\n Data validity [1 = true; 0 = false]: " << validData
2184  << "\n Emulator validity: [1 = true; 0 = false]: "
2185  << validEmul << "\n EVM histograms will not be filled.\n"
2186  << std::endl;
2187 
2188  return;
2189  }
2190 
2191  // compare GTFE
2192  const L1GtfeWord& gtfeBlockData = gtReadoutRecordData->gtfeWord();
2193  const L1GtfeWord& gtfeBlockEmul = gtReadoutRecordEmul->gtfeWord();
2194 
2195  compareGTFE(iEvent, evSetup, gtfeBlockData, gtfeBlockEmul, iRec);
2196 
2197  // FDL comparison
2198  const std::vector<L1GtFdlWord>& gtFdlVectorData =
2199  gtReadoutRecordData->gtFdlVector();
2200  const std::vector<L1GtFdlWord>& gtFdlVectorEmul =
2201  gtReadoutRecordEmul->gtFdlVector();
2202 
2203  int gtFdlVectorDataSize = gtFdlVectorData.size();
2204  int gtFdlVectorEmulSize = gtFdlVectorEmul.size();
2205 
2206  if (gtFdlVectorDataSize == gtFdlVectorEmulSize) {
2207  m_myCoutStream << "\nData and emulated FDL vector size: identical.\n";
2208  m_myCoutStream << " Size: " << gtFdlVectorDataSize << std::endl;
2209 
2210  for (int iFdl = 0; iFdl < gtFdlVectorDataSize; ++iFdl) {
2211 
2212  const L1GtFdlWord& fdlBlockData = gtFdlVectorData[iFdl];
2213  const L1GtFdlWord& fdlBlockEmul = gtFdlVectorEmul[iFdl];
2214 
2215  compareFDL(iEvent, evSetup, fdlBlockData, fdlBlockEmul, iRec);
2216  }
2217  } else {
2218  m_myCoutStream << "\nData and emulated FDL vector size: different.\n";
2219  m_myCoutStream << " Data: size = " << gtFdlVectorDataSize << std::endl;
2220  m_myCoutStream << " Emul: size = " << gtFdlVectorEmulSize << std::endl;
2221 
2222  }
2223 
2224  // FIXME compare TCS
2225 
2226  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
2227 
2228  m_myCoutStream.str("");
2229  m_myCoutStream.clear();
2230 
2231  edm::LogInfo("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
2232 
2233  m_myCoutStream.str("");
2234  m_myCoutStream.clear();
2235 
2236 }
#define LogDebug(id)
edm::EDGetTokenT< L1GlobalTriggerEvmReadoutRecord > m_l1GtDataEvmInputToken_
virtual void compareGTFE(const edm::Event &, const edm::EventSetup &, const L1GtfeWord &, const L1GtfeWord &, const int)
compare the GTFE board
bool getByToken(EDGetToken token, Handle< PROD > &result) const
Definition: Event.h:462
virtual void compareFDL(const edm::Event &, const edm::EventSetup &, const L1GtFdlWord &, const L1GtFdlWord &, const int)
compare the FDL board
bool isValid() const
Definition: HandleBase.h:75
edm::EDGetTokenT< L1GlobalTriggerEvmReadoutRecord > m_l1GtEmulEvmInputToken_
std::ostringstream m_myCoutStream
int m_nrDataEventError
counters
void L1GtHwValidation::compareFDL ( const edm::Event iEvent,
const edm::EventSetup evSetup,
const L1GtFdlWord fdlBlockData,
const L1GtFdlWord fdlBlockEmul,
const int  iRec 
)
privatevirtual

compare the FDL board

Definition at line 1033 of file L1GtHwValidation.cc.

References L1GtFdlWord::boardId(), L1GtFdlWord::bxInEvent(), L1GtFdlWord::bxNr(), TauDecayModes::dec, L1GtFdlWord::eventNr(), excludedAlgo(), MonitorElement::Fill(), L1GtFdlWord::finalOR(), L1GtFdlWord::gtDecisionWord(), L1GtFdlWord::gtDecisionWordExtended(), L1GtFdlWord::gtPrescaleFactorIndexAlgo(), L1GtFdlWord::gtTechnicalTriggerWord(), L1GtFdlWord::localBxNr(), LogDebug, LogTrace, m_agree, m_dataOnly, m_dataOnlyMask, m_emulOnly, m_emulOnlyMask, m_excludedAlgorithmsAgreement, m_fdlDataAlgoDecision, m_fdlDataAlgoDecision_Err, m_fdlDataAlgoDecision_NoMatch, m_fdlDataAlgoDecisionMask, m_fdlDataAlgoDecisionMask_NoMatch, m_fdlDataAlgoDecisionPrescaled, m_fdlDataAlgoDecisionPrescaled_NoMatch, m_fdlDataAlgoDecisionPrescaledMask_NoMatch, m_fdlDataAlgoDecisionUnprescaled, m_fdlDataAlgoDecisionUnprescaled_NoMatch, m_fdlDataAlgoDecisionUnprescaledMask_NoMatch, m_fdlDataEmul, m_fdlDataEmul_Err, m_fdlDataEmulAlgoDecision, m_fdlDataEmulAlgoDecision_Err, m_fdlDataEmulAlgoDecisionMask, m_fdlDataEmulAlgoDecisionPrescaled, m_fdlDataEmulAlgoDecisionUnprescaled, m_fdlDataEmulAlgoDecisionUnprescaledAllowed, m_fdlDataEmulTechDecision, m_fdlDataEmulTechDecision_Err, m_fdlDataEmulTechDecisionMask, m_fdlDataTechDecision, m_fdlDataTechDecision_Err, m_fdlDataTechDecisionMask, m_fdlEmulAlgoDecision, m_fdlEmulAlgoDecision_Err, m_fdlEmulAlgoDecision_NoMatch, m_fdlEmulAlgoDecisionMask, m_fdlEmulAlgoDecisionMask_NoMatch, m_fdlEmulAlgoDecisionPrescaled_NoMatch, m_fdlEmulAlgoDecisionPrescaledMask_NoMatch, m_fdlEmulAlgoDecisionUnprescaled_NoMatch, m_fdlEmulAlgoDecisionUnprescaledMask_NoMatch, m_fdlEmulTechDecision, m_fdlEmulTechDecision_Err, m_fdlEmulTechDecisionMask, m_myCoutStream, m_triggerMaskAlgoTrig, m_triggerMaskTechTrig, L1GtFdlWord::noAlgo(), dtDQMClient_cfg::prescaleFactor, L1GtFdlWord::print(), L1GtFdlWord::printGtDecisionWord(), L1GtFdlWord::printGtDecisionWordExtended(), L1GtFdlWord::printGtTechnicalTriggerWord(), AlCaHLTBitMon_QueryRunRegistry::string, and TotalBxInEvent.

Referenced by compareDaqRecord(), and compareEvmRecord().

1035  {
1036 
1037  // index of physics partition
1038  int PhysicsPartition = 0;
1039 
1040  //
1041  std::string recString;
1042 
1043  if (fdlBlockData == fdlBlockEmul) {
1044  m_myCoutStream << "\n" << recString
1045  << " Data and emulated FDL blocks: identical.\n";
1046  fdlBlockData.print(m_myCoutStream);
1047 
1048  } else {
1049  m_myCoutStream << "\n" << recString
1050  << " Data and emulated FDL blocks: different.\n";
1051 
1052  m_myCoutStream << "\nData: FDL block\n";
1053  fdlBlockData.print(m_myCoutStream);
1054 
1055  m_myCoutStream << "\nEmul: FDL block\n";
1056  fdlBlockEmul.print(m_myCoutStream);
1057 
1058  }
1059 
1060  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1061 
1062  m_myCoutStream.str("");
1063  m_myCoutStream.clear();
1064 
1065  // get bunch cross in the GT event record -
1066  // move it first as histograms are BxInEvent dependent
1067  const int bxInEventData = fdlBlockData.bxInEvent();
1068  const int bxInEventEmul = fdlBlockEmul.bxInEvent();
1069 
1070  bool matchBxInEvent = false;
1071 
1072  if (bxInEventData == bxInEventEmul) {
1073  m_myCoutStream << "\n" << recString
1074  << " Data and emulated FDL bxInEvent identical.";
1075  m_myCoutStream << "\n bxInEvent() = " << bxInEventData;
1076  m_myCoutStream << "\n";
1077  matchBxInEvent = true;
1078 
1079  } else {
1080  m_myCoutStream << "\n" << recString
1081  << " Data and emulated FDL bxInEvent different.";
1082  m_myCoutStream << "\n Data: bxInEvent() = " << bxInEventData;
1083  m_myCoutStream << "\n Emul: bxInEvent() = " << bxInEventEmul;
1084  m_myCoutStream << "\n";
1085 
1086  m_fdlDataEmul_Err[iRec]->Fill(1);
1087 
1088  if (iRec == 0) {
1089  m_agree = false;
1090 
1091  m_myCoutStream << "\nDisagreement data versus emulator: "
1092  << "\n Data and emulated FDL bxInEvent different \n";
1093  }
1094 
1095  }
1096 
1097  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1098  m_myCoutStream.str("");
1099  m_myCoutStream.clear();
1100 
1101  // symmetrize
1102  bool validBxInEvent = false;
1103  int histIndex = bxInEventData + (TotalBxInEvent + 1) / 2 - 1;
1104  LogDebug("L1GtHwValidation") << "\n Convert bxInEvent = " << bxInEventData
1105  << " to histIndex = " << histIndex << std::endl;
1106  if ((histIndex <= TotalBxInEvent) && (histIndex >= 0)) {
1107  validBxInEvent = true;
1108  }
1109 
1110  // loop over algorithms and increase the corresponding counters
1111 
1112  // get BoardId value
1113  const boost::uint16_t boardIdData = fdlBlockData.boardId();
1114  const boost::uint16_t boardIdEmul = fdlBlockEmul.boardId();
1115 
1116  if (boardIdData == boardIdEmul) {
1117  m_myCoutStream << "\n" << recString
1118  << " Data and emulated FDL boardId identical.";
1119  m_myCoutStream << "\n boardId() = " << std::hex << "0x" << std::setw(4)
1120  << std::setfill('0') << boardIdData << std::setfill(' ')
1121  << std::dec;
1122  m_myCoutStream << "\n";
1123 
1124  } else {
1125  m_myCoutStream << "\n" << recString
1126  << " Data and emulated FDL boardId different.";
1127  m_myCoutStream << "\n Data: boardId() = " << std::hex << "0x"
1128  << std::setw(4) << std::setfill('0') << boardIdData
1129  << std::setfill(' ') << std::dec;
1130  m_myCoutStream << "\n Emul: boardId() = " << std::hex << "0x"
1131  << std::setw(4) << std::setfill('0') << boardIdEmul
1132  << std::setfill(' ') << std::dec;
1133  m_myCoutStream << "\n";
1134 
1135  if (matchBxInEvent && validBxInEvent) {
1136  m_fdlDataEmul[histIndex][iRec]->Fill(0);
1137  } else {
1138  m_fdlDataEmul_Err[iRec]->Fill(0);
1139  }
1140 
1141  }
1142 
1143  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1144  m_myCoutStream.str("");
1145  m_myCoutStream.clear();
1146 
1147  // get BxNr - bunch cross number of the actual bx
1148  const boost::uint16_t bxNrData = fdlBlockData.bxNr();
1149  const boost::uint16_t bxNrEmul = fdlBlockEmul.bxNr();
1150 
1151  if (bxNrData == bxNrEmul) {
1152  m_myCoutStream << "\n" << recString
1153  << " Data and emulated FDL bxNr identical.";
1154  m_myCoutStream << "\n bxNr() = " << bxNrData;
1155  m_myCoutStream << "\n";
1156 
1157  } else {
1158  m_myCoutStream << "\n" << recString
1159  << " Data and emulated FDL bxNr different.";
1160  m_myCoutStream << "\n Data: bxNr() = " << bxNrData;
1161  m_myCoutStream << "\n Emul: bxNr() = " << bxNrEmul;
1162  m_myCoutStream << "\n";
1163 
1164  if (matchBxInEvent && validBxInEvent) {
1165  m_fdlDataEmul[histIndex][iRec]->Fill(2);
1166  } else {
1167  m_fdlDataEmul_Err[iRec]->Fill(2);
1168  }
1169  }
1170 
1171  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1172  m_myCoutStream.str("");
1173  m_myCoutStream.clear();
1174 
1175  // get event number since last L1 reset generated in FDL
1176  const boost::uint32_t eventNrData = fdlBlockData.eventNr();
1177  const boost::uint32_t eventNrEmul = fdlBlockEmul.eventNr();
1178 
1179  if (eventNrData == eventNrEmul) {
1180  m_myCoutStream << "\n" << recString
1181  << " Data and emulated FDL eventNr identical.";
1182  m_myCoutStream << "\n eventNr() = " << eventNrData;
1183  m_myCoutStream << "\n";
1184 
1185  } else {
1186  m_myCoutStream << "\n" << recString
1187  << " Data and emulated FDL eventNr different.";
1188  m_myCoutStream << "\n Data: eventNr() = " << eventNrData;
1189  m_myCoutStream << "\n Emul: eventNr() = " << eventNrEmul;
1190  m_myCoutStream << "\n";
1191 
1192  if (matchBxInEvent && validBxInEvent) {
1193  m_fdlDataEmul[histIndex][iRec]->Fill(3);
1194  } else {
1195  m_fdlDataEmul_Err[iRec]->Fill(3);
1196  }
1197 
1198  }
1199 
1200  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1201  m_myCoutStream.str("");
1202  m_myCoutStream.clear();
1203 
1204  // get technical trigger bits
1205  const TechnicalTriggerWord& gtTechnicalTriggerWordData =
1206  fdlBlockData.gtTechnicalTriggerWord();
1207  const TechnicalTriggerWord& gtTechnicalTriggerWordEmul =
1208  fdlBlockEmul.gtTechnicalTriggerWord();
1209 
1210  int nTechBits = gtTechnicalTriggerWordData.size();
1211 
1212  TechnicalTriggerWord gtTechnicalTriggerWordDataMask(nTechBits);
1213  TechnicalTriggerWord gtTechnicalTriggerWordEmulMask(nTechBits);
1214 
1215  unsigned int bitValue = 0;
1216 
1217  if (matchBxInEvent && validBxInEvent) {
1218  for (int iBit = 0; iBit < nTechBits; ++iBit) {
1219 
1220  unsigned int triggerMask = (m_triggerMaskTechTrig.at(iBit)) & (1
1221  << PhysicsPartition);
1222 
1223  if (gtTechnicalTriggerWordData[iBit]) {
1224  m_fdlDataTechDecision[histIndex][iRec]->Fill(iBit);
1225 
1226  bitValue = (triggerMask) ? 0 : 1;
1227  gtTechnicalTriggerWordDataMask[iBit] = bitValue;
1228  if (bitValue) {
1229  m_fdlDataTechDecisionMask[histIndex][iRec]->Fill(iBit);
1230  }
1231  }
1232 
1233  if (gtTechnicalTriggerWordEmul.at(iBit)) {
1234  m_fdlEmulTechDecision[histIndex][iRec]->Fill(iBit);
1235 
1236  bitValue = (triggerMask) ? 0 : 1;
1237  gtTechnicalTriggerWordEmulMask[iBit] = bitValue;
1238  if (bitValue) {
1239  m_fdlEmulTechDecisionMask[histIndex][iRec]->Fill(iBit);
1240  }
1241  }
1242  }
1243  } else {
1244  for (int iBit = 0; iBit < nTechBits; ++iBit) {
1245 
1246  if (gtTechnicalTriggerWordData[iBit]) {
1247  m_fdlDataTechDecision_Err[iRec]->Fill(iBit);
1248  }
1249 
1250  if (gtTechnicalTriggerWordEmul.at(iBit)) {
1251  m_fdlEmulTechDecision_Err[iRec]->Fill(iBit);
1252  }
1253  }
1254  }
1255 
1256  if (gtTechnicalTriggerWordData == gtTechnicalTriggerWordEmul) {
1257  m_myCoutStream << "\n" << recString
1258  << " Data and emulated FDL gtTechnicalTriggerWord identical.\n";
1260  m_myCoutStream << "\n";
1261 
1262  } else {
1263  m_myCoutStream << "\n" << recString
1264  << " Data and emulated FDL gtTechnicalTriggerWord different.";
1265  m_myCoutStream << "\n Data: ";
1267  m_myCoutStream << "\n Emul: ";
1269  m_myCoutStream << "\n";
1270 
1271  if (matchBxInEvent && validBxInEvent) {
1272  m_fdlDataEmul[histIndex][iRec]->Fill(4);
1273  } else {
1274  m_fdlDataEmul_Err[iRec]->Fill(4);
1275  }
1276 
1277  if (matchBxInEvent && validBxInEvent) {
1278  for (int iBit = 0; iBit < nTechBits; ++iBit) {
1279  if (gtTechnicalTriggerWordData[iBit]
1280  != gtTechnicalTriggerWordEmul.at(iBit)) {
1281  m_fdlDataEmulTechDecision[histIndex][iRec]->Fill(iBit);
1282  }
1283  }
1284  } else {
1285  for (int iBit = 0; iBit < nTechBits; ++iBit) {
1286  if (gtTechnicalTriggerWordData[iBit]
1287  != gtTechnicalTriggerWordEmul.at(iBit)) {
1288  m_fdlDataEmulTechDecision_Err[iRec]->Fill(iBit);
1289  }
1290  }
1291  }
1292  }
1293 
1294  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1295  m_myCoutStream.str("");
1296  m_myCoutStream.clear();
1297 
1298  if (gtTechnicalTriggerWordDataMask == gtTechnicalTriggerWordEmulMask) {
1299  m_myCoutStream << "\n" << recString
1300  << " Data and emulated FDL gtTechnicalTriggerWord after mask identical.\n";
1301  m_myCoutStream << "\n";
1302 
1303  } else {
1304  m_myCoutStream << "\n" << recString
1305  << " Data and emulated FDL gtTechnicalTriggerWord after mask different.";
1306  m_myCoutStream << "\n Data: ";
1307  m_myCoutStream << "\n Emul: ";
1308  m_myCoutStream << "\n";
1309 
1310  if (matchBxInEvent && validBxInEvent) {
1311  m_fdlDataEmul[histIndex][iRec]->Fill(5);
1312  } else {
1313  m_fdlDataEmul_Err[iRec]->Fill(5);
1314  }
1315 
1316  if (matchBxInEvent && validBxInEvent) {
1317  for (int iBit = 0; iBit < nTechBits; ++iBit) {
1318  if (gtTechnicalTriggerWordData[iBit]
1319  != gtTechnicalTriggerWordEmul.at(iBit)) {
1320  m_fdlDataEmulTechDecisionMask[histIndex][iRec]->Fill(iBit);
1321  }
1322  }
1323  }
1324  }
1325 
1326  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1327  m_myCoutStream.str("");
1328  m_myCoutStream.clear();
1329 
1330  // get algorithms bits (decision word)
1331  const DecisionWord& gtDecisionWordData = fdlBlockData.gtDecisionWord();
1332  const DecisionWord& gtDecisionWordEmul = fdlBlockEmul.gtDecisionWord();
1333 
1334  int nAlgoBits = gtDecisionWordData.size();
1335 
1336  DecisionWord gtDecisionWordDataMask(nAlgoBits);
1337  DecisionWord gtDecisionWordEmulMask(nAlgoBits);
1338 
1339  // get the index of the prescale factor set from data
1340  int iPfSet = fdlBlockData.gtPrescaleFactorIndexAlgo();
1341 
1342  // check that the prescale factor is not out of range for the prescale factor
1343  // record retrieved from event setup
1344  size_t pfSetsSize = (*m_prescaleFactorsAlgoTrig).size();
1345 
1346  if (iPfSet < 0) {
1347 
1348  LogDebug("L1GtHwValidation")
1349  << "\nError: index of prescale factor set retrieved from the data \n"
1350  << "less than zero."
1351  << "\n Value of index retrieved from data = " << iPfSet
1352  << std::endl;
1353 
1354  // FIXME add a histogram to be used for a quality test
1355 
1356  return;
1357 
1358  } else if (iPfSet >= (static_cast<int>(pfSetsSize))) {
1359 
1360  LogDebug("L1GtHwValidation")
1361  << "\nError: index of prescale factor set retrieved from the data \n"
1362  << "greater than the size of the vector of prescale factor sets."
1363  << "\n Value of index retrieved from data = " << iPfSet
1364  << "\n Vector size = " << pfSetsSize << std::endl;
1365 
1366  // FIXME add a histogram to be used for a quality test
1367 
1368  return;
1369 
1370  }
1371 
1372  const std::vector<int>& prescaleFactorsAlgoTrig =
1373  (*m_prescaleFactorsAlgoTrig).at(iPfSet);
1374 
1375 
1376  if (matchBxInEvent && validBxInEvent) {
1377 
1378  for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
1379 
1380  unsigned int triggerMask = (m_triggerMaskAlgoTrig.at(iBit)) & (1
1381  << PhysicsPartition);
1382 
1383  int prescaleFactor = prescaleFactorsAlgoTrig.at(iBit);
1384 
1385  LogTrace("L1GtHwValidation") << "Bit " << iBit
1386  << ": prescale factor = " << prescaleFactor
1387  << " trigger mask = " << triggerMask << std::endl;
1388 
1389  if (gtDecisionWordData[iBit]) {
1390  m_fdlDataAlgoDecision[histIndex][iRec]->Fill(iBit);
1391 
1392  if (prescaleFactor == 1) {
1393  m_fdlDataAlgoDecisionUnprescaled[histIndex][iRec]->Fill(
1394  iBit);
1395  } else {
1396  m_fdlDataAlgoDecisionPrescaled[histIndex][iRec]->Fill(iBit);
1397  }
1398 
1399  bitValue = (triggerMask) ? 0 : 1;
1400  gtDecisionWordDataMask[iBit] = bitValue;
1401  if (bitValue) {
1402  m_fdlDataAlgoDecisionMask[histIndex][iRec]->Fill(iBit);
1403  }
1404  }
1405 
1406  if (gtDecisionWordEmul.at(iBit)) {
1407  m_fdlEmulAlgoDecision[histIndex][iRec]->Fill(iBit);
1408 
1409  bitValue = (triggerMask) ? 0 : 1;
1410  gtDecisionWordEmulMask[iBit] = bitValue;
1411  if (bitValue) {
1412  m_fdlEmulAlgoDecisionMask[histIndex][iRec]->Fill(iBit);
1413  }
1414  }
1415  }
1416  } else {
1417  for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
1418  if (gtDecisionWordData[iBit]) {
1419  m_fdlDataAlgoDecision_Err[iRec]->Fill(iBit);
1420  }
1421  }
1422 
1423  for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
1424  if (gtDecisionWordEmul.at(iBit)) {
1425  m_fdlEmulAlgoDecision_Err[iRec]->Fill(iBit);
1426  }
1427  }
1428 
1429  if (iRec == 0) {
1430  m_agree = false;
1431 
1432  m_myCoutStream << "\nDisagreement data versus emulator: "
1433  << "\n matchBxInEvent && validBxInEvent false \n";
1434  }
1435 
1436  }
1437 
1438  if (gtDecisionWordData == gtDecisionWordEmul) {
1439  m_myCoutStream << "\n" << recString
1440  << " Data and emulated FDL gtDecisionWord identical.";
1441  fdlBlockData.printGtDecisionWord(m_myCoutStream);
1442  m_myCoutStream << "\n";
1443 
1444  } else {
1445  m_myCoutStream << "\n" << recString
1446  << " Data and emulated FDL gtDecisionWord different.";
1447  m_myCoutStream << "\n Data: ";
1448  fdlBlockData.printGtDecisionWord(m_myCoutStream);
1449  m_myCoutStream << "\n Emul: ";
1450  fdlBlockEmul.printGtDecisionWord(m_myCoutStream);
1451  m_myCoutStream << "\n";
1452 
1453  if (matchBxInEvent && validBxInEvent) {
1454  m_fdlDataEmul[histIndex][iRec]->Fill(6);
1455  } else {
1456  m_fdlDataEmul_Err[iRec]->Fill(6);
1457  }
1458 
1459  if (matchBxInEvent && validBxInEvent) {
1460  for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
1461 
1462  int prescaleFactor = prescaleFactorsAlgoTrig.at(iBit);
1463 
1464  if (gtDecisionWordData[iBit] != gtDecisionWordEmul.at(iBit)) {
1465 
1466  m_fdlDataEmulAlgoDecision[histIndex][iRec]->Fill(iBit);
1467 
1468  // for excluded algorithms, fill mismatch for BxInEvent = 0 and DAQ record only
1469  if (excludedAlgo(iBit) && (bxInEventData == 0) && (iRec
1470  == 0)) {
1472  }
1473 
1474  if (prescaleFactor == 1) {
1475  m_fdlDataEmulAlgoDecisionUnprescaled[histIndex][iRec]->Fill(
1476  iBit);
1477 
1478  // fill a histogram for allowed algorithm triggers only
1479  if (!excludedAlgo(iBit)) {
1481  iBit);
1482  }
1483 
1484  } else {
1485  m_fdlDataEmulAlgoDecisionPrescaled[histIndex][iRec]->Fill(
1486  iBit);
1487  }
1488 
1489  if (gtDecisionWordData[iBit]) {
1490  m_fdlDataAlgoDecision_NoMatch[histIndex][iRec]->Fill(
1491  iBit);
1492 
1493  if (prescaleFactor == 1) {
1495  iBit);
1496 
1497  // compare for agreement only unprescaled algorithms and algorithms which
1498  // are not excluded from comparison
1499  if ((!excludedAlgo(iBit)) && (bxInEventData == 0)
1500  && (iRec == 0)) {
1501  m_agree = false;
1502  m_dataOnly = true;
1503 
1505  << "\nDisagreement data versus emulator: "
1506  << "result before mask for algorithm with bit number "
1507  << iBit
1508  << "\n Data: true, emulator: false \n";
1509  }
1510 
1511  } else {
1512  m_fdlDataAlgoDecisionPrescaled_NoMatch[histIndex][iRec]->Fill(
1513  iBit);
1514  }
1515 
1516  } else {
1517  m_fdlEmulAlgoDecision_NoMatch[histIndex][iRec]->Fill(
1518  iBit);
1519 
1520  if (prescaleFactor == 1) {
1522  iBit);
1523 
1524  // compare for agreement only unprescaled algorithms and algorithms which
1525  // are not excluded from comparison
1526  if ((!excludedAlgo(iBit)) && (bxInEventData == 0)
1527  && (iRec == 0)) {
1528  m_agree = false;
1529  m_emulOnly = true;
1530 
1532  << "\nDisagreement data versus emulator: "
1533  << "result before mask for algorithm with bit number "
1534  << iBit
1535  << "\n Data: false, emulator: true \n";
1536  }
1537 
1538  } else {
1539  m_fdlEmulAlgoDecisionPrescaled_NoMatch[histIndex][iRec]->Fill(
1540  iBit);
1541  }
1542  }
1543  }
1544  }
1545  } else {
1546  for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
1547  if (gtDecisionWordData[iBit] != gtDecisionWordEmul.at(iBit)) {
1548  m_fdlDataEmulAlgoDecision_Err[iRec]->Fill(iBit);
1549  }
1550  }
1551 
1552  if (iRec == 0) {
1553  m_agree = false;
1554 
1555  m_myCoutStream << "\nDisagreement data versus emulator: "
1556  << "\n matchBxInEvent && validBxInEvent false \n";
1557  }
1558  }
1559 
1560  }
1561 
1562  if (gtDecisionWordDataMask == gtDecisionWordEmulMask) {
1563  m_myCoutStream << "\n" << recString
1564  << " Data and emulated FDL gtDecisionWord after mask identical.";
1565  m_myCoutStream << "\n";
1566 
1567  } else {
1568  m_myCoutStream << "\n" << recString
1569  << " Data and emulated FDL gtDecisionWord after mask different.";
1570  m_myCoutStream << "\n Data: ";
1571  m_myCoutStream << "\n Emul: ";
1572  m_myCoutStream << "\n";
1573 
1574  if (matchBxInEvent && validBxInEvent) {
1575  m_fdlDataEmul[histIndex][iRec]->Fill(7);
1576  } else {
1577  m_fdlDataEmul_Err[iRec]->Fill(7);
1578  }
1579 
1580  if (matchBxInEvent && validBxInEvent) {
1581  for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
1582  if (gtDecisionWordDataMask[iBit] != gtDecisionWordEmulMask.at(
1583  iBit)) {
1584  m_fdlDataEmulAlgoDecisionMask[histIndex][iRec]->Fill(iBit);
1585 
1586 
1587  int prescaleFactor = prescaleFactorsAlgoTrig.at(iBit);
1588 
1589  if (gtDecisionWordDataMask[iBit]) {
1590  m_fdlDataAlgoDecisionMask_NoMatch[histIndex][iRec]->Fill(
1591  iBit);
1592 
1593  if (prescaleFactor == 1) {
1595  iBit);
1596 
1597  // compare for agreement only unprescaled algorithms and algorithms which
1598  // are not excluded from comparison
1599  if ((!excludedAlgo(iBit)) && (bxInEventData == 0)
1600  && (iRec == 0)) {
1601  m_agree = false;
1602  m_dataOnlyMask = true;
1603 
1605  << "\nDisagreement data versus emulator: "
1606  << "result after mask for algorithm with bit number "
1607  << iBit
1608  << " different in data versus emulator "
1609  << "\n Data: true, emulator: false \n";
1610  }
1611 
1612  } else {
1614  iBit);
1615  }
1616 
1617  } else {
1618  m_fdlEmulAlgoDecisionMask_NoMatch[histIndex][iRec]->Fill(
1619  iBit);
1620 
1621  if (prescaleFactor == 1) {
1623  iBit);
1624 
1625  // compare for agreement only unprescaled algorithms and algorithms which
1626  // are not excluded from comparison
1627  if ((!excludedAlgo(iBit)) && (bxInEventData == 0)
1628  && (iRec == 0)) {
1629  m_agree = false;
1630  m_emulOnlyMask = true;
1631 
1633  << "\nDisagreement data versus emulator: "
1634  << "result after mask for algorithm with bit number "
1635  << iBit
1636  << " different in data versus emulator "
1637  << "\n Data: false, emulator: true \n";
1638  }
1639 
1640  } else {
1642  iBit);
1643  }
1644  }
1645 
1646 
1647  }
1648  }
1649  }
1650 
1651  }
1652 
1653  // get extended algorithms bits (extended decision word)
1654  const DecisionWordExtended gtDecisionWordExtendedData =
1655  fdlBlockData.gtDecisionWordExtended();
1656  const DecisionWordExtended gtDecisionWordExtendedEmul =
1657  fdlBlockEmul.gtDecisionWordExtended();
1658 
1659  if (gtDecisionWordExtendedData == gtDecisionWordExtendedEmul) {
1660  m_myCoutStream << "\n" << recString
1661  << " Data and emulated FDL gtDecisionWordExtended identical.\n";
1663  m_myCoutStream << "\n";
1664 
1665  } else {
1666  m_myCoutStream << "\n" << recString
1667  << " Data and emulated FDL gtDecisionWordExtended different.\n";
1668  m_myCoutStream << "\n Data: ";
1670  m_myCoutStream << "\n Emul: ";
1672  m_myCoutStream << "\n";
1673 
1674  if (matchBxInEvent && validBxInEvent) {
1675  m_fdlDataEmul[histIndex][iRec]->Fill(8);
1676  } else {
1677  m_fdlDataEmul_Err[iRec]->Fill(8);
1678  }
1679 
1680  }
1681 
1682  // get NoAlgo
1683  const boost::uint16_t noAlgoData = fdlBlockData.noAlgo();
1684  const boost::uint16_t noAlgoEmul = fdlBlockEmul.noAlgo();
1685 
1686  if (noAlgoData == noAlgoEmul) {
1687  m_myCoutStream << "\n" << recString
1688  << " Data and emulated FDL noAlgo identical.";
1689  m_myCoutStream << "\n noAlgo() = " << noAlgoData;
1690  m_myCoutStream << "\n";
1691 
1692  } else {
1693  m_myCoutStream << "\n" << recString
1694  << " Data and emulated FDL noAlgo different.";
1695  m_myCoutStream << "\n Data: noAlgo() = " << noAlgoData;
1696  m_myCoutStream << "\n Emul: noAlgo() = " << noAlgoEmul;
1697  m_myCoutStream << "\n";
1698 
1699  if (matchBxInEvent && validBxInEvent) {
1700  m_fdlDataEmul[histIndex][iRec]->Fill(9);
1701  } else {
1702  m_fdlDataEmul_Err[iRec]->Fill(9);
1703  }
1704 
1705  }
1706 
1707  // get "Final OR" bits
1708  const boost::uint16_t finalORData = fdlBlockData.finalOR();
1709  const boost::uint16_t finalOREmul = fdlBlockEmul.finalOR();
1710 
1711  if (finalORData == finalOREmul) {
1712  m_myCoutStream << "\n" << recString
1713  << " Data and emulated FDL finalOR identical.";
1714  m_myCoutStream << "\n finalOR() = " << std::hex << "0x" << std::setw(2)
1715  << std::setfill('0') << finalORData << std::setfill(' ')
1716  << std::dec;
1717  m_myCoutStream << "\n";
1718 
1719  } else {
1720  m_myCoutStream << "\n" << recString
1721  << " Data and emulated FDL finalOR different.";
1722  m_myCoutStream << "\n Data: finalOR() = " << std::hex << "0x"
1723  << std::setw(2) << std::setfill('0') << finalORData
1724  << std::setfill(' ') << std::dec;
1725  m_myCoutStream << "\n Emul: finalOR() = " << std::hex << "0x"
1726  << std::setw(2) << std::setfill('0') << finalOREmul
1727  << std::setfill(' ') << std::dec;
1728  m_myCoutStream << "\n";
1729 
1730  if (matchBxInEvent && validBxInEvent) {
1731  m_fdlDataEmul[histIndex][iRec]->Fill(10);
1732  } else {
1733  m_fdlDataEmul_Err[iRec]->Fill(10);
1734  }
1735 
1736  }
1737 
1738  // get "Final OR" for physics partition
1739  const int finalORPhysData = finalORData & (1 << PhysicsPartition);
1740  const int finalORPhysEmul = finalOREmul & (1 << PhysicsPartition);
1741 
1742  if (finalORPhysData == finalORPhysEmul) {
1743  m_myCoutStream << "\n" << recString
1744  << " Data and emulated FDL finalOR for the physics partition identical.";
1745  m_myCoutStream << "\n finalOR() = " << finalORPhysData;
1746  m_myCoutStream << "\n";
1747 
1748  } else {
1749  m_myCoutStream << "\n" << recString
1750  << " Data and emulated FDL finalOR for the physics partition different.";
1751  m_myCoutStream << "\n Data: finalOR() = " << finalORPhysData;
1752  m_myCoutStream << "\n Emul: finalOR() = " << finalORPhysEmul;
1753  m_myCoutStream << "\n";
1754 
1755  if (matchBxInEvent && validBxInEvent) {
1756  m_fdlDataEmul[histIndex][iRec]->Fill(11);
1757  } else {
1758  m_fdlDataEmul_Err[iRec]->Fill(11);
1759  }
1760 
1761  }
1762 
1763  // get local bunch cross number of the actual bx
1764  const boost::uint16_t localBxNrData = fdlBlockData.localBxNr();
1765  const boost::uint16_t localBxNrEmul = fdlBlockEmul.localBxNr();
1766 
1767  if (localBxNrData == localBxNrEmul) {
1768  m_myCoutStream << "\n" << recString
1769  << " Data and emulated FDL localBxNr identical.";
1770  m_myCoutStream << "\n localBxNr() = " << localBxNrData;
1771  m_myCoutStream << "\n";
1772 
1773  } else {
1774  m_myCoutStream << "\n" << recString
1775  << " Data and emulated FDL localBxNr different.";
1776  m_myCoutStream << "\n Data: localBxNr() = " << localBxNrData;
1777  m_myCoutStream << "\n Emul: localBxNr() = " << localBxNrEmul;
1778  m_myCoutStream << "\n";
1779 
1780  if (matchBxInEvent && validBxInEvent) {
1781  m_fdlDataEmul[histIndex][iRec]->Fill(12);
1782  } else {
1783  m_fdlDataEmul_Err[iRec]->Fill(12);
1784  }
1785 
1786  }
1787 
1788  edm::LogInfo("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1789  m_myCoutStream.str("");
1790  m_myCoutStream.clear();
1791 
1792 }
#define LogDebug(id)
MonitorElement * m_fdlDataEmulAlgoDecision[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataAlgoDecisionPrescaledMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
const TechnicalTriggerWord & gtTechnicalTriggerWord() const
get/set technical trigger bits
Definition: L1GtFdlWord.h:149
MonitorElement * m_fdlEmulAlgoDecisionUnprescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataAlgoDecision_Err[NumberOfGtRecords]
const cms_uint16_t noAlgo() const
get/set NoAlgo
Definition: L1GtFdlWord.h:286
MonitorElement * m_fdlEmulTechDecision[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataEmulAlgoDecisionPrescaled[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataEmulAlgoDecisionUnprescaledAllowed[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataAlgoDecisionUnprescaledMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlEmulAlgoDecisionMask[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataAlgoDecisionUnprescaled[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlEmulAlgoDecisionPrescaledMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
void Fill(long long x)
MonitorElement * m_fdlEmulTechDecisionMask[TotalBxInEvent][NumberOfGtRecords]
const cms_uint16_t bxNr() const
get/set BxNr - bunch cross number of the actual bx
Definition: L1GtFdlWord.h:110
MonitorElement * m_fdlDataAlgoDecisionPrescaled[TotalBxInEvent][NumberOfGtRecords]
const cms_uint16_t boardId() const
get/set board ID
Definition: L1GtFdlWord.h:69
MonitorElement * m_fdlDataAlgoDecisionMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
void printGtDecisionWord(std::ostream &myCout) const
Definition: L1GtFdlWord.cc:345
const cms_uint32_t eventNr() const
get/set event number since last L1 reset generated in FDL
Definition: L1GtFdlWord.h:130
MonitorElement * m_fdlDataAlgoDecisionUnprescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
std::vector< bool > DecisionWordExtended
std::vector< unsigned int > m_triggerMaskTechTrig
MonitorElement * m_fdlDataEmulAlgoDecisionMask[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataAlgoDecisionPrescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
std::vector< bool > DecisionWord
typedefs
MonitorElement * m_excludedAlgorithmsAgreement
bool m_agree
internal members
MonitorElement * m_fdlDataEmulTechDecision[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlEmulAlgoDecisionUnprescaledMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
const int bxInEvent() const
get/set bunch cross in the GT event record
Definition: L1GtFdlWord.h:90
void printGtDecisionWordExtended(std::ostream &myCout) const
Definition: L1GtFdlWord.cc:503
MonitorElement * m_fdlDataTechDecision_Err[NumberOfGtRecords]
MonitorElement * m_fdlDataAlgoDecision[TotalBxInEvent][NumberOfGtRecords]
std::vector< bool > TechnicalTriggerWord
technical trigger bits (64 bits)
static const int TotalBxInEvent
#define LogTrace(id)
MonitorElement * m_fdlEmulAlgoDecision_Err[NumberOfGtRecords]
void print(std::ostream &myCout) const
pretty print the content of a L1GtFdlWord
Definition: L1GtFdlWord.cc:766
MonitorElement * m_fdlDataTechDecisionMask[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataAlgoDecision_NoMatch[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataEmul[TotalBxInEvent][NumberOfGtRecords]
FDL (0 for DAQ, 1 for EVM record)
const cms_uint16_t gtPrescaleFactorIndexAlgo() const
Definition: L1GtFdlWord.h:267
MonitorElement * m_fdlDataEmul_Err[NumberOfGtRecords]
std::ostringstream m_myCoutStream
MonitorElement * m_fdlEmulAlgoDecisionMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
const DecisionWord & gtDecisionWord() const
get/set/print algorithms bits (decision word)
Definition: L1GtFdlWord.h:171
MonitorElement * m_fdlEmulTechDecision_Err[NumberOfGtRecords]
void printGtTechnicalTriggerWord(std::ostream &myCout) const
Definition: L1GtFdlWord.cc:271
MonitorElement * m_fdlDataEmulAlgoDecision_Err[NumberOfGtRecords]
MonitorElement * m_fdlDataTechDecision[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlEmulAlgoDecision[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlEmulAlgoDecision_NoMatch[TotalBxInEvent][NumberOfGtRecords]
const DecisionWordExtended & gtDecisionWordExtended() const
get/set extended algorithms bits (extended decision word)
Definition: L1GtFdlWord.h:203
MonitorElement * m_fdlDataEmulTechDecisionMask[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataAlgoDecisionMask[TotalBxInEvent][NumberOfGtRecords]
std::vector< unsigned int > m_triggerMaskAlgoTrig
MonitorElement * m_fdlDataEmulTechDecision_Err[NumberOfGtRecords]
MonitorElement * m_fdlEmulAlgoDecisionPrescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
const cms_uint16_t localBxNr() const
get/set local bunch cross number of the actual bx
Definition: L1GtFdlWord.h:372
const cms_uint16_t finalOR() const
get/set &quot;Final OR&quot; bits
Definition: L1GtFdlWord.h:306
bool excludedAlgo(const int &) const
exclusion status for algorithm with bit i
MonitorElement * m_fdlDataEmulAlgoDecisionUnprescaled[TotalBxInEvent][NumberOfGtRecords]
void L1GtHwValidation::compareGt_Gct ( const edm::Event iEvent,
const edm::EventSetup  
)
privatevirtual

compare the GCT collections obtained from L1 GT PSB with the input GCT collections

Definition at line 2240 of file L1GtHwValidation.cc.

Referenced by analyze().

2241  {
2242 
2243  // FIXME
2244 
2245 }
void L1GtHwValidation::compareGTFE ( const edm::Event iEvent,
const edm::EventSetup evSetup,
const L1GtfeWord gtfeBlockData,
const L1GtfeWord gtfeBlockEmul,
const int  iRec 
)
privatevirtual

compare the GTFE board

get record length for alternative 1

get record length for alternative 0

get bunch cross number as counted in the GTFE board

get setup version

get boards contributing to EVM respectively DAQ record

alternative for number of BX per board correlated with active boards bit value is 0: take alternative 0 bit value is 1: take alternative 1

get total number of L1A sent since start of run

Definition at line 826 of file L1GtHwValidation.cc.

References L1GtfeWord::activeBoards(), L1GtfeWord::altNrBxBoard(), L1GtfeWord::boardId(), L1GtfeWord::bxNr(), TauDecayModes::dec, MonitorElement::Fill(), LogDebug, m_gtfeDataEmul, m_myCoutStream, L1GtfeWord::print(), L1GtfeWord::recordLength(), L1GtfeWord::recordLength1(), L1GtfeWord::setupVersion(), AlCaHLTBitMon_QueryRunRegistry::string, and L1GtfeWord::totalTriggerNr().

Referenced by compareDaqRecord(), and compareEvmRecord().

828  {
829 
830  std::string recString;
831  if (gtfeBlockData == gtfeBlockEmul) {
832  m_myCoutStream << "\n" << recString
833  << " Data and emulated GTFE blocks: identical.\n";
834  gtfeBlockData.print(m_myCoutStream);
835  } else {
836  m_myCoutStream << "\n" << recString
837  << " Data and emulated GTFE blocks: different.\n";
838 
839  m_myCoutStream << "\nData: GTFE block\n";
840  gtfeBlockData.print(m_myCoutStream);
841 
842  m_myCoutStream << "\nEmul: GTFE block\n";
843  gtfeBlockEmul.print(m_myCoutStream);
844 
845  }
846 
847  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
848 
849  m_myCoutStream.str("");
850  m_myCoutStream.clear();
851 
852  // get BoardId value
853  const boost::uint16_t boardIdData = gtfeBlockData.boardId();
854  const boost::uint16_t boardIdEmul = gtfeBlockEmul.boardId();
855 
856  if (boardIdData == boardIdEmul) {
857  m_myCoutStream << "\n" << recString
858  << " Data and emulated GTFE boardId identical.";
859  m_myCoutStream << "\n boardId() = " << std::hex << "0x" << std::setw(4)
860  << std::setfill('0') << boardIdData << std::setfill(' ')
861  << std::dec;
862  m_myCoutStream << "\n";
863 
864  } else {
865  m_myCoutStream << "\n" << recString
866  << " Data and emulated GTFE boardId different.";
867  m_myCoutStream << "\n Data: boardId() = " << std::hex << "0x"
868  << std::setw(4) << std::setfill('0') << boardIdData
869  << std::setfill(' ') << std::dec;
870  m_myCoutStream << "\n Emul: boardId() = " << std::hex << "0x"
871  << std::setw(4) << std::setfill('0') << boardIdEmul
872  << std::setfill(' ') << std::dec;
873  m_myCoutStream << "\n";
874  m_gtfeDataEmul[iRec]->Fill(0);
875 
876  }
877 
879  const boost::uint16_t recordLength1Data = gtfeBlockData.recordLength1();
880  const boost::uint16_t recordLength1Emul = gtfeBlockEmul.recordLength1();
881 
882  if (recordLength1Data == recordLength1Emul) {
883  m_myCoutStream << "\n" << recString
884  << " Data and emulated GTFE recordLength for alternative 1 identical.";
885  m_myCoutStream << "\n recordLength1() = " << recordLength1Data;
886  m_myCoutStream << "\n";
887 
888  } else {
889  m_myCoutStream << "\n" << recString
890  << " Data and emulated GTFE recordLength for alternative 1 different.";
891  m_myCoutStream << "\n Data: recordLength1() = " << recordLength1Data;
892  m_myCoutStream << "\n Emul: recordLength1() = " << recordLength1Emul;
893  m_myCoutStream << "\n";
894  m_gtfeDataEmul[iRec]->Fill(1);
895 
896  }
897 
899  const boost::uint16_t recordLengthData = gtfeBlockData.recordLength();
900  const boost::uint16_t recordLengthEmul = gtfeBlockEmul.recordLength();
901 
902  if (recordLengthData == recordLengthEmul) {
903  m_myCoutStream << "\n" << recString
904  << " Data and emulated GTFE recordLength for alternative 0 identical.";
905  m_myCoutStream << "\n recordLength() = " << recordLengthData;
906  m_myCoutStream << "\n";
907 
908  } else {
909  m_myCoutStream << "\n" << recString
910  << " Data and emulated GTFE recordLength for alternative 1 different.";
911  m_myCoutStream << "\n Data: recordLength() = " << recordLengthData;
912  m_myCoutStream << "\n Emul: recordLength() = " << recordLengthEmul;
913  m_myCoutStream << "\n";
914  m_gtfeDataEmul[iRec]->Fill(2);
915 
916  }
917 
919  const boost::uint16_t bxNrData = gtfeBlockData.bxNr();
920  const boost::uint16_t bxNrEmul = gtfeBlockEmul.bxNr();
921 
922  if (bxNrData == bxNrEmul) {
923  m_myCoutStream << "\n" << recString
924  << " Data and emulated GTFE bxNr identical.";
925  m_myCoutStream << "\n bxNr() = " << bxNrData;
926  m_myCoutStream << "\n";
927 
928  } else {
929  m_myCoutStream << "\n" << recString
930  << " Data and emulated GTFE bxNr different.";
931  m_myCoutStream << "\n Data: bxNr() = " << bxNrData;
932  m_myCoutStream << "\n Emul: bxNr() = " << bxNrEmul;
933  m_myCoutStream << "\n";
934  m_gtfeDataEmul[iRec]->Fill(3);
935 
936  }
937 
939  const boost::uint32_t setupVersionData = gtfeBlockData.setupVersion();
940  const boost::uint32_t setupVersionEmul = gtfeBlockEmul.setupVersion();
941 
942  if (setupVersionData == setupVersionEmul) {
943  m_myCoutStream << "\n" << recString
944  << " Data and emulated GTFE setupVersion identical.";
945  m_myCoutStream << "\n setupVersion() = " << setupVersionData;
946  m_myCoutStream << "\n";
947 
948  } else {
949  m_myCoutStream << "\n" << recString
950  << " Data and emulated GTFE setupVersion different.";
951  m_myCoutStream << "\n Data: setupVersion() = " << setupVersionData;
952  m_myCoutStream << "\n Emul: setupVersion() = " << setupVersionEmul;
953  m_myCoutStream << "\n";
954  m_gtfeDataEmul[iRec]->Fill(4);
955 
956  }
957 
959  const boost::uint16_t activeBoardsData = gtfeBlockData.activeBoards();
960  const boost::uint16_t activeBoardsEmul = gtfeBlockEmul.activeBoards();
961 
962  if (activeBoardsData == activeBoardsEmul) {
963  m_myCoutStream << "\n" << recString
964  << " Data and emulated GTFE activeBoards identical.";
965  m_myCoutStream << "\n activeBoards() = " << std::hex << "0x"
966  << std::setw(4) << std::setfill('0') << activeBoardsData
967  << std::setfill(' ') << std::dec;
968  m_myCoutStream << "\n";
969 
970  } else {
971  m_myCoutStream << "\n" << recString
972  << " Data and emulated GTFE activeBoards different.";
973  m_myCoutStream << "\n Data: activeBoards() = " << std::hex << "0x"
974  << std::setw(4) << std::setfill('0') << activeBoardsData
975  << std::setfill(' ') << std::dec;
976  m_myCoutStream << "\n Emul: activeBoards() = " << std::hex << "0x"
977  << std::setw(4) << std::setfill('0') << activeBoardsEmul
978  << std::setfill(' ') << std::dec;
979  m_myCoutStream << "\n";
980  m_gtfeDataEmul[iRec]->Fill(5);
981 
982  }
987  const boost::uint16_t altNrBxBoardData = gtfeBlockData.altNrBxBoard();
988  const boost::uint16_t altNrBxBoardEmul = gtfeBlockEmul.altNrBxBoard();
989 
990  if (altNrBxBoardData == altNrBxBoardEmul) {
991  m_myCoutStream << "\n" << recString
992  << " Data and emulated GTFE altNrBxBoard identical.";
993  m_myCoutStream << "\n altNrBxBoard() = " << altNrBxBoardData;
994  m_myCoutStream << "\n";
995 
996  } else {
997  m_myCoutStream << "\n" << recString
998  << " Data and emulated GTFE altNrBxBoard different.";
999  m_myCoutStream << "\n Data: altNrBxBoard() = " << altNrBxBoardData;
1000  m_myCoutStream << "\n Emul: altNrBxBoard() = " << altNrBxBoardEmul;
1001  m_myCoutStream << "\n";
1002  m_gtfeDataEmul[iRec]->Fill(6);
1003 
1004  }
1005 
1007  const boost::uint32_t totalTriggerNrData = gtfeBlockData.totalTriggerNr();
1008  const boost::uint32_t totalTriggerNrEmul = gtfeBlockEmul.totalTriggerNr();
1009 
1010  if (totalTriggerNrData == totalTriggerNrEmul) {
1011  m_myCoutStream << "\n" << recString
1012  << " Data and emulated GTFE totalTriggerNr identical.";
1013  m_myCoutStream << "\n totalTriggerNr() = " << totalTriggerNrData;
1014  m_myCoutStream << "\n";
1015 
1016  } else {
1017  m_myCoutStream << "\n" << recString
1018  << " Data and emulated GTFE totalTriggerNr different.";
1019  m_myCoutStream << "\n Data: totalTriggerNr() = " << totalTriggerNrData;
1020  m_myCoutStream << "\n Emul: totalTriggerNr() = " << totalTriggerNrEmul;
1021  m_myCoutStream << "\n";
1022  m_gtfeDataEmul[iRec]->Fill(7);
1023 
1024  }
1025 
1026  edm::LogInfo("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1027  m_myCoutStream.str("");
1028  m_myCoutStream.clear();
1029 
1030 }
#define LogDebug(id)
virtual void print(std::ostream &myCout) const
pretty print the content of a L1GtfeWord
Definition: L1GtfeWord.cc:321
const cms_uint16_t altNrBxBoard() const
get/set alternative for number of BX per board
Definition: L1GtfeWord.h:187
void Fill(long long x)
const cms_uint16_t recordLength() const
get/set record length for alternative 0
Definition: L1GtfeWord.h:104
MonitorElement * m_gtfeDataEmul[NumberOfGtRecords]
histograms
const cms_uint32_t totalTriggerNr() const
get/set total number of L1A sent since start of run
Definition: L1GtfeWord.h:211
const cms_uint16_t activeBoards() const
get/set boards contributing to EVM respectively DAQ record
Definition: L1GtfeWord.h:163
const cms_uint16_t bxNr() const
get/set bunch cross number as counted in the GTFE board
Definition: L1GtfeWord.h:122
const cms_uint16_t boardId() const
get/set board ID
Definition: L1GtfeWord.h:65
std::ostringstream m_myCoutStream
const cms_uint32_t setupVersion() const
get/set setup version
Definition: L1GtfeWord.h:140
const cms_uint16_t recordLength1() const
get/set record length for alternative 1
Definition: L1GtfeWord.h:85
void L1GtHwValidation::comparePSB ( const edm::Event iEvent,
const edm::EventSetup evSetup,
const L1GtPsbWord psbBlockData,
const L1GtPsbWord psbBlockEmul 
)
privatevirtual

compare the PSB board

get/set A_DATA_CH_IA

get/set B_DATA_CH_IB

Definition at line 1795 of file L1GtHwValidation.cc.

References L1GtPsbWord::aData(), L1GtPsbWord::bData(), L1GtPsbWord::boardId(), L1GtPsbWord::bxInEvent(), L1GtPsbWord::bxNr(), TauDecayModes::dec, L1GtPsbWord::eventNr(), L1GtPsbWord::localBxNr(), LogDebug, m_myCoutStream, L1GtPsbWord::NumberAData, L1GtPsbWord::NumberBData, and L1GtPsbWord::print().

Referenced by compareDaqRecord().

1797  {
1798 
1799  if (psbBlockData == psbBlockEmul) {
1800  m_myCoutStream << "\nData and emulated PSB blocks: identical.\n";
1801  psbBlockData.print(m_myCoutStream);
1802 
1803  } else {
1804  m_myCoutStream << "\nData and emulated PSB blocks: different.\n";
1805 
1806  m_myCoutStream << "\nData: PSB block\n";
1807  psbBlockData.print(m_myCoutStream);
1808 
1809  m_myCoutStream << "\nEmul: PSB block\n";
1810  psbBlockEmul.print(m_myCoutStream);
1811 
1812  }
1813 
1814  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1815 
1816  m_myCoutStream.str("");
1817  m_myCoutStream.clear();
1818 
1819  // get BoardId value
1820  const boost::uint16_t boardIdData = psbBlockData.boardId();
1821  const boost::uint16_t boardIdEmul = psbBlockEmul.boardId();
1822 
1823  if (boardIdData == boardIdEmul) {
1824  m_myCoutStream << "\nData and emulated PSB boardId identical.";
1825  m_myCoutStream << "\n boardId() = " << std::hex << "0x" << std::setw(4)
1826  << std::setfill('0') << boardIdData << std::setfill(' ')
1827  << std::dec;
1828  m_myCoutStream << "\n";
1829 
1830  } else {
1831  m_myCoutStream << "\nData and emulated PSB boardId different.";
1832  m_myCoutStream << "\n Data: boardId() = " << std::hex << "0x"
1833  << std::setw(4) << std::setfill('0') << boardIdData
1834  << std::setfill(' ') << std::dec;
1835  m_myCoutStream << "\n Emul: boardId() = " << std::hex << "0x"
1836  << std::setw(4) << std::setfill('0') << boardIdEmul
1837  << std::setfill(' ') << std::dec;
1838  m_myCoutStream << "\n";
1839 
1840  }
1841 
1842  // get bunch cross in the GT event record
1843  const int bxInEventData = psbBlockData.bxInEvent();
1844  const int bxInEventEmul = psbBlockEmul.bxInEvent();
1845 
1846  if (bxInEventData == bxInEventEmul) {
1847  m_myCoutStream << "\nData and emulated PSB bxInEvent identical.";
1848  m_myCoutStream << "\n bxInEvent() = " << bxInEventData;
1849  m_myCoutStream << "\n";
1850 
1851  } else {
1852  m_myCoutStream << "\nData and emulated PSB bxInEvent different.";
1853  m_myCoutStream << "\n Data: bxInEvent() = " << bxInEventData;
1854  m_myCoutStream << "\n Emul: bxInEvent() = " << bxInEventEmul;
1855  m_myCoutStream << "\n";
1856 
1857  }
1858 
1859  // get BxNr - bunch cross number of the actual bx
1860  const boost::uint16_t bxNrData = psbBlockData.bxNr();
1861  const boost::uint16_t bxNrEmul = psbBlockEmul.bxNr();
1862 
1863  if (bxNrData == bxNrEmul) {
1864  m_myCoutStream << "\nData and emulated PSB bxNr identical.";
1865  m_myCoutStream << "\n bxNr() = " << bxNrData;
1866  m_myCoutStream << "\n";
1867 
1868  } else {
1869  m_myCoutStream << "\nData and emulated PSB bxNr different.";
1870  m_myCoutStream << "\n Data: bxNr() = " << bxNrData;
1871  m_myCoutStream << "\n Emul: bxNr() = " << bxNrEmul;
1872  m_myCoutStream << "\n";
1873 
1874  }
1875 
1876  // get event number since last L1 reset generated in FDL
1877  const boost::uint32_t eventNrData = psbBlockData.eventNr();
1878  const boost::uint32_t eventNrEmul = psbBlockEmul.eventNr();
1879 
1880  if (eventNrData == eventNrEmul) {
1881  m_myCoutStream << "\nData and emulated PSB eventNr identical.";
1882  m_myCoutStream << "\n eventNr() = " << eventNrData;
1883  m_myCoutStream << "\n";
1884 
1885  } else {
1886  m_myCoutStream << "\nData and emulated PSB eventNr different.";
1887  m_myCoutStream << "\n Data: eventNr() = " << eventNrData;
1888  m_myCoutStream << "\n Emul: eventNr() = " << eventNrEmul;
1889  m_myCoutStream << "\n";
1890 
1891  }
1892 
1894  boost::uint16_t valData;
1895  boost::uint16_t valEmul;
1896 
1897  for (int iA = 0; iA < psbBlockData.NumberAData; ++iA) {
1898  valData = psbBlockData.aData(iA);
1899  valEmul = psbBlockEmul.aData(iA);
1900 
1901  if (valData == valEmul) {
1902  m_myCoutStream << "\nData and emulated PSB aData(" << iA
1903  << ") identical.";
1904  m_myCoutStream << "\n aData(iA) = " << std::hex << "0x"
1905  << std::setw(4) << std::setfill('0') << valData
1906  << std::setfill(' ') << std::dec;
1907  m_myCoutStream << "\n";
1908 
1909  } else {
1910  m_myCoutStream << "\nData and emulated PSB aData(" << iA
1911  << ") different.";
1912  m_myCoutStream << "\n Data: aData(iA) = " << std::hex << "0x"
1913  << std::setw(4) << std::setfill('0') << valData
1914  << std::setfill(' ') << std::dec;
1915  m_myCoutStream << "\n Emul: aData(iA) = " << std::hex << "0x"
1916  << std::setw(4) << std::setfill('0') << valEmul
1917  << std::setfill(' ') << std::dec;
1918  m_myCoutStream << "\n";
1919 
1920  }
1921 
1922  }
1923 
1925  for (int iB = 0; iB < psbBlockData.NumberBData; ++iB) {
1926  valData = psbBlockData.bData(iB);
1927  valEmul = psbBlockEmul.bData(iB);
1928 
1929  if (valData == valEmul) {
1930  m_myCoutStream << "\nData and emulated PSB bData(" << iB
1931  << ") identical.";
1932  m_myCoutStream << "\n bData(iA) = " << std::hex << "0x"
1933  << std::setw(4) << std::setfill('0') << valData
1934  << std::setfill(' ') << std::dec;
1935  m_myCoutStream << "\n";
1936 
1937  } else {
1938  m_myCoutStream << "\nData and emulated PSB bData(" << iB
1939  << ") different.";
1940  m_myCoutStream << "\n Data: bData(iA) = " << std::hex << "0x"
1941  << std::setw(4) << std::setfill('0') << valData
1942  << std::setfill(' ') << std::dec;
1943  m_myCoutStream << "\n Emul: bData(iA) = " << std::hex << "0x"
1944  << std::setw(4) << std::setfill('0') << valEmul
1945  << std::setfill(' ') << std::dec;
1946  m_myCoutStream << "\n";
1947 
1948  }
1949 
1950  }
1951 
1952  // get local bunch cross number of the actual bx
1953  const boost::uint16_t localBxNrData = psbBlockData.localBxNr();
1954  const boost::uint16_t localBxNrEmul = psbBlockEmul.localBxNr();
1955 
1956  if (localBxNrData == localBxNrEmul) {
1957  m_myCoutStream << "\nData and emulated PSB localBxNr identical.";
1958  m_myCoutStream << "\n localBxNr() = " << localBxNrData;
1959  m_myCoutStream << "\n";
1960 
1961  } else {
1962  m_myCoutStream << "\nData and emulated PSB localBxNr different.";
1963  m_myCoutStream << "\n Data: localBxNr() = " << localBxNrData;
1964  m_myCoutStream << "\n Emul: localBxNr() = " << localBxNrEmul;
1965  m_myCoutStream << "\n";
1966 
1967  }
1968 
1969  edm::LogInfo("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1970  m_myCoutStream.str("");
1971  m_myCoutStream.clear();
1972 
1973 }
#define LogDebug(id)
const cms_uint16_t bData(int iB) const
get/set B_DATA_CH_IB
Definition: L1GtPsbWord.cc:323
const cms_uint16_t bxNr() const
get/set bunch cross number of the actual bx
Definition: L1GtPsbWord.h:108
const cms_uint16_t boardId() const
get/set board ID
Definition: L1GtPsbWord.h:66
const cms_uint16_t aData(int iA) const
get/set A_DATA_CH_IA
Definition: L1GtPsbWord.cc:228
const cms_uint16_t localBxNr() const
get/set local bunch cross number of the actual bx
Definition: L1GtPsbWord.h:178
void print(std::ostream &myCout) const
pretty print
Definition: L1GtPsbWord.cc:453
const cms_uint32_t eventNr() const
get/set event number since last L1 reset generated in PSB
Definition: L1GtPsbWord.h:129
std::ostringstream m_myCoutStream
static const int NumberBData
Definition: L1GtPsbWord.h:35
const int bxInEvent() const
get/set bunch cross in the GT event record
Definition: L1GtPsbWord.h:87
static const int NumberAData
Definition: L1GtPsbWord.h:34
void L1GtHwValidation::compareTCS ( const edm::Event iEvent,
const edm::EventSetup evSetup,
const L1TcsWord ,
const L1TcsWord  
)
privatevirtual

compare the TCS board

Definition at line 1976 of file L1GtHwValidation.cc.

1977  {
1978  // empty
1979 }
void L1GtHwValidation::dqmBeginRun ( const edm::Run iRun,
const edm::EventSetup evSetup 
)
protectedvirtual

Reimplemented from DQMEDAnalyzer.

Definition at line 161 of file L1GtHwValidation.cc.

161  {
162 }
bool L1GtHwValidation::excludedAlgo ( const int &  iBit) const
private

exclusion status for algorithm with bit i

Definition at line 2484 of file L1GtHwValidation.cc.

References m_excludedAlgoList.

Referenced by compareFDL().

2484  {
2485 
2486  for (std::vector<int>::const_iterator itAlgo = m_excludedAlgoList.begin(); itAlgo
2487  != m_excludedAlgoList.end(); ++itAlgo) {
2488 
2489  if (iBit == *itAlgo) {
2490  return true;
2491  }
2492  }
2493 
2494  return false;
2495 
2496 }
std::vector< int > m_excludedAlgoList
void L1GtHwValidation::excludedAlgoList ( )
private

exclude from comparison some bits with known disagreement - bit list

Definition at line 2329 of file L1GtHwValidation.cc.

References L1GtTriggerMenu::gtAlgorithmMap(), L1GtTriggerMenu::gtConditionMap(), l1GtConditionCategoryEnumToString(), l1GtConditionTypeEnumToString(), l1GtObjectEnumToString(), LogTrace, m_excludeAlgoTrigByBit, m_excludeAlgoTrigByName, m_excludedAlgoList, m_excludedCondCategory, m_excludedCondType, m_excludedL1GtObject, m_l1GtMenu, matchCondCategory(), matchCondL1GtObject(), matchCondType(), and AlCaHLTBitMon_QueryRunRegistry::string.

Referenced by bookHistograms().

2329  {
2330 
2331 
2332  const AlgorithmMap& algorithmMap = m_l1GtMenu->gtAlgorithmMap();
2333 
2334  for (CItAlgo itAlgo = algorithmMap.begin(); itAlgo != algorithmMap.end(); itAlgo++) {
2335 
2336  const std::string& algName = itAlgo->first;
2337  const int algBitNumber = (itAlgo->second).algoBitNumber();
2338  const int chipNr = (itAlgo->second).algoChipNumber();
2339 
2340  const ConditionMap& conditionMap = (m_l1GtMenu->gtConditionMap()).at(
2341  chipNr);
2342 
2343  const std::vector<L1GtLogicParser::TokenRPN>& aRpnVector =
2344  (itAlgo->second).algoRpnVector();
2345  size_t aRpnVectorSize = aRpnVector.size();
2346 
2347  bool algWithExcludedCondition = false;
2348  bool algWithConditionNotInMap = false;
2349 
2350  // loop over RpnVector and check each conditions against list of excluded conditions
2351  for (size_t opI = 0; opI < aRpnVectorSize; ++opI) {
2352 
2353  const std::string& cndName = (aRpnVector[opI]).operand;
2354 
2355  if (!cndName.empty()) {
2356  bool foundCond = false;
2357 
2358  CItCond itCond = conditionMap.find(cndName);
2359  if (itCond != conditionMap.end()) {
2360 
2361  const L1GtConditionCategory& cCateg = (itCond->second)->condCategory();
2362  const L1GtConditionType& cType = (itCond->second)->condType();
2363  const std::vector<L1GtObject>& objType = (itCond->second)->objectType();
2364 
2365  // condition index in the m_excludedCondCategory, m_excludedCondType, m_excludedL1GtObject vectors
2366  int iCond = -1;
2367 
2368  for (std::vector<L1GtConditionCategory>::const_iterator
2369  itCateg = m_excludedCondCategory.begin();
2370  itCateg != m_excludedCondCategory.end(); ++itCateg) {
2371 
2372  iCond++;
2373 
2374  bool matchCondCategoryValue = matchCondCategory(cCateg, (*itCateg));
2375  bool matchCondTypeValue = matchCondType(cType, m_excludedCondType.at(iCond));
2376  bool matchCondL1GtObjectValue = matchCondL1GtObject(objType, m_excludedL1GtObject.at(iCond));
2377 
2378  LogTrace("L1GtHwValidation")
2379  << "\n "
2380  << "Algorithm: " << algName
2381  << " Condition: " << cndName
2382  << "\n "
2383  << "Category: " << l1GtConditionCategoryEnumToString(cCateg)
2384  << "; excluded: " << l1GtConditionCategoryEnumToString((*itCateg))
2385  << "\n "
2386  << "Type: " << l1GtConditionTypeEnumToString(cType)
2387  << "; excluded: " << l1GtConditionTypeEnumToString(m_excludedCondType.at(iCond))
2388  << "\n "
2389  << "Object excluded: " << l1GtObjectEnumToString(m_excludedL1GtObject.at(iCond))
2390  << std::endl;
2391 
2392 
2393  if (matchCondCategoryValue && matchCondTypeValue && matchCondL1GtObjectValue) {
2394 
2395  algWithExcludedCondition = true;
2396 
2397  }
2398 
2399  }
2400 
2401  foundCond = true;
2402  }
2403 
2404  if (!foundCond) {
2405  // it should never be happen, all conditions are in the maps
2406 
2407  algWithConditionNotInMap = true;
2408 
2409  LogTrace("L1GtHwValidation") << "\n Error: condition "
2410  << cndName << " not found in condition map!"
2411  << "\n Add algorithm " << algName
2412  << " (bit number " << algBitNumber << ") "
2413  << "\n to list of algorithms excluded from comparison"
2414  << "\n data versus emulator." << std::endl;
2415  }
2416 
2417  }
2418  }
2419 
2420  if (algWithConditionNotInMap) {
2421  // it should never be happen, all conditions are in the maps
2422 
2423  m_excludedAlgoList.push_back(algBitNumber);
2424 
2425  LogTrace("L1GtHwValidation")
2426  << "\n Error: one or more conditions from algorithm "
2427  << algName << " (bit number " << algBitNumber << ") "
2428  << " not found in condition map!"
2429  << "\n Add it to list of algorithms excluded from comparison"
2430  << "\n data versus emulator." << std::endl;
2431  }
2432 
2433  if (algWithExcludedCondition) {
2434 
2435  m_excludedAlgoList.push_back(algBitNumber);
2436 
2437  LogTrace("L1GtHwValidation") << "\n Algorithm " << algName
2438  << " (bit number " << algBitNumber
2439  << ") contains an excluded condition."
2440  << "\n Add it to list of algorithms excluded from comparison"
2441  << "\n data versus emulator." << std::endl;
2442 
2443  }
2444 
2445  // add algorithm triggers from ExcludeAlgoTrigByName
2446  for (std::vector<std::string>::const_iterator
2447  itExcl = m_excludeAlgoTrigByName.begin();
2448  itExcl!= m_excludeAlgoTrigByName.end(); ++itExcl) {
2449 
2450  if ((*itExcl) == algName) {
2451 
2452  m_excludedAlgoList.push_back(algBitNumber);
2453 
2454  LogTrace("L1GtHwValidation") << "\n Algorithm " << algName
2455  << " (bit number " << algBitNumber
2456  << ")\n added to list of algorithms excluded from comparison"
2457  << " \n data versus emulator by ExcludeAlgoTrigByName." << std::endl;
2458  }
2459 
2460  }
2461 
2462 
2463  // add algorithm triggers from ExcludeAlgoTrigByBit
2464  for (std::vector<int>::const_iterator
2465  itExcl = m_excludeAlgoTrigByBit.begin();
2466  itExcl!= m_excludeAlgoTrigByBit.end(); ++itExcl) {
2467 
2468  if ((*itExcl) == algBitNumber) {
2469 
2470  m_excludedAlgoList.push_back(algBitNumber);
2471 
2472  LogTrace("L1GtHwValidation") << "\n Algorithm " << algName
2473  << " (bit number " << algBitNumber
2474  << ")\n added to list of algorithms excluded from comparison"
2475  << " \n data versus emulator by ExcludeAlgoTrigByBit." << std::endl;
2476  }
2477 
2478  }
2479 
2480  }
2481 
2482 }
bool matchCondCategory(const L1GtConditionCategory &, const L1GtConditionCategory &)
book all histograms for the module
std::map< std::string, L1GtCondition * > ConditionMap
map containing the conditions
std::map< std::string, L1GtAlgorithm > AlgorithmMap
map containing the algorithms
ConditionMap::const_iterator CItCond
iterators through map containing the conditions
std::vector< L1GtConditionType > m_excludedCondType
excluded condition types
std::string l1GtConditionCategoryEnumToString(const L1GtConditionCategory &)
L1GtConditionType
const std::vector< ConditionMap > & gtConditionMap() const
get / set / build the condition maps
std::string l1GtObjectEnumToString(const L1GtObject &)
Definition: L1GtObject.cc:74
bool matchCondL1GtObject(const std::vector< L1GtObject > &, const L1GtObject &)
std::vector< int > m_excludeAlgoTrigByBit
exclude algorithm triggers from comparison data - emulator by algorithm bit number ...
AlgorithmMap::const_iterator CItAlgo
iterators through map containing the algorithms
std::vector< L1GtObject > m_excludedL1GtObject
excluded L1 GT objects
std::vector< std::string > m_excludeAlgoTrigByName
exclude algorithm triggers from comparison data - emulator by algorithm name
L1GtConditionCategory
condition categories
bool matchCondType(const L1GtConditionType &, const L1GtConditionType &)
#define LogTrace(id)
const L1GtTriggerMenu * m_l1GtMenu
trigger menu
std::string l1GtConditionTypeEnumToString(const L1GtConditionType &)
std::vector< L1GtConditionCategory > m_excludedCondCategory
excluded condition categories
const AlgorithmMap & gtAlgorithmMap() const
get / set the algorithm map (by name)
std::vector< int > m_excludedAlgoList
bool L1GtHwValidation::matchCondCategory ( const L1GtConditionCategory conditionCategory,
const L1GtConditionCategory excludedCategory 
)
private

book all histograms for the module

return true if an algorithm has a condition of that category for CondNull, it returns always true

Definition at line 2266 of file L1GtHwValidation.cc.

References CondNull.

Referenced by excludedAlgoList().

2268  {
2269 
2270  bool matchValue = false;
2271 
2272  if (excludedCategory == CondNull) {
2273  matchValue = true;
2274  } else {
2275  if (conditionCategory == excludedCategory) {
2276  matchValue = true;
2277  }
2278  }
2279 
2280  return matchValue;
2281 }
bool L1GtHwValidation::matchCondL1GtObject ( const std::vector< L1GtObject > &  condObjects,
const L1GtObject excludedObject 
)
private

return true if an algorithm has a condition containing that object for ObjNull, it returns always true

Definition at line 2301 of file L1GtHwValidation.cc.

References ObjNull.

Referenced by excludedAlgoList().

2303  {
2304 
2305  bool matchValue = false;
2306 
2307  if (excludedObject == ObjNull) {
2308 
2309  matchValue = true;
2310 
2311  } else {
2312 
2313  for (std::vector<L1GtObject>::const_iterator itCondObj =
2314  condObjects.begin(); itCondObj != condObjects.end(); ++itCondObj) {
2315 
2316  if ((*itCondObj) == excludedObject) {
2317 
2318  matchValue = true;
2319 
2320  }
2321  }
2322  }
2323 
2324  return matchValue;
2325 
2326 }
bool L1GtHwValidation::matchCondType ( const L1GtConditionType conditionType,
const L1GtConditionType excludedType 
)
private

return true if an algorithm has a condition of that type for TypeNull, it returns always true

Definition at line 2284 of file L1GtHwValidation.cc.

References TypeNull.

Referenced by excludedAlgoList().

2285  {
2286 
2287  bool matchValue = false;
2288 
2289  if (excludedType == TypeNull) {
2290  matchValue = true;
2291  } else {
2292  if (conditionType == excludedType) {
2293  matchValue = true;
2294  }
2295  }
2296 
2297  return matchValue;
2298 }

Member Data Documentation

bool L1GtHwValidation::m_agree
private

internal members

Definition at line 200 of file L1GtHwValidation.h.

Referenced by compareDaqRecord(), and compareFDL().

bool L1GtHwValidation::m_dataOnly
private

Definition at line 201 of file L1GtHwValidation.h.

Referenced by compareDaqRecord(), and compareFDL().

bool L1GtHwValidation::m_dataOnlyMask
private

Definition at line 203 of file L1GtHwValidation.h.

Referenced by compareDaqRecord(), and compareFDL().

std::string L1GtHwValidation::m_dirName
private

directory name for L1Extra plots

Definition at line 138 of file L1GtHwValidation.h.

Referenced by bookHistograms().

bool L1GtHwValidation::m_emulOnly
private

Definition at line 202 of file L1GtHwValidation.h.

Referenced by compareDaqRecord(), and compareFDL().

bool L1GtHwValidation::m_emulOnlyMask
private

Definition at line 204 of file L1GtHwValidation.h.

Referenced by compareDaqRecord(), and compareFDL().

std::vector<int> L1GtHwValidation::m_excludeAlgoTrigByBit
private

exclude algorithm triggers from comparison data - emulator by algorithm bit number

Definition at line 148 of file L1GtHwValidation.h.

Referenced by excludedAlgoList().

std::vector<std::string> L1GtHwValidation::m_excludeAlgoTrigByName
private

exclude algorithm triggers from comparison data - emulator by algorithm name

Definition at line 145 of file L1GtHwValidation.h.

Referenced by excludedAlgoList().

std::vector<edm::ParameterSet> L1GtHwValidation::m_excludeCondCategTypeObject
private

exclude algorithm triggers from comparison data - emulator by condition category and / or type

Definition at line 142 of file L1GtHwValidation.h.

Referenced by L1GtHwValidation().

std::vector<int> L1GtHwValidation::m_excludedAlgoList
private

Definition at line 280 of file L1GtHwValidation.h.

Referenced by bookHistograms(), excludedAlgo(), and excludedAlgoList().

MonitorElement* L1GtHwValidation::m_excludedAlgorithmsAgreement
private

Definition at line 265 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

std::vector<L1GtConditionCategory> L1GtHwValidation::m_excludedCondCategory
private

excluded condition categories

Definition at line 154 of file L1GtHwValidation.h.

Referenced by excludedAlgoList(), and L1GtHwValidation().

std::vector<L1GtConditionType> L1GtHwValidation::m_excludedCondType
private

excluded condition types

Definition at line 157 of file L1GtHwValidation.h.

Referenced by excludedAlgoList(), and L1GtHwValidation().

std::vector<L1GtObject> L1GtHwValidation::m_excludedL1GtObject
private

excluded L1 GT objects

Definition at line 160 of file L1GtHwValidation.h.

Referenced by excludedAlgoList(), and L1GtHwValidation().

MonitorElement* L1GtHwValidation::m_fdlDataAlgoDecision[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 219 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataAlgoDecision_Err[NumberOfGtRecords]
private

Definition at line 229 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataAlgoDecision_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 223 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataAlgoDecisionMask[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 222 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataAlgoDecisionMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 226 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataAlgoDecisionPrescaled[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 220 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataAlgoDecisionPrescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 224 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataAlgoDecisionPrescaledMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 227 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataAlgoDecisionUnprescaled[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 221 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataAlgoDecisionUnprescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 225 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataAlgoDecisionUnprescaledMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 228 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataEmul[TotalBxInEvent][NumberOfGtRecords]
private

FDL (0 for DAQ, 1 for EVM record)

Definition at line 217 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataEmul_Err[NumberOfGtRecords]
private

Definition at line 250 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataEmulAlgoDecision[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 244 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataEmulAlgoDecision_Err[NumberOfGtRecords]
private

Definition at line 249 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataEmulAlgoDecisionMask[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 248 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataEmulAlgoDecisionPrescaled[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 245 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataEmulAlgoDecisionUnprescaled[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 246 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataEmulAlgoDecisionUnprescaledAllowed[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 247 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataEmulTechDecision[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 261 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataEmulTechDecision_Err[NumberOfGtRecords]
private

Definition at line 263 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataEmulTechDecisionMask[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 262 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataTechDecision[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 253 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataTechDecision_Err[NumberOfGtRecords]
private

Definition at line 255 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlDataTechDecisionMask[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 254 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlEmulAlgoDecision[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 231 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlEmulAlgoDecision_Err[NumberOfGtRecords]
private

Definition at line 241 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlEmulAlgoDecision_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 235 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlEmulAlgoDecisionMask[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 234 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlEmulAlgoDecisionMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 238 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlEmulAlgoDecisionPrescaled[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 232 of file L1GtHwValidation.h.

Referenced by bookHistograms().

MonitorElement* L1GtHwValidation::m_fdlEmulAlgoDecisionPrescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 236 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlEmulAlgoDecisionPrescaledMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 239 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlEmulAlgoDecisionUnprescaled[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 233 of file L1GtHwValidation.h.

Referenced by bookHistograms().

MonitorElement* L1GtHwValidation::m_fdlEmulAlgoDecisionUnprescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 237 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlEmulAlgoDecisionUnprescaledMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 240 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlEmulTechDecision[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 257 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlEmulTechDecision_Err[NumberOfGtRecords]
private

Definition at line 259 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_fdlEmulTechDecisionMask[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 258 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

MonitorElement* L1GtHwValidation::m_gtErrorFlag
private

PSB.

ErrorFlag a la HardwareValidation

Definition at line 272 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareDaqRecord().

MonitorElement* L1GtHwValidation::m_gtfeDataEmul[NumberOfGtRecords]
private

histograms

GTFE

Definition at line 214 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareGTFE().

edm::InputTag L1GtHwValidation::m_l1GctDataInputTag
private

input tag for the L1 GCT hardware record

Definition at line 135 of file L1GtHwValidation.h.

Referenced by L1GtHwValidation().

edm::InputTag L1GtHwValidation::m_l1GtDataDaqInputTag
private

input tag for the L1 GT hardware DAQ record

Definition at line 123 of file L1GtHwValidation.h.

Referenced by L1GtHwValidation().

edm::EDGetTokenT<L1GlobalTriggerReadoutRecord> L1GtHwValidation::m_l1GtDataDaqInputToken_
private

Definition at line 283 of file L1GtHwValidation.h.

Referenced by compareDaqRecord(), and L1GtHwValidation().

edm::InputTag L1GtHwValidation::m_l1GtDataEvmInputTag
private

input tag for the L1 GT hardware EVM record

Definition at line 126 of file L1GtHwValidation.h.

Referenced by L1GtHwValidation().

edm::EDGetTokenT<L1GlobalTriggerEvmReadoutRecord> L1GtHwValidation::m_l1GtDataEvmInputToken_
private

Definition at line 285 of file L1GtHwValidation.h.

Referenced by compareEvmRecord(), and L1GtHwValidation().

edm::InputTag L1GtHwValidation::m_l1GtEmulDaqInputTag
private

input tag for the L1 GT emulator DAQ record

Definition at line 129 of file L1GtHwValidation.h.

Referenced by L1GtHwValidation().

edm::EDGetTokenT<L1GlobalTriggerReadoutRecord> L1GtHwValidation::m_l1GtEmulDaqInputToken_
private

Definition at line 284 of file L1GtHwValidation.h.

Referenced by compareDaqRecord(), and L1GtHwValidation().

edm::InputTag L1GtHwValidation::m_l1GtEmulEvmInputTag
private

input tag for the L1 GT emulator EVM record

Definition at line 132 of file L1GtHwValidation.h.

Referenced by L1GtHwValidation().

edm::EDGetTokenT<L1GlobalTriggerEvmReadoutRecord> L1GtHwValidation::m_l1GtEmulEvmInputToken_
private

Definition at line 286 of file L1GtHwValidation.h.

Referenced by compareEvmRecord(), and L1GtHwValidation().

const L1GtTriggerMenu* L1GtHwValidation::m_l1GtMenu
private

trigger menu

Definition at line 173 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and excludedAlgoList().

unsigned long long L1GtHwValidation::m_l1GtMenuCacheID
private

Definition at line 174 of file L1GtHwValidation.h.

Referenced by bookHistograms().

const L1GtPrescaleFactors* L1GtHwValidation::m_l1GtPfAlgo
private

prescale factors

Definition at line 177 of file L1GtHwValidation.h.

Referenced by bookHistograms().

unsigned long long L1GtHwValidation::m_l1GtPfAlgoCacheID
private

Definition at line 178 of file L1GtHwValidation.h.

Referenced by bookHistograms().

const L1GtPrescaleFactors* L1GtHwValidation::m_l1GtPfTech
private

Definition at line 180 of file L1GtHwValidation.h.

Referenced by bookHistograms().

unsigned long long L1GtHwValidation::m_l1GtPfTechCacheID
private

Definition at line 181 of file L1GtHwValidation.h.

Referenced by bookHistograms().

const L1GtTriggerMask* L1GtHwValidation::m_l1GtTmAlgo
private

trigger masks

Definition at line 187 of file L1GtHwValidation.h.

Referenced by bookHistograms().

unsigned long long L1GtHwValidation::m_l1GtTmAlgoCacheID
private

Definition at line 188 of file L1GtHwValidation.h.

Referenced by bookHistograms().

const L1GtTriggerMask* L1GtHwValidation::m_l1GtTmTech
private

Definition at line 190 of file L1GtHwValidation.h.

Referenced by bookHistograms().

unsigned long long L1GtHwValidation::m_l1GtTmTechCacheID
private

Definition at line 191 of file L1GtHwValidation.h.

Referenced by bookHistograms().

std::ostringstream L1GtHwValidation::m_myCoutStream
private

an output stream to print into it can then be directed to whatever log level is desired

Definition at line 164 of file L1GtHwValidation.h.

Referenced by compareDaqRecord(), compareEvmRecord(), compareFDL(), compareGTFE(), and comparePSB().

int L1GtHwValidation::m_nrDataEventError
private

counters

Definition at line 167 of file L1GtHwValidation.h.

Referenced by compareDaqRecord(), and compareEvmRecord().

int L1GtHwValidation::m_nrEmulEventError
private

Definition at line 168 of file L1GtHwValidation.h.

Referenced by compareDaqRecord(), and compareEvmRecord().

int L1GtHwValidation::m_nrEvJob
private

Definition at line 276 of file L1GtHwValidation.h.

Referenced by analyze().

int L1GtHwValidation::m_nrEvRun
private

Definition at line 277 of file L1GtHwValidation.h.

Referenced by analyze(), and bookHistograms().

const std::vector<std::vector<int> >* L1GtHwValidation::m_prescaleFactorsAlgoTrig
private

Definition at line 183 of file L1GtHwValidation.h.

Referenced by bookHistograms().

const std::vector<std::vector<int> >* L1GtHwValidation::m_prescaleFactorsTechTrig
private

Definition at line 184 of file L1GtHwValidation.h.

Referenced by bookHistograms().

std::vector<unsigned int> L1GtHwValidation::m_triggerMaskAlgoTrig
private

Definition at line 193 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

std::vector<unsigned int> L1GtHwValidation::m_triggerMaskTechTrig
private

Definition at line 194 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

const int L1GtHwValidation::NumberOfGtRecords = 2
staticprivate

Definition at line 209 of file L1GtHwValidation.h.

Referenced by bookHistograms().

const int L1GtHwValidation::TotalBxInEvent = 5
staticprivate

Definition at line 208 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().