CMS 3D CMS Logo

 All Classes Namespaces Files Functions Variables Typedefs Enumerations Enumerator Properties Friends Macros Pages
CSCTriggerPrimitivesBuilder.cc
Go to the documentation of this file.
1 //-----------------------------------------------------------------------------
2 //
3 // Class: CSCTriggerPrimitivesBuilder
4 //
5 // Description: Algorithm to build anode, cathode, and correlated LCTs
6 // in each endcap muon CSC chamber from wire and comparator
7 // digis.
8 //
9 // Author List: S. Valuev, UCLA.
10 //
11 //
12 // Modifications:
13 //
14 //-----------------------------------------------------------------------------
15 
23 
25 
31 
32 //------------------
33 // Static variables
34 //------------------
45 
46 //-------------
47 // Constructor
48 //-------------
50 {
51  // Receives ParameterSet percolated down from EDProducer.
52 
53  // special configuration parameters for ME11 treatment
54  edm::ParameterSet commonParams = conf.getParameter<edm::ParameterSet>("commonParam");
55  smartME1aME1b = commonParams.getParameter<bool>("smartME1aME1b");
56  disableME1a = commonParams.getParameter<bool>("disableME1a");
57  disableME42 = commonParams.getParameter<bool>("disableME42");
58 
59  checkBadChambers_ = conf.getParameter<bool>("checkBadChambers");
60 
61  runME11ILT_ = commonParams.existsAs<bool>("runME11ILT")?commonParams.getParameter<bool>("runME11ILT"):false;
62  runME21ILT_ = commonParams.existsAs<bool>("runME21ILT")?commonParams.getParameter<bool>("runME21ILT"):false;
63  runME3141ILT_ = commonParams.existsAs<bool>("runME3141ILT")?commonParams.getParameter<bool>("runME3141ILT"):false;
64 
65  // ORCA way of initializing boards.
66  for (int endc = min_endcap; endc <= max_endcap; endc++)
67  {
68  for (int stat = min_station; stat <= max_station; stat++)
69  {
70  int numsubs = ((stat == 1) ? max_subsector : 1);
71  for (int sect = min_sector; sect <= max_sector; sect++)
72  {
73  for (int subs = min_subsector; subs <= numsubs; subs++)
74  {
75  for (int cham = min_chamber; cham <= max_chamber; cham++)
76  {
77  if ((endc <= 0 || endc > MAX_ENDCAPS) ||
78  (stat <= 0 || stat > MAX_STATIONS) ||
79  (sect <= 0 || sect > MAX_SECTORS) ||
80  (subs <= 0 || subs > MAX_SUBSECTORS) ||
81  (cham <= 0 || stat > MAX_CHAMBERS))
82  {
83  edm::LogError("L1CSCTPEmulatorSetupError")
84  << "+++ trying to instantiate TMB of illegal CSC id ["
85  << " endcap = " << endc << " station = " << stat
86  << " sector = " << sect << " subsector = " << subs
87  << " chamber = " << cham << "]; skipping it... +++\n";
88  continue;
89  }
91  // When the motherboard is instantiated, it instantiates ALCT
92  // and CLCT processors.
93  if (stat==1 && ring==1 && smartME1aME1b && !runME11ILT_)
94  tmb_[endc-1][stat-1][sect-1][subs-1][cham-1].reset( new CSCMotherboardME11(endc, stat, sect, subs, cham, conf) );
95  else if (stat==1 && ring==1 && smartME1aME1b && runME11ILT_)
96  tmb_[endc-1][stat-1][sect-1][subs-1][cham-1].reset( new CSCMotherboardME11GEM(endc, stat, sect, subs, cham, conf) );
97  else if (stat==2 && ring==1 && runME21ILT_)
98  tmb_[endc-1][stat-1][sect-1][subs-1][cham-1].reset( new CSCMotherboardME21GEM(endc, stat, sect, subs, cham, conf) );
99  else if ((stat==3 || stat==4) && ring==1 && runME3141ILT_)
100  tmb_[endc-1][stat-1][sect-1][subs-1][cham-1].reset( new CSCMotherboardME3141RPC(endc, stat, sect, subs, cham, conf) );
101  else
102  tmb_[endc-1][stat-1][sect-1][subs-1][cham-1].reset( new CSCMotherboard(endc, stat, sect, subs, cham, conf) );
103  }
104  }
105  }
106  }
107  }
108 
109  // Get min and max BX to sort LCTs in MPC.
110  m_minBX = conf.getParameter<int>("MinBX");
111  m_maxBX = conf.getParameter<int>("MaxBX");
112 
113  // Init MPC
114  m_muonportcard.reset( new CSCMuonPortCard(conf) );
115 }
116 
117 //------------
118 // Destructor
119 //------------
121 {
122 }
123 
124 //------------
125 // Operations
126 //------------
127 // Set configuration parameters obtained via EventSetup mechanism.
129 {
130  // Receives CSCDBL1TPParameters percolated down from ESProducer.
131 
132  for (int endc = min_endcap; endc <= max_endcap; endc++)
133  {
134  for (int stat = min_station; stat <= max_station; stat++)
135  {
136  int numsubs = ((stat == 1) ? max_subsector : 1);
137  for (int sect = min_sector; sect <= max_sector; sect++)
138  {
139  for (int subs = min_subsector; subs <= numsubs; subs++)
140  {
141  for (int cham = min_chamber; cham <= max_chamber; cham++)
142  {
143  tmb_[endc-1][stat-1][sect-1][subs-1][cham-1]->setConfigParameters(conf);
144  }
145  }
146  }
147  }
148  }
149 }
150 
151 // Build anode, cathode, and correlated LCTs in each chamber and fill them
152 // into output collections. Pass collections of wire and comparator digis
153 // to Trigger MotherBoard (TMB) processors, which, in turn, pass them to
154 // ALCT and CLCT processors. Up to 2 anode and 2 cathode LCTs can be found
155 // in each chamber during any bunch crossing. The 2 projections are then
156 // combined into three-dimensional "correlated" LCTs in the TMB. Finally,
157 // MPC processor sorts up to 18 LCTs from 9 TMBs and writes collections of
158 // up to 3 best LCTs per (sub)sector into Event (to be used by the Sector
159 // Receiver).
161  const CSCWireDigiCollection* wiredc,
162  const CSCComparatorDigiCollection* compdc,
163  const GEMPadDigiCollection* gemPads,
164  const RPCDigiCollection* rpcDigis,
165  CSCALCTDigiCollection& oc_alct,
166  CSCCLCTDigiCollection& oc_clct,
167  CSCCLCTPreTriggerCollection & oc_pretrig,
169  CSCCorrelatedLCTDigiCollection& oc_sorted_lct,
170  GEMCoPadDigiCollection& oc_gemcopad,
171  GEMCSCLCTDigiCollection& oc_gemcsclct)
172 {
173  // CSC geometry.
175 
176  for (int endc = min_endcap; endc <= max_endcap; endc++)
177  {
178  for (int stat = min_station; stat <= max_station; stat++)
179  {
180  int numsubs = ((stat == 1) ? max_subsector : 1);
181  for (int sect = min_sector; sect <= max_sector; sect++)
182  {
183  for (int subs = min_subsector; subs <= numsubs; subs++)
184  {
185  for (int cham = min_chamber; cham <= max_chamber; cham++)
186  {
187 
189 
190  if (disableME42 && stat==4 && ring==2) continue;
191 
192  CSCMotherboard* tmb = tmb_[endc-1][stat-1][sect-1][subs-1][cham-1].get();
193 
194  // Run processors only if chamber exists in geometry.
195  if (tmb == 0 || theGeom->chamber(endc, stat, sect, subs, cham) == 0) continue;
196 
197  int chid = CSCTriggerNumbering::chamberFromTriggerLabels(sect, subs, stat, cham);
198 
199  // 0th layer means whole chamber.
200  CSCDetId detid(endc, stat, ring, chid, 0);
201 
202  // Skip chambers marked as bad (usually includes most of ME4/2 chambers;
203  // also, there's no ME1/a-1/b separation, it's whole ME1/1)
204  if (checkBadChambers_ && badChambers->isInBadChamber(detid)) continue;
205 
206 
207  // running upgraded ME1/1 TMBs
208  if (stat==1 && ring==1 && smartME1aME1b && !runME11ILT_)
209  {
210  CSCMotherboardME11* tmb11 = static_cast<CSCMotherboardME11*>(tmb);
211 
212  //LogTrace("CSCTriggerPrimitivesBuilder")<<"CSCTriggerPrimitivesBuilder::build in E:"<<endc<<" S:"<<stat<<" R:"<<ring;
213 
214  tmb11->run(wiredc,compdc);
215  std::vector<CSCCorrelatedLCTDigi> lctV = tmb11->readoutLCTs1b();
216  std::vector<CSCCorrelatedLCTDigi> lctV1a = tmb11->readoutLCTs1a();
217 
218  std::vector<CSCALCTDigi> alctV1a, alctV = tmb11->alct->readoutALCTs();
219 
220  std::vector<CSCCLCTDigi> clctV = tmb11->clct->readoutCLCTs();
221  std::vector<int> preTriggerBXs = tmb11->clct->preTriggerBXs();
222  std::vector<CSCCLCTDigi> clctV1a = tmb11->clct1a->readoutCLCTs();
223  std::vector<int> preTriggerBXs1a = tmb11->clct1a->preTriggerBXs();
224 
225  // perform simple separation of ALCTs into 1/a and 1/b
226  // for 'smart' case. Some duplication occurs for WG [10,15]
227  std::vector<CSCALCTDigi> tmpV(alctV);
228  alctV.clear();
229  for (unsigned int al=0; al < tmpV.size(); al++)
230  {
231  if (tmpV[al].getKeyWG()<=15) alctV1a.push_back(tmpV[al]);
232  if (tmpV[al].getKeyWG()>=10) alctV.push_back(tmpV[al]);
233  }
234  //LogTrace("CSCTriggerPrimitivesBuilder")<<"CSCTriggerPrimitivesBuilder:: a="<<alctV.size()<<" c="<<clctV.size()<<" l="<<lctV.size()
235  // <<" 1a: a="<<alctV1a.size()<<" c="<<clctV1a.size()<<" l="<<lctV1a.size();
236 
237  // ME1/b
238 
239  if (!(lctV.empty()&&alctV.empty()&&clctV.empty())) {
240  LogTrace("L1CSCTrigger")
241  << "CSCTriggerPrimitivesBuilder results in " <<detid;
242  }
243 
244  // Correlated LCTs.
245  if (!lctV.empty()) {
246  LogTrace("L1CSCTrigger")
247  << "Put " << lctV.size() << " ME1b LCT digi"
248  << ((lctV.size() > 1) ? "s " : " ") << "in collection\n";
249  oc_lct.put(std::make_pair(lctV.begin(),lctV.end()), detid);
250  }
251 
252  // Anode LCTs.
253  if (!alctV.empty()) {
254  LogTrace("L1CSCTrigger")
255  << "Put " << alctV.size() << " ME1b ALCT digi"
256  << ((alctV.size() > 1) ? "s " : " ") << "in collection\n";
257  oc_alct.put(std::make_pair(alctV.begin(),alctV.end()), detid);
258  }
259 
260  // Cathode LCTs.
261  if (!clctV.empty()) {
262  LogTrace("L1CSCTrigger")
263  << "Put " << clctV.size() << " ME1b CLCT digi"
264  << ((clctV.size() > 1) ? "s " : " ") << "in collection\n";
265  oc_clct.put(std::make_pair(clctV.begin(),clctV.end()), detid);
266  }
267 
268  // Cathode LCTs pretriggers
269  if (!preTriggerBXs.empty()) {
270  LogTrace("L1CSCTrigger")
271  << "Put " << preTriggerBXs.size() << " CLCT pretrigger"
272  << ((preTriggerBXs.size() > 1) ? "s " : " ") << "in collection\n";
273  oc_pretrig.put(std::make_pair(preTriggerBXs.begin(),preTriggerBXs.end()), detid);
274  }
275 
276  // ME1/a
277 
278  if (disableME1a) continue;
279 
280  CSCDetId detid1a(endc, stat, 4, chid, 0);
281 
282  if (!(lctV1a.empty()&&alctV1a.empty()&&clctV1a.empty())){
283  LogTrace("L1CSCTrigger") << "CSCTriggerPrimitivesBuilder results in " <<detid1a;
284  }
285 
286  // Correlated LCTs.
287  if (!lctV1a.empty()) {
288  LogTrace("L1CSCTrigger")
289  << "Put " << lctV1a.size() << " ME1a LCT digi"
290  << ((lctV1a.size() > 1) ? "s " : " ") << "in collection\n";
291  oc_lct.put(std::make_pair(lctV1a.begin(),lctV1a.end()), detid1a);
292  }
293 
294  // Anode LCTs.
295  if (!alctV1a.empty()) {
296  LogTrace("L1CSCTrigger")
297  << "Put " << alctV1a.size() << " ME1a ALCT digi"
298  << ((alctV1a.size() > 1) ? "s " : " ") << "in collection\n";
299  oc_alct.put(std::make_pair(alctV1a.begin(),alctV1a.end()), detid1a);
300  }
301 
302  // Cathode LCTs.
303  if (!clctV1a.empty()) {
304  LogTrace("L1CSCTrigger")
305  << "Put " << clctV1a.size() << " ME1a CLCT digi"
306  << ((clctV1a.size() > 1) ? "s " : " ") << "in collection\n";
307  oc_clct.put(std::make_pair(clctV1a.begin(),clctV1a.end()), detid1a);
308  }
309 
310  // Cathode LCTs pretriggers
311  if (!preTriggerBXs1a.empty()) {
312  LogTrace("L1CSCTrigger")
313  << "Put " << preTriggerBXs1a.size() << " CLCT pretrigger"
314  << ((preTriggerBXs1a.size() > 1) ? "s " : " ") << "in collection\n";
315  oc_pretrig.put(std::make_pair(preTriggerBXs1a.begin(),preTriggerBXs1a.end()), detid1a);
316  }
317  } // upgraded TMB
318 
319  // running upgraded ME1/1 TMBs with GEMs
320  else if (stat==1 && ring==1 && smartME1aME1b && runME11ILT_)
321  {
322  CSCMotherboardME11GEM* tmb11GEM = static_cast<CSCMotherboardME11GEM*>(tmb);
323 
324  tmb11GEM->setCSCGeometry(csc_g);
325  tmb11GEM->setGEMGeometry(gem_g);
326  //LogTrace("CSCTriggerPrimitivesBuilder")<<"CSCTriggerPrimitivesBuilder::build in E:"<<endc<<" S:"<<stat<<" R:"<<ring;
327  tmb11GEM->run(wiredc, compdc, gemPads);
328 
329  std::vector<CSCCorrelatedLCTDigi> lctV = tmb11GEM->readoutLCTs1b();
330  std::vector<CSCCorrelatedLCTDigi> lctV1a = tmb11GEM->readoutLCTs1a();
331 
332  std::vector<CSCALCTDigi> alctV1a, alctV = tmb11GEM->alct->readoutALCTs();
333 
334  std::vector<CSCCLCTDigi> clctV = tmb11GEM->clct->readoutCLCTs();
335  std::vector<int> preTriggerBXs = tmb11GEM->clct->preTriggerBXs();
336  std::vector<CSCCLCTDigi> clctV1a = tmb11GEM->clct1a->readoutCLCTs();
337  std::vector<int> preTriggerBXs1a = tmb11GEM->clct1a->preTriggerBXs();
338 
339  std::vector<GEMCoPadDigi> copads = tmb11GEM->readoutCoPads();
340 
341  // perform simple separation of ALCTs into 1/a and 1/b
342  // for 'smart' case. Some duplication occurs for WG [10,15]
343  std::vector<CSCALCTDigi> tmpV(alctV);
344  alctV.clear();
345  for (unsigned int al=0; al < tmpV.size(); al++)
346  {
347  if (tmpV[al].getKeyWG()<=15) alctV1a.push_back(tmpV[al]);
348  if (tmpV[al].getKeyWG()>=10) alctV.push_back(tmpV[al]);
349  }
350  //LogTrace("CSCTriggerPrimitivesBuilder")<<"CSCTriggerPrimitivesBuilder:: a="<<alctV.size()<<" c="<<clctV.size()<<" l="<<lctV.size()
351  // <<" 1a: a="<<alctV1a.size()<<" c="<<clctV1a.size()<<" l="<<lctV1a.size();
352 
353  // ME1/b
354 
355  if (!(lctV.empty()&&alctV.empty()&&clctV.empty())) {
356  LogTrace("L1CSCTrigger")
357  << "CSCTriggerPrimitivesBuilder results in " <<detid;
358  }
359 
360  // Correlated LCTs.
361  if (!lctV.empty()) {
362  LogTrace("L1CSCTrigger")
363  << "Put " << lctV.size() << " ME1b LCT digi"
364  << ((lctV.size() > 1) ? "s " : " ") << "in collection\n";
365  oc_lct.put(std::make_pair(lctV.begin(),lctV.end()), detid);
366  }
367 
368  // Anode LCTs.
369  if (!alctV.empty()) {
370  LogTrace("L1CSCTrigger")
371  << "Put " << alctV.size() << " ME1b ALCT digi"
372  << ((alctV.size() > 1) ? "s " : " ") << "in collection\n";
373  oc_alct.put(std::make_pair(alctV.begin(),alctV.end()), detid);
374  }
375 
376  // Cathode LCTs.
377  if (!clctV.empty()) {
378  LogTrace("L1CSCTrigger")
379  << "Put " << clctV.size() << " ME1b CLCT digi"
380  << ((clctV.size() > 1) ? "s " : " ") << "in collection\n";
381  oc_clct.put(std::make_pair(clctV.begin(),clctV.end()), detid);
382  }
383 
384  // Cathode LCTs pretriggers
385  if (!preTriggerBXs.empty()) {
386  LogTrace("L1CSCTrigger")
387  << "Put " << preTriggerBXs.size() << " CLCT pretrigger"
388  << ((preTriggerBXs.size() > 1) ? "s " : " ") << "in collection\n";
389  oc_pretrig.put(std::make_pair(preTriggerBXs.begin(),preTriggerBXs.end()), detid);
390  }
391  // 0th layer means whole chamber.
392  GEMDetId gemId(detid.zendcap(), 1, 1, 1, chid, 0);
393 
394  // GEM coincidence pads
395  if (!copads.empty()) {
396  LogTrace("L1CSCTrigger")
397  << "Put " << copads.size() << " GEM coincidence pad"
398  << ((copads.size() > 1) ? "s " : " ") << "in collection\n";
399  oc_gemcopad.put(std::make_pair(copads.begin(),copads.end()), gemId);
400  }
401 
402  // ME1/a
403 
404  if (disableME1a) continue;
405 
406  CSCDetId detid1a(endc, stat, 4, chid, 0);
407 
408  if (!(lctV1a.empty()&&alctV1a.empty()&&clctV1a.empty())){
409  LogTrace("L1CSCTrigger") << "CSCTriggerPrimitivesBuilder results in " <<detid1a;
410  }
411 
412  // Correlated LCTs.
413  if (!lctV1a.empty()) {
414  LogTrace("L1CSCTrigger")
415  << "Put " << lctV1a.size() << " ME1a LCT digi"
416  << ((lctV1a.size() > 1) ? "s " : " ") << "in collection\n";
417  oc_lct.put(std::make_pair(lctV1a.begin(),lctV1a.end()), detid1a);
418  }
419 
420  // Anode LCTs.
421  if (!alctV1a.empty()) {
422  LogTrace("L1CSCTrigger")
423  << "Put " << alctV1a.size() << " ME1a ALCT digi"
424  << ((alctV1a.size() > 1) ? "s " : " ") << "in collection\n";
425  oc_alct.put(std::make_pair(alctV1a.begin(),alctV1a.end()), detid1a);
426  }
427 
428  // Cathode LCTs.
429  if (!clctV1a.empty()) {
430  LogTrace("L1CSCTrigger")
431  << "Put " << clctV1a.size() << " ME1a CLCT digi"
432  << ((clctV1a.size() > 1) ? "s " : " ") << "in collection\n";
433  oc_clct.put(std::make_pair(clctV1a.begin(),clctV1a.end()), detid1a);
434  }
435 
436  // Cathode LCTs pretriggers
437  if (!preTriggerBXs1a.empty()) {
438  LogTrace("L1CSCTrigger")
439  << "Put " << preTriggerBXs.size() << " CLCT pretrigger"
440  << ((preTriggerBXs.size() > 1) ? "s " : " ") << "in collection\n";
441  oc_pretrig.put(std::make_pair(preTriggerBXs.begin(),preTriggerBXs.end()), detid);
442  }
443  }
444 
445  // running upgraded ME2/1 TMBs
446  else if (stat==2 && ring==1 && runME21ILT_)
447  {
448  CSCMotherboardME21GEM* tmb21GEM = static_cast<CSCMotherboardME21GEM*>(tmb);
449  tmb21GEM->setCSCGeometry(csc_g);
450  tmb21GEM->setGEMGeometry(gem_g);
451  tmb21GEM->run(wiredc, compdc, gemPads);
452  std::vector<CSCCorrelatedLCTDigi> lctV = tmb21GEM->readoutLCTs();
453  std::vector<CSCALCTDigi> alctV = tmb21GEM->alct->readoutALCTs();
454  std::vector<CSCCLCTDigi> clctV = tmb21GEM->clct->readoutCLCTs();
455  std::vector<int> preTriggerBXs = tmb21GEM->clct->preTriggerBXs();
456 
457  std::vector<GEMCoPadDigi> copads = tmb21GEM->readoutCoPads();
458 
459  if (!(alctV.empty() && clctV.empty() && lctV.empty())) {
460  LogTrace("L1CSCTrigger")
461  << "CSCTriggerPrimitivesBuilder got results in " <<detid;
462  }
463 
464  // Correlated LCTs.
465  if (!lctV.empty()) {
466  LogTrace("L1CSCTrigger")
467  << "Put " << lctV.size() << " LCT digi"
468  << ((lctV.size() > 1) ? "s " : " ") << "in collection\n";
469  oc_lct.put(std::make_pair(lctV.begin(),lctV.end()), detid);
470  }
471 
472  // Anode LCTs.
473  if (!alctV.empty()) {
474  LogTrace("L1CSCTrigger")
475  << "Put " << alctV.size() << " ALCT digi"
476  << ((alctV.size() > 1) ? "s " : " ") << "in collection\n";
477  oc_alct.put(std::make_pair(alctV.begin(),alctV.end()), detid);
478  }
479 
480  // Cathode LCTs.
481  if (!clctV.empty()) {
482  LogTrace("L1CSCTrigger")
483  << "Put " << clctV.size() << " CLCT digi"
484  << ((clctV.size() > 1) ? "s " : " ") << "in collection\n";
485  oc_clct.put(std::make_pair(clctV.begin(),clctV.end()), detid);
486  }
487 
488  // Cathode LCTs pretriggers
489  if (!preTriggerBXs.empty()) {
490  LogTrace("L1CSCTrigger")
491  << "Put " << preTriggerBXs.size() << " CLCT pretrigger"
492  << ((preTriggerBXs.size() > 1) ? "s " : " ") << "in collection\n";
493  oc_pretrig.put(std::make_pair(preTriggerBXs.begin(),preTriggerBXs.end()), detid);
494  }
495 
496  // 0th layer means whole chamber.
497  GEMDetId gemId(detid.zendcap(), 1, 2, 1, chid, 0);
498 
499  // GEM coincidence pads
500  if (!copads.empty()) {
501  LogTrace("L1CSCTrigger")
502  << "Put " << copads.size() << " GEM coincidence pad"
503  << ((copads.size() > 1) ? "s " : " ") << "in collection\n";
504  oc_gemcopad.put(std::make_pair(copads.begin(),copads.end()), gemId);
505  }
506  }
507  // running upgraded ME3/1-ME4/1 TMBs
508  else if ((stat==3 or stat==4) && ring==1 && runME3141ILT_)
509  {
510  CSCMotherboardME3141RPC* tmb3141RPC = static_cast<CSCMotherboardME3141RPC*>(tmb);
511  tmb3141RPC->setCSCGeometry(csc_g);
512  tmb3141RPC->setRPCGeometry(rpc_g);
513  tmb3141RPC->run(wiredc, compdc, rpcDigis);
514  std::vector<CSCCorrelatedLCTDigi> lctV = tmb3141RPC->readoutLCTs();
515  std::vector<CSCALCTDigi> alctV = tmb3141RPC->alct->readoutALCTs();
516  std::vector<CSCCLCTDigi> clctV = tmb3141RPC->clct->readoutCLCTs();
517  std::vector<int> preTriggerBXs = tmb3141RPC->clct->preTriggerBXs();
518 
519  if (!(alctV.empty() && clctV.empty() && lctV.empty())) {
520  LogTrace("L1CSCTrigger")
521  << "CSCTriggerPrimitivesBuilder got results in " <<detid;
522  }
523 
524  // Correlated LCTs.
525  if (!lctV.empty()) {
526  LogTrace("L1CSCTrigger")
527  << "Put " << lctV.size() << " LCT digi"
528  << ((lctV.size() > 1) ? "s " : " ") << "in collection\n";
529  oc_lct.put(std::make_pair(lctV.begin(),lctV.end()), detid);
530  }
531  // Anode LCTs.
532  if (!alctV.empty()) {
533  LogTrace("L1CSCTrigger")
534  << "Put " << alctV.size() << " ALCT digi"
535  << ((alctV.size() > 1) ? "s " : " ") << "in collection\n";
536  oc_alct.put(std::make_pair(alctV.begin(),alctV.end()), detid);
537  }
538 
539  // Cathode LCTs.
540  if (!clctV.empty()) {
541  LogTrace("L1CSCTrigger")
542  << "Put " << clctV.size() << " CLCT digi"
543  << ((clctV.size() > 1) ? "s " : " ") << "in collection\n";
544  oc_clct.put(std::make_pair(clctV.begin(),clctV.end()), detid);
545  }
546 
547  // Cathode LCTs pretriggers
548  if (!preTriggerBXs.empty()) {
549  LogTrace("L1CSCTrigger")
550  << "Put " << preTriggerBXs.size() << " CLCT pretrigger"
551  << ((preTriggerBXs.size() > 1) ? "s " : " ") << "in collection\n";
552  oc_pretrig.put(std::make_pair(preTriggerBXs.begin(),preTriggerBXs.end()), detid);
553  }
554  }
555 
556  // running non-upgraded TMB
557  else
558  {
559  tmb->run(wiredc,compdc);
560 
561  std::vector<CSCCorrelatedLCTDigi> lctV = tmb->readoutLCTs();
562  std::vector<CSCALCTDigi> alctV = tmb->alct->readoutALCTs();
563  std::vector<CSCCLCTDigi> clctV = tmb->clct->readoutCLCTs();
564  std::vector<int> preTriggerBXs = tmb->clct->preTriggerBXs();
565 
566  if (!(alctV.empty() && clctV.empty() && lctV.empty())) {
567  LogTrace("L1CSCTrigger")
568  << "CSCTriggerPrimitivesBuilder got results in " <<detid;
569  }
570 
571  /*
572  // tmp kludge: tightening of ME1a LCTs
573  if (stat==1 && ring==1) {
574  std::vector<CSCCorrelatedLCTDigi> lctV11;
575  for (unsigned t=0;t<lctV.size();t++){
576  if (lctV[t].getStrip() < 127) lctV11.push_back(lctV[t]);
577  else if (lctV[t].getQuality() >= 14) lctV11.push_back(lctV[t]);
578  }
579  lctV = lctV11;
580  }
581  */
582 
583  // Correlated LCTs.
584  if (!lctV.empty()) {
585  LogTrace("L1CSCTrigger")
586  << "Put " << lctV.size() << " LCT digi"
587  << ((lctV.size() > 1) ? "s " : " ") << "in collection\n";
588  oc_lct.put(std::make_pair(lctV.begin(),lctV.end()), detid);
589  }
590 
591  // Anode LCTs.
592  if (!alctV.empty()) {
593  LogTrace("L1CSCTrigger")
594  << "Put " << alctV.size() << " ALCT digi"
595  << ((alctV.size() > 1) ? "s " : " ") << "in collection\n";
596  oc_alct.put(std::make_pair(alctV.begin(),alctV.end()), detid);
597  }
598 
599  // Cathode LCTs.
600  if (!clctV.empty()) {
601  LogTrace("L1CSCTrigger")
602  << "Put " << clctV.size() << " CLCT digi"
603  << ((clctV.size() > 1) ? "s " : " ") << "in collection\n";
604  oc_clct.put(std::make_pair(clctV.begin(),clctV.end()), detid);
605  }
606 
607  // Cathode LCTs pretriggers
608  if (!preTriggerBXs.empty()) {
609  LogTrace("L1CSCTrigger")
610  << "Put " << preTriggerBXs.size() << " CLCT pretrigger"
611  << ((preTriggerBXs.size() > 1) ? "s " : " ") << "in collection\n";
612  oc_pretrig.put(std::make_pair(preTriggerBXs.begin(),preTriggerBXs.end()), detid);
613  }
614  } // non-upgraded TMB
615  }
616  }
617  }
618  }
619  }
620 
621  // run MPC simulation
622  m_muonportcard->loadDigis(oc_lct);
623 
624  std::vector<csctf::TrackStub> result;
625  for(int bx = m_minBX; bx <= m_maxBX; ++bx)
626  for(int e = min_endcap; e <= max_endcap; ++e)
627  for(int st = min_station; st <= max_station; ++st)
628  for(int se = min_sector; se <= max_sector; ++se)
629  {
630  if(st == 1)
631  {
632  std::vector<csctf::TrackStub> subs1, subs2;
633  subs1 = m_muonportcard->sort(e, st, se, 1, bx);
634  subs2 = m_muonportcard->sort(e, st, se, 2, bx);
635  result.insert(result.end(), subs1.begin(), subs1.end());
636  result.insert(result.end(), subs2.begin(), subs2.end());
637  }
638  else
639  {
640  std::vector<csctf::TrackStub> sector;
641  sector = m_muonportcard->sort(e, st, se, 0, bx);
642  result.insert(result.end(), sector.begin(), sector.end());
643  }
644  }
645 
646  std::vector<csctf::TrackStub>::const_iterator itr = result.begin();
647  for (; itr != result.end(); itr++)
648  {
649  oc_sorted_lct.insertDigi(CSCDetId(itr->getDetId().rawId()), *(itr->getDigi()));
650  LogDebug("L1CSCTrigger")
651  << "MPC " << *(itr->getDigi()) << " found in ME"
652  << ((itr->endcap() == 1) ? "+" : "-") << itr->station() << "/"
653  << CSCDetId(itr->getDetId().rawId()).ring() << "/"
654  << CSCDetId(itr->getDetId().rawId()).chamber()
655  << " (sector " << itr->sector()
656  << " trig id. " << itr->cscid() << ")" << "\n";
657  }
658 }
#define LogDebug(id)
std::vector< GEMCoPadDigi > readoutCoPads()
T getParameter(std::string const &) const
void run(const CSCWireDigiCollection *wiredc, const CSCComparatorDigiCollection *compdc)
std::unique_ptr< CSCMotherboard > tmb_[MAX_ENDCAPS][MAX_STATIONS][MAX_SECTORS][MAX_SUBSECTORS][MAX_CHAMBERS]
void setCSCGeometry(const CSCGeometry *g)
set CSC and RPC geometries for the matching needs
bool existsAs(std::string const &parameterName, bool trackiness=true) const
checks if a parameter exists as a given type
Definition: ParameterSet.h:186
CSCChamber * chamber(unsigned endcap, unsigned station, unsigned sector, unsigned subsector, unsigned tcscid) const
Return the CSCChamber for a corresponding endcap/station/sector/subsector/trigger cscid...
The Signals That Services Can Subscribe To This is based on ActivityRegistry and is current per Services can connect to the signals distributed by the ActivityRegistry in order to monitor the activity of the application Each possible callback has some defined which we here list in angle e< void, edm::EventIDconst &, edm::Timestampconst & > We also list in braces which AR_WATCH_USING_METHOD_ is used for those or
Definition: Activities.doc:12
std::vector< CSCCorrelatedLCTDigi > readoutLCTs1a()
std::vector< CSCCorrelatedLCTDigi > readoutLCTs()
static int minEndcapId()
Definition: CSCDetId.h:236
void setGEMGeometry(const GEMGeometry *g)
static int maxTriggerSectorId()
std::vector< CSCCorrelatedLCTDigi > readoutLCTs()
static int maxStationId()
Definition: CSCDetId.h:239
static int minTriggerSectorId()
static int ringFromTriggerLabels(int station, int triggerCSCID)
std::unique_ptr< CSCCathodeLCTProcessor > clct1a
tuple result
Definition: mps_fire.py:95
void setConfigParameters(const CSCDBL1TPParameters *conf)
bool isInBadChamber(IndexType ichamber) const
Is the chamber with index &#39;ichamber&#39; flagged as bad?
CSCTriggerPrimitivesBuilder(const edm::ParameterSet &)
static CSCTriggerGeomManager * get()
static int minStationId()
Definition: CSCDetId.h:238
void setCSCGeometry(const CSCGeometry *g)
set CSC and GEM geometries for the matching needs
void run(const std::vector< int > w_time[CSCConstants::NUM_LAYERS][CSCConstants::MAX_NUM_WIRES], const std::vector< int > hs_times[CSCConstants::NUM_LAYERS][CSCConstants::NUM_HALF_STRIPS_7CFEBS], const std::vector< int > ds_times[CSCConstants::NUM_LAYERS][CSCConstants::NUM_HALF_STRIPS_7CFEBS])
static int maxEndcapId()
Definition: CSCDetId.h:237
#define LogTrace(id)
short int zendcap() const
Definition: CSCDetId.h:100
void setCSCGeometry(const CSCGeometry *g)
set CSC and GEM geometries for the matching needs
void build(const CSCBadChambers *badChambers, const CSCWireDigiCollection *wiredc, const CSCComparatorDigiCollection *compdc, const GEMPadDigiCollection *gemPads, const RPCDigiCollection *rpcDigis, CSCALCTDigiCollection &oc_alct, CSCCLCTDigiCollection &oc_clct, CSCCLCTPreTriggerCollection &oc_pretrig, CSCCorrelatedLCTDigiCollection &oc_lct, CSCCorrelatedLCTDigiCollection &oc_sorted_lct, GEMCoPadDigiCollection &oc_gemcopad, GEMCSCLCTDigiCollection &oc_gemcsclct)
void run(const CSCWireDigiCollection *wiredc, const CSCComparatorDigiCollection *compdc, const GEMPadDigiCollection *gemPads)
static int minTriggerSubSectorId()
bool checkBadChambers_
a flag whether to skip chambers from the bad chambers map
std::vector< CSCCorrelatedLCTDigi > readoutLCTs1b()
std::unique_ptr< CSCAnodeLCTProcessor > alct
std::unique_ptr< CSCCathodeLCTProcessor > clct
std::vector< CSCCorrelatedLCTDigi > readoutLCTs1b()
void run(const CSCWireDigiCollection *wiredc, const CSCComparatorDigiCollection *compdc, const GEMPadDigiCollection *gemPads)
std::vector< CSCCorrelatedLCTDigi > readoutLCTs()
std::unique_ptr< CSCMuonPortCard > m_muonportcard
void setGEMGeometry(const GEMGeometry *g)
std::unique_ptr< CSCCathodeLCTProcessor > clct1a
void run(const CSCWireDigiCollection *wiredc, const CSCComparatorDigiCollection *compdc, const RPCDigiCollection *rpcDigis)
std::vector< GEMCoPadDigi > readoutCoPads()
void setRPCGeometry(const RPCGeometry *g)
static int chamberFromTriggerLabels(int TriggerSector, int TriggerSubSector, int station, int TriggerCSCID)
static int maxTriggerSubSectorId()
std::vector< CSCCorrelatedLCTDigi > readoutLCTs1a()