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customiseReEmul.py
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1 import FWCore.ParameterSet.Config as cms
2 from Configuration.StandardSequences.Eras import eras
3 
5  process.load("L1Trigger.L1TCalorimeter.caloStage2Params_HWConfig_cfi")
6  return process
7 
8 def L1TAddBitwiseLayer1(process):
9  from L1Trigger.L1TCaloLayer1.simCaloStage2Layer1Digis_cfi import simCaloStage2Layer1Digis as simCaloStage2BitwiseLayer1Digis
10  from L1Trigger.L1TCalorimeter.simCaloStage2Digis_cfi import simCaloStage2Digis as simCaloStage2BitwiseDigis
11  process.simCaloStage2BitwiseLayer1Digis = simCaloStage2BitwiseLayer1Digis.clone()
12  process.simCaloStage2BitwiseLayer1Digis.ecalToken = cms.InputTag("ecalDigis:EcalTriggerPrimitives")
13  process.simCaloStage2BitwiseDigis = simCaloStage2BitwiseDigis.clone()
14  process.simCaloStage2BitwiseDigis.towerToken = cms.InputTag("simCaloStage2BitwiseLayer1Digis")
15  process.SimL1TCalorimeter = cms.Sequence( process.simCaloStage2Layer1Digis + process.simCaloStage2Digis + process.simCaloStage2BitwiseLayer1Digis + process.simCaloStage2BitwiseDigis)
16  from L1Trigger.L1TNtuples.l1UpgradeTree_cfi import l1UpgradeTree
17  process.l1UpgradeBitwiseTree = l1UpgradeTree.clone()
18  process.l1UpgradeBitwiseTree.egToken = cms.untracked.InputTag("simCaloStage2BitwiseDigis")
19  process.l1UpgradeBitwiseTree.tauTokens = cms.untracked.VInputTag("simCaloStage2BitwiseDigis")
20  process.l1UpgradeBitwiseTree.jetToken = cms.untracked.InputTag("simCaloStage2BitwiseDigis")
21  process.l1UpgradeBitwiseTree.muonToken = cms.untracked.InputTag("simGmtStage2Digis")
22  process.l1UpgradeBitwiseTree.sumToken = cms.untracked.InputTag("simCaloStage2BitwiseDigis")
23  process.l1ntuplebitwise = cms.Path(
24  process.l1UpgradeBitwiseTree
25  )
26  process.schedule.append(process.l1ntuplebitwise)
27  print "modified L1TReEmul: "
28  print process.L1TReEmul
29  return process
30 
31 # As of 80X, this ES configuration is needed for *data* GTs (mc tags work w/o)
33  process.es_pool_hf1x1 = cms.ESSource(
34  "PoolDBESSource",
35  #process.CondDBSetup,
36  timetype = cms.string('runnumber'),
37  toGet = cms.VPSet(
38  cms.PSet(record = cms.string("HcalLutMetadataRcd"),
39  tag = cms.string("HcalLutMetadata_HFTP_1x1")
40  ),
41  cms.PSet(record = cms.string("HcalElectronicsMapRcd"),
42  tag = cms.string("HcalElectronicsMap_HFTP_1x1")
43  )
44  ),
45  connect = cms.string('frontier://FrontierProd/CMS_CONDITIONS'),
46  authenticationMethod = cms.untracked.uint32(0)
47  )
48  process.es_prefer_es_pool_hf1x1 = cms.ESPrefer("PoolDBESSource", "es_pool_hf1x1")
49  return process
50 
51 def L1TReEmulFromRAW2015(process):
52  process.load('L1Trigger.Configuration.SimL1Emulator_cff')
53  process.load('L1Trigger.Configuration.CaloTriggerPrimitives_cff')
54  process.simEcalTriggerPrimitiveDigis.Label = 'ecalDigis'
55  process.simHcalTriggerPrimitiveDigis.inputLabel = cms.VInputTag(
56  cms.InputTag('hcalDigis'),
57  cms.InputTag('hcalDigis')
58  )
59  process.L1TReEmul = cms.Sequence(process.simEcalTriggerPrimitiveDigis * process.simHcalTriggerPrimitiveDigis * process.SimL1Emulator)
60  process.simDtTriggerPrimitiveDigis.digiTag = 'muonDTDigis'
61  process.simCscTriggerPrimitiveDigis.CSCComparatorDigiProducer = cms.InputTag( 'muonCSCDigis', 'MuonCSCComparatorDigi')
62  process.simCscTriggerPrimitiveDigis.CSCWireDigiProducer = cms.InputTag( 'muonCSCDigis', 'MuonCSCWireDigi' )
63 
64  if eras.stage2L1Trigger.isChosen():
65  process.simTwinMuxDigis.RPC_Source = cms.InputTag('muonRPCDigis')
66  # When available, this will switch to TwinMux input Digis:
67  process.simTwinMuxDigis.DTDigi_Source = cms.InputTag("dttfDigis")
68  process.simTwinMuxDigis.DTThetaDigi_Source = cms.InputTag("dttfDigis")
69  process.simOmtfDigis.srcRPC = cms.InputTag('muonRPCDigis')
70  process.simBmtfDigis.DTDigi_Source = cms.InputTag("simTwinMuxDigis")
71  process.simBmtfDigis.DTDigi_Theta_Source = cms.InputTag("dttfDigis")
72  process.simEmtfDigis.CSCInput = cms.InputTag("csctfDigis")
73  process.simEmtfDigis.RPCInput = cms.InputTag('muonRPCDigis')
74  process.simOmtfDigis.srcCSC = cms.InputTag("csctfDigis")
75  process.simCaloStage2Layer1Digis.ecalToken = cms.InputTag("ecalDigis:EcalTriggerPrimitives")
76  process.L1TReEmulPath = cms.Path(process.L1TReEmul)
77  process.schedule.append(process.L1TReEmulPath)
78  print "L1TReEmul sequence: "
79  print process.L1TReEmul
80  print process.schedule
81  # quiet warning abouts missing Stage-2 payloads, since they won't reliably exist in 2015 data.
82  if hasattr(process, "caloStage2Digis"):
83  process.caloStage2Digis.MinFeds = cms.uint32(0)
84  if hasattr(process, "gmtStage2Digis"):
85  process.gmtStage2Digis.MinFeds = cms.uint32(0)
86  if hasattr(process, "gtStage2Digis"):
87  process.gtStage2Digis.MinFeds = cms.uint32(0)
88  return process
89  else:
90  process.simRctDigis.ecalDigis = cms.VInputTag('simEcalTriggerPrimitiveDigis')
91  process.simRctDigis.hcalDigis = cms.VInputTag('simHcalTriggerPrimitiveDigis')
92  process.simRpcTriggerDigis.label = 'muonRPCDigis'
93  process.simRpcTechTrigDigis.RPCDigiLabel = 'muonRPCDigis'
94  process.L1TReEmulPath = cms.Path(process.L1TReEmul)
95  process.schedule.append(process.L1TReEmulPath)
96  print "L1TReEmul sequence: "
97  print process.L1TReEmul
98  print process.schedule
99  return process
100 
102  L1TReEmulFromRAW2015(process)
103  if eras.stage2L1Trigger.isChosen():
104  process.simEmtfDigis.CSCInput = cms.InputTag('simCscTriggerPrimitiveDigis','MPCSORTED')
105  process.simOmtfDigis.srcCSC = cms.InputTag('simCscTriggerPrimitiveDigis','MPCSORTED')
106  return process
107 
109  L1TReEmulFromRAW2015(process)
110  if eras.stage2L1Trigger.isChosen():
111  process.simCaloStage2Layer1Digis.ecalToken = cms.InputTag("simEcalTriggerPrimitiveDigis")
112  return process
113 
114 def L1TReEmulFromRAW(process):
115  process.load('L1Trigger.Configuration.SimL1Emulator_cff')
116  process.load('L1Trigger.Configuration.CaloTriggerPrimitives_cff')
117  process.simEcalTriggerPrimitiveDigis.Label = 'ecalDigis'
118  process.simHcalTriggerPrimitiveDigis.inputLabel = cms.VInputTag(
119  cms.InputTag('hcalDigis'),
120  cms.InputTag('hcalDigis')
121  )
122  process.simCscTriggerPrimitiveDigis.CSCComparatorDigiProducer = cms.InputTag( 'muonCSCDigis', 'MuonCSCComparatorDigi')
123  process.simCscTriggerPrimitiveDigis.CSCWireDigiProducer = cms.InputTag( 'muonCSCDigis', 'MuonCSCWireDigi' )
124  process.L1TReEmul = cms.Sequence(process.simEcalTriggerPrimitiveDigis * process.simHcalTriggerPrimitiveDigis * process.SimL1Emulator)
125  if eras.stage2L1Trigger.isChosen():
126  #cutlist=['simDtTriggerPrimitiveDigis','simCscTriggerPrimitiveDigis']
127  #for b in cutlist:
128  # process.SimL1Emulator.remove(getattr(process,b))
129  # TwinMux
130  process.simTwinMuxDigis.RPC_Source = cms.InputTag('muonRPCDigis')
131  process.simTwinMuxDigis.DTDigi_Source = cms.InputTag('bmtfDigis')
132  process.simTwinMuxDigis.DTThetaDigi_Source = cms.InputTag('bmtfDigis')
133  # BMTF
134  process.simBmtfDigis.DTDigi_Source = cms.InputTag('bmtfDigis')
135  process.simBmtfDigis.DTDigi_Theta_Source = cms.InputTag('bmtfDigis')
136  # OMTF
137  process.simOmtfDigis.srcRPC = cms.InputTag('muonRPCDigis')
138  process.simOmtfDigis.srcCSC = cms.InputTag('csctfDigis')
139  process.simOmtfDigis.srcDTPh = cms.InputTag('bmtfDigis')
140  process.simOmtfDigis.srcDTTh = cms.InputTag('bmtfDigis')
141  # EMTF
142  process.simEmtfDigis.CSCInput = cms.InputTag('csctfDigis')
143  process.simEmtfDigis.RPCInput = cms.InputTag('muonRPCDigis')
144  # Calo Layer1
145  process.simCaloStage2Layer1Digis.ecalToken = cms.InputTag('ecalDigis:EcalTriggerPrimitives')
146  process.simCaloStage2Layer1Digis.hcalToken = cms.InputTag('hcalDigis:')
147  process.L1TReEmulPath = cms.Path(process.L1TReEmul)
148  process.schedule.append(process.L1TReEmulPath)
149  print "L1TReEmulPath sequence: "
150  print process.L1TReEmulPath
151  print process.schedule
152  return process
153  else:
154  process.simRctDigis.ecalDigis = cms.VInputTag( cms.InputTag( 'ecalDigis:EcalTriggerPrimitives' ) )
155  process.simRctDigis.hcalDigis = cms.VInputTag('hcalDigis:')
156  process.simRpcTriggerDigis.label = 'muonRPCDigis'
157  process.L1TReEmulPath = cms.Path(process.L1TReEmul)
158  process.schedule.append(process.L1TReEmulPath)
159  print "L1TReEmul sequence: "
160  print process.L1TReEmul
161  print process.schedule
162  return process
163 
164 def L1TReEmulMCFromRAW(process):
165  L1TReEmulFromRAW(process)
166  if eras.stage2L1Trigger.isChosen():
167  process.simEmtfDigis.CSCInput = cms.InputTag('simCscTriggerPrimitiveDigis','MPCSORTED')
168  process.simOmtfDigis.srcCSC = cms.InputTag('simCscTriggerPrimitiveDigis','MPCSORTED')
169  return process
170 
172  L1TReEmulFromRAW(process)
173  if eras.stage2L1Trigger.isChosen():
174  process.simCaloStage2Layer1Digis.ecalToken = cms.InputTag("simEcalTriggerPrimitiveDigis")
175  return process
176 
178  L1TReEmulFromRAW(process)
179  if eras.stage2L1Trigger.isChosen():
180  process.simCaloStage2Layer1Digis.hcalToken = cms.InputTag('simHcalTriggerPrimitiveDigis')
181  return process
182 
184  L1TReEmulFromRAW(process)
185  if eras.stage2L1Trigger.isChosen():
186  # TwinMux
187  process.simTwinMuxDigis.RPC_Source = cms.InputTag('muonRPCDigis')
188  process.simTwinMuxDigis.DTDigi_Source = cms.InputTag('simDtTriggerPrimitiveDigis')
189  process.simTwinMuxDigis.DTThetaDigi_Source = cms.InputTag('simDtTriggerPrimitiveDigis')
190  # BMTF
191  process.simBmtfDigis.DTDigi_Source = cms.InputTag('simTwinMuxDigis')
192  process.simBmtfDigis.DTDigi_Theta_Source = cms.InputTag('simDtTriggerPrimitiveDigis')
193  # OMTF
194  process.simOmtfDigis.srcRPC = cms.InputTag('muonRPCDigis')
195  process.simOmtfDigis.srcCSC = cms.InputTag('simCscTriggerPrimitiveDigis')
196  process.simOmtfDigis.srcDTPh = cms.InputTag('simDtTriggerPrimitiveDigis')
197  process.simOmtfDigis.srcDTTh = cms.InputTag('simDtTriggerPrimitiveDigis')
198  # EMTF
199  process.simEmtfDigis.CSCInput = cms.InputTag('simCscTriggerPrimitiveDigis')
200  process.simEmtfDigis.RPCInput = cms.InputTag('muonRPCDigis')
201  # Layer1
202  process.simCaloStage2Layer1Digis.ecalToken = cms.InputTag("simEcalTriggerPrimitiveDigis")
203  process.simCaloStage2Layer1Digis.hcalToken = cms.InputTag('simHcalTriggerPrimitiveDigis')
204  return process
205 
def L1TCaloStage2ParamsForHW
def L1TReEmulFromRAW2015simCaloTP