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CSCTMBScope.cc
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1 //_________________________________________________________
2 //
3 // CSCTMBScope 9/11/03 B.Mohr
4 // Unpacks TMB Logic Analyzer and stores in CSCTMBScope.h
5 //_________________________________________________________
6 //
9 #include <iostream>
10 
11 #ifdef LOCAL_UNPACK
12 bool CSCTMBScope::debug = false;
13 #else
14 std::atomic<bool> CSCTMBScope::debug{false};
15 #endif
16 
17 CSCTMBScope::CSCTMBScope(unsigned short *buf,int b05Line,int e05Line) {
18 
19  size_ = UnpackScope(buf,b05Line,e05Line);
20 
21 } //CSCTMBScope
22 
23 
24 int CSCTMBScope::UnpackScope(unsigned short *buf,int b05Line,int e05Line) {
25 
26  int pretrig_chan[4]={0,0,0,0};
27  unsigned int tbin_strt,tbin_stop;
28  unsigned int ibit,jbit,itbin,ich,iram,iline,iadr;
29  unsigned int lct_bxn;
30 
31 
32  if(debug) {
33  LogTrace("CSCTMBScope|CSCRawToDigi") << " .....TMBHeader -- unpacking Logic Analyzer......";
34  }
35 
36  if((e05Line-b05Line) == 1537) {
37 
38  if(debug)
39  LogTrace("CSCTMBScope|CSCRawToDigi") << "Scope data found";
40 
41  //load scope_ram from raw-hits format readout
42  iline = b05Line + 1;
43  for(iram=0;iram<6;iram++){
44  for(iadr=0;iadr<256;iadr++) {
45  itbin = iadr; //ram_sel*256
46  scope_ram[itbin][iram] = buf[iline];
47  iline++;
48  }
49  }
50 
51  for(ich=0;ich<51;ich++) data[ich]=0; //clear all data
52 
53 
54  //----- find pretrig chan offset -----------------
55  pretrig_chan[0] = GetPretrig(0);
56  pretrig_chan[1] = GetPretrig(32);
57  pretrig_chan[2] = GetPretrig(48);
58  pretrig_chan[3] = GetPretrig(64);
59 
60  //----- ram 1 ------------------------------------
61  tbin_strt = pretrig_chan[0]-7;
62  tbin_stop = pretrig_chan[0]+24;
63 
64  for(ich=0;ich<=14;ich++) {
65  iram=ich/16;
66  jbit=0;
67  for(itbin=tbin_strt;itbin<=tbin_stop;itbin++) {
68  ibit = (scope_ram[itbin][iram] >> (ich%16) ) & 1;
69  data[ich] = (ibit << jbit) | data[ich];
70  jbit++;
71  }
72  }
73 
74  //----- ram 2 ------------------------------------
75  for(ich=16;ich<=30;ich++) {
76  iram=ich/16;
77  jbit=0;
78  for(itbin=tbin_strt;itbin<=tbin_stop;itbin++) {
79  ibit = (scope_ram[itbin][iram] >> (ich%16) ) & 1;
80  data[ich-1] = (ibit << jbit) | data[ich-1];
81  jbit++;
82  }
83  }
84 
85  //----- ram 3 ------------------------------------
86  tbin_strt = pretrig_chan[1]-7;
87  tbin_stop = pretrig_chan[1]+24;
88 
89  for(ich=32;ich<=36;ich++) {
90  iram=ich/16;
91  jbit=0;
92  for(itbin=tbin_strt;itbin<=tbin_stop;itbin++) {
93  ibit = (scope_ram[itbin][iram] >> (ich%16) ) & 1;
94  data[ich-2] = (ibit << jbit) | data[ich-2];
95  jbit++;
96  }
97  }
98 
99  tbin_strt = pretrig_chan[1]-7+120;
100  tbin_stop = pretrig_chan[1]+24+120;
101 
102  for(ich=37;ich<=40;ich++) {
103  iram=ich/16;
104  jbit=0;
105  for(itbin=tbin_strt;itbin<=tbin_stop;itbin++) {
106  ibit = (scope_ram[itbin][iram] >> (ich%16) ) & 1;
107  data[ich-2] = (ibit << jbit) | data[ich-2];
108  jbit++;
109  }
110  }
111 
112  tbin_strt = pretrig_chan[1]-7;
113  tbin_stop = pretrig_chan[1]+24;
114 
115  for(ich=41;ich<=46;ich++) {
116  iram=ich/16;
117  jbit=0;
118  for(itbin=tbin_strt;itbin<=tbin_stop;itbin++) {
119  ibit = (scope_ram[itbin][iram] >> (ich%16) ) & 1;
120  data[ich-2] = (ibit << jbit) | data[ich-2];
121  jbit++;
122  }
123  }
124 
125  //----- ram 4 ------------------------------------
126  tbin_strt = pretrig_chan[2]-7;
127  tbin_stop = pretrig_chan[2]+24;
128 
129  for(ich=48;ich<=53;ich++) {
130  iram=ich/16;
131  jbit=0;
132  for(itbin=tbin_strt;itbin<=tbin_stop;itbin++) {
133  ibit = (scope_ram[itbin][iram] >> (ich%16) ) & 1;
134  data[ich-3] = (ibit << jbit) | data[ich-3];
135  jbit++;
136  }
137  }
138 
139  //----- ram 5 - bxn ------------------------------
140  lct_bxn = 0;
141  jbit=0;
142 
143  for(ich=65;ich<=76;ich++) {
144  iram=ich/16;
145  itbin = pretrig_chan[3];
146  ibit = (scope_ram[itbin][iram] >> (ich%16) ) & 1;
147  lct_bxn = (ibit << jbit) | lct_bxn;
148  jbit++;
149  }
150  data[51]=lct_bxn;
151 
152  if(debug)
153  LogTrace("CSCTMBScope|CSCRawToDigi") << "Scope bxn at LCT (seq_pretrig): "
154  << lct_bxn;
155 
156  //----- now read back decoded scope data ---------
157  if(debug) {
158  for(ich=0;ich<=50;ich++) {
159  for(itbin=0;itbin<32;itbin++) {
160  ibit = (data[ich] >> itbin ) & 1;
161  if(ibit == 0) LogTrace("CSCTMBScope|CSCRawToDigi") << "_"; //display symbol for logic 0
162  if(ibit == 1) LogTrace("CSCTMBScope|CSCRawToDigi") << "-"; //display symbol for logic 1
163  }
164  }
165  }
166 
167  } //end if(b05-e05)
168 
169 
170  //-------------- if no scope data: fill everything with 0 --------------------
171  else {
172  for(ich=0;ich<51;ich++) data[ich]=0;
173  lct_bxn = 0xff0000; //value not possible for real data (short)
174  data[51] = lct_bxn;
175 
176  if(debug)
177  LogTrace("CSCTMBScope|CSCRawToDigi") << "No scope data found: wrdcnt: "
178  << (e05Line-b05Line);
179  }
180 
181  if(debug) {
182  LogTrace("CSCTMBScope|CSCRawToDigi") << " .....END -- unpacking Logic Analyzer...........";
183  }
184 
185  return (e05Line - b05Line + 1);
186 
187 } //UnpackScope
188 
189 
191 
192  unsigned int ibit,itbin,iram;
193  int value = 0;
194 
195  ibit=0;
196  itbin=0;
197  iram=ich/16;
198  while(!ibit) {
199  ibit = (scope_ram[itbin][iram] >> (ich%16) ) & 1;
200  value = itbin;
201  itbin++;
202  }
203 
204  if(debug)
205  LogTrace("CSCTMBScope|CSCRawToDigi") << "TMB SCOPE: ------- Pretrig value: " << value;
206  return value;
207 
208 } //GetPretrig
int UnpackScope(unsigned short *buf, int b05Line, int e05Line)
Definition: CSCTMBScope.cc:24
unsigned short size_
Definition: CSCTMBScope.h:32
#define LogTrace(id)
unsigned int data[52]
Definition: CSCTMBScope.h:22
static std::atomic< bool > debug
Definition: CSCTMBScope.h:36
int GetPretrig(int ich)
Definition: CSCTMBScope.cc:190
unsigned int scope_ram[256][6]
Definition: CSCTMBScope.h:31