28 unsigned int wdPerBX = 6;
29 unsigned int initialBlkID = 33;
30 unsigned int intermBlkID = 39;
31 unsigned int finalBlkID = 45;
35 unsigned int uGTBoard = block.
amc().getAMCNumber() - 1;
41 int firstBX = -(ceil((
double)nBX/2.)-1);
44 lastBX = ceil((
double)nBX/2.);
46 lastBX = ceil((
double)nBX/2.)-1;
50 res_->setBXRange(firstBX, lastBX);
52 LogDebug(
"L1T") <<
"nBX = " << nBX <<
" first BX = " << firstBX <<
" lastBX = " << lastBX << endl;
56 for (
int bx=firstBX; bx<=lastBX; bx++){
60 if(block.
header().
getID()==initialBlkID && uGTBoard == 0 ) {
62 LogDebug(
"L1T") <<
"Creating GT Algorithm Block for BX =" << bx << std::endl;
64 res_->push_back(bx,talg);
75 int algOffset = (block.
header().
getID() - initialBlkID + 1)/2;
76 algOffset = (algOffset%3)*192;
78 for(
unsigned int wd=0; wd<wdPerBX; wd++) {
79 uint32_t raw_data = block.
payload()[wd+numBX*wdPerBX];
80 LogDebug(
"L1T") <<
"BX "<<bx <<
" payload word " << wd <<
" 0x" << hex << raw_data <<
" offset=" <<
dec << algOffset << std::endl;
84 for(
unsigned int bt=0; bt<32; bt++) {
85 int val = ((raw_data >> bt) & 0x1);
86 unsigned int algBit = bt+wd*32+algOffset;
89 LogDebug(
"L1T") <<
"Found valid alg bit ("<< algBit <<
") on bit ("<<bt<<
") word ("<<wd<<
") algOffset ("<<algOffset<<
") block ID ("<< block.
header().
getID() <<
")" <<
" Board# " << uGTBoard <<std::endl;
98 LogDebug(
"L1T") <<
"Found invalid alg bit ("<< algBit <<
") out of range on bit ("<<bt<<
") word ("<<wd<<
") algOffset ("<<algOffset<<
") block ID ("<< block.
header().
getID() <<
")" <<std::endl;
102 }
else if(block.
header().
getID()==initialBlkID+4 && (wd==4 || wd==5) ) {
108 }
else if(block.
header().
getID()==finalBlkID+4 && wd==4) {
112 LogDebug(
"L1T") <<
" Packing the FinalOR " << wd <<
" 0x" << hex << raw_data << endl;
113 }
else if(block.
header().
getID()==finalBlkID+4 && wd==5) {
116 LogDebug(
"L1T") <<
" Packing the Prescale Column " << wd <<
" 0x" << hex << raw_data << endl;
void setL1MenuUUID(int uuid)
set simple members
void setFinalORPreVeto(bool fOR)
void setAlgoDecisionInitial(unsigned int bit, bool val)
Set decision bits.
BlockHeader header() const
static const unsigned int numBX
const bool getFinalORVeto() const
std::vector< uint32_t > payload() const
const bool getFinalORPreVeto() const
static const unsigned int maxPhysicsTriggers
#define DEFINE_L1T_UNPACKER(type)
void setAlgoDecisionInterm(unsigned int bit, bool val)
void setFinalOR(bool fOR)
void setFinalORVeto(bool fOR)
void setL1FirmwareUUID(int fuuid)
void setPreScColumn(int psC)
void amc(const amc::Header &h)
virtual bool unpack(const Block &block, UnpackerCollections *coll) override
void setAlgoDecisionFinal(unsigned int bit, bool val)