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FastFedCablingHistosUsingDb.cc
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1 
2 #include "DQM/SiStripCommissioningDbClients/interface/FastFedCablingHistosUsingDb.h"
3 #include "CondFormats/SiStripObjects/interface/FastFedCablingAnalysis.h"
4 #include "DataFormats/SiStripCommon/interface/SiStripConstants.h"
5 #include "DataFormats/SiStripCommon/interface/SiStripFecKey.h"
6 #include "FWCore/MessageLogger/interface/MessageLogger.h"
7 #include <iostream>
8 
9 using namespace sistrip;
10 
11 // -----------------------------------------------------------------------------
13 FastFedCablingHistosUsingDb::FastFedCablingHistosUsingDb( const edm::ParameterSet & pset,
14  DQMStore* bei,
15  SiStripConfigDb* const db )
16  : CommissioningHistograms( pset.getParameter<edm::ParameterSet>("FastFedCablingParameters"),
17  bei,
18  sistrip::FAST_CABLING ),
19  CommissioningHistosUsingDb( db,
20  sistrip::FAST_CABLING ),
21  FastFedCablingHistograms( pset.getParameter<edm::ParameterSet>("FastFedCablingParameters"),
22  bei )
23 {
24  LogTrace(mlDqmClient_)
25  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
26  << " Constructing object...";
27 }
28 
29 // -----------------------------------------------------------------------------
31 FastFedCablingHistosUsingDb::~FastFedCablingHistosUsingDb() {
32  LogTrace(mlDqmClient_)
33  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
34  << " Destructing object...";
35 }
36 
37 // -----------------------------------------------------------------------------
39 void FastFedCablingHistosUsingDb::uploadConfigurations() {
40  LogTrace(mlDqmClient_)
41  << "[FastFedCablingHistosUsingDb::" << __func__ << "]";
42 
43  if ( !db() ) {
44  edm::LogError(mlDqmClient_)
45  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
46  << " NULL pointer to SiStripConfigDb interface!"
47  << " Aborting upload...";
48  return;
49  }
50 
51  SiStripDbParams::SiStripPartitions::const_iterator ip = db()->dbParams().partitions().begin();
52  SiStripDbParams::SiStripPartitions::const_iterator jp = db()->dbParams().partitions().end();
53  for ( ; ip != jp; ++ip ) {
54 
55  // Retrieve descriptions
56  db()->clearFedConnections();
57  SiStripConfigDb::FedDescriptionsRange feds = db()->getFedDescriptions( ip->second.partitionName() );
58  SiStripConfigDb::DeviceDescriptionsRange dcus = db()->getDeviceDescriptions( DCU, ip->second.partitionName() );
59  SiStripConfigDb::DcuDetIdsRange detids = db()->getDcuDetIds( ip->second.partitionName() );
60 
61  // Update FED connection descriptions
62  SiStripConfigDb::FedConnectionsV conns;
63  update( conns, feds, dcus, detids );
64 
65  if ( doUploadConf() ) {
66  edm::LogVerbatim(mlDqmClient_)
67  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
68  << " Uploading FED connections for partition \""
69  << ip->second.partitionName() << "\" to DB...";
70  db()->clearFedConnections( ip->second.partitionName() );
71  db()->addFedConnections( ip->second.partitionName(), conns );
72  db()->uploadFedConnections( ip->second.partitionName() );
73  edm::LogVerbatim(mlDqmClient_)
74  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
75  << " Completed database upload of " << conns.size()
76  << " ConnectionDescriptions!";
77  } else {
78  edm::LogWarning(mlDqmClient_)
79  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
80  << " TEST only! No FED connections will be uploaded to DB...";
81  }
82 
83  // Update FED descriptions with enabled/disabled channels
84  update( feds );
85  if ( doUploadConf() ) {
86  edm::LogVerbatim(mlDqmClient_)
87  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
88  << " Uploading FED descriptions to DB...";
89  db()->uploadFedDescriptions( ip->second.partitionName() );
90  edm::LogVerbatim(mlDqmClient_)
91  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
92  << " Completed database upload of " << feds.size()
93  << " Fed9UDescriptions (with connected channels enabled)!";
94  } else {
95  edm::LogWarning(mlDqmClient_)
96  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
97  << " TEST only! No FED descriptions will be uploaded to DB...";
98  }
99 
100  // Some debug on good / dirty / missing connections
101  connections( dcus, detids );
102 
103  }
104 
105 }
106 
107 // -----------------------------------------------------------------------------
109 void FastFedCablingHistosUsingDb::update( SiStripConfigDb::FedConnectionsV& conns,
110  SiStripConfigDb::FedDescriptionsRange feds,
111  SiStripConfigDb::DeviceDescriptionsRange dcus,
112  SiStripConfigDb::DcuDetIdsRange detids ) {
113 
114  // Update FED-FEC mapping in base class, based on analysis results
115  Analyses::iterator ianal = data().begin();
116  Analyses::iterator janal = data().end();
117  for ( ; ianal != janal; ++ianal ) {
118 
119  FastFedCablingAnalysis* anal = dynamic_cast<FastFedCablingAnalysis*>( ianal->second );
120  if ( !anal ) {
121  edm::LogError(mlDqmClient_)
122  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
123  << " NULL pointer to analysis object!";
124  continue;
125  }
126 
127  if ( !anal->isValid() || anal->dcuId() == sistrip::invalid32_ ) { continue; }
128 
129  SiStripFecKey fec_key( anal->fecKey() );
130  SiStripFedKey fed_key( anal->fedKey() );
131 
132  ConnectionDescription* conn = new ConnectionDescription();
133  conn->setFedId( fed_key.fedId() );
134  conn->setFedChannel( fed_key.fedChannel() );
135  conn->setFecHardwareId( "" ); //@@
136  conn->setFecCrateId( fec_key.fecCrate() );
137  conn->setFecSlot( fec_key.fecSlot() );
138  conn->setRingSlot( fec_key.fecRing() );
139  conn->setCcuAddress( fec_key.ccuAddr() );
140  conn->setI2cChannel( fec_key.ccuChan() );
141  conn->setApvAddress( SiStripFecKey::i2cAddr(anal->lldCh(),true) );
142  conn->setDcuHardId( anal->dcuHardId() );
143 
144  // Retrieve FED crate and slot numbers
145  bool found = false;
146  SiStripConfigDb::FedDescriptionsV::const_iterator ifed = feds.begin();
147  while ( ifed != feds.end() && !found ) {
148  if ( *ifed ) {
149  uint16_t fed_id = static_cast<uint16_t>( (*ifed)->getFedId() );
150  if ( fed_key.fedId() == fed_id ) {
151  conn->setFedCrateId( static_cast<uint16_t>( (*ifed)->getCrateNumber() ) );
152  conn->setFedSlot( static_cast<uint16_t>( (*ifed)->getSlotNumber() ) );
153  found = true;
154  }
155  } else {
156  edm::LogError(mlDqmClient_)
157  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
158  << " NULL pointer to Fed9UDescription object!";
159  continue;
160  }
161  ++ifed;
162  }
163  if ( !found ) {
164  edm::LogError(mlDqmClient_)
165  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
166  << " Could not find FED id " << fed_key.fedId()
167  << " in vector of FED descriptions!"
168  << " Unable to set FED crate and slot for this FED!";
169  }
170 
171  conns.push_back(conn);
172 
173  }
174 
175  if (0) {
176  SiStripConfigDb::FedConnectionsV::iterator ifed = conns.begin();
177  for ( ; ifed != conns.end(); ifed++ ) { (*ifed)->display(); }
178  }
179 
180 }
181 
182 // -----------------------------------------------------------------------------
184 void FastFedCablingHistosUsingDb::update( SiStripConfigDb::FedDescriptionsRange feds ) {
185 
186  // Iterate through feds and disable all channels
187  SiStripConfigDb::FedDescriptionsV::const_iterator ifed = feds.begin();
188  SiStripConfigDb::FedDescriptionsV::const_iterator jfed = feds.end();
189  try {
190  for ( ; ifed != jfed; ++ifed ) {
191  for ( uint16_t ichan = 0; ichan < sistrip::FEDCH_PER_FED; ichan++ ) {
192  Fed9U::Fed9UAddress addr( ichan );
193  Fed9U::Fed9UAddress addr0( ichan, static_cast<Fed9U::u8>(0) );
194  Fed9U::Fed9UAddress addr1( ichan, static_cast<Fed9U::u8>(1) );
195  (*ifed)->setFedFeUnitDisable( addr, true );
196  (*ifed)->setApvDisable( addr0, true );
197  (*ifed)->setApvDisable( addr1, true );
198  }
199  }
200  } catch( ICUtils::ICException& e ) {
201  edm::LogWarning(mlDqmClient_) << e.what();
202  }
203 
204  // Counters for number of connected / enabled channels
205  uint16_t connected = 0;
206  std::map< uint16_t, std::vector<uint16_t> > enabled;
207 
208  // Iterate through feds and enable connected channels
209  for ( ifed = feds.begin(); ifed != feds.end(); ifed++ ) {
210  for ( uint16_t ichan = 0; ichan < sistrip::FEDCH_PER_FED; ichan++ ) {
211 
212  // Retrieve FEC key from FED-FEC map
213  SiStripFedKey fed( static_cast<uint16_t>( (*ifed)->getFedId() ),
214  SiStripFedKey::feUnit(ichan),
215  SiStripFedKey::feChan(ichan) );
216  uint32_t fed_key = fed.key();
217 
218  // Retrieve analysis for given FED id and channel
219  Analyses::const_iterator iter = data().find( fed_key );
220  if ( iter == data().end() ) { continue; }
221 
222  if ( !iter->second->isValid() ) { continue; }
223 
224  FastFedCablingAnalysis* anal = dynamic_cast<FastFedCablingAnalysis*>( iter->second );
225  if ( !anal ) {
226  edm::LogError(mlDqmClient_)
227  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
228  << " NULL pointer to OptoScanAnalysis object!";
229  continue;
230  }
231 
232  // Retrieve FED id and channel
233  SiStripFedKey key( anal->fedKey() );
234  uint16_t fed_id = key.fedId();
235  uint16_t fed_ch = key.fedChannel();
236 
237  // Enable front-end unit and channel
238  Fed9U::Fed9UAddress addr( fed_ch );
239  Fed9U::Fed9UAddress addr0( fed_ch, static_cast<Fed9U::u8>(0) );
240  Fed9U::Fed9UAddress addr1( fed_ch, static_cast<Fed9U::u8>(1) );
241  (*ifed)->setFedFeUnitDisable( addr, false );
242  (*ifed)->setApvDisable( addr0, false );
243  (*ifed)->setApvDisable( addr1, false );
244  connected++;
245  enabled[fed_id].push_back(fed_ch);
246 
247  }
248  }
249 
250  // Some debug
251  std::stringstream sss;
252  if ( !feds.empty() ) {
253  sss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
254  << " Enabled a total of " << connected
255  << " FED channels and disabled " << feds.size() * 96 - connected
256  << " FED channels (" << 100 * connected / ( feds.size() * 96 )
257  << "% of total)";
258  edm::LogVerbatim(mlDqmClient_) << sss.str();
259  } else {
260  sss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
261  << " Found no FEDs! (and therefore no connected channels)";
262  edm::LogWarning(mlDqmClient_) << sss.str();
263  }
264 
265  // Some debug
266  std::stringstream ss;
267  ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
268  << " Dump of enabled FED channels:"
269  << std::endl;
270  std::map< uint16_t, std::vector<uint16_t> >::const_iterator fed = enabled.begin();
271  for ( ; fed != enabled.end(); fed++ ) {
272  ss << " Enabled " << fed->second.size()
273  << " channels for FED id "
274  << std::setw(3) << fed->first << ": ";
275  if ( !fed->second.empty() ) {
276  uint16_t first = fed->second.front();
277  uint16_t last = fed->second.front();
278  std::vector<uint16_t>::const_iterator chan = fed->second.begin();
279  for ( ; chan != fed->second.end(); chan++ ) {
280  if ( chan != fed->second.begin() ) {
281  if ( *chan != last+1 ) {
282  ss << std::setw(2) << first << "->" << std::setw(2) << last << ", ";
283  if ( chan != fed->second.end() ) { first = *(chan+1); }
284  }
285  }
286  last = *chan;
287  }
288  if ( first != last ) { ss << std::setw(2) << first << "->" << std::setw(2) << last; }
289  ss << std::endl;
290  }
291  }
292  LogTrace(mlDqmClient_) << ss.str();
293 
294 }
295 
296 // -----------------------------------------------------------------------------
297 //
298 void FastFedCablingHistosUsingDb::addDcuDetIds() {
299 
300  if ( !cabling() ) {
301  edm::LogError(mlDqmClient_)
302  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
303  << " NULL pointer to SiStripFedCabling object!";
304  return;
305  }
306 
307  // retrieve descriptions for dcu id and det id
308  SiStripConfigDb::DeviceDescriptionsRange dcus = db()->getDeviceDescriptions( DCU );
309  SiStripConfigDb::DcuDetIdsRange detids = db()->getDcuDetIds();
310 
311  if ( dcus.empty() ) {
312  edm::LogError(mlCabling_)
313  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
314  << " No DCU descriptions found!";
315  return;
316  }
317 
318  if ( detids.empty() ) {
319  edm::LogWarning(mlCabling_)
320  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
321  << " DCU-DetId map is empty!";
322  }
323 
324  Analyses::iterator ianal = data().begin();
325  Analyses::iterator janal = data().end();
326  for ( ; ianal != janal; ++ianal ) {
327 
328  // check if analysis is valid (ie, dcu id and lld channel have been identified)
329  if ( !ianal->second->isValid() ) { continue; }
330 
331  // retrieve analysis object
332  FastFedCablingAnalysis* anal = dynamic_cast<FastFedCablingAnalysis*>( ianal->second );
333 
334  if ( !anal ) {
335  edm::LogError(mlDqmClient_)
336  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
337  << " NULL pointer to FastFedCablingAnalysis object!";
338  return;
339  }
340 
341  // find dcu that matches analysis result
342  bool found = false;
343  SiStripConfigDb::DeviceDescriptionsV::const_iterator idcu = dcus.begin();
344  SiStripConfigDb::DeviceDescriptionsV::const_iterator jdcu = dcus.end();
345  while ( !found && idcu != jdcu ) {
346  dcuDescription* dcu = dynamic_cast<dcuDescription*>( *idcu );
347  if ( dcu ) {
348  if ( dcu->getDcuType() == "FEH" ) {
349  if ( dcu->getDcuHardId() == anal->dcuHardId() ) {
350  found = true;
351  anal->dcuId( dcu->getDcuHardId() );
352  const SiStripConfigDb::DeviceAddress& addr = db()->deviceAddress(*dcu);
353  uint32_t fec_key = SiStripFecKey( addr.fecCrate_,
354  addr.fecSlot_,
355  addr.fecRing_,
356  addr.ccuAddr_,
357  addr.ccuChan_,
358  anal->lldCh() ).key();
359  anal->fecKey( fec_key );
360  SiStripConfigDb::DcuDetIdsV::const_iterator idet = detids.end();
361  idet = SiStripConfigDb::findDcuDetId( detids.begin(), detids.end(), dcu->getDcuHardId() );
362  if ( idet != detids.end() ) { anal->detId( idet->second->getDetId() ); }
363  }
364  }
365  }
366  idcu++;
367  }
368 
369  }
370 
371 }
372 
373 // -----------------------------------------------------------------------------
375 void FastFedCablingHistosUsingDb::create( SiStripConfigDb::AnalysisDescriptionsV& desc,
376  Analysis analysis ) {
377 
378  FastFedCablingAnalysis* anal = dynamic_cast<FastFedCablingAnalysis*>( analysis->second );
379  if ( !anal ) { return; }
380 
381  if ( !anal->isValid() || anal->dcuId() == sistrip::invalid32_ ) { return; } //@@ only store valid descriptions!
382 
383  SiStripFecKey fec_key( anal->fecKey() );
384  SiStripFedKey fed_key( anal->fedKey() );
385 
386  for ( uint16_t iapv = 0; iapv < 2; ++iapv ) {
387 
388  // Create description
389  FastFedCablingAnalysisDescription* tmp;
390  tmp = new FastFedCablingAnalysisDescription( anal->highLevel(),
391  anal->highRms(),
392  anal->lowLevel(),
393  anal->lowRms(),
394  anal->max(),
395  anal->min(),
396  anal->dcuId(),
397  anal->lldCh(),
398  anal->isDirty(),
399  FastFedCablingAnalysis::threshold_,
400  FastFedCablingAnalysis::dirtyThreshold_,
401  fec_key.fecCrate(),
402  fec_key.fecSlot(),
403  fec_key.fecRing(),
404  fec_key.ccuAddr(),
405  fec_key.ccuChan(),
406  SiStripFecKey::i2cAddr( fec_key.lldChan(), !iapv ),
407  db()->dbParams().partitions().begin()->second.partitionName(),
408  db()->dbParams().partitions().begin()->second.runNumber(),
409  anal->isValid(),
410  "",
411  fed_key.fedId(),
412  fed_key.feUnit(),
413  fed_key.feChan(),
414  fed_key.fedApv() );
415 
416  // Add comments
417  typedef std::vector<std::string> Strings;
418  Strings errors = anal->getErrorCodes();
419  Strings::const_iterator istr = errors.begin();
420  Strings::const_iterator jstr = errors.end();
421  for ( ; istr != jstr; ++istr ) { tmp->addComments( *istr ); }
422 
423  // Store description
424  desc.push_back( tmp );
425 
426  }
427 
428 }
429 
430 // -----------------------------------------------------------------------------
431 // prints debug info on good, dirty, missing connections, and missing devices
432 void FastFedCablingHistosUsingDb::connections( SiStripConfigDb::DeviceDescriptionsRange dcus,
433  SiStripConfigDb::DcuDetIdsRange detids ) {
434 
435  // strings
436  std::vector<std::string> valid;
437  std::vector<std::string> dirty;
438  std::vector<std::string> trimdac;
439  std::vector<std::string> missing;
440  std::vector<std::string> devices;
441  uint32_t missing_pairs = 0;
442 
443  // iterate through analyses
444  std::vector<uint32_t> found_dcus;
445  Analyses::iterator ianal = data().begin();
446  Analyses::iterator janal = data().end();
447  for ( ; ianal != janal; ++ianal ) {
448 
449  // extract fast fed cabling object
450  FastFedCablingAnalysis* anal = dynamic_cast<FastFedCablingAnalysis*>( ianal->second );
451  if ( !anal ) { continue; }
452 
453  // construct strings for various categories of connections
454  std::stringstream ss;
455  SiStripFedKey( anal->fedKey() ).terse(ss); ss << " ";
456  SiStripFecKey( anal->fecKey() ).terse(ss); ss << " ";
457  ss << "DcuId= " << std::hex << std::setw(8) << std::setfill('0') << anal->dcuId() << std::dec << " ";
458  ss << "DetId= " << std::hex << std::setw(8) << std::setfill('0') << anal->detId() << std::dec;
459  if ( anal->isValid() &&
460  !(anal->isDirty()) &&
461  !(anal->badTrimDac()) ) { valid.push_back( ss.str() ); }
462  if ( anal->isDirty() ) { dirty.push_back( ss.str() ); }
463  if ( anal->badTrimDac() ) { trimdac.push_back( ss.str() ); }
464 
465  // record "found" dcus
466  found_dcus.push_back( anal->dcuHardId() );
467 
468  }
469 
470  // iterate through dcu devices
471  SiStripConfigDb::DeviceDescriptionsV::const_iterator idcu = dcus.begin();
472  SiStripConfigDb::DeviceDescriptionsV::const_iterator jdcu = dcus.end();
473  for ( ; idcu != jdcu; ++idcu ) {
474 
475  // extract dcu description
476  dcuDescription* dcu = dynamic_cast<dcuDescription*>( *idcu );
477  if ( !dcu ) { continue; }
478  if ( dcu->getDcuType() != "FEH" ) { continue; }
479  SiStripConfigDb::DeviceAddress dcu_addr = db()->deviceAddress( *dcu );
480 
481  // continue if dcu has been "found"
482  std::vector<uint32_t>::const_iterator iter = find( found_dcus.begin(), found_dcus.end(), dcu->getDcuHardId() );
483  if ( iter != found_dcus.end() ) { continue; }
484 
485  // find detid for "missing" dcu
486  SiStripConfigDb::DcuDetIdsV::const_iterator idet = detids.end();
487  idet = SiStripConfigDb::findDcuDetId( detids.begin(), detids.end(), dcu->getDcuHardId() );
488  if ( idet == detids.end() ) { continue; }
489  if ( idet->second ) { continue; }
490 
491  // retrieve number of apv pairs
492  uint16_t npairs = idet->second->getApvNumber()/2;
493 
494  // retrieve apvs for given dcu
495  vector<bool> addrs;
496  addrs.resize(6,false);
497  SiStripConfigDb::DeviceDescriptionsRange apvs = db()->getDeviceDescriptions( APV25 );
498  SiStripConfigDb::DeviceDescriptionsV::const_iterator iapv = apvs.begin();
499  SiStripConfigDb::DeviceDescriptionsV::const_iterator japv = apvs.end();
500  for ( ; iapv != japv; ++iapv ) {
501  apvDescription* apv = dynamic_cast<apvDescription*>( *iapv );
502  if ( !apv ) { continue; }
503  SiStripConfigDb::DeviceAddress apv_addr = db()->deviceAddress( *apv );
504  if ( apv_addr.fecCrate_ == dcu_addr.fecCrate_ &&
505  apv_addr.fecSlot_ == dcu_addr.fecSlot_ &&
506  apv_addr.fecRing_ == dcu_addr.fecRing_ &&
507  apv_addr.ccuAddr_ == dcu_addr.ccuAddr_ &&
508  apv_addr.ccuChan_ == dcu_addr.ccuChan_ ) {
509  uint16_t pos = apv_addr.i2cAddr_ - 32;
510  if ( pos < 6 ) { addrs[pos] = true; }
511  }
512  }
513 
514  // construct strings for missing fibres
515  uint16_t pairs = 0;
516  if ( addrs[0] || addrs[1] ) {
517  pairs++;
518  std::stringstream ss;
519  SiStripFecKey( dcu_addr.fecCrate_,
520  dcu_addr.fecSlot_,
521  dcu_addr.fecRing_,
522  dcu_addr.ccuAddr_,
523  dcu_addr.ccuChan_,
524  1 ).terse(ss);
525  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
526  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
527  missing.push_back( ss.str() );
528  }
529  if ( addrs[2] || addrs[3] ) {
530  pairs++;
531  std::stringstream ss;
532  SiStripFecKey( dcu_addr.fecCrate_,
533  dcu_addr.fecSlot_,
534  dcu_addr.fecRing_,
535  dcu_addr.ccuAddr_,
536  dcu_addr.ccuChan_,
537  2 ).terse(ss);
538  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
539  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
540  missing.push_back( ss.str() );
541  }
542  if ( addrs[4] || addrs[5] ) {
543  pairs++;
544  std::stringstream ss;
545  SiStripFecKey( dcu_addr.fecCrate_,
546  dcu_addr.fecSlot_,
547  dcu_addr.fecRing_,
548  dcu_addr.ccuAddr_,
549  dcu_addr.ccuChan_,
550  3 ).terse(ss);
551  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
552  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
553  missing.push_back( ss.str() );
554  }
555 
556  if ( pairs != npairs ) {
557 
558  missing_pairs = npairs - pairs;
559 
560  if ( !addrs[0] ) {
561  std::stringstream ss;
562  SiStripFecKey( dcu_addr.fecCrate_,
563  dcu_addr.fecSlot_,
564  dcu_addr.fecRing_,
565  dcu_addr.ccuAddr_,
566  dcu_addr.ccuChan_,
567  1, 32 ).terse(ss);
568  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
569  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
570  devices.push_back( ss.str() );
571  }
572 
573  if ( !addrs[1] ) {
574  std::stringstream ss;
575  SiStripFecKey( dcu_addr.fecCrate_,
576  dcu_addr.fecSlot_,
577  dcu_addr.fecRing_,
578  dcu_addr.ccuAddr_,
579  dcu_addr.ccuChan_,
580  1, 33 ).terse(ss);
581  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
582  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
583  devices.push_back( ss.str() );
584  }
585 
586  if ( !addrs[2] && npairs == 3 ) {
587  std::stringstream ss;
588  SiStripFecKey( dcu_addr.fecCrate_,
589  dcu_addr.fecSlot_,
590  dcu_addr.fecRing_,
591  dcu_addr.ccuAddr_,
592  dcu_addr.ccuChan_,
593  2, 34 ).terse(ss);
594  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
595  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
596  devices.push_back( ss.str() );
597  }
598 
599  if ( !addrs[3] && npairs == 3 ) {
600  std::stringstream ss;
601  SiStripFecKey( dcu_addr.fecCrate_,
602  dcu_addr.fecSlot_,
603  dcu_addr.fecRing_,
604  dcu_addr.ccuAddr_,
605  dcu_addr.ccuChan_,
606  2, 35 ).terse(ss);
607  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
608  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
609  devices.push_back( ss.str() );
610  }
611 
612  if ( !addrs[4] ) {
613  std::stringstream ss;
614  SiStripFecKey( dcu_addr.fecCrate_,
615  dcu_addr.fecSlot_,
616  dcu_addr.fecRing_,
617  dcu_addr.ccuAddr_,
618  dcu_addr.ccuChan_,
619  3, 36 ).terse(ss);
620  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
621  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
622  devices.push_back( ss.str() );
623  }
624 
625  if ( !addrs[5] ) {
626  std::stringstream ss;
627  SiStripFecKey( dcu_addr.fecCrate_,
628  dcu_addr.fecSlot_,
629  dcu_addr.fecRing_,
630  dcu_addr.ccuAddr_,
631  dcu_addr.ccuChan_,
632  3, 37 ).terse(ss);
633  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
634  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
635  devices.push_back( ss.str() );
636  }
637 
638  }
639 
640  }
641 
642  // summary
643  {
644  std::stringstream ss;
645  ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
646  << " Summary of connections: " << std::endl
647  << " \"Good\" connections : " << valid.size() << std::endl
648  << " \"Dirty\" connections : " << dirty.size() << std::endl
649  << " \"Bad\" TrimDAQ settings : " << trimdac.size() << std::endl
650  << " (\"Missing\" connections : " << missing.size() << ")" << std::endl
651  << " (\"Missing\" APV pairs : " << missing_pairs << ")" << std::endl
652  << " (\"Missing\" APVs : " << devices.size() << ")" << std::endl;
653  edm::LogVerbatim(mlCabling_) << ss.str();
654  }
655 
656  // good connections
657  if ( !valid.empty() ) {
658  std::stringstream ss;
659  ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
660  << " List of \"good\" connections: " << std::endl;
661  std::vector<std::string>::const_iterator istr = valid.begin();
662  std::vector<std::string>::const_iterator jstr = valid.end();
663  for ( ; istr != jstr; ++istr ) { ss << *istr << std::endl; }
664  LogTrace(mlCabling_) << ss.str();
665  }
666 
667  // dirty connections
668  if ( !dirty.empty() ) {
669  std::stringstream ss;
670  ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
671  << " List of \"dirty\" connections: " << std::endl;
672  std::vector<std::string>::const_iterator istr = dirty.begin();
673  std::vector<std::string>::const_iterator jstr = dirty.end();
674  for ( ; istr != jstr; ++istr ) { ss << *istr << std::endl; }
675  edm::LogWarning(mlCabling_) << ss.str();
676  }
677 
678  // TrimDAC connections
679  if ( !trimdac.empty() ) {
680  std::stringstream ss;
681  ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
682  << " List of \"bad\" TrimDAC settings: " << std::endl;
683  std::vector<std::string>::const_iterator istr = trimdac.begin();
684  std::vector<std::string>::const_iterator jstr = trimdac.end();
685  for ( ; istr != jstr; ++istr ) { ss << *istr << std::endl; }
686  edm::LogWarning(mlCabling_) << ss.str();
687  }
688 
689  // missing connections
690  if ( !missing.empty() ) {
691  std::stringstream ss;
692  ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
693  << " List of \"missing\" connections: " << std::endl;
694  std::vector<std::string>::const_iterator istr = missing.begin();
695  std::vector<std::string>::const_iterator jstr = missing.end();
696  for ( ; istr != jstr; ++istr ) { ss << *istr << std::endl; }
697  edm::LogError(mlCabling_) << ss.str();
698  }
699 
700  // missing devices
701  if ( !devices.empty() ) {
702  std::stringstream ss;
703  ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
704  << " List of \"missing\" APVs: " << std::endl;
705  std::vector<std::string>::const_iterator istr = devices.begin();
706  std::vector<std::string>::const_iterator jstr = devices.end();
707  for ( ; istr != jstr; ++istr ) { ss << *istr << std::endl; }
708  edm::LogError(mlCabling_) << ss.str();
709  }
710 
711 }
combine.missing
dictionary missing
Definition: combine.py:4
FastFedCablingAnalysis::lldCh
const uint16_t & lldCh() const
Definition: FastFedCablingAnalysis.h:145
SiStripConfigDb::DcuDetIdsRange
DcuDetIds::range DcuDetIdsRange
Definition: SiStripConfigDb.h:136
CommissioningAnalysis::fedKey
const uint32_t & fedKey() const
Definition: CommissioningAnalysis.h:136
FastFedCablingHistosUsingDb::create
void create(SiStripConfigDb::AnalysisDescriptionsV &, Analysis)
Definition: FastFedCablingHistosUsingDb.cc:375
FastFedCablingAnalysis::dcuHardId
const uint32_t & dcuHardId() const
Definition: FastFedCablingAnalysis.h:144
benchmark_cfg.errors
tuple errors
Definition: benchmark_cfg.py:136
SiStripFedKey
A container class for generic run and event-related info, information required by the commissioning a...
Definition: SiStripFedKey.h:56
sistrip::invalid32_
static const uint32_t invalid32_
Definition: Constants.h:15
SiStripConfigDb::uploadFedConnections
void uploadFedConnections(std::string partition="")
Definition: FedConnections.cc:197
SiStripConfigDb::getFedDescriptions
FedDescriptionsRange getFedDescriptions(std::string partition="")
Definition: FedDescriptions.cc:12
Strings
std::vector< std::string > Strings
Definition: MsgTools.h:18
FastFedCablingAnalysis::dirtyThreshold_
static const float dirtyThreshold_
Definition: FastFedCablingAnalysis.h:89
EcalCondDB.db
tuple db
Definition: EcalCondDB.py:151
SiStripConfigDb::FedDescriptionsRange
FedDescriptions::range FedDescriptionsRange
Definition: SiStripConfigDb.h:125
sistrip::mlDqmClient_
static const char mlDqmClient_[]
Definition: ConstantsForLogger.h:19
FastFedCablingAnalysis::lowLevel
const float & lowLevel() const
Definition: FastFedCablingAnalysis.h:148
spr::find
void find(edm::Handle< EcalRecHitCollection > &hits, DetId thisDet, std::vector< EcalRecHitCollection::const_iterator > &hit, bool debug=false)
Definition: FindCaloHit.cc:7
SiStripFecKey::i2cAddr
const uint16_t & i2cAddr() const
Definition: SiStripFecKey.h:210
FastFedCablingAnalysis::highLevel
const float & highLevel() const
Definition: FastFedCablingAnalysis.h:146
SiStripKey::key
const uint32_t & key() const
Definition: SiStripKey.h:125
FastFedCablingHistosUsingDb::FastFedCablingHistosUsingDb
FastFedCablingHistosUsingDb(const edm::ParameterSet &pset, DQMStore *, SiStripConfigDb *const )
Definition: FastFedCablingHistosUsingDb.cc:13
SiStripFecKey
Utility class that identifies a position within the strip tracker control structure, down to the level of an APV25.
Definition: SiStripFecKey.h:45
SiStripDbParams::partitions
const_iterator_range partitions() const
Definition: SiStripDbParams.h:185
sistrip::mlCabling_
static const char mlCabling_[]
Definition: ConstantsForLogger.h:14
FastFedCablingAnalysis
Histogram-based analysis for connection loop.
Definition: FastFedCablingAnalysis.h:16
SiStripConfigDb::findDcuDetId
static DcuDetIdsV::const_iterator findDcuDetId(DcuDetIdsV::const_iterator begin, DcuDetIdsV::const_iterator end, uint32_t dcu_id)
Definition: DcuDetIds.cc:395
FastFedCablingAnalysis::min
const float & min() const
Definition: FastFedCablingAnalysis.h:151
SiStripConfigDb::DeviceDescriptionsRange
DeviceDescriptions::range DeviceDescriptionsRange
Definition: SiStripConfigDb.h:119
CommissioningAnalysis::dcuId
const uint32_t & dcuId() const
Definition: CommissioningAnalysis.h:138
SiStripConfigDb
An interface class to the DeviceFactory.
Definition: SiStripConfigDb.h:45
FastFedCablingAnalysis::max
const float & max() const
Definition: FastFedCablingAnalysis.h:150
CommissioningAnalysis::fecKey
const uint32_t & fecKey() const
Definition: CommissioningAnalysis.h:135
end
#define end
Definition: vmac.h:37
SiStripConfigDb::deviceAddress
DeviceAddress deviceAddress(const deviceDescription &)
Definition: DeviceDescriptions.cc:513
relval_steps.key
string key
FastSim: produces sample of signal events, overlayed with premixed minbias events.
Definition: relval_steps.py:736
LogTrace
#define LogTrace(id)
Definition: MessageLogger.h:502
SiStripConfigDb::clearFedConnections
void clearFedConnections(std::string partition="")
Definition: FedConnections.cc:278
FastFedCablingHistosUsingDb::connections
void connections(SiStripConfigDb::DeviceDescriptionsRange, SiStripConfigDb::DcuDetIdsRange)
Definition: FastFedCablingHistosUsingDb.cc:432
SiStripFedKey::feUnit
const uint16_t & feUnit() const
Definition: SiStripFedKey.h:195
SiStripConfigDb::dbParams
const SiStripDbParams & dbParams() const
Definition: SiStripConfigDb.h:468
FastFedCablingHistosUsingDb::update
void update(SiStripConfigDb::FedConnectionsV &, SiStripConfigDb::FedDescriptionsRange, SiStripConfigDb::DeviceDescriptionsRange, SiStripConfigDb::DcuDetIdsRange)
Definition: FastFedCablingHistosUsingDb.cc:109
SiStripConfigDb::uploadFedDescriptions
void uploadFedDescriptions(std::string partition="")
Definition: FedDescriptions.cc:201
FastFedCablingAnalysis::highRms
const float & highRms() const
Definition: FastFedCablingAnalysis.h:147
FastFedCablingAnalysis::lowRms
const float & lowRms() const
Definition: FastFedCablingAnalysis.h:149
tmp
std::vector< std::vector< double > > tmp
Definition: MVATrainer.cc:100
sistrip::FEDCH_PER_FED
static const uint16_t FEDCH_PER_FED
Definition: ConstantsForHardwareSystems.h:30
SiStripConfigDb::AnalysisDescriptionsV
std::vector< AnalysisDescription * > AnalysisDescriptionsV
Definition: SiStripConfigDb.h:145
SiStripFedKey::feChan
const uint16_t & feChan() const
Definition: SiStripFedKey.h:196
CommissioningAnalysis::detId
const uint32_t & detId() const
Definition: CommissioningAnalysis.h:139
HcalMonitorModule_cfi.feds
list feds
Definition: HcalMonitorModule_cfi.py:3
SiStripConfigDb::FedConnectionsV
std::vector< FedConnection * > FedConnectionsV
Definition: SiStripConfigDb.h:113
CommissioningHistosUsingDb::db
SiStripConfigDb *const db() const
Definition: CommissioningHistosUsingDb.h:100
SiStripConfigDb::addFedConnections
void addFedConnections(std::string partition, FedConnectionsV &)
Definition: FedConnections.cc:127
SiStripConfigDb::getDeviceDescriptions
DeviceDescriptionsRange getDeviceDescriptions(std::string partition="")
Definition: DeviceDescriptions.cc:11
SiStripConfigDb::getDcuDetIds
DcuDetIdsRange getDcuDetIds(std::string partition="")
Definition: DcuDetIds.cc:10
CommissioningHistosUsingDb::cabling
SiStripFedCabling *const cabling() const
Definition: CommissioningHistosUsingDb.h:101
CommissioningAnalysis::getErrorCodes
const VString & getErrorCodes() const
Definition: CommissioningAnalysis.h:133
results_mgr.conn
tuple conn
Definition: results_mgr.py:53
SiStripFecKey::terse
virtual void terse(std::stringstream &ss) const
Definition: SiStripFecKey.cc:753
FastFedCablingAnalysis::threshold_
static const float threshold_
Definition: FastFedCablingAnalysis.h:86
AlcaSiStripGainsHarvester_cff.DQMStore
tuple DQMStore
Definition: AlcaSiStripGainsHarvester_cff.py:10
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