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CSCMotherboardME11.cc
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1 //-----------------------------------------------------------------------------
2 //
3 // Class: CSCMotherboardME11
4 //
5 // Description:
6 // Extended CSCMotherboard for ME11 to handle ME1a and ME1b separately
7 //
8 // Author List: Vadim Khotilovich 12 May 2009
9 //
10 //
11 //-----------------------------------------------------------------------------
12 
14 //#include <Utilities/Timing/interface/TimingReport.h>
17 
18 
19 
20 // LUT for which ME1/1 wire group can cross which ME1/a halfstrip
21 // 1st index: WG number
22 // 2nd index: inclusive HS range
23 const int CSCMotherboardME11::lut_wg_vs_hs_me1a[48][2] = {
24 {0, 95},{0, 95},{0, 95},{0, 95},{0, 95},
25 {0, 95},{0, 95},{0, 95},{0, 95},{0, 95},
26 {0, 95},{0, 95},{0, 77},{0, 61},{0, 39},
27 {0, 22},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
28 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
29 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
30 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
31 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
32 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
33 {-1,-1},{-1,-1},{-1,-1} };
34 // a modified LUT for ganged ME1a
35 const int CSCMotherboardME11::lut_wg_vs_hs_me1ag[48][2] = {
36 {0, 31},{0, 31},{0, 31},{0, 31},{0, 31},
37 {0, 31},{0, 31},{0, 31},{0, 31},{0, 31},
38 {0, 31},{0, 31},{0, 31},{0, 31},{0, 31},
39 {0, 22},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
40 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
41 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
42 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
43 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
44 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
45 {-1,-1},{-1,-1},{-1,-1} };
46 
47 // LUT for which ME1/1 wire group can cross which ME1/b halfstrip
48 // 1st index: WG number
49 // 2nd index: inclusive HS range
50 const int CSCMotherboardME11::lut_wg_vs_hs_me1b[48][2] = {
51 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
52 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
53 {100, 127},{73, 127},{47, 127},{22, 127},{0, 127},
54 {0, 127},{0, 127},{0, 127},{0, 127},{0, 127},
55 {0, 127},{0, 127},{0, 127},{0, 127},{0, 127},
56 {0, 127},{0, 127},{0, 127},{0, 127},{0, 127},
57 {0, 127},{0, 127},{0, 127},{0, 127},{0, 127},
58 {0, 127},{0, 127},{0, 127},{0, 127},{0, 127},
59 {0, 127},{0, 127},{0, 127},{0, 127},{0, 105},
60 {0, 93},{0, 78},{0, 63} };
61 
62 
64  unsigned sector, unsigned subsector,
65  unsigned chamber,
66  const edm::ParameterSet& conf) :
67  CSCMotherboard(endcap, station, sector, subsector, chamber, conf)
68 {
69  edm::ParameterSet commonParams = conf.getParameter<edm::ParameterSet>("commonParam");
70 
71  // special configuration parameters for ME11 treatment
72  smartME1aME1b = commonParams.getParameter<bool>("smartME1aME1b");
73  disableME1a = commonParams.getParameter<bool>("disableME1a");
74  gangedME1a = commonParams.getParameter<bool>("gangedME1a");
75 
76  if (!isSLHC) edm::LogError("L1CSCTPEmulatorConfigError")
77  << "+++ Upgrade CSCMotherboardME11 constructed while isSLHC is not set! +++\n";
78  if (!smartME1aME1b) edm::LogError("L1CSCTPEmulatorConfigError")
79  << "+++ Upgrade CSCMotherboardME11 constructed while smartME1aME1b is not set! +++\n";
80 
81  edm::ParameterSet alctParams = conf.getParameter<edm::ParameterSet>("alctSLHC");
82  edm::ParameterSet clctParams = conf.getParameter<edm::ParameterSet>("clctSLHC");
83  edm::ParameterSet tmbParams = conf.getParameter<edm::ParameterSet>("tmbSLHC");
84 
85  clct1a.reset( new CSCCathodeLCTProcessor(endcap, station, sector, subsector, chamber, clctParams, commonParams, tmbParams) );
86  clct1a->setRing(4);
87 
88  match_earliest_alct_me11_only = tmbParams.getParameter<bool>("matchEarliestAlctME11Only");
89  match_earliest_clct_me11_only = tmbParams.getParameter<bool>("matchEarliestClctME11Only");
90 
91  // if true: use regular CLCT-to-ALCT matching in TMB
92  // if false: do ALCT-to-CLCT matching
93  clct_to_alct = tmbParams.getParameter<bool>("clctToAlct");
94 
95  // whether to not reuse CLCTs that were used by previous matching ALCTs
96  // in ALCT-to-CLCT algorithm
97  drop_used_clcts = tmbParams.getParameter<bool>("tmbDropUsedClcts");
98 
99  tmb_cross_bx_algo = tmbParams.getParameter<unsigned int>("tmbCrossBxAlgorithm");
100 
101  // maximum lcts per BX in ME11: 2, 3, 4 or 999
102  max_me11_lcts = tmbParams.getParameter<unsigned int>("maxME11LCTs");
103 
105  for (unsigned int m=2; m<match_trig_window_size; m+=2)
106  {
107  pref[m-1] = pref[0] - m/2;
108  pref[m] = pref[0] + m/2;
109  }
110 }
111 
112 
114 {
115  // Constructor used only for testing.
116 
117  clct1a.reset( new CSCCathodeLCTProcessor() );
118  clct1a->setRing(4);
119 
121  for (unsigned int m=2; m<match_trig_window_size; m+=2)
122  {
123  pref[m-1] = pref[0] - m/2;
124  pref[m] = pref[0] + m/2;
125  }
126 }
127 
128 
130 {
131 }
132 
133 
135 {
137  if (clct1a) clct1a->clear();
138  for (int bx = 0; bx < MAX_LCT_BINS; bx++)
139  {
140  //firstLCT1a[bx].clear();
141  //secondLCT1a[bx].clear();
142  for (unsigned int mbx = 0; mbx < match_trig_window_size; mbx++)
143  for (int i=0;i<2;i++)
144  {
145  allLCTs1b[bx][mbx][i].clear();
146  allLCTs1a[bx][mbx][i].clear();
147  }
148  }
149 }
150 
151 // Set configuration parameters obtained via EventSetup mechanism.
153 {
154  alct->setConfigParameters(conf);
155  clct->setConfigParameters(conf);
156  clct1a->setConfigParameters(conf);
157  // No config. parameters in DB for the TMB itself yet.
158 }
159 
160 
162  const CSCComparatorDigiCollection* compdc)
163 {
164  clear();
165 
166  if (!( alct && clct && clct1a && smartME1aME1b))
167  {
168  if (infoV >= 0) edm::LogError("L1CSCTPEmulatorSetupError")
169  << "+++ run() called for non-existing ALCT/CLCT processor! +++ \n";
170  return;
171  }
172 
173  alctV = alct->run(wiredc); // run anodeLCT
174  clctV1b = clct->run(compdc); // run cathodeLCT in ME1/b
175  clctV1a = clct1a->run(compdc); // run cathodeLCT in ME1/a
176 
177  //int n_clct_a=0, n_clct_b=0;
178  //if (clct1a->bestCLCT[6].isValid() && clct1a->bestCLCT[6].getBX()==6) n_clct_a++;
179  //if (clct1a->secondCLCT[6].isValid() && clct1a->secondCLCT[6].getBX()==6) n_clct_a++;
180 
181  int used_alct_mask[20], used_alct_mask_1a[20];
182  int used_clct_mask[20], used_clct_mask_1a[20];
183  for (int b=0;b<20;b++)
184  used_alct_mask[b] = used_alct_mask_1a[b] = used_clct_mask[b] = used_clct_mask_1a[b] = 0;
185 
186  // CLCT-centric CLCT-to-ALCT matching
187  if (clct_to_alct) for (int bx_clct = 0; bx_clct < CSCCathodeLCTProcessor::MAX_CLCT_BINS; bx_clct++)
188  {
189  // matching in ME1b
190  if (clct->bestCLCT[bx_clct].isValid())
191  {
192  int bx_alct_start = bx_clct - match_trig_window_size/2;
193  int bx_alct_stop = bx_clct + match_trig_window_size/2;
194  for (int bx_alct = bx_alct_start; bx_alct <= bx_alct_stop; bx_alct++)
195  {
196  if (bx_alct < 0 || bx_alct >= CSCAnodeLCTProcessor::MAX_ALCT_BINS) continue;
197  if (drop_used_alcts && used_alct_mask[bx_alct]) continue;
198  if (alct->bestALCT[bx_alct].isValid())
199  {
200  if (infoV > 1) LogTrace("CSCMotherboard")
201  << "Successful CLCT-ALCT match in ME1b: bx_clct = " << bx_clct
202  << "; match window: [" << bx_alct_start << "; " << bx_alct_stop
203  << "]; bx_alct = " << bx_alct;
204  int mbx = bx_alct_stop - bx_alct;
205  correlateLCTs(alct->bestALCT[bx_alct], alct->secondALCT[bx_alct],
206  clct->bestCLCT[bx_clct], clct->secondCLCT[bx_clct],
207  allLCTs1b[bx_alct][mbx][0], allLCTs1b[bx_alct][mbx][1], ME1B);
208  if (allLCTs1b[bx_alct][mbx][0].isValid())
209  {
210  used_alct_mask[bx_alct] += 1;
212  }
213  }
214  }
215  // Do not report CLCT-only LCT for ME1b
216  }
217  // matching in ME1a
218  if (clct1a->bestCLCT[bx_clct].isValid())
219  {
220  int bx_alct_start = bx_clct - match_trig_window_size/2;
221  int bx_alct_stop = bx_clct + match_trig_window_size/2;
222  for (int bx_alct = bx_alct_start; bx_alct <= bx_alct_stop; bx_alct++)
223  {
224  if (bx_alct < 0 || bx_alct >= CSCAnodeLCTProcessor::MAX_ALCT_BINS) continue;
225  if (drop_used_alcts && used_alct_mask_1a[bx_alct]) continue;
226  if (alct->bestALCT[bx_alct].isValid())
227  {
228  if (infoV > 1) LogTrace("CSCMotherboard")
229  << "Successful CLCT-ALCT match in ME1a: bx_clct = " << bx_clct
230  << "; match window: [" << bx_alct_start << "; " << bx_alct_stop
231  << "]; bx_alct = " << bx_alct;
232  int mbx = bx_alct_stop - bx_alct;
233  correlateLCTs(alct->bestALCT[bx_alct], alct->secondALCT[bx_alct],
234  clct1a->bestCLCT[bx_clct], clct1a->secondCLCT[bx_clct],
235  allLCTs1a[bx_alct][mbx][0], allLCTs1a[bx_alct][mbx][1], ME1A);
236  if (allLCTs1a[bx_alct][mbx][0].isValid())
237  {
238  used_alct_mask_1a[bx_alct] += 1;
240  }
241  }
242  }
243  // Do not report CLCT-only LCT for ME1b
244  }
245  // Do not attempt to make ALCT-only LCT for ME1b
246  } // end of CLCT-centric matching
247 
248  // ALCT-centric ALCT-to-CLCT matching
249  else for (int bx_alct = 0; bx_alct < CSCAnodeLCTProcessor::MAX_ALCT_BINS; bx_alct++)
250  {
251  if (alct->bestALCT[bx_alct].isValid())
252  {
253  int bx_clct_start = bx_alct - match_trig_window_size/2;
254  int bx_clct_stop = bx_alct + match_trig_window_size/2;
255 
256  // matching in ME1b
257  for (int bx_clct = bx_clct_start; bx_clct <= bx_clct_stop; bx_clct++)
258  {
259  if (bx_clct < 0 || bx_clct >= CSCCathodeLCTProcessor::MAX_CLCT_BINS) continue;
260  if (drop_used_clcts && used_clct_mask[bx_clct]) continue;
261  if (clct->bestCLCT[bx_clct].isValid())
262  {
263  if (infoV > 1) LogTrace("CSCMotherboard")
264  << "Successful ALCT-CLCT match in ME1b: bx_alct = " << bx_alct
265  << "; match window: [" << bx_clct_start << "; " << bx_clct_stop
266  << "]; bx_clct = " << bx_clct;
267  int mbx = bx_clct-bx_clct_start;
268  correlateLCTs(alct->bestALCT[bx_alct], alct->secondALCT[bx_alct],
269  clct->bestCLCT[bx_clct], clct->secondCLCT[bx_clct],
270  allLCTs1b[bx_alct][mbx][0], allLCTs1b[bx_alct][mbx][1], ME1B);
271  if (allLCTs1b[bx_alct][mbx][0].isValid())
272  {
273  used_clct_mask[bx_clct] += 1;
275  }
276  }
277  }
278 
279  // matching in ME1a
280  for (int bx_clct = bx_clct_start; bx_clct <= bx_clct_stop; bx_clct++)
281  {
282  if (bx_clct < 0 || bx_clct >= CSCCathodeLCTProcessor::MAX_CLCT_BINS) continue;
283  if (drop_used_clcts && used_clct_mask_1a[bx_clct]) continue;
284  if (clct1a->bestCLCT[bx_clct].isValid())
285  {
286  if (infoV > 1) LogTrace("CSCMotherboard")
287  << "Successful ALCT-CLCT match in ME1a: bx_alct = " << bx_alct
288  << "; match window: [" << bx_clct_start << "; " << bx_clct_stop
289  << "]; bx_clct = " << bx_clct;
290  int mbx = bx_clct-bx_clct_start;
291  correlateLCTs(alct->bestALCT[bx_alct], alct->secondALCT[bx_alct],
292  clct1a->bestCLCT[bx_clct], clct1a->secondCLCT[bx_clct],
293  allLCTs1a[bx_alct][mbx][0], allLCTs1a[bx_alct][mbx][1], ME1A);
294  if (allLCTs1a[bx_alct][mbx][0].isValid())
295  {
296  used_clct_mask_1a[bx_clct] += 1;
298  }
299  }
300  }
301  }
302  } // end of ALCT-centric matching
303 
304  // reduction of nLCTs per each BX
305  for (int bx = 0; bx < MAX_LCT_BINS; bx++)
306  {
307  // counting
308  unsigned int n1a=0, n1b=0;
309  for (unsigned int mbx = 0; mbx < match_trig_window_size; mbx++)
310  for (int i=0;i<2;i++)
311  {
312  int cbx = bx + mbx - match_trig_window_size/2;
313  if (allLCTs1b[bx][mbx][i].isValid())
314  {
315  n1b++;
316  if (infoV > 0) LogDebug("CSCMotherboard") << "1b LCT"<<i+1<<" "<<bx<<"/"<<cbx<<": "<<allLCTs1b[bx][mbx][i];
317  }
318  if (allLCTs1a[bx][mbx][i].isValid())
319  {
320  n1a++;
321  if (infoV > 0) LogDebug("CSCMotherboard") << "1a LCT"<<i+1<<" "<<bx<<"/"<<cbx<<": "<<allLCTs1a[bx][mbx][i];
322  }
323  }
324  if (infoV > 0 && n1a+n1b>0) LogDebug("CSCMotherboard") <<"bx "<<bx<<" nLCT:"<<n1a<<" "<<n1b<<" "<<n1a+n1b;
325 
326  // some simple cross-bx sorting algorithms
327  if (tmb_cross_bx_algo == 1 && (n1a>2 || n1b>2) )
328  {
329  n1a=0, n1b=0;
330  for (unsigned int mbx = 0; mbx < match_trig_window_size; mbx++)
331  for (int i=0;i<2;i++)
332  {
333  if (allLCTs1b[bx][pref[mbx]][i].isValid())
334  {
335  n1b++;
336  if (n1b>2) allLCTs1b[bx][pref[mbx]][i].clear();
337  }
338  if (allLCTs1a[bx][pref[mbx]][i].isValid())
339  {
340  n1a++;
341  if (n1a>2) allLCTs1a[bx][pref[mbx]][i].clear();
342  }
343  }
344 
345  if (infoV > 0) LogDebug("CSCMotherboard") <<"After x-bx sorting:";
346  n1a=0, n1b=0;
347  for (unsigned int mbx = 0; mbx < match_trig_window_size; mbx++)
348  for (int i=0;i<2;i++)
349  {
350  int cbx = bx + mbx - match_trig_window_size/2;
351  if (allLCTs1b[bx][mbx][i].isValid())
352  {
353  n1b++;
354  if (infoV > 0) LogDebug("CSCMotherboard") << "1b LCT"<<i+1<<" "<<bx<<"/"<<cbx<<": "<<allLCTs1b[bx][mbx][i];
355  }
356  if (allLCTs1a[bx][mbx][i].isValid())
357  {
358  n1a++;
359  if (infoV > 0) LogDebug("CSCMotherboard") << "1a LCT"<<i+1<<" "<<bx<<"/"<<cbx<<": "<<allLCTs1a[bx][mbx][i];
360  }
361  }
362  if (infoV > 0 && n1a+n1b>0) LogDebug("CSCMotherboard") <<"bx "<<bx<<" nnLCT:"<<n1a<<" "<<n1b<<" "<<n1a+n1b;
363  } // x-bx sorting
364 
365  // Maximum 2 or 3 per whole ME11 per BX case:
366  // (supposedly, now we should have max 2 per bx in each 1a and 1b)
367  if ( n1a+n1b > max_me11_lcts )
368  {
369  // do it simple so far: take all low eta 1/b stubs
370  unsigned int nLCT=n1b;
371  n1a=0;
372  // right now nLCT<=2; cut 1a if necessary
373  for (unsigned int mbx=0; mbx<match_trig_window_size; mbx++)
374  for (int i=0;i<2;i++)
375  if (allLCTs1a[bx][mbx][i].isValid()) {
376  nLCT++;
377  if (nLCT>max_me11_lcts) allLCTs1a[bx][mbx][i].clear();
378  else n1a++;
379  }
380  if (infoV > 0 && nLCT>0) LogDebug("CSCMotherboard") <<"bx "<<bx<<" nnnLCT:"<<n1a<<" "<<n1b<<" "<<n1a+n1b;
381  }
382  }// reduction per bx
383 
384  //if (infoV > 1) LogTrace("CSCMotherboardME11")<<"clct_count E:"<<theEndcap<<"S:"<<theStation<<"R:"<<1<<"C:"
385  // <<CSCTriggerNumbering::chamberFromTriggerLabels(theSector,theSubsector, theStation, theTrigChamber)
386  // <<" a "<<n_clct_a<<" b "<<n_clct_b<<" ab "<<n_clct_a+n_clct_b;
387 }
388 
389 
390 std::vector<CSCCorrelatedLCTDigi> CSCMotherboardME11::readoutLCTs1a()
391 {
392  return readoutLCTs(ME1A);
393 }
394 
395 
396 std::vector<CSCCorrelatedLCTDigi> CSCMotherboardME11::readoutLCTs1b()
397 {
398  return readoutLCTs(ME1B);
399 }
400 
401 
402 // Returns vector of read-out correlated LCTs, if any. Starts with
403 // the vector of all found LCTs and selects the ones in the read-out
404 // time window.
405 std::vector<CSCCorrelatedLCTDigi> CSCMotherboardME11::readoutLCTs(int me1ab)
406 {
407  std::vector<CSCCorrelatedLCTDigi> tmpV;
408 
409  // The start time of the L1A*LCT coincidence window should be related
410  // to the fifo_pretrig parameter, but I am not completely sure how.
411  // Just choose it such that the window is centered at bx=7. This may
412  // need further tweaking if the value of tmb_l1a_window_size changes.
413  //static int early_tbins = 4;
414  // The number of LCT bins in the read-out is given by the
415  // tmb_l1a_window_size parameter, forced to be odd
416  static int lct_bins =
418  static int late_tbins = early_tbins + lct_bins;
419 
420 
421  // Start from the vector of all found correlated LCTs and select
422  // those within the LCT*L1A coincidence window.
423  int bx_readout = -1;
424  std::vector<CSCCorrelatedLCTDigi> all_lcts;
425  if (me1ab == ME1A) all_lcts = getLCTs1a();
426  if (me1ab == ME1B) all_lcts = getLCTs1b();
427  std::vector <CSCCorrelatedLCTDigi>::const_iterator plct = all_lcts.begin();
428  for (; plct != all_lcts.end(); plct++)
429  {
430  if (!plct->isValid()) continue;
431 
432  int bx = (*plct).getBX();
433  // Skip LCTs found too early relative to L1Accept.
434  if (bx <= early_tbins) continue;
435 
436  // Skip LCTs found too late relative to L1Accept.
437  if (bx > late_tbins) continue;
438 
439  // If (readout_earliest_2) take only LCTs in the earliest bx in the read-out window:
440  // in digi->raw step, LCTs have to be packed into the TMB header, and
441  // currently there is room just for two.
442  if (readout_earliest_2 && (bx_readout == -1 || bx == bx_readout) )
443  {
444  tmpV.push_back(*plct);
445  if (bx_readout == -1) bx_readout = bx;
446  }
447  else tmpV.push_back(*plct);
448  }
449  return tmpV;
450 }
451 
452 
453 // Returns vector of found correlated LCTs, if any.
454 std::vector<CSCCorrelatedLCTDigi> CSCMotherboardME11::getLCTs1b()
455 {
456  std::vector<CSCCorrelatedLCTDigi> tmpV;
457 
458  for (int bx = 0; bx < MAX_LCT_BINS; bx++)
459  for (unsigned int mbx = 0; mbx < match_trig_window_size; mbx++)
460  for (int i=0;i<2;i++)
461  if (allLCTs1b[bx][mbx][i].isValid()) tmpV.push_back(allLCTs1b[bx][mbx][i]);
462  return tmpV;
463 }
464 
465 // Returns vector of found correlated LCTs, if any.
466 std::vector<CSCCorrelatedLCTDigi> CSCMotherboardME11::getLCTs1a()
467 {
468  std::vector<CSCCorrelatedLCTDigi> tmpV;
469 
470  // disabled ME1a
471  if (mpc_block_me1a || disableME1a) return tmpV;
472 
473  // Report all LCTs found.
474  for (int bx = 0; bx < MAX_LCT_BINS; bx++)
475  for (unsigned int mbx = 0; mbx < match_trig_window_size; mbx++)
476  for (int i=0;i<2;i++)
477  if (allLCTs1a[bx][mbx][i].isValid()) tmpV.push_back(allLCTs1a[bx][mbx][i]);
478  return tmpV;
479 }
480 
481 
483 {
484  if ( !c.isValid() || !a.isValid() ) return false;
485  int key_hs = c.getKeyStrip();
486  int key_wg = a.getKeyWG();
487  if ( me == ME1A )
488  {
489  if ( !gangedME1a )
490  {
491  // wrap around ME11 HS number for -z endcap
492  if (theEndcap==2) key_hs = 95 - key_hs;
493  if ( key_hs >= lut_wg_vs_hs_me1a[key_wg][0] &&
494  key_hs <= lut_wg_vs_hs_me1a[key_wg][1] ) return true;
495  return false;
496  }
497  else
498  {
499  if (theEndcap==2) key_hs = 31 - key_hs;
500  if ( key_hs >= lut_wg_vs_hs_me1ag[key_wg][0] &&
501  key_hs <= lut_wg_vs_hs_me1ag[key_wg][1] ) return true;
502  return false;
503  }
504  }
505  if ( me == ME1B)
506  {
507  if (theEndcap==2) key_hs = 127 - key_hs;
508  if ( key_hs >= lut_wg_vs_hs_me1b[key_wg][0] &&
509  key_hs <= lut_wg_vs_hs_me1b[key_wg][1] ) return true;
510  }
511  return false;
512 }
513 
514 
516  CSCALCTDigi secondALCT,
517  CSCCLCTDigi bestCLCT,
518  CSCCLCTDigi secondCLCT,
519  CSCCorrelatedLCTDigi& lct1,
520  CSCCorrelatedLCTDigi& lct2)
521 {
522  bool anodeBestValid = bestALCT.isValid();
523  bool anodeSecondValid = secondALCT.isValid();
524  bool cathodeBestValid = bestCLCT.isValid();
525  bool cathodeSecondValid = secondCLCT.isValid();
526 
527  if (anodeBestValid && !anodeSecondValid) secondALCT = bestALCT;
528  if (!anodeBestValid && anodeSecondValid) bestALCT = secondALCT;
529  if (cathodeBestValid && !cathodeSecondValid) secondCLCT = bestCLCT;
530  if (!cathodeBestValid && cathodeSecondValid) bestCLCT = secondCLCT;
531 
532  // ALCT-CLCT matching conditions are defined by "trig_enable" configuration
533  // parameters.
534  if ((alct_trig_enable && bestALCT.isValid()) ||
535  (clct_trig_enable && bestCLCT.isValid()) ||
536  (match_trig_enable && bestALCT.isValid() && bestCLCT.isValid()))
537  {
538  lct1 = constructLCTs(bestALCT, bestCLCT);
539  lct1.setTrknmb(1);
540  }
541 
542  if (((secondALCT != bestALCT) || (secondCLCT != bestCLCT)) &&
543  ((alct_trig_enable && secondALCT.isValid()) ||
544  (clct_trig_enable && secondCLCT.isValid()) ||
545  (match_trig_enable && secondALCT.isValid() && secondCLCT.isValid())))
546  {
547  lct2 = constructLCTs(secondALCT, secondCLCT);
548  lct2.setTrknmb(2);
549  }
550 }
551 
552 
554  CSCALCTDigi secondALCT,
555  CSCCLCTDigi bestCLCT,
556  CSCCLCTDigi secondCLCT,
557  CSCCorrelatedLCTDigi& lct1,
558  CSCCorrelatedLCTDigi& lct2,
559  int me)
560 {
561  // assume that always anodeBestValid && cathodeBestValid
562 
563  if (secondALCT == bestALCT) secondALCT.clear();
564  if (secondCLCT == bestCLCT) secondCLCT.clear();
565 
566  int ok11 = doesALCTCrossCLCT( bestALCT, bestCLCT, me);
567  int ok12 = doesALCTCrossCLCT( bestALCT, secondCLCT, me);
568  int ok21 = doesALCTCrossCLCT( secondALCT, bestCLCT, me);
569  int ok22 = doesALCTCrossCLCT( secondALCT, secondCLCT, me);
570  int code = (ok11<<3) | (ok12<<2) | (ok21<<1) | (ok22);
571 
572  int dbg=0;
573  int ring = me;
575  CSCDetId did(theEndcap, theStation, ring, chamb, 0);
576  if (dbg) LogTrace("CSCMotherboardME11")<<"debug correlateLCTs in "<<did<<std::endl
577  <<"ALCT1: "<<bestALCT<<std::endl
578  <<"ALCT2: "<<secondALCT<<std::endl
579  <<"CLCT1: "<<bestCLCT<<std::endl
580  <<"CLCT2: "<<secondCLCT<<std::endl
581  <<"ok 11 12 21 22 code = "<<ok11<<" "<<ok12<<" "<<ok21<<" "<<ok22<<" "<<code<<std::endl;
582 
583  if ( code==0 ) return;
584 
585  // LUT defines correspondence between possible ok## combinations
586  // and resulting lct1 and lct2
587  int lut[16][2] = {
588  //ok: 11 12 21 22
589  {0 ,0 }, // 0 0 0 0
590  {22,0 }, // 0 0 0 1
591  {21,0 }, // 0 0 1 0
592  {21,22}, // 0 0 1 1
593  {12,0 }, // 0 1 0 0
594  {12,22}, // 0 1 0 1
595  {12,21}, // 0 1 1 0
596  {12,21}, // 0 1 1 1
597  {11,0 }, // 1 0 0 0
598  {11,22}, // 1 0 0 1
599  {11,21}, // 1 0 1 0
600  {11,22}, // 1 0 1 1
601  {11,12}, // 1 1 0 0
602  {11,22}, // 1 1 0 1
603  {11,12}, // 1 1 1 0
604  {11,22}, // 1 1 1 1
605  };
606 
607  if (dbg) LogTrace("CSCMotherboardME11")<<"lut 0 1 = "<<lut[code][0]<<" "<<lut[code][1]<<std::endl;
608 
609  switch (lut[code][0]) {
610  case 11:
611  lct1 = constructLCTs(bestALCT, bestCLCT);
612  break;
613  case 12:
614  lct1 = constructLCTs(bestALCT, secondCLCT);
615  break;
616  case 21:
617  lct1 = constructLCTs(secondALCT, bestCLCT);
618  break;
619  case 22:
620  lct1 = constructLCTs(secondALCT, secondCLCT);
621  break;
622  default: return;
623  }
624  lct1.setTrknmb(1);
625 
626  if (dbg) LogTrace("CSCMotherboardME11")<<"lct1: "<<lct1<<std::endl;
627 
628  switch (lut[code][1])
629  {
630  case 12:
631  lct2 = constructLCTs(bestALCT, secondCLCT);
632  lct2.setTrknmb(2);
633  if (dbg) LogTrace("CSCMotherboardME11")<<"lct2: "<<lct2<<std::endl;
634  return;
635  case 21:
636  lct2 = constructLCTs(secondALCT, bestCLCT);
637  lct2.setTrknmb(2);
638  if (dbg) LogTrace("CSCMotherboardME11")<<"lct2: "<<lct2<<std::endl;
639  return;
640  case 22:
641  lct2 = constructLCTs(secondALCT, secondCLCT);
642  lct2.setTrknmb(2);
643  if (dbg) LogTrace("CSCMotherboardME11")<<"lct2: "<<lct2<<std::endl;
644  return;
645  default: return;
646  }
647  if (dbg) LogTrace("CSCMotherboardME11")<<"out of correlateLCTs"<<std::endl;
648 
649  return;
650 }
651 
#define LogDebug(id)
const unsigned theSector
T getParameter(std::string const &) const
std::vector< CSCCLCTDigi > clctV1a
int i
Definition: DBlmapReader.cc:9
CSCCorrelatedLCTDigi constructLCTs(const CSCALCTDigi &aLCT, const CSCCLCTDigi &cLCT)
CSCCorrelatedLCTDigi allLCTs1b[MAX_LCT_BINS][15][2]
void run(const CSCWireDigiCollection *wiredc, const CSCComparatorDigiCollection *compdc)
unsigned int clct_trig_enable
void setConfigParameters(const CSCDBL1TPParameters *conf)
std::vector< CSCCorrelatedLCTDigi > readoutLCTs()
unsigned int match_trig_window_size
const unsigned theTrigChamber
bool isValid() const
check ALCT validity (1 - valid ALCT)
Definition: CSCALCTDigi.h:30
int pref[MAX_LCT_BINS]
unsigned int max_me11_lcts
const unsigned theEndcap
void clear()
clear this ALCT
Definition: CSCALCTDigi.cc:35
static const int lut_wg_vs_hs_me1a[48][2]
std::vector< CSCCorrelatedLCTDigi > getLCTs1b()
std::unique_ptr< CSCCathodeLCTProcessor > clct1a
void correlateLCTs(CSCALCTDigi bestALCT, CSCALCTDigi secondALCT, CSCCLCTDigi bestCLCT, CSCCLCTDigi secondCLCT, CSCCorrelatedLCTDigi &lct1, CSCCorrelatedLCTDigi &lct2)
unsigned int mpc_block_me1a
unsigned int tmb_cross_bx_algo
CSCCorrelatedLCTDigi allLCTs1a[MAX_LCT_BINS][15][2]
const unsigned theStation
std::vector< CSCALCTDigi > alctV
const unsigned theSubsector
unsigned int tmb_l1a_window_size
bool isValid() const
check CLCT validity (1 - valid CLCT)
Definition: CSCCLCTDigi.h:30
unsigned int match_trig_enable
tuple lut
Definition: lumiPlot.py:244
static const int lut_wg_vs_hs_me1b[48][2]
static const int lut_wg_vs_hs_me1ag[48][2]
#define LogTrace(id)
tuple conf
Definition: dbtoconf.py:185
double b
Definition: hdecay.h:120
unsigned int alct_trig_enable
std::vector< CSCCorrelatedLCTDigi > getLCTs1a()
std::vector< CSCCLCTDigi > clctV1b
std::unique_ptr< CSCAnodeLCTProcessor > alct
double a
Definition: hdecay.h:121
bool doesALCTCrossCLCT(CSCALCTDigi &a, CSCCLCTDigi &c, int me)
std::unique_ptr< CSCCathodeLCTProcessor > clct
std::vector< CSCCorrelatedLCTDigi > readoutLCTs1b()
void clear()
clear this CLCT
Definition: CSCCLCTDigi.cc:58
int getKeyStrip() const
Definition: CSCCLCTDigi.h:65
void setTrknmb(const uint16_t number)
Set track number (1,2) after sorting LCTs.
int getKeyWG() const
return key wire group
Definition: CSCALCTDigi.h:45
static int chamberFromTriggerLabels(int TriggerSector, int TriggerSubSector, int station, int TriggerCSCID)
std::vector< CSCCorrelatedLCTDigi > readoutLCTs1a()