180 std::vector<uint32_t> detIdV;
183 for(uint32_t
i=0;
i < detIdV.size(); ++
i){
186 pedestals.resize((pedestalsRange.second- pedestalsRange.first)*8/10);
198 for (; itCMDetSetV != moduleCM->end(); ++itCMDetSetV){
200 for(;itCM != itCMDetSetV->
end(); ++itCM)
h1APVCM_->Fill(itCM->adc());
239 uint32_t NBabAPVs = moduleRawDigi->size();
240 std::cout<<
"Number of module with HIP in this event: " << NBabAPVs << std::endl;
243 for (; itRawDigis != moduleRawDigi->end(); ++itRawDigis) {
245 uint32_t detId = itRawDigis->id;
249 if(itDSBaseline->id != detId){
250 std::cout <<
"Collections out of Synch. Something of fishy is going on ;-)" << std::endl;
257 uint32_t
event = e.
id().
event();
264 bool restAPV[6] = {0,0,0,0,0,0};
265 int strip =0, totADC=0;
266 int minAPVRes = 7, maxAPVRes = -1;
267 for(;itRaw != itRawDigis->
end(); ++itRaw, ++strip){
268 float adc = itRaw->adc();
276 if(APV>maxAPVRes) maxAPVRes =
APV;
277 if(APV<minAPVRes) minAPVRes =
APV;
283 float minx = -0.5, maxx=767.5;
285 minx = minAPVRes * 128 -0.5;
286 maxx = maxAPVRes * 128 + 127.5;
290 sprintf(detIds,
"%ul", detId);
291 sprintf(evs,
"%ul",
event);
292 sprintf(
runs,
"%ul", run);
293 char* dHistoName = Form(
"Id:%s_run:%s_ev:%s",detIds,
runs, evs);
294 h1ProcessedRawDigis_ = sdProcessedRawDigis_.make<TH1F>(dHistoName,dHistoName, bins, minx, maxx);
297 h1Baseline_ = sdBaseline_.make<TH1F>(dHistoName,dHistoName, bins, minx, maxx);
308 h1Clusters_ = sdClusters_.make<TH1F>(dHistoName,dHistoName, bins, minx, maxx);
325 std::vector<int16_t> ProcessedRawDigis(itRawDigis->size());
330 std::vector<int16_t>::const_iterator itProcessedRawDigis;
333 for(itProcessedRawDigis = ProcessedRawDigis.begin();itProcessedRawDigis != ProcessedRawDigis.end(); ++itProcessedRawDigis){
334 if(restAPV[strip/128]){
335 float adc = *itProcessedRawDigis;
348 for ( ; itClusters != clusters->
end(); ++itClusters ){
350 if(itClusters->
id() == detId){
351 int firststrip = clus->firstStrip();
354 for( std::vector<uint8_t>::const_iterator itAmpl = clus->amplitudes().begin(); itAmpl != clus->amplitudes().end(); ++itAmpl){
int adc(sample_type sample)
get the ADC sample (12 bits)
EventNumber_t event() const
boost::transform_iterator< IterHelp, const_IdIter > const_iterator
const_iterator end(bool update=false) const
data_type const * const_iterator
std::pair< ContainerIterator, ContainerIterator > Range
edm::InputTag srcProcessedRawDigi_
id_type id(size_t cell) const
How EventSelector::AcceptEvent() decides whether to accept an event for output otherwise it is excluding the probing of A single or multiple positive and the trigger will pass if any such matching triggers are PASS or EXCEPTION[A criterion thatmatches no triggers at all is detected and causes a throw.] A single negative with an expectation of appropriate bit checking in the decision and the trigger will pass if any such matching triggers are FAIL or EXCEPTION A wildcarded negative criterion that matches more than one trigger in the trigger but the state exists so we define the behavior If all triggers are the negative crieriion will lead to accepting the event(this again matches the behavior of"!*"before the partial wildcard feature was incorporated).The per-event"cost"of each negative criterion with multiple relevant triggers is about the same as!*was in the past
edm::Service< TFileService > fs_
bool getByLabel(InputTag const &tag, Handle< PROD > &result) const
iterator end()
Return the off-the-end iterator.
TH1F * h1ProcessedRawDigis_
TFileDirectory mkdir(const std::string &dir, const std::string &descr="")
create a new subdirectory
edm::InputTag srcBaseline_
std::vector< int > pedestals
uint16_t nModuletoDisplay_
iterator begin()
Return an iterator to the first DetSet.
edm::ESHandle< SiStripPedestals > pedestalsHandle
collection_type::const_iterator const_iterator
collection_type::const_iterator const_iterator
std::auto_ptr< SiStripPedestalsSubtractor > subtractorPed_
const_iterator begin(bool update=false) const
Public Types inherited from edm::EDAnalyzer
1.8.5
