1 #ifndef DQM_SiStripMonitorHardware_SiStripSpyDigiConverter_H
2 #define DQM_SiStripMonitorHardware_SiStripSpyDigiConverter_H
4 #include "boost/cstdint.hpp"
40 std::vector<uint32_t> * pAPVAddresses,
41 const bool discardDigisWithAPVAddrErr,
43 const uint16_t expectedPos);
55 static void processFED(
const uint16_t aPreviousFedId,
56 const bool discardDigisWithAPVAddrErr,
57 std::vector<uint32_t> * pAPVAddresses,
58 std::vector<DetSetRawDigis> & outputData,
59 std::vector<uint16_t> & aAddrVec,
60 std::vector<uint16_t> & aHeaderBitVec,
61 std::vector<DSVRawDigis::const_iterator> & aFedScopeDigis
68 #endif // DQM_SiStripMonitorHardware_SiStripSpyDigiConverter_H
Converts scope mode like digis into virgin raw like digis by: -extracting the frame payload...
static std::auto_ptr< DSVRawDigis > mergeModuleChannels(const DSVRawDigis *inputPhysicalOrderChannelDigis, const SiStripFedCabling &cabling)
DSVRawDigis::detset DetSetRawDigis
static void processFED(const uint16_t aPreviousFedId, const bool discardDigisWithAPVAddrErr, std::vector< uint32_t > *pAPVAddresses, std::vector< DetSetRawDigis > &outputData, std::vector< uint16_t > &aAddrVec, std::vector< uint16_t > &aHeaderBitVec, std::vector< DSVRawDigis::const_iterator > &aFedScopeDigis)
static std::auto_ptr< DSVRawDigis > extractPayloadDigis(const DSVRawDigis *inputScopeDigis, std::vector< uint32_t > *pAPVAddresses, const bool discardDigisWithAPVAddrErr, const sistrip::SpyUtilities::FrameQuality &aQuality, const uint16_t expectedPos)
Extract frames from the scope digis.
static std::auto_ptr< DSVRawDigis > reorderDigis(const DSVRawDigis *inputPayloadDigis)
edm::DetSetVector< SiStripRawDigi > DSVRawDigis
Contains cabling info at the device level, including DetId, APV pair numbers, hardware addresses...