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CSCTFSectorProcessor.cc
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1 #include <L1Trigger/CSCTrackFinder/interface/CSCTFSectorProcessor.h>
2 #include <L1Trigger/CSCTrackFinder/interface/CSCTrackFinderDataTypes.h>
3 #include <DataFormats/MuonDetId/interface/CSCTriggerNumbering.h>
4 
5 #include <FWCore/MessageLogger/interface/MessageLogger.h>
6 
7 #include "CondFormats/L1TObjects/interface/L1MuCSCTFConfiguration.h"
8 #include "CondFormats/DataRecord/interface/L1MuCSCTFConfigurationRcd.h"
9 #include "FWCore/Framework/interface/ESHandle.h"
10 #include <stdlib.h>
11 #include <sstream>
12 #include <strings.h>
13 
14 const std::string CSCTFSectorProcessor::FPGAs[5] = {"F1","F2","F3","F4","F5"};
15 
16 CSCTFSectorProcessor::CSCTFSectorProcessor(const unsigned& endcap,
17  const unsigned& sector,
18  const edm::ParameterSet& pset,
19  bool tmb07,
20  const L1MuTriggerScales* scales,
21  const L1MuTriggerPtScale* ptScale)
22 {
23  m_endcap = endcap;
24  m_sector = sector;
25  TMB07 = tmb07;
26 
27  // allows a configurable option to handle unganged ME1a
28  m_gangedME1a = pset.getUntrackedParameter<bool>("gangedME1a", true);
29 
30  // Parameter below should always present in ParameterSet:
31  m_latency = pset.getParameter<unsigned>("CoreLatency");
32  m_minBX = pset.getParameter<int>("MinBX");
33  m_maxBX = pset.getParameter<int>("MaxBX");
34  initializeFromPSet = pset.getParameter<bool>("initializeFromPSet");
35  if( m_maxBX-m_minBX >= 7 ) edm::LogWarning("CSCTFTrackBuilder::ctor")<<" BX window width >= 7BX. Resetting m_maxBX="<<(m_maxBX=m_minBX+6);
36 
37  // All following parameters may appear in either ParameterSet of in EventSetup; uninitialize:
38  m_bxa_depth = -1;
39  m_allowALCTonly = -1;
40  m_allowCLCTonly = -1;
41  m_preTrigger = -1;
42 
43  for(int index=0; index<7; index++) m_etawin[index] = -1;
44  for(int index=0; index<8; index++) m_etamin[index] = -1;
45  for(int index=0; index<8; index++) m_etamax[index] = -1;
46 
47  m_mindphip=-1;
48  m_mindetap=-1;
49 
50  m_mindeta12_accp=-1;
51  m_maxdeta12_accp=-1;
52  m_maxdphi12_accp=-1;
53 
54  m_mindeta13_accp=-1;
55  m_maxdeta13_accp=-1;
56  m_maxdphi13_accp=-1;
57 
58  m_mindeta112_accp=-1;
59  m_maxdeta112_accp=-1;
60  m_maxdphi112_accp=-1;
61 
62  m_mindeta113_accp=-1;
63  m_maxdeta113_accp=-1;
64  m_maxdphi113_accp=-1;
65  m_mindphip_halo=-1;
66  m_mindetap_halo=-1;
67 
68  m_widePhi=-1;
69 
70  m_straightp=-1;
71  m_curvedp=-1;
72 
73  m_mbaPhiOff=-1;
74  m_mbbPhiOff=-1;
75 
76  kill_fiber = -1;
77  QualityEnableME1a = -1;
78  QualityEnableME1b = -1;
79  QualityEnableME1c = -1;
80  QualityEnableME1d = -1;
81  QualityEnableME1e = -1;
82  QualityEnableME1f = -1;
83  QualityEnableME2a = -1;
84  QualityEnableME2b = -1;
85  QualityEnableME2c = -1;
86  QualityEnableME3a = -1;
87  QualityEnableME3b = -1;
88  QualityEnableME3c = -1;
89  QualityEnableME4a = -1;
90  QualityEnableME4b = -1;
91  QualityEnableME4c = -1;
92 
93  run_core = -1;
94  trigger_on_ME1a = -1;
95  trigger_on_ME1b = -1;
96  trigger_on_ME2 = -1;
97  trigger_on_ME3 = -1;
98  trigger_on_ME4 = -1;
99  trigger_on_MB1a = -1;
100  trigger_on_MB1d = -1;
101 
102  singlesTrackOutput = 999;
103  rescaleSinglesPhi = -1;
104 
105  m_firmSP = -1;
106  m_firmFA = -1;
107  m_firmDD = -1;
108  m_firmVM = -1;
109 
110  initFail_ = false;
111 
112  isCoreVerbose = pset.getParameter<bool>("isCoreVerbose");
113 
114  if(initializeFromPSet) readParameters(pset);
115 
116 
117  // Sector Receiver LUTs initialization
118  edm::ParameterSet srLUTset = pset.getParameter<edm::ParameterSet>("SRLUT");
119  for(int i = 1; i <= 4; ++i)
120  {
121  if(i == 1)
122  for(int j = 0; j < 2; j++)
123  {
124  srLUTs_[FPGAs[j]] = new CSCSectorReceiverLUT(endcap, sector, j+1, i, srLUTset, TMB07);
125  }
126  else
127  srLUTs_[FPGAs[i]] = new CSCSectorReceiverLUT(endcap, sector, 0, i, srLUTset, TMB07);
128  }
129 
130  core_ = new CSCTFSPCoreLogic();
131 
132  // Pt LUTs initialization
133  if(initializeFromPSet){
134  edm::ParameterSet ptLUTset = pset.getParameter<edm::ParameterSet>("PTLUT");
135  ptLUT_ = new CSCTFPtLUT(ptLUTset, scales, ptScale);
136  LogDebug("CSCTFSectorProcessor") << "Using stand-alone PT LUT for endcap="<<m_endcap<<", sector="<<m_sector;
137  } else {
138  ptLUT_=0;
139  LogDebug("CSCTFSectorProcessor") << "Looking for PT LUT in EventSetup for endcap="<<m_endcap<<", sector="<<m_sector;
140  }
141 
142  // firmware map initialization
143  // all the information are based on the firmware releases
144  // documented at http://www.phys.ufl.edu/~uvarov/SP05/SP05.htm
145 
146  // map is <m_firmSP, core_version>
147  // it may happen that the same core is used for different firmware
148  // versions, e.g. change in the wrapper only
149 
150  // this mapping accounts for runs starting from 132440
151  // schema is year+month+day
152  firmSP_Map.insert(std::pair<int,int>(20100210,20100122));
153  firmSP_Map.insert(std::pair<int,int>(20100617,20100122));
154  firmSP_Map.insert(std::pair<int,int>(20100629,20100122));
155 
156  firmSP_Map.insert(std::pair<int,int>(20100728,20100728));
157 
158  firmSP_Map.insert(std::pair<int,int>(20100901,20100901));
159 
160  //testing firmwares
161  firmSP_Map.insert(std::pair<int,int>(20101011,20101011));
162  firmSP_Map.insert(std::pair<int,int>(20101210,20101210));
163  firmSP_Map.insert(std::pair<int,int>(20110204,20110118));
164  firmSP_Map.insert(std::pair<int,int>(20110322,20110118));
165  // 2012 core with non linear dphi
166  firmSP_Map.insert(std::pair<int,int>(20120131,20120131));
167  firmSP_Map.insert(std::pair<int,int>(20120227,20120131));
168  //2012 core: 4 station track at |eta|>2.1 -> ME2-ME3-ME4
169  firmSP_Map.insert(std::pair<int,int>(20120313,20120313));
170  firmSP_Map.insert(std::pair<int,int>(20120319,20120313));
171  //2012 core: 4 station track at |eta|>2.1 -> ME1-ME3-ME4 test
172  firmSP_Map.insert(std::pair<int,int>(20120730,20120730));
173 }
174 
175 
176 void CSCTFSectorProcessor::initialize(const edm::EventSetup& c){
177  initFail_ = false;
178  if(!initializeFromPSet){
179  // Only pT lut can be initialized from EventSetup, all front LUTs are initialized locally from their parametrizations
180  LogDebug("CSCTFSectorProcessor") <<"Initializing endcap: "<<m_endcap<<" sector:"<<m_sector << "SP:" << (m_endcap-1)*6+(m_sector-1);
181  LogDebug("CSCTFSectorProcessor") << "Initializing pT LUT from EventSetup";
182 
183  ptLUT_ = new CSCTFPtLUT(c);
184 
185  // Extract from EventSetup alternative (to the one, used in constructor) ParameterSet
186  edm::ESHandle<L1MuCSCTFConfiguration> config;
187  c.get<L1MuCSCTFConfigurationRcd>().get(config);
188  // And initialize only those parameters, which left uninitialized during construction
189  readParameters(config.product()->parameters((m_endcap-1)*6+(m_sector-1)));
190  }
191 
192  // ---------------------------------------------------------------------------
193  // This part is added per Vasile's request.
194  // It will help people understanding the emulator configuration
195  LogDebug("CSCTFSectorProcessor") << "\n !!! CSCTF EMULATOR CONFIGURATION !!!"
196  << "\n\nCORE CONFIGURATION"
197  << "\n Coincidence Trigger? " << run_core
198  << "\n Singles in ME1a? " << trigger_on_ME1a
199  << "\n Singles in ME1b? " << trigger_on_ME1b
200  << "\n Singles in ME2? " << trigger_on_ME2
201  << "\n Singles in ME3? " << trigger_on_ME3
202  << "\n Singles in ME4? " << trigger_on_ME4
203  << "\n Singles in MB1a? " << trigger_on_MB1a
204  << "\n Singles in MB1d? " << trigger_on_MB1d
205 
206  << "\n BX Analyzer depth: assemble coinc. track with stubs in +/-" << m_bxa_depth << " Bxs"
207  << "\n Is Wide Phi Extrapolation (DeltaPhi valid up to ~15 degrees, otherwise ~7.67 degrees)? " << m_widePhi
208  << "\n PreTrigger=" << m_preTrigger
209 
210  << "\n CoreLatency=" << m_latency
211  << "\n Is Phi for singles rescaled? " << rescaleSinglesPhi
212 
213  << "\n\nVARIOUS CONFIGURATION PARAMETERS"
214  << "\n Allow ALCT only? " << m_allowALCTonly
215  << "\n Allow CLCT only? " << m_allowCLCTonly
216 
217  << "\nQualityEnableME1a (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME1a
218  << "\nQualityEnableME1b (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME1b
219  << "\nQualityEnableME1c (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME1c
220  << "\nQualityEnableME1d (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME1d
221  << "\nQualityEnableME1e (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME1e
222  << "\nQualityEnableME1f (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME1f
223  << "\nQualityEnableME2a (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME2a
224  << "\nQualityEnableME2b (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME2b
225  << "\nQualityEnableME2c (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME2c
226  << "\nQualityEnableME3a (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME3a
227  << "\nQualityEnableME3b (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME3b
228  << "\nQualityEnableME3c (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME3c
229  << "\nQualityEnableME4a (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME4a
230  << "\nQualityEnableME4b (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME4b
231  << "\nQualityEnableME4c (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME4c
232 
233  << "\nkill_fiber=" << kill_fiber
234  << "\nSingles Output Link=" << singlesTrackOutput
235 
236  //the DAT_ETA registers meaning are explained at Table 2 of
237  //http://www.phys.ufl.edu/~uvarov/SP05/LU-SP_ReferenceGuide_090915_Update.pdf
238 
239  << "\n\nDAT_ETA REGISTERS"
240  << "\nMinimum eta difference for track cancellation logic=" << m_mindetap
241  << "\nMinimum eta difference for halo track cancellation logic=" << m_mindetap_halo
242 
243  << "\nMinimum eta for ME1-ME2 collision tracks=" << m_etamin[0]
244  << "\nMinimum eta for ME1-ME3 collision tracks=" << m_etamin[1]
245  << "\nMinimum eta for ME2-ME3 collision tracks=" << m_etamin[2]
246  << "\nMinimum eta for ME2-ME4 collision tracks=" << m_etamin[3]
247  << "\nMinimum eta for ME3-ME4 collision tracks=" << m_etamin[4]
248  << "\nMinimum eta for ME1-ME2 collision tracks in overlap region=" << m_etamin[5]
249  << "\nMinimum eta for ME2-MB1 collision tracks=" << m_etamin[6]
250  << "\nMinimum eta for ME1-ME4 collision tracks=" << m_etamin[7]
251 
252  << "\nMinimum eta difference for ME1-ME2 (except ME1/1) halo tracks=" << m_mindeta12_accp
253  << "\nMinimum eta difference for ME1-ME3 (except ME1/1) halo tracks=" << m_mindeta13_accp
254  << "\nMinimum eta difference for ME1/1-ME2 halo tracks=" << m_mindeta112_accp
255  << "\nMinimum eta difference for ME1/1-ME3 halo tracks=" << m_mindeta113_accp
256 
257  << "\nMaximum eta for ME1-ME2 collision tracks=" << m_etamax[0]
258  << "\nMaximum eta for ME1-ME3 collision tracks=" << m_etamax[1]
259  << "\nMaximum eta for ME2-ME3 collision tracks=" << m_etamax[2]
260  << "\nMaximum eta for ME2-ME4 collision tracks=" << m_etamax[3]
261  << "\nMaximum eta for ME3-ME4 collision tracks=" << m_etamax[4]
262  << "\nMaximum eta for ME1-ME2 collision tracks in overlap region=" << m_etamax[5]
263  << "\nMaximum eta for ME2-MB1 collision tracks=" << m_etamax[6]
264  << "\nMaximum eta for ME1-ME4 collision tracks=" << m_etamax[7]
265 
266  << "\nMaximum eta difference for ME1-ME2 (except ME1/1) halo tracks=" << m_maxdeta12_accp
267  << "\nMaximum eta difference for ME1-ME3 (except ME1/1) halo tracks=" << m_maxdeta13_accp
268  << "\nMaximum eta difference for ME1/1-ME2 halo tracks=" << m_maxdeta112_accp
269  << "\nMaximum eta difference for ME1/1-ME3 halo tracks=" << m_maxdeta113_accp
270 
271  << "\nEta window for ME1-ME2 collision tracks=" << m_etawin[0]
272  << "\nEta window for ME1-ME3 collision tracks=" << m_etawin[1]
273  << "\nEta window for ME2-ME3 collision tracks=" << m_etawin[2]
274  << "\nEta window for ME2-ME4 collision tracks=" << m_etawin[3]
275  << "\nEta window for ME3-ME4 collision tracks=" << m_etawin[4]
276  << "\nEta window for ME1-ME2 collision tracks in overlap region=" << m_etawin[5]
277  << "\nEta window for ME1-ME4 collision tracks=" << m_etawin[6]
278 
279  << "\nMaximum phi difference for ME1-ME2 (except ME1/1) halo tracks=" << m_maxdphi12_accp
280  << "\nMaximum phi difference for ME1-ME3 (except ME1/1) halo tracks=" << m_maxdphi13_accp
281  << "\nMaximum phi difference for ME1/1-ME2 halo tracks=" << m_maxdphi112_accp
282  << "\nMaximum phi difference for ME1/1-ME3 halo tracks=" << m_maxdphi113_accp
283 
284  << "\nMinimum phi difference for track cancellation logic=" << m_mindphip
285  << "\nMinimum phi difference for halo track cancellation logic=" << m_mindphip_halo
286 
287  << "\nParameter for the correction of misaligned 1-2-3-4 straight tracks =" << m_straightp
288  << "\nParameter for the correction of misaligned 1-2-3-4 curved tracks=" << m_curvedp
289  << "\nPhi Offset for MB1A=" << m_mbaPhiOff
290  << "\nPhi Offset for MB1D=" << m_mbbPhiOff
291 
292  << "\nFirmware SP year+month+day:" << m_firmSP
293  << "\nFirmware FA year+month+day:" << m_firmFA
294  << "\nFirmware DD year+month+day:" << m_firmDD
295  << "\nFirmware VM year+month+day:" << m_firmVM;
296 
297 
298  printDisclaimer(m_firmSP,m_firmFA);
299 
300  // set core verbosity: for debugging only purpouses
301  // in general the output is handled to Alex Madorsky
302  core_ -> SetVerbose(isCoreVerbose);
303 
304  // Set the SP firmware
305  core_ -> SetSPFirmwareVersion (m_firmSP);
306 
307  // Set the firmware for the CORE
308  int firmVersCore = firmSP_Map.find(m_firmSP)->second;
309  core_ -> SetCoreFirmwareVersion (firmVersCore);
310  edm::LogInfo( "CSCTFSectorProcessor" ) << "\nCore Firmware is set to " << core_ -> GetCoreFirmwareVersion();
311  // ---------------------------------------------------------------------------
312 
313  // Check if parameters were not initialized in both: constuctor (from .cf? file) and initialize method (from EventSetup)
314  if(m_bxa_depth<0)
315  {
316  initFail_ = true;
317  edm::LogError("CSCTFSectorProcessor")<<"BXAdepth parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
318  }
319  if(m_allowALCTonly<0)
320  {
321  initFail_ = true;
322  edm::LogError("CSCTFSectorProcessor")<<"AllowALCTonly parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
323  }
324  if(m_allowCLCTonly<0)
325  {
326  initFail_ = true;
327  edm::LogError("CSCTFSectorProcessor")<<"AllowCLCTonly parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
328  }
329  if(m_preTrigger<0)
330  {
331  initFail_ = true;
332  edm::LogError("CSCTFSectorProcessor")<<"PreTrigger parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
333  }
334  if(m_mindphip<0)
335  {
336  initFail_ = true;
337  edm::LogError("CSCTFSectorProcessor")<<"mindphip parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
338  }
339  if(m_mindetap<0)
340  {
341  initFail_ = true;
342  edm::LogError("CSCTFSectorProcessor")<<"mindeta parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
343  }
344  if(m_straightp<0)
345  {
346  initFail_ = true;
347  edm::LogError("CSCTFSectorProcessor")<<"straightp parameter left unitialized for endcap="<<m_endcap<<", sector="<<m_sector;
348  }
349  if(m_curvedp<0)
350  {
351  initFail_ = true;
352  edm::LogError("CSCTFSectorProcessor")<<"curvedp parameter left unitialized for endcap="<<m_endcap<<",sector="<<m_sector;
353  }
354  if(m_mbaPhiOff<0)
355  {
356  initFail_ = true;
357  edm::LogError("CSCTFSectorProcessor")<<"mbaPhiOff parameter left unitialized for endcap="<<m_endcap<<",sector="<<m_sector;
358  }
359  if(m_mbbPhiOff<0)
360  {
361  initFail_ = true;
362  edm::LogError("CSCTFSectorProcessor")<<"mbbPhiOff parameter left unitialized for endcap="<<m_endcap<<",sector="<<m_sector;
363  }
364  if(m_mindeta12_accp<0)
365  {
366  initFail_ = true;
367  edm::LogError("CSCTFSectorProcessor")<<"mindeta_accp12 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
368  }
369  if(m_maxdeta12_accp<0)
370  {
371  initFail_ = true;
372  edm::LogError("CSCTFSectorProcessor")<<"maxdeta_accp12 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
373  }
374  if(m_maxdphi12_accp<0)
375  {
376  initFail_ = true;
377  edm::LogError("CSCTFSectorProcessor")<<"maxdphi_accp12 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
378  }
379  if(m_mindeta13_accp<0)
380  {
381  initFail_ = true;
382  edm::LogError("CSCTFSectorProcessor")<<"mindeta_accp13 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
383  }
384  if(m_maxdeta13_accp<0)
385  {
386  initFail_ = true;
387  edm::LogError("CSCTFSectorProcessor")<<"maxdeta_accp13 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
388  }
389  if(m_maxdphi13_accp<0)
390  {
391  initFail_ = true;
392  edm::LogError("CSCTFSectorProcessor")<<"maxdphi_accp13 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
393  }
394  if(m_mindeta112_accp<0)
395  {
396  initFail_ = true;
397  edm::LogError("CSCTFSectorProcessor")<<"mindeta_accp112 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
398  }
399  if(m_maxdeta112_accp<0)
400  {
401  initFail_ = true;
402  edm::LogError("CSCTFSectorProcessor")<<"maxdeta_accp112 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
403  }
404  if(m_maxdphi112_accp<0)
405  {
406  initFail_ = true;
407  edm::LogError("CSCTFSectorProcessor")<<"maxdphi_accp112 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
408  }
409  if(m_mindeta113_accp<0)
410  {
411  initFail_ = true;
412  edm::LogError("CSCTFSectorProcessor")<<"mindeta_accp113 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
413  }
414  if(m_maxdeta113_accp<0)
415  {
416  initFail_ = true;
417  edm::LogError("CSCTFSectorProcessor")<<"maxdeta_accp113 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
418  }
419  if(m_maxdphi113_accp<0)
420  {
421  initFail_ = true;
422  edm::LogError("CSCTFSectorProcessor")<<"maxdphi_accp113 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
423  }
424  if(m_mindphip_halo<0)
425  {
426  initFail_ = true;
427  edm::LogError("CSCTFSectorProcessor")<<"mindphip_halo parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
428  }
429  if(m_mindetap_halo<0)
430  {
431  initFail_ = true;
432  edm::LogError("CSCTFSectorProcessor")<<"mindetep_halo parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
433  }
434 
435  if(m_widePhi<0)
436  {
437  initFail_ = true;
438  edm::LogError("CSCTFSectorProcessor")<<"widePhi parameter left unitialized for endcap="<<m_endcap<<", sector="<<m_sector;
439  }
440 
441  for(int index=0; index<8; index++)
442  if(m_etamax[index]<0)
443  {
444  initFail_ = true;
445  edm::LogError("CSCTFSectorProcessor")<<"Some ("<<(8-index)<<") of EtaMax parameters left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
446  }
447  for(int index=0; index<8; index++)
448  if(m_etamin[index]<0)
449  {
450  initFail_ = true;
451  edm::LogError("CSCTFSectorProcessor")<<"Some ("<<(8-index)<<") of EtaMin parameters left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
452  }
453  for(int index=0; index<7; index++)
454  if(m_etawin[index]<0)
455  {
456  initFail_ = true;
457  edm::LogError("CSCTFSectorProcessor")<<"Some ("<<(6-index)<<") of EtaWindows parameters left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
458  }
459  if(kill_fiber<0)
460  {
461  initFail_ = true;
462  edm::LogError("CSCTFTrackBuilder")<<"kill_fiber parameter left uninitialized";
463  }
464  if(run_core<0)
465  {
466  initFail_ = true;
467  edm::LogError("CSCTFTrackBuilder")<<"run_core parameter left uninitialized";
468  }
469  if(trigger_on_ME1a<0)
470  {
471  initFail_ = true;
472  edm::LogError("CSCTFTrackBuilder")<<"trigger_on_ME1a parameter left uninitialized";
473  }
474  if(trigger_on_ME1b<0)
475  {
476  initFail_ = true;
477  edm::LogError("CSCTFTrackBuilder")<<"trigger_on_ME1b parameter left uninitialized";
478  }
479  if(trigger_on_ME2 <0)
480  {
481  initFail_ = true;
482  edm::LogError("CSCTFTrackBuilder")<<"trigger_on_ME2 parameter left uninitialized";
483  }
484  if(trigger_on_ME3 <0)
485  {
486  initFail_ = true;
487  edm::LogError("CSCTFTrackBuilder")<<"trigger_on_ME3 parameter left uninitialized";
488  }
489  if(trigger_on_ME4 <0)
490  {
491  initFail_ = true;
492  edm::LogError("CSCTFTrackBuilder")<<"trigger_on_ME4 parameter left uninitialized";
493  }
494  if(trigger_on_MB1a<0)
495  {
496  initFail_ = true;
497  edm::LogError("CSCTFTrackBuilder")<<"trigger_on_MB1a parameter left uninitialized";
498  }
499  if(trigger_on_MB1d<0)
500  {
501  initFail_ = true;
502  edm::LogError("CSCTFTrackBuilder")<<"trigger_on_MB1d parameter left uninitialized";
503  }
504  if( trigger_on_ME1a>0 || trigger_on_ME1b>0 ||trigger_on_ME2>0 ||
505  trigger_on_ME3>0 || trigger_on_ME4>0 ||trigger_on_MB1a>0 ||trigger_on_MB1d>0 )
506  {
507  if(singlesTrackOutput==999)
508  {
509  initFail_ = true;
510  edm::LogError("CSCTFTrackBuilder")<<"singlesTrackOutput parameter left uninitialized";
511  }
512  if(rescaleSinglesPhi<0)
513  {
514  initFail_ = true;
515  edm::LogError("CSCTFTrackBuilder")<<"rescaleSinglesPhi parameter left uninitialized";
516  }
517  }
518  if(QualityEnableME1a<0)
519  {
520  initFail_ = true;
521  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME1a parameter left uninitialized";
522  }
523  if(QualityEnableME1b<0)
524  {
525  initFail_ = true;
526  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME1b parameter left uninitialized";
527  }
528  if(QualityEnableME1c<0)
529  {
530  initFail_ = true;
531  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME1c parameter left uninitialized";
532  }
533  if(QualityEnableME1d<0)
534  {
535  initFail_ = true;
536  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME1d parameter left uninitialized";
537  }
538  if(QualityEnableME1e<0)
539  {
540  initFail_ = true;
541  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME1e parameter left uninitialized";
542  }
543  if(QualityEnableME1f<0)
544  {
545  initFail_ = true;
546  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME1f parameter left uninitialized";
547  }
548  if(QualityEnableME2a<0)
549  {
550  initFail_ = true;
551  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME2a parameter left uninitialized";
552  }
553  if(QualityEnableME2b<0)
554  {
555  initFail_ = true;
556  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME2b parameter left uninitialized";
557  }
558  if(QualityEnableME2c<0)
559  {
560  initFail_ = true;
561  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME2c parameter left uninitialized";
562  }
563  if(QualityEnableME3a<0)
564  {
565  initFail_ = true;
566  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME3a parameter left uninitialized";
567  }
568  if(QualityEnableME3b<0)
569  {
570  initFail_ = true;
571  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME3b parameter left uninitialized";
572  }
573  if(QualityEnableME3c<0)
574  {
575  initFail_ = true;
576  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME3c parameter left uninitialized";
577  }
578  if(QualityEnableME4a<0)
579  {
580  initFail_ = true;
581  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME4a parameter left uninitialized";
582  }
583  if(QualityEnableME4b<0)
584  {
585  initFail_ = true;
586  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME4b parameter left uninitialized";
587  }
588  if(QualityEnableME4c<0)
589  {
590  initFail_ = true;
591  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME4c parameter left uninitialized";
592  }
593 
594  if (m_firmSP<1)
595  {
596  initFail_ = true;
597  edm::LogError("CSCTFSectorProcessor")<< " firmwareSP parameter left uninitialized!!!\n";
598  }
599  if (m_firmFA<1)
600  {
601  initFail_ = true;
602  edm::LogError("CSCTFSectorProcessor")<< " firmwareFA parameter left uninitialized!!!\n";
603  }
604  if (m_firmDD<1)
605  {
606  initFail_ = true;
607  edm::LogError("CSCTFSectorProcessor")<< " firmwareDD parameter left uninitialized!!!\n";
608  }
609  if (m_firmVM<1)
610  {
611  initFail_ = true;
612  edm::LogError("CSCTFSectorProcessor")<< " firmwareVM parameter left uninitialized!!!\n";
613  }
614 
615  if ( (m_firmFA != m_firmDD) ||
616  (m_firmFA != m_firmVM) ||
617  (m_firmDD != m_firmVM) )
618  {
619  initFail_ = true;
620  edm::LogError("CSCTFSectorProcessor::initialize")<< " firmwareFA (=" << m_firmFA << "), "
621  << " firmwareDD (=" << m_firmDD << "), "
622  << " firmwareVM (=" << m_firmVM << ") are NOT identical: it shoultd NOT happen!\n";
623  }
624 
625 }
626 
627 void CSCTFSectorProcessor::readParameters(const edm::ParameterSet& pset){
628  m_bxa_depth = pset.getParameter<unsigned>("BXAdepth");
629  m_allowALCTonly = ( pset.getParameter<bool>("AllowALCTonly") ? 1 : 0 );
630  m_allowCLCTonly = ( pset.getParameter<bool>("AllowCLCTonly") ? 1 : 0 );
631  m_preTrigger = pset.getParameter<unsigned>("PreTrigger");
632 
633  std::vector<unsigned>::const_iterator iter;
634  int index=0;
635  std::vector<unsigned> etawins = pset.getParameter<std::vector<unsigned> >("EtaWindows");
636  for(iter=etawins.begin(),index=0; iter!=etawins.end()&&index<7; iter++,index++) m_etawin[index] = *iter;
637  std::vector<unsigned> etamins = pset.getParameter<std::vector<unsigned> >("EtaMin");
638  for(iter=etamins.begin(),index=0; iter!=etamins.end()&&index<8; iter++,index++) m_etamin[index] = *iter;
639  std::vector<unsigned> etamaxs = pset.getParameter<std::vector<unsigned> >("EtaMax");
640  for(iter=etamaxs.begin(),index=0; iter!=etamaxs.end()&&index<8; iter++,index++) m_etamax[index] = *iter;
641 
642  m_mindphip = pset.getParameter<unsigned>("mindphip");
643  m_mindetap = pset.getParameter<unsigned>("mindetap");
644  m_straightp = pset.getParameter<unsigned>("straightp");
645  m_curvedp = pset.getParameter<unsigned>("curvedp");
646  m_mbaPhiOff = pset.getParameter<unsigned>("mbaPhiOff");
647  m_mbbPhiOff = pset.getParameter<unsigned>("mbbPhiOff");
648  m_widePhi = pset.getParameter<unsigned>("widePhi");
649  m_mindeta12_accp = pset.getParameter<unsigned>("mindeta12_accp");
650  m_maxdeta12_accp = pset.getParameter<unsigned>("maxdeta12_accp");
651  m_maxdphi12_accp = pset.getParameter<unsigned>("maxdphi12_accp");
652  m_mindeta13_accp = pset.getParameter<unsigned>("mindeta13_accp");
653  m_maxdeta13_accp = pset.getParameter<unsigned>("maxdeta13_accp");
654  m_maxdphi13_accp = pset.getParameter<unsigned>("maxdphi13_accp");
655  m_mindeta112_accp = pset.getParameter<unsigned>("mindeta112_accp");
656  m_maxdeta112_accp = pset.getParameter<unsigned>("maxdeta112_accp");
657  m_maxdphi112_accp = pset.getParameter<unsigned>("maxdphi112_accp");
658  m_mindeta113_accp = pset.getParameter<unsigned>("mindeta113_accp");
659  m_maxdeta113_accp = pset.getParameter<unsigned>("maxdeta113_accp");
660  m_maxdphi113_accp = pset.getParameter<unsigned>("maxdphi113_accp");
661  m_mindphip_halo = pset.getParameter<unsigned>("mindphip_halo");
662  m_mindetap_halo = pset.getParameter<unsigned>("mindetap_halo");
663  kill_fiber = pset.getParameter<unsigned>("kill_fiber");
664  run_core = pset.getParameter<bool>("run_core");
665  trigger_on_ME1a = pset.getParameter<bool>("trigger_on_ME1a");
666  trigger_on_ME1b = pset.getParameter<bool>("trigger_on_ME1b");
667  trigger_on_ME2 = pset.getParameter<bool>("trigger_on_ME2");
668  trigger_on_ME3 = pset.getParameter<bool>("trigger_on_ME3");
669  trigger_on_ME4 = pset.getParameter<bool>("trigger_on_ME4");
670  trigger_on_MB1a = pset.getParameter<bool>("trigger_on_MB1a");
671  trigger_on_MB1d = pset.getParameter<bool>("trigger_on_MB1d");
672 
673  singlesTrackOutput = pset.getParameter<unsigned int>("singlesTrackOutput");
674  rescaleSinglesPhi = pset.getParameter<bool>("rescaleSinglesPhi");
675  QualityEnableME1a = pset.getParameter<unsigned int>("QualityEnableME1a");
676  QualityEnableME1b = pset.getParameter<unsigned int>("QualityEnableME1b");
677  QualityEnableME1c = pset.getParameter<unsigned int>("QualityEnableME1c");
678  QualityEnableME1d = pset.getParameter<unsigned int>("QualityEnableME1d");
679  QualityEnableME1e = pset.getParameter<unsigned int>("QualityEnableME1e");
680  QualityEnableME1f = pset.getParameter<unsigned int>("QualityEnableME1f");
681  QualityEnableME2a = pset.getParameter<unsigned int>("QualityEnableME2a");
682  QualityEnableME2b = pset.getParameter<unsigned int>("QualityEnableME2b");
683  QualityEnableME2c = pset.getParameter<unsigned int>("QualityEnableME2c");
684  QualityEnableME3a = pset.getParameter<unsigned int>("QualityEnableME3a");
685  QualityEnableME3b = pset.getParameter<unsigned int>("QualityEnableME3b");
686  QualityEnableME3c = pset.getParameter<unsigned int>("QualityEnableME3c");
687  QualityEnableME4a = pset.getParameter<unsigned int>("QualityEnableME4a");
688  QualityEnableME4b = pset.getParameter<unsigned int>("QualityEnableME4b");
689  QualityEnableME4c = pset.getParameter<unsigned int>("QualityEnableME4c");
690 
691  m_firmSP = pset.getParameter<unsigned int>("firmwareSP");
692  m_firmFA = pset.getParameter<unsigned int>("firmwareFA");
693  m_firmDD = pset.getParameter<unsigned int>("firmwareDD");
694  m_firmVM = pset.getParameter<unsigned int>("firmwareVM");
695 
696 }
697 
698 CSCTFSectorProcessor::~CSCTFSectorProcessor()
699 {
700  for(int i = 0; i < 5; ++i)
701  {
702  if(srLUTs_[FPGAs[i]]) delete srLUTs_[FPGAs[i]]; // delete the pointer
703  srLUTs_[FPGAs[i]] = NULL; // point it at a safe place
704  }
705 
706  delete core_;
707  core_ = NULL;
708 
709  if(ptLUT_) delete ptLUT_;
710  ptLUT_ = NULL;
711 }
712 
713 //returns 0 for no tracks, 1 tracks found, and -1 for "exception" (what used to throw an exception)
714 // on -1, Producer should produce empty collections for event
715 int CSCTFSectorProcessor::run(const CSCTriggerContainer<csctf::TrackStub>& stubs)
716 {
717  if(initFail_)
718  return -1;
719 
720  if( !ptLUT_ )
721  {
722  edm::LogError("CSCTFSectorProcessor::run()") << "No CSCTF PTLUTs: Initialize CSC TF LUTs first (missed call to CSCTFTrackProducer::beginJob?\n";
723  return -1;
724  }
725 
726 
727  l1_tracks.clear();
728  dt_stubs.clear();
729  stub_vec_filtered.clear();
730 
731  std::vector<csctf::TrackStub> stub_vec = stubs.get();
732 
736  for(std::vector<csctf::TrackStub>::const_iterator itr=stub_vec.begin(); itr!=stub_vec.end(); itr++)
737  switch( itr->station() ){
738  case 5: stub_vec_filtered.push_back(*itr); break; // DT stubs get filtered by the core controll register
739  case 4:
740  switch( itr->getMPCLink() ){
741  case 3: if( (kill_fiber&0x4000)==0 && QualityEnableME4c&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
742  case 2: if( (kill_fiber&0x2000)==0 && QualityEnableME4b&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
743  case 1: if( (kill_fiber&0x1000)==0 && QualityEnableME4a&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
744  default: edm::LogWarning("CSCTFSectorProcessor::run()") << "No MPC sorting for LCT: link="<<itr->getMPCLink()<<"\n";
745  }
746  break;
747  case 3:
748  switch( itr->getMPCLink() ){
749  case 3: if( (kill_fiber&0x0800)==0 && QualityEnableME3c&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
750  case 2: if( (kill_fiber&0x0400)==0 && QualityEnableME3b&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
751  case 1: if( (kill_fiber&0x0200)==0 && QualityEnableME3a&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
752  default: edm::LogWarning("CSCTFSectorProcessor::run()") << "No MPC sorting for LCT: link="<<itr->getMPCLink()<<"\n";
753  }
754  break;
755  case 2:
756  switch( itr->getMPCLink() ){
757  case 3: if( (kill_fiber&0x0100)==0 && QualityEnableME2c&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
758  case 2: if( (kill_fiber&0x0080)==0 && QualityEnableME2b&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
759  case 1: if( (kill_fiber&0x0040)==0 && QualityEnableME2a&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
760  default: edm::LogWarning("CSCTFSectorProcessor::run()") << "No MPC sorting for LCT: link="<<itr->getMPCLink()<<"\n";
761  }
762  break;
763  case 1:
764  switch( itr->getMPCLink() + (3*(CSCTriggerNumbering::triggerSubSectorFromLabels(CSCDetId(itr->getDetId().rawId())) - 1)) ){
765  case 6: if( (kill_fiber&0x0020)==0 && QualityEnableME1f&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
766  case 5: if( (kill_fiber&0x0010)==0 && QualityEnableME1e&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
767  case 4: if( (kill_fiber&0x0008)==0 && QualityEnableME1d&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
768  case 3: if( (kill_fiber&0x0004)==0 && QualityEnableME1c&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
769  case 2: if( (kill_fiber&0x0002)==0 && QualityEnableME1b&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
770  case 1: if( (kill_fiber&0x0001)==0 && QualityEnableME1a&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
771  default: edm::LogWarning("CSCTFSectorProcessor::run()") << "No MPC sorting for LCT: link="<<itr->getMPCLink()<<"\n";
772  }
773  break;
774  default: edm::LogWarning("CSCTFSectorProcessor::run()") << "Invalid station # encountered: "<<itr->station()<<"\n";
775  }
776 
785  for(std::vector<csctf::TrackStub>::iterator itr=stub_vec_filtered.begin(); itr!=stub_vec_filtered.end(); itr++)
786  {
787  if(itr->station() != 5)
788  {
789  CSCDetId id(itr->getDetId().rawId());
790  unsigned fpga = (id.station() == 1) ? CSCTriggerNumbering::triggerSubSectorFromLabels(id) - 1 : id.station();
791 
792  lclphidat lclPhi;
793  try {
794  lclPhi = srLUTs_[FPGAs[fpga]]->localPhi(itr->getStrip(), itr->getPattern(), itr->getQuality(), itr->getBend());
795  } catch( cms::Exception &e ) {
796  bzero(&lclPhi,sizeof(lclPhi));
797  edm::LogWarning("CSCTFSectorProcessor:run()") << "Exception from LocalPhi LUT in " << FPGAs[fpga]
798  << "(strip="<<itr->getStrip()<<",pattern="<<itr->getPattern()<<",quality="<<itr->getQuality()<<",bend="<<itr->getBend()<<")" <<std::endl;
799  }
800 
801  gblphidat gblPhi;
802  try {
803  unsigned csc_id = itr->cscid();
804  if (!m_gangedME1a) csc_id = itr->cscidSeparateME1a();
805  gblPhi = srLUTs_[FPGAs[fpga]]->globalPhiME(lclPhi.phi_local, itr->getKeyWG(), csc_id);
806 
807  } catch( cms::Exception &e ) {
808  bzero(&gblPhi,sizeof(gblPhi));
809  edm::LogWarning("CSCTFSectorProcessor:run()") << "Exception from GlobalPhi LUT in " << FPGAs[fpga]
810  << "(phi_local="<<lclPhi.phi_local<<",KeyWG="<<itr->getKeyWG()<<",csc="<<itr->cscid()<<")"<<std::endl;
811  }
812 
813  gbletadat gblEta;
814  try {
815  gblEta = srLUTs_[FPGAs[fpga]]->globalEtaME(lclPhi.phi_bend_local, lclPhi.phi_local, itr->getKeyWG(), itr->cscid());
816  } catch( cms::Exception &e ) {
817  bzero(&gblEta,sizeof(gblEta));
818  edm::LogWarning("CSCTFSectorProcessor:run()") << "Exception from GlobalEta LUT in " << FPGAs[fpga]
819  << "(phi_bend_local="<<lclPhi.phi_bend_local<<",phi_local="<<lclPhi.phi_local<<",KeyWG="<<itr->getKeyWG()<<",csc="<<itr->cscid()<<")"<<std::endl;
820  }
821 
822  gblphidat gblPhiDT;
823  try {
824  gblPhiDT = srLUTs_[FPGAs[fpga]]->globalPhiMB(lclPhi.phi_local, itr->getKeyWG(), itr->cscid());
825  } catch( cms::Exception &e ) {
826  bzero(&gblPhiDT,sizeof(gblPhiDT));
827  edm::LogWarning("CSCTFSectorProcessor:run()") << "Exception from GlobalPhi DT LUT in " << FPGAs[fpga]
828  << "(phi_local="<<lclPhi.phi_local<<",KeyWG="<<itr->getKeyWG()<<",csc="<<itr->cscid()<<")"<<std::endl;
829  }
830 
831  itr->setEtaPacked(gblEta.global_eta);
832 
833  if(itr->station() == 1 ) {
834  //&& itr->cscId() > 6) { //only ring 3
835  itr->setPhiPacked(gblPhiDT.global_phi);// convert the DT to convert
836  dt_stubs.push_back(*itr); // send stubs to DT
837  }
838 
839  //reconvert the ME1 LCT to the CSCTF units.
840  //the same iterator is used to fill two containers,
841  //the CSCTF one (stub_vec_filtered) and LCTs sent to DTTF (dt_stubs)
842  itr->setPhiPacked(gblPhi.global_phi);
843 
844  LogDebug("CSCTFSectorProcessor:run()") << "LCT found, processed by FPGA: " << FPGAs[fpga] << std::endl
845  << " LCT now has (eta, phi) of: (" << itr->etaValue() << "," << itr->phiValue() <<")\n";
846  }
847  }
848 
849  CSCTriggerContainer<csctf::TrackStub> processedStubs(stub_vec_filtered);
850 
857  std::vector<csc::L1Track> tftks;
858 
859  if(run_core){
860  core_->loadData(processedStubs, m_endcap, m_sector, m_minBX, m_maxBX);
861  if( core_->run(m_endcap, m_sector, m_latency,
862  m_etamin[0], m_etamin[1], m_etamin[2], m_etamin[3],
863  m_etamin[4], m_etamin[5], m_etamin[6], m_etamin[7],
864  m_etamax[0], m_etamax[1], m_etamax[2], m_etamax[3],
865  m_etamax[4], m_etamax[5], m_etamax[6], m_etamax[7],
866  m_etawin[0], m_etawin[1], m_etawin[2],
867  m_etawin[3], m_etawin[4], m_etawin[5], m_etawin[6],
868  m_mindphip, m_mindetap,
869  m_mindeta12_accp, m_maxdeta12_accp, m_maxdphi12_accp,
870  m_mindeta13_accp, m_maxdeta13_accp, m_maxdphi13_accp,
871  m_mindeta112_accp, m_maxdeta112_accp, m_maxdphi112_accp,
872  m_mindeta113_accp, m_maxdeta113_accp, m_maxdphi113_accp,
873  m_mindphip_halo, m_mindetap_halo,
874  m_straightp, m_curvedp,
875  m_mbaPhiOff, m_mbbPhiOff,
876  m_bxa_depth, m_allowALCTonly, m_allowCLCTonly, m_preTrigger, m_widePhi,
877  m_minBX, m_maxBX) )
878  {
879  l1_tracks = core_->tracks();
880  }
881 
882  tftks = l1_tracks.get();
883 
889  std::vector<csc::L1Track>::iterator titr = tftks.begin();
890 
891  for(; titr != tftks.end(); titr++)
892  {
893  ptadd thePtAddress(titr->ptLUTAddress());
894  ptdat thePtData = ptLUT_->Pt(thePtAddress);
895 
896  if(thePtAddress.track_fr)
897  {
898  titr->setRank(thePtData.front_rank);
899  titr->setChargeValidPacked(thePtData.charge_valid_front);
900  }
901  else
902  {
903  titr->setRank(thePtData.rear_rank);
904  titr->setChargeValidPacked(thePtData.charge_valid_rear);
905  }
906 
907  if( ((titr->ptLUTAddress()>>16)&0xf)==15 )
908  {
909  int unmodBx = titr->bx();
910  titr->setBx(unmodBx+2);
911  }
912  }
913  } //end of if(run_core)
914 
915  l1_tracks = tftks;
916 
917 
918  // Add-on for singles:
919  CSCTriggerContainer<csctf::TrackStub> myStubContainer[7]; //[BX]
920  // Loop over CSC LCTs if triggering on them:
921  if( trigger_on_ME1a || trigger_on_ME1b || trigger_on_ME2 || trigger_on_ME3 || trigger_on_ME4 || trigger_on_MB1a || trigger_on_MB1d )
922  for(std::vector<csctf::TrackStub>::iterator itr=stub_vec_filtered.begin(); itr!=stub_vec_filtered.end(); itr++){
923  int station = itr->station()-1;
924  if(station != 4){
925  int subSector = CSCTriggerNumbering::triggerSubSectorFromLabels(CSCDetId(itr->getDetId().rawId()));
926  int mpc = ( subSector ? subSector-1 : station+1 );
927  if( (mpc==0&&trigger_on_ME1a) || (mpc==1&&trigger_on_ME1b) ||
928  (mpc==2&&trigger_on_ME2) || (mpc==3&&trigger_on_ME3) ||
929  (mpc==4&&trigger_on_ME4) ||
930  (mpc==5&& ( (trigger_on_MB1a&&subSector%2==1) || (trigger_on_MB1d&&subSector%2==0) ) ) ){
931  int bx = itr->getBX() - m_minBX;
932  if( bx<0 || bx>=7 ) edm::LogWarning("CSCTFTrackBuilder::buildTracks()") << " LCT BX is out of ["<<m_minBX<<","<<m_maxBX<<") range: "<<itr->getBX();
933  else
934  if( itr->isValid() ) myStubContainer[bx].push_back(*itr);
935  }
936  }
937  }
938 
939  // Core's input was loaded in a relative time window BX=[0-7)
940  // To relate it to time window of tracks (centred at BX=0) we introduce a shift:
941  int shift = (m_maxBX + m_minBX)/2 - m_minBX;
942 
943  // Now we put tracks from singles in a certain bx
944  // if there were no tracks from the core in this endcap/sector/bx
945  CSCTriggerContainer<csc::L1Track> tracksFromSingles;
946  for(int bx=0; bx<7; bx++)
947  if( myStubContainer[bx].get().size() ){ // VP in this bx
948  bool coreTrackExists = false;
949  // tracks are not ordered to be accessible by bx => loop them all
950  std::vector<csc::L1Track> tracks = l1_tracks.get();
951  for(std::vector<csc::L1Track>::iterator trk=tracks.begin(); trk<tracks.end(); trk++)
952  if( (trk->BX() == bx-shift && trk->outputLink() == singlesTrackOutput)
953  || (((trk->ptLUTAddress()>>16)&0xf)==15 && trk->BX()-2 == bx-shift) ){
954  coreTrackExists = true;
955  break;
956  }
957  if( coreTrackExists == false ){
958  csc::L1TrackId trackId(m_endcap,m_sector);
959  csc::L1Track track(trackId);
960  track.setBx(bx-shift);
961  track.setOutputLink(singlesTrackOutput);
962  //CSCCorrelatedLCTDigiCollection singles;
963  std::vector<csctf::TrackStub> stubs = myStubContainer[bx].get();
964  // Select best quality stub, and assign its eta/phi coordinates to the track
965  int qualityME=0, qualityMB=0, ME=100, MB=100, linkME=7;
966  std::vector<csctf::TrackStub>::const_iterator bestStub=stubs.end();
967  for(std::vector<csctf::TrackStub>::const_iterator st_iter=stubs.begin(); st_iter!=stubs.end(); st_iter++){
968  int station = st_iter->station()-1;
969  int subSector = CSCTriggerNumbering::triggerSubSectorFromLabels(CSCDetId(st_iter->getDetId().rawId()));
970  int mpc = ( subSector ? subSector-1 : station+1 );
971  // Sort MB stubs first (priority: quality OR MB1a > MB1b for the same quality)
972  if( mpc==5 && (st_iter->getQuality()>qualityMB || (st_iter->getQuality()==qualityMB&&subSector<MB)) ){
973  qualityMB = st_iter->getQuality();
974  MB = subSector;
975  if(ME>4) bestStub = st_iter; // do not select this stub if ME already had any candidate
976  }
977  // Sort ME stubs (priority: quality OR ME1a > ME1b > ME2 > ME3 > ME4 for the same quality)
978  if( mpc<5 && (st_iter->getQuality()> qualityME
979  || (st_iter->getQuality()==qualityME && mpc< ME)
980  || (st_iter->getQuality()==qualityME && mpc==ME && st_iter->getMPCLink()<linkME))) {
981  qualityME = st_iter->getQuality();
982  ME = mpc;
983  linkME = st_iter->getMPCLink();
984  bestStub = st_iter;
985  }
986  }
987  unsigned rescaled_phi = 999;
988  if (m_firmSP <= 20100210) {
989  // buggy implementation of the phi for singles in the wrapper...
990  // at the end data/emulator have to agree: e.g. wrong in the same way
991  // BUG: getting the lowest 7 bits instead the 7 most significant ones.
992  rescaled_phi = unsigned(24*(bestStub->phiPacked()&0x7f)/128.);
993  }
994  else {
995  // correct implementation :-)
996  rescaled_phi = unsigned(24*(bestStub->phiPacked()>>5)/128.);
997  }
998 
999  unsigned unscaled_phi = bestStub->phiPacked()>>7 ;
1000  track.setLocalPhi(rescaleSinglesPhi?rescaled_phi:unscaled_phi);
1001  track.setEtaPacked((bestStub->etaPacked()>>2)&0x1f);
1002  switch( bestStub->station() ){
1003  case 1: track.setStationIds(bestStub->getMPCLink(),0,0,0,0); break;
1004  case 2: track.setStationIds(0,bestStub->getMPCLink(),0,0,0); break;
1005  case 3: track.setStationIds(0,0,bestStub->getMPCLink(),0,0); break;
1006  case 4: track.setStationIds(0,0,0,bestStub->getMPCLink(),0); break;
1007  case 5: track.setStationIds(0,0,0,0,bestStub->getMPCLink()); break;
1008  default: edm::LogError("CSCTFSectorProcessor::run()") << "Illegal LCT link="<<bestStub->station()<<"\n"; break;
1009  }
1010  // singles.insertDigi(CSCDetId(st_iter->getDetId().rawId()),*st_iter);
1011  //tracksFromSingles.push_back(L1CSCTrack(track,singles));
1012  track.setPtLUTAddress( (1<<16) | ((bestStub->etaPacked()<<9)&0xf000) );
1013  ptadd thePtAddress( track.ptLUTAddress() );
1014  ptdat thePtData = ptLUT_->Pt(thePtAddress);
1015  if( thePtAddress.track_fr ){
1016  track.setRank(thePtData.front_rank);
1017  track.setChargeValidPacked(thePtData.charge_valid_front);
1018  } else {
1019  track.setRank(thePtData.rear_rank);
1020  track.setChargeValidPacked(thePtData.charge_valid_rear);
1021  }
1022  tracksFromSingles.push_back(track);
1023  }
1024  }
1025  std::vector<csc::L1Track> single_tracks = tracksFromSingles.get();
1026  if( single_tracks.size() ) l1_tracks.push_many(single_tracks);
1027  // End of add-on for singles
1028 
1029  return (l1_tracks.get().size() > 0);
1030 }
1031 
1032 // according to the firmware versions print some more information
1033 void CSCTFSectorProcessor::printDisclaimer(int firmSP, int firmFA){
1034 
1035  edm::LogInfo( "CSCTFSectorProcessor" ) << "\n\n"
1036  << "******************************* \n"
1037  << "*** DISCLAIMER *** \n"
1038  << "******************************* \n"
1039  << "\n Firmware SP version (year+month+day)=" << firmSP
1040  << "\n Firmware FA/VM/DD version (year+month+day)=" << firmFA;
1041  if (firmSP==20100210)
1042  edm::LogInfo( "CSCTFSectorProcessor" ) << " -> KNOWN BUGS IN THE FIRMWARE:\n"
1043  << "\t * Wrong phi assignment for singles\n"
1044  << "\t * Wrapper passes to the core only even quality DT stubs\n"
1045  << "\n -> BUGS ARE GOING TO BE EMULATED BY THE SOFTWARE\n\n";
1046 
1047  else
1048  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t * Correct phi assignment for singles\n";
1049 
1050  if (firmSP==20100629){
1051  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t * Correct MB quality masking in the wrapper\n"
1052  << "\t * Core is 20100122\n";
1053  }
1054 
1055  if (firmSP==20100728)
1056  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t * Inverted MB clocks\n";
1057 
1058  if (firmSP==20100901)
1059  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t * Inverted charge bit\n";
1060 
1061  if (firmSP==20101011)
1062  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t **** WARNING THIS FIRMWARE IS UNDER TEST ****\n"
1063  << "\t * Added CSC-DT assembling tracks ME1-MB2/1 \n";
1064  if (firmSP==20101210)
1065  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t **** WARNING THIS FIRMWARE IS UNDER TEST ****\n"
1066  << "\t * New Ghost Busting Algorithm Removing Tracks\n"
1067  << "\t Sharing at Least One LCT\n";
1068 
1069  if (firmSP==20110118)
1070  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t **** WARNING THIS FIRMWARE IS UNDER TEST ****\n"
1071  << "\t * New Ghost Busting Algorithm Removing Tracks\n"
1072  << "\t Sharing at Least One LCT\n"
1073  << "\t * Passing CLCT and PhiBend for PT LUTs\n";
1074  if (firmSP==20120131)
1075  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t **** WARNING THIS FIRMWARE IS UNDER TEST ****\n"
1076  << "\t * non-linear dphi12 dphi23, use deta for PTLUTs \n";
1077 }
LogDebug
#define LogDebug(id)
Definition: MessageLogger.h:501
edm::ParameterSet::getParameter
T getParameter(std::string const &) const
edm::ParameterSet::getUntrackedParameter
T getUntrackedParameter(std::string const &, T const &) const
csc::L1Track::setLocalPhi
void setLocalPhi(const unsigned &lphi)
Definition: L1Track.h:36
i
int i
Definition: DBlmapReader.cc:9
CSCTriggerContainer::get
std::vector< T > get() const
Definition: CSCTriggerContainer.h:78
CSCTFPtLUT::Pt
ptdat Pt(const ptadd &) const
Definition: CSCTFPtLUT.cc:180
CSCTFSectorProcessor::dt_stubs
CSCTriggerContainer< csctf::TrackStub > dt_stubs
Definition: CSCTFSectorProcessor.h:99
CSCDetId
CSCDetId
Definition: RecoLocalMuon_RECO.doi:36
CSCTFSectorProcessor::core_
CSCTFSPCoreLogic * core_
Definition: CSCTFSectorProcessor.h:105
CSCTFSectorProcessor::readParameters
void readParameters(const edm::ParameterSet &pset)
Definition: CSCTFSectorProcessor.cc:627
CSCTFSectorProcessor::stub_vec_filtered
std::vector< csctf::TrackStub > stub_vec_filtered
Definition: CSCTFSectorProcessor.h:100
Reference_intrackfit_cff.endcap
endcap
Definition: Reference_intrackfit_cff.py:82
CSCTFSectorProcessor::initialize
void initialize(const edm::EventSetup &c)
KK.
Definition: CSCTFSectorProcessor.cc:176
NULL
#define NULL
Definition: scimark2.h:8
csc::L1Track::setPtLUTAddress
void setPtLUTAddress(const unsigned &adr)
Definition: L1Track.h:58
CSCTFSectorProcessor::printDisclaimer
void printDisclaimer(int firmSP, int firmFA)
Definition: CSCTFSectorProcessor.cc:1033
CSCTFSectorProcessor::FPGAs
static const std::string FPGAs[5]
Definition: CSCTFSectorProcessor.h:102
L1MuRegionalCand::setChargeValidPacked
void setChargeValidPacked(unsigned valid)
Set Charge Valid.
Definition: L1MuRegionalCand.h:128
AlCaHLTBitMon_QueryRunRegistry.string
string string
Definition: AlCaHLTBitMon_QueryRunRegistry.py:255
CSCTriggerContainer::push_back
void push_back(const T &data)
Definition: CSCTriggerContainer.h:44
CSCTFSectorProcessor::run
int run(const CSCTriggerContainer< csctf::TrackStub > &)
Definition: CSCTFSectorProcessor.cc:715
csc::L1Track::setRank
void setRank(const unsigned &rank)
Definition: L1Track.h:33
ME
Definition: ME.h:11
L1MuRegionalCand::setBx
void setBx(int bx)
Set Bunch Crossing.
Definition: L1MuRegionalCand.h:113
CSCTFSPCoreLogic::run
bool run(const unsigned &endcap, const unsigned &sector, const unsigned &latency, const unsigned &etamin1, const unsigned &etamin2, const unsigned &etamin3, const unsigned &etamin4, const unsigned &etamin5, const unsigned &etamin6, const unsigned &etamin7, const unsigned &etamin8, const unsigned &etamax1, const unsigned &etamax2, const unsigned &etamax3, const unsigned &etamax4, const unsigned &etamax5, const unsigned &etamax6, const unsigned &etamax7, const unsigned &etamax8, const unsigned &etawin1, const unsigned &etawin2, const unsigned &etawin3, const unsigned &etawin4, const unsigned &etawin5, const unsigned &etawin6, const unsigned &etawin7, const unsigned &mindphip, const unsigned &mindetap, const unsigned &mindeta12_accp, const unsigned &maxdeta12_accp, const unsigned &maxdphi12_accp, const unsigned &mindeta13_accp, const unsigned &maxdeta13_accp, const unsigned &maxdphi13_accp, const unsigned &mindeta112_accp, const unsigned &maxdeta112_accp, const unsigned &maxdphi112_accp, const unsigned &mindeta113_accp, const unsigned &maxdeta113_accp, const unsigned &maxdphi113_accp, const unsigned &mindphip_halo, const unsigned &mindetap_halo, const unsigned &straightp, const unsigned &curvedp, const unsigned &mbaPhiOff, const unsigned &mbbPhiOff, const unsigned &m_extend_length, const unsigned &m_allowALCTonly, const unsigned &m_allowCLCTonly, const unsigned &m_preTrigger, const unsigned &m_widePhi, const int &minBX, const int &maxBX)
Definition: CSCTFSPCoreLogic.cc:280
csc::L1Track::ptLUTAddress
unsigned ptLUTAddress() const
Definition: L1Track.h:56
j
int j
Definition: DBlmapReader.cc:9
CSCTFSectorProcessor::l1_tracks
CSCTriggerContainer< csc::L1Track > l1_tracks
Definition: CSCTFSectorProcessor.h:98
CSCTriggerContainer::push_many
void push_many(const std::vector< T > &data)
Definition: CSCTriggerContainer.h:45
CSCTFSectorProcessor::srLUTs_
std::map< std::string, CSCSectorReceiverLUT * > srLUTs_
Definition: CSCTFSectorProcessor.h:104
ptadd
class pt_address ptadd
ptdat
class pt_data ptdat
CSCTFSectorProcessor::CSCTFSectorProcessor
CSCTFSectorProcessor(const unsigned &endcap, const unsigned &sector, const edm::ParameterSet &pset, bool tmb07, const L1MuTriggerScales *scales, const L1MuTriggerPtScale *ptScale)
Definition: CSCTFSectorProcessor.cc:16
gblphidat
class global_phi_data gblphidat
edm::EventSetup::get
const T & get() const
Definition: EventSetup.h:55
csc::L1Track::setOutputLink
void setOutputLink(unsigned oPL)
Definition: L1Track.h:62
edm::ESHandle::product
T const * product() const
Definition: ESHandle.h:62
lclphidat
class local_phi_data lclphidat
Data Types.
CSCTriggerNumbering::triggerSubSectorFromLabels
static int triggerSubSectorFromLabels(int station, int chamber)
Definition: CSCTriggerNumbering.cc:118
CSCTFSectorProcessor::tracks
CSCTriggerContainer< csc::L1Track > tracks() const
Definition: CSCTFSectorProcessor.h:46
ME
MonitorElement ME
Definition: DQMGenericClient.cc:29
L1MuRegionalCand::setEtaPacked
void setEtaPacked(unsigned eta)
Set Eta: 6-bit code.
Definition: L1MuRegionalCand.h:131
edm::shift
static unsigned int const shift
Definition: LuminosityBlockID.cc:9
csc::L1Track::setStationIds
void setStationIds(const unsigned &me1, const unsigned &me2, const unsigned &me3, const unsigned &me4, const unsigned &mb1)
Definition: L1Track.cc:123
CSCTFSPCoreLogic::loadData
void loadData(const CSCTriggerContainer< csctf::TrackStub > &, const unsigned &endcap, const unsigned &sector, const int &minBX, const int &maxBX)
Definition: CSCTFSPCoreLogic.cc:22
CSCTFSPCoreLogic::tracks
CSCTriggerContainer< csc::L1Track > tracks()
Definition: CSCTFSPCoreLogic.cc:1105
gbletadat
class global_eta_data gbletadat
CSCTFSectorProcessor::firmSP_Map
std::map< int, int > firmSP_Map
Definition: CSCTFSectorProcessor.h:109
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