test
CMS 3D CMS Logo

 All Classes Namespaces Files Functions Variables Typedefs Enumerations Enumerator Properties Friends Macros Pages
SiStripRawToDigiUnpacker.h
Go to the documentation of this file.
1 
2 #ifndef EventFilter_SiStripRawToDigi_SiStripRawToDigiUnpacker_H
3 #define EventFilter_SiStripRawToDigi_SiStripRawToDigiUnpacker_H
4 
10 #include "boost/cstdint.hpp"
11 #include <iostream>
12 #include <string>
13 #include <vector>
14 
16 namespace sistrip { class RawToClustersLazyUnpacker; }
17 namespace sistrip { class RawToDigiUnpacker; }
18 
21 class FEDRawData;
22 class SiStripDigi;
23 class SiStripRawDigi;
25 class SiStripFedCabling;
26 
27 namespace sistrip {
28 
30 
32 
33  public:
34 
37 
39  RawToDigiUnpacker( int16_t appended_bytes, int16_t fed_buffer_dump_freq, int16_t fed_event_dump_freq, int16_t trigger_fed_id, bool using_fed_key,
40  bool unpack_bad_channels, bool mark_missing_feds, const uint32_t errorThreshold );
41 
44 
46  void createDigis( const SiStripFedCabling&, const FEDRawDataCollection&, SiStripEventSummary&, RawDigis& scope_mode, RawDigis& virgin_raw, RawDigis& proc_raw, Digis& zero_suppr, DetIdCollection&, RawDigis& common_mode );
47 
49  void triggerFed( const FEDRawDataCollection&, SiStripEventSummary&, const uint32_t& event );
50 
52  void locateStartOfFedBuffer( const uint16_t& fed_id, const FEDRawData& input, FEDRawData& output );
53 
55  inline void quiet( bool );
56 
58  inline void useDaqRegister( bool );
59 
60  inline void extractCm( bool );
61 
62  inline void doFullCorruptBufferChecks( bool );
63 
64  inline void doAPVEmulatorCheck( bool );
65 
66  private:
67 
69  void update( RawDigis& scope_mode, RawDigis& virgin_raw, RawDigis& proc_raw, Digis& zero_suppr, RawDigis& common_mode );
70 
73 
76 
78  inline void readoutOrder( uint16_t& physical_order, uint16_t& readout_order );
79 
81  inline void physicalOrder( uint16_t& readout_order, uint16_t& physical_order );
82 
84  inline sistrip::FedBufferFormat fedBufferFormat( const uint16_t& register_value );
85 
87  inline sistrip::FedReadoutMode fedReadoutMode( const uint16_t& register_value );
88 
90  static void dumpRawData( uint16_t fed_id, const FEDRawData&, std::stringstream& );
91 
93  void handleException( std::string method_name, std::string extra_info = "" );
94 
96  void cleanupWorkVectors();
97 
99  class Registry {
100  public:
102  Registry(uint32_t aDetid, uint16_t firstStrip, size_t indexInVector, uint16_t numberOfDigis) :
103  detid(aDetid), first(firstStrip), index(indexInVector), length(numberOfDigis) {}
105  bool operator<(const Registry &other) const {return (detid != other.detid ? detid < other.detid : first < other.first);}
107  uint32_t detid;
108  uint16_t first;
109  size_t index;
110  uint16_t length;
111  };
112 
114  int16_t headerBytes_;
117  int16_t triggerFedId_;
121 
123  uint32_t event_;
124  bool once_;
125  bool first_;
127  bool quiet_;
128  bool extractCm_;
131  uint32_t errorThreshold_;
132 
134  std::vector<Registry> zs_work_registry_;
135  std::vector<Registry> virgin_work_registry_;
136  std::vector<Registry> scope_work_registry_;
137  std::vector<Registry> proc_work_registry_;
138  std::vector<Registry> cm_work_registry_;
139 
141  std::vector<SiStripDigi> zs_work_digis_;
142  std::vector<SiStripRawDigi> virgin_work_digis_;
143  std::vector<SiStripRawDigi> scope_work_digis_;
144  std::vector<SiStripRawDigi> proc_work_digis_;
145  std::vector<SiStripRawDigi> cm_work_digis_;
146  };
147 
148 }
149 
150 void sistrip::RawToDigiUnpacker::readoutOrder( uint16_t& physical_order, uint16_t& readout_order )
151 {
152  readout_order = ( 4*((static_cast<uint16_t>((static_cast<float>(physical_order)/8.0)))%4) + static_cast<uint16_t>(static_cast<float>(physical_order)/32.0) + 16*(physical_order%8) );
153 }
154 
155 void sistrip::RawToDigiUnpacker::physicalOrder( uint16_t& readout_order, uint16_t& physical_order )
156 {
157  physical_order = ( (32 * (readout_order%4)) + (8 * static_cast<uint16_t>(static_cast<float>(readout_order)/4.0)) - (31 * static_cast<uint16_t>(static_cast<float>(readout_order)/16.0)) );
158 }
159 
161 {
162  if ( (register_value&0xF) == 0x1 ) { return sistrip::FULL_DEBUG_FORMAT; }
163  else if ( (register_value&0xF) == 0x2 ) { return sistrip::APV_ERROR_FORMAT; }
164  else if ( (register_value&0xF) == 0x0 ) { return sistrip::UNDEFINED_FED_BUFFER_FORMAT; }
165  else { return sistrip::UNKNOWN_FED_BUFFER_FORMAT; }
166 }
167 
169 {
170  if ( ((register_value>>1)&0x7) == 0x0 ) { return sistrip::FED_SCOPE_MODE; }
171  else if ( ((register_value>>1)&0x7) == 0x1 ) { return sistrip::FED_VIRGIN_RAW; }
172  else if ( ((register_value>>1)&0x7) == 0x3 ) { return sistrip::FED_PROC_RAW; }
173  else if ( ((register_value>>1)&0x7) == 0x5 ) { return sistrip::FED_ZERO_SUPPR; }
174  else if ( ((register_value>>1)&0x7) == 0x6 ) { return sistrip::FED_ZERO_SUPPR_LITE; }
175  else { return sistrip::UNKNOWN_FED_READOUT_MODE; }
176 }
177 
178 void sistrip::RawToDigiUnpacker::quiet( bool quiet ) { quiet_ = quiet; }
179 
180 void sistrip::RawToDigiUnpacker::useDaqRegister( bool use ) { useDaqRegister_ = use; }
181 
182 void sistrip::RawToDigiUnpacker::extractCm( bool extract_cm ) { extractCm_ = extract_cm; }
183 
184 void sistrip::RawToDigiUnpacker::doFullCorruptBufferChecks( bool do_full_corrupt_buffer_checks ) { doFullCorruptBufferChecks_ = do_full_corrupt_buffer_checks; }
185 
186 void sistrip::RawToDigiUnpacker::doAPVEmulatorCheck( bool do_APVEmulator_check) { doAPVEmulatorCheck_ = do_APVEmulator_check; }
187 
188 #endif // EventFilter_SiStripRawToDigi_SiStripRawToDigiUnpacker_H
189 
190 
191 
void triggerFed(const FEDRawDataCollection &, SiStripEventSummary &, const uint32_t &event)
trigger info
void update(RawDigis &scope_mode, RawDigis &virgin_raw, RawDigis &proc_raw, Digis &zero_suppr, RawDigis &common_mode)
fill DetSetVectors using registries
void useDaqRegister(bool)
EventSummary update request -&gt; not yet implemented for FEDBuffer class.
std::vector< Registry > proc_work_registry_
void updateEventSummary(const sistrip::FEDBuffer &, SiStripEventSummary &)
sets the SiStripEventSummary -&gt; not yet implemented for FEDBuffer class
std::vector< SiStripDigi > zs_work_digis_
digi collections
std::vector< Registry > scope_work_registry_
void cleanupWorkVectors()
method to clear registries and digi collections
std::vector< Registry > zs_work_registry_
registries
Registry(uint32_t aDetid, uint16_t firstStrip, size_t indexInVector, uint16_t numberOfDigis)
constructor
void locateStartOfFedBuffer(const uint16_t &fed_id, const FEDRawData &input, FEDRawData &output)
Removes any data appended prior to FED buffer and reorders 32-bit words if swapped.
RawToDigiUnpacker()
private default constructor
void physicalOrder(uint16_t &readout_order, uint16_t &physical_order)
order of strips
sistrip::FedBufferFormat fedBufferFormat(const uint16_t &register_value)
returns buffer format
private class to register start and end index of digis in a collection
static std::string const input
Definition: EdmProvDump.cc:44
std::vector< SiStripRawDigi > virgin_work_digis_
void readoutOrder(uint16_t &physical_order, uint16_t &readout_order)
order of strips
~RawToDigiUnpacker()
default constructor
static void dumpRawData(uint16_t fed_id, const FEDRawData &, std::stringstream &)
dumps raw data to stdout (NB: payload is byte-swapped,headers/trailer are not).
edm::DetSetVector< SiStripRawDigi > RawDigis
std::vector< SiStripRawDigi > scope_work_digis_
A Digi for the silicon strip detector, containing both strip and adc information, and suitable for st...
Definition: SiStripDigi.h:12
How EventSelector::AcceptEvent() decides whether to accept an event for output otherwise it is excluding the probing of A single or multiple positive and the trigger will pass if any such matching triggers are PASS or EXCEPTION[A criterion thatmatches no triggers at all is detected and causes a throw.] A single negative with an expectation of appropriate bit checking in the decision and the trigger will pass if any such matching triggers are FAIL or EXCEPTION A wildcarded negative criterion that matches more than one trigger in the trigger but the state exists so we define the behavior If all triggers are the negative crieriion will lead to accepting the event(this again matches the behavior of"!*"before the partial wildcard feature was incorporated).The per-event"cost"of each negative criterion with multiple relevant triggers is about the same as!*was in the past
std::vector< SiStripRawDigi > proc_work_digis_
void handleException(std::string method_name, std::string extra_info="")
catches all possible exceptions and rethrows them as cms::Exceptions
std::vector< SiStripRawDigi > cm_work_digis_
Contains cabling info at the device level, including DetId, APV pair numbers, hardware addresses...
bool operator<(const Registry &other) const
&lt; operator to sort registries
void createDigis(const SiStripFedCabling &, const FEDRawDataCollection &, SiStripEventSummary &, RawDigis &scope_mode, RawDigis &virgin_raw, RawDigis &proc_raw, Digis &zero_suppr, DetIdCollection &, RawDigis &common_mode)
creates digis
std::vector< Registry > cm_work_registry_
edm::DetSetVector< SiStripDigi > Digis
A Digi for the silicon strip detector, containing only adc information, and suitable for storing raw ...
std::vector< Registry > virgin_work_registry_
sistrip::FedReadoutMode fedReadoutMode(const uint16_t &register_value)
returns buffer readout mode