CMS 3D CMS Logo
 All Classes Namespaces Files Functions Variables Typedefs Enumerations Enumerator Properties Friends Macros Pages
SiStripModule.cc
Go to the documentation of this file.
1 
2 #include "CalibFormats/SiStripObjects/interface/SiStripModule.h"
3 #include "DataFormats/SiStripCommon/interface/SiStripConstants.h"
4 #include "FWCore/MessageLogger/interface/MessageLogger.h"
5 #include <iostream>
6 #include <iomanip>
7 
8 using namespace sistrip;
9 
10 // -----------------------------------------------------------------------------
11 //
12 SiStripModule::SiStripModule( const FedChannelConnection& conn )
13  : key_( conn.fecCrate(),
14  conn.fecSlot(),
15  conn.fecRing(),
16  conn.ccuAddr(),
17  conn.ccuChan() ),
18  apv32_(0),
19  apv33_(0),
20  apv34_(0),
21  apv35_(0),
22  apv36_(0),
23  apv37_(0),
24  dcu0x00_(0),
25  mux0x43_(0),
26  pll0x44_(0),
27  lld0x60_(0),
28  dcuId_(0),
29  detId_(0),
30  nApvPairs_(0),
31  cabling_(),
32  length_(0)
33 {
34  addDevices( conn );
35 }
36 
37 // -----------------------------------------------------------------------------
38 //
39 void SiStripModule::addDevices( const FedChannelConnection& conn ) {
40 
41  if ( key_.fecCrate() && key_.fecCrate() != conn.fecCrate() ) {
42  edm::LogWarning(mlCabling_)
43  << "SiStripModule::" << __func__ << "]"
44  << " Unexpected FEC crate ("
45  << conn.fecCrate() << ") for this module ("
46  << key_.fecCrate() << ")!";
47  return;
48  }
49 
50  if ( key_.fecSlot() && key_.fecSlot() != conn.fecSlot() ) {
51  edm::LogWarning(mlCabling_)
52  << "SiStripModule::" << __func__ << "]"
53  << " Unexpected FEC slot ("
54  << conn.fecSlot() << ") for this module ("
55  << key_.fecSlot() << ")!";
56  return;
57  }
58 
59  if ( key_.fecRing() && key_.fecRing() != conn.fecRing() ) {
60  edm::LogWarning(mlCabling_)
61  << "SiStripModule::" << __func__ << "]"
62  << " Unexpected FEC ring ("
63  << conn.fecRing() << ") for this module ("
64  << key_.fecRing() << ")!";
65  return;
66  }
67 
68  if ( key_.ccuAddr() && key_.ccuAddr() != conn.ccuAddr() ) {
69  edm::LogWarning(mlCabling_)
70  << "SiStripModule::" << __func__ << "]"
71  << " Unexpected CCU addr ("
72  << conn.ccuAddr() << ") for this module ("
73  << key_.ccuAddr() << ")!";
74  return;
75  }
76 
77  if ( key_.ccuChan() && key_.ccuChan() != conn.ccuChan() ) {
78  edm::LogWarning(mlCabling_)
79  << "SiStripModule::" << __func__ << "]"
80  << " Unexpected CCU chan ("
81  << conn.ccuChan() << ") for this module ("
82  << key_.ccuChan() << ")!";
83  return;
84  }
85 
86  // APVs
87  if ( conn.i2cAddr(0) ) { addApv( conn.i2cAddr(0) ); }
88  if ( conn.i2cAddr(1) ) { addApv( conn.i2cAddr(1) ); }
89 
90  // Detector
91  dcuId( conn.dcuId() );
92  detId( conn.detId() );
93  nApvPairs( conn.nApvPairs() );
94 
95  // FED cabling
96  FedChannel fed_ch( conn.fedCrate(),
97  conn.fedSlot(),
98  conn.fedId(),
99  conn.fedCh() );
100  fedCh( conn.i2cAddr(0), fed_ch );
101 
102  // DCU, MUX, PLL, LLD
103  if ( conn.dcu() ) { dcu0x00_ = true; }
104  if ( conn.mux() ) { mux0x43_ = true; }
105  if ( conn.pll() ) { pll0x44_ = true; }
106  if ( conn.lld() ) { lld0x60_ = true; }
107 
108 }
109 
110 // -----------------------------------------------------------------------------
111 //
112 std::vector<uint16_t> SiStripModule::activeApvs() const {
113  std::vector<uint16_t> apvs;
114  if ( apv32_ ) { apvs.push_back( apv32_ ); }
115  if ( apv33_ ) { apvs.push_back( apv33_ ); }
116  if ( apv34_ ) { apvs.push_back( apv34_ ); }
117  if ( apv35_ ) { apvs.push_back( apv35_ ); }
118  if ( apv36_ ) { apvs.push_back( apv36_ ); }
119  if ( apv37_ ) { apvs.push_back( apv37_ ); }
120  return apvs;
121 }
122 
123 // -----------------------------------------------------------------------------
124 //
125  const uint16_t& SiStripModule::activeApv( const uint16_t& apv_address ) const {
126  if ( apv_address == 0 || apv_address == 32 ) { return apv32_; }
127  else if ( apv_address == 1 || apv_address == 33 ) { return apv33_; }
128  else if ( apv_address == 2 || apv_address == 34 ) { return apv34_; }
129  else if ( apv_address == 3 || apv_address == 35 ) { return apv35_; }
130  else if ( apv_address == 4 || apv_address == 36 ) { return apv36_; }
131  else if ( apv_address == 5 || apv_address == 37 ) { return apv37_; }
132  else {
133  edm::LogWarning(mlCabling_)
134  << "SiStripModule::" << __func__ << "]"
135  << " Unexpected I2C address or number ("
136  << apv_address << ") for this module!";
137  }
138  static const uint16_t address = 0;
139  return address;
140 }
141 
142 // -----------------------------------------------------------------------------
143 //
144 void SiStripModule::addApv( const uint16_t& apv_address ) {
145 
146  // Some checks on value of APV I2C address
147  if ( apv_address == 0 ) {
148  edm::LogWarning(mlCabling_)
149  << "SiStripModule::" << __func__ << "]"
150  << " Null APV I2C address!";
151  return;
152  } else if ( apv_address < 32 && apv_address > 37 ) {
153  edm::LogWarning(mlCabling_)
154  << "SiStripModule::" << __func__ << "]"
155  << " Unexpected I2C address ("
156  << apv_address << ") for APV!";
157  return;
158  }
159 
160  bool added_apv = false;
161  if ( !apv32_ && apv_address == 32 ) { apv32_ = 32; added_apv = true; }
162  else if ( !apv33_ && apv_address == 33 ) { apv33_ = 33; added_apv = true; }
163  else if ( !apv34_ && apv_address == 34 ) { apv34_ = 34; added_apv = true; }
164  else if ( !apv35_ && apv_address == 35 ) { apv35_ = 35; added_apv = true; }
165  else if ( !apv36_ && apv_address == 36 ) { apv36_ = 36; added_apv = true; }
166  else if ( !apv37_ && apv_address == 37 ) { apv37_ = 37; added_apv = true; }
167 
168  std::stringstream ss;
169  ss << "SiStripModule::" << __func__ << "]";
170  if ( added_apv ) { ss << " Added new APV for"; }
171  else { ss << " APV already exists for"; }
172  ss << " Crate/FEC/Ring/CCU/Module: "
173  << key_.fecCrate() << "/"
174  << key_.fecSlot() << "/"
175  << key_.fecRing() << "/"
176  << key_.ccuAddr() << "/"
177  << key_.ccuChan() << "/"
178  << apv_address;
179  //if ( added_apv ) { LogTrace(mlCabling_) << ss.str(); }
180  /* else */ if ( !added_apv ) { edm::LogWarning(mlCabling_) << ss.str(); }
181 
182 }
183 
184 // -----------------------------------------------------------------------------
185 //
186 void SiStripModule::nApvPairs( const uint16_t& npairs ) {
187  if ( npairs == 2 || npairs == 3 ) { nApvPairs_ = npairs; }
188  else if ( npairs == 0 ) {
189  nApvPairs_ = 0;
190  if ( apv32_ || apv33_ ) { nApvPairs_++; }
191  if ( apv34_ || apv35_ ) { nApvPairs_++; }
192  if ( apv36_ || apv37_ ) { nApvPairs_++; }
193  } else {
194  edm::LogWarning(mlCabling_)
195  << "SiStripModule::" << __func__ << "]"
196  << " Unexpected number of APV pairs: "
197  << npairs;
198  }
199 }
200 
201 // -----------------------------------------------------------------------------
202 //
203 SiStripModule::PairOfU16 SiStripModule::activeApvPair( const uint16_t& lld_channel ) const {
204  if ( lld_channel == 1 ) { return PairOfU16(apv32_,apv33_); }
205  else if ( lld_channel == 2 ) { return PairOfU16(apv34_,apv35_); }
206  else if ( lld_channel == 3 ) { return PairOfU16(apv36_,apv37_); }
207  else {
208  edm::LogWarning(mlCabling_)
209  << "SiStripModule::" << __func__ << "]"
210  << " Unexpected LLD channel: " << lld_channel;
211  return PairOfU16(0,0);
212  }
213 }
214 
215 // -----------------------------------------------------------------------------
216 //
217 uint16_t SiStripModule::lldChannel( const uint16_t& apv_pair_num ) const {
218  if ( apv_pair_num > 2 ) {
219  edm::LogWarning(mlCabling_)
220  << "SiStripModule::" << __func__ << "]"
221  << " Unexpected APV pair number: " << apv_pair_num;
222  return 0;
223  }
224  if ( nApvPairs_ != 2 && nApvPairs_ != 3 ) {
225  edm::LogWarning(mlCabling_)
226  << "SiStripModule::" << __func__ << "]"
227  << " Unexpected number of APV pairs: " << nApvPairs_;
228  return 0;
229  }
230  if ( nApvPairs_ == 2 && apv_pair_num == 1 ) { return 3; }
231  else if ( nApvPairs_ == 2 && apv_pair_num == 2 ) {
232  edm::LogWarning(mlCabling_)
233  << "[SiStripFecCabling::" << __func__ << "]"
234  << " APV pair number is incompatible with"
235  << " respect to number of !";
236  return 0;
237  } else { return apv_pair_num + 1; }
238 }
239 
240 // -----------------------------------------------------------------------------
241 //
242 uint16_t SiStripModule::apvPairNumber( const uint16_t& lld_channel ) const {
243  if ( lld_channel < 1 || lld_channel > 3 ) {
244  edm::LogWarning(mlCabling_)
245  << "SiStripModule::" << __func__ << "]"
246  << " Unexpected LLD channel: " << lld_channel;
247  return 0;
248  }
249  if ( nApvPairs_ != 2 && nApvPairs_ != 3 ) {
250  edm::LogWarning(mlCabling_)
251  << "SiStripModule::" << __func__ << "]"
252  << " Unexpected number of APV pairs: " << nApvPairs_;
253  return 0;
254  }
255  if ( nApvPairs_ == 2 && lld_channel == 3 ) { return 1; }
256  else if ( nApvPairs_ == 2 && lld_channel == 2 ) {
257  edm::LogWarning(mlCabling_)
258  << "SiStripModule::" << __func__ << "]"
259  << " LLD channel is incompatible with"
260  << " respect to number of APV pairs!";
261  return 0;
262  } else { return lld_channel - 1; }
263 }
264 
265 // -----------------------------------------------------------------------------
266 //
267 SiStripModule::FedChannel SiStripModule::fedCh( const uint16_t& apv_pair ) const {
268 
269  FedChannel fed_ch(0,0,0,0);
270 
271  if ( !nApvPairs() ) {
272 
273  edm::LogWarning(mlCabling_)
274  << "SiStripModule::" << __func__ << "]"
275  << " No APV pairs exist!";
276  return fed_ch;
277 
278  } else {
279 
280  uint16_t lld_ch = 0;
281  if ( nApvPairs() == 2 ) {
282 
283  if ( apv_pair == 0 ) { lld_ch = 1; }
284  else if ( apv_pair == 1 ) { lld_ch = 3; }
285  else {
286  edm::LogWarning(mlCabling_)
287  << "SiStripModule::" << __func__ << "]"
288  << " Unexpected pair number! " << apv_pair;
289  }
290 
291  } else if ( nApvPairs() == 3 ) {
292 
293  if ( apv_pair == 0 ) { lld_ch = 1; }
294  else if ( apv_pair == 1 ) { lld_ch = 2; }
295  else if ( apv_pair == 2 ) { lld_ch = 3; }
296  else {
297  edm::LogWarning(mlCabling_)
298  << "SiStripModule::" << __func__ << "]"
299  << " Unexpected pair number! " << apv_pair;
300  }
301 
302  } else {
303 
304  edm::LogWarning(mlCabling_)
305  << "SiStripModule::" << __func__ << "]"
306  << " Unexpected number of APV pairs: " << nApvPairs();
307 
308  }
309 
310  FedCabling::const_iterator ipair = cabling_.find( lld_ch );
311  if ( ipair != cabling_.end() ) { return (*ipair).second; }
312  else { return fed_ch; }
313 
314  }
315 
316 }
317 
318 // -----------------------------------------------------------------------------
319 //
320 bool SiStripModule::fedCh( const uint16_t& apv_address,
321  const FedChannel& fed_ch ) {
322  // Determine LLD channel
323  int16_t lld_ch = 1;
324  if ( apv_address == 32 || apv_address == 33 ) { lld_ch = 1; }
325  else if ( apv_address == 34 || apv_address == 35 ) { lld_ch = 2; }
326  else if ( apv_address == 36 || apv_address == 37 ) { lld_ch = 3; }
327  else if ( apv_address == 0 ) { ; } //@@ do nothing?
328  else {
329  edm::LogWarning(mlCabling_) << "[SiStripModule::fedCh]"
330  << " Unexpected I2C address ("
331  << apv_address << ") for APV!";
332  return false;
333  }
334  // Search for entry in std::map
335  //@@ use FedKey as key instead of lld chan? what about "duplicates"?
336  //@@ always append to std::map? then can have >3 entries. useful for debug?
337  FedCabling::iterator ipair = cabling_.find( lld_ch );
338  if ( ipair == cabling_.end() ) { cabling_[lld_ch] = fed_ch; }
339  else { ipair->second = fed_ch; }
340  return true;
341 }
342 
343 // -----------------------------------------------------------------------------
344 //
345 void SiStripModule::print( std::stringstream& ss ) const {
346 
347  ss << " [SiStripModule::" << __func__ << "]" << std::endl
348  << " Crate/FEC/Ring/CCU/Module : "
349  << key().fecCrate() << "/"
350  << key().fecSlot() << "/"
351  << key().fecRing() << "/"
352  << key().ccuAddr() << "/"
353  << key().ccuChan() << std::endl;
354 
355  ss << " ActiveApvs : ";
356  std::vector<uint16_t> apvs = activeApvs();
357  if ( apvs.empty() ) { ss << "NONE!"; }
358  std::vector<uint16_t>::const_iterator iapv = apvs.begin();
359  for ( ; iapv != apvs.end(); iapv++ ) { ss << *iapv << ", "; }
360  ss << std::endl;
361 
362  ss << " DcuId/DetId/nPairs : "
363  << std::hex
364  << "0x" << std::setfill('0') << std::setw(8) << dcuId() << "/"
365  << "0x" << std::setfill('0') << std::setw(8) << detId() << "/"
366  << std::dec
367  << nApvPairs() << std::endl;
368 
369  FedCabling channels = fedChannels();
370  ss << " ApvPairNum/FedCrate/FedSlot/FedId/FedCh : ";
371  FedCabling::const_iterator ichan = channels.begin();
372  for ( ; ichan != channels.end(); ichan++ ) {
373  ss << ichan->first << "/"
374  << ichan->second.fedCrate_ << "/"
375  << ichan->second.fedSlot_ << "/"
376  << ichan->second.fedId_ << "/"
377  << ichan->second.fedCh_ << ", ";
378  }
379  ss << std::endl;
380 
381  ss << " DCU/MUX/PLL/LLD found : "
382  << bool(dcu0x00_) << "/"
383  << bool(mux0x43_) << "/"
384  << bool(pll0x44_) << "/"
385  << bool(lld0x60_);
386 
387 }
388 
389 // -----------------------------------------------------------------------------
390 //@@ NEEDS MODIFYING!!!!
391 void SiStripModule::terse( std::stringstream& ss ) const {
392 
393  ss << " [SiStripModule::" << __func__ << "]" << std::endl
394  << " Crate/FEC/Ring/CCU/Module : "
395  << key().fecCrate() << "/"
396  << key().fecSlot() << "/"
397  << key().fecRing() << "/"
398  << key().ccuAddr() << "/"
399  << key().ccuChan() << std::endl;
400 
401  ss << " ActiveApvs : ";
402  std::vector<uint16_t> apvs = activeApvs();
403  if ( apvs.empty() ) { ss << "NONE!"; }
404  std::vector<uint16_t>::const_iterator iapv = apvs.begin();
405  for ( ; iapv != apvs.end(); iapv++ ) { ss << *iapv << ", "; }
406  ss << std::endl;
407 
408  ss << " DcuId/DetId/nPairs : "
409  << std::hex
410  << "0x" << std::setfill('0') << std::setw(8) << dcuId() << "/"
411  << "0x" << std::setfill('0') << std::setw(8) << detId() << "/"
412  << std::dec
413  << nApvPairs() << std::endl;
414 
415  FedCabling channels = fedChannels();
416  ss << " ApvPairNum/FedCrate/FedSlot/FedId/FedCh : ";
417  FedCabling::const_iterator ichan = channels.begin();
418  for ( ; ichan != channels.end(); ichan++ ) {
419  ss << ichan->first << "/"
420  << ichan->second.fedCrate_ << "/"
421  << ichan->second.fedSlot_ << "/"
422  << ichan->second.fedId_ << "/"
423  << ichan->second.fedCh_ << ", ";
424  }
425  ss << std::endl;
426 
427  ss << " DCU/MUX/PLL/LLD found : "
428  << bool(dcu0x00_) << "/"
429  << bool(mux0x43_) << "/"
430  << bool(pll0x44_) << "/"
431  << bool(lld0x60_);
432 
433 }
434 
435 // -----------------------------------------------------------------------------
436 //
437 std::ostream& operator<< ( std::ostream& os, const SiStripModule& device ) {
438  std::stringstream ss;
439  device.print(ss);
440  os << ss.str();
441  return os;
442 }
FedChannelConnection::fecSlot
const uint16_t & fecSlot() const
Definition: FedChannelConnection.h:206
SiStripModule
Device and connection information at the level of a front-end module.
Definition: SiStripModule.h:24
SiStripModule::apv35_
uint16_t apv35_
Definition: SiStripModule.h:171
SiStripModule::terse
void terse(std::stringstream &) const
Definition: SiStripModule.cc:391
FedChannelConnection::fecCrate
const uint16_t & fecCrate() const
Definition: FedChannelConnection.h:205
FedChannelConnection::lld
const bool & lld() const
Definition: FedChannelConnection.h:214
SiStripModule::pll0x44_
uint16_t pll0x44_
Definition: SiStripModule.h:178
SiStripModule::activeApvs
std::vector< uint16_t > activeApvs() const
Definition: SiStripModule.cc:112
SiStripModule::key_
SiStripFecKey key_
Definition: SiStripModule.h:165
SiStripFecKey::fecRing
const uint16_t & fecRing() const
Definition: SiStripFecKey.h:206
FedChannelConnection::fedCh
const uint16_t & fedCh() const
Definition: FedChannelConnection.h:225
SiStripModule::print
void print(std::stringstream &) const
Definition: SiStripModule.cc:345
SiStripModule::key
const SiStripFecKey & key() const
Definition: SiStripModule.h:200
SiStripModule::apv37_
uint16_t apv37_
Definition: SiStripModule.h:173
SiStripModule::addDevices
void addDevices(const FedChannelConnection &conn)
Definition: SiStripModule.cc:39
SiStripFecKey::fecSlot
const uint16_t & fecSlot() const
Definition: SiStripFecKey.h:205
operator<<
std::ostream & operator<<(std::ostream &out, const ALILine &li)
Definition: ALILine.cc:187
SiStripModule::apv33_
uint16_t apv33_
Definition: SiStripModule.h:169
SiStripModule::fedChannels
const FedCabling & fedChannels() const
Definition: SiStripModule.h:209
FedChannelConnection::fedId
const uint16_t & fedId() const
Definition: FedChannelConnection.h:224
SiStripModule::apvPairNumber
uint16_t apvPairNumber(const uint16_t &lld_channel) const
Definition: SiStripModule.cc:242
sistrip::mlCabling_
static const char mlCabling_[]
Definition: ConstantsForLogger.h:14
FedChannelConnection::fecRing
const uint16_t & fecRing() const
Definition: FedChannelConnection.h:207
FedChannelConnection::fedSlot
const uint16_t & fedSlot() const
Definition: FedChannelConnection.h:223
FedChannelConnection::detId
const uint32_t & detId() const
Definition: FedChannelConnection.h:217
FedChannelConnection
Class containning control, module, detector and connection information, at the level of a FED channel...
Definition: FedChannelConnection.h:26
SiStripModule::apv32_
uint16_t apv32_
Definition: SiStripModule.h:168
SiStripModule::mux0x43_
uint16_t mux0x43_
Definition: SiStripModule.h:177
FedChannelConnection::ccuChan
const uint16_t & ccuChan() const
Definition: FedChannelConnection.h:209
SiStripModule::lldChannel
uint16_t lldChannel(const uint16_t &apv_pair_num) const
Definition: SiStripModule.cc:217
SiStripModule::addApv
void addApv(const uint16_t &apv_address)
Definition: SiStripModule.cc:144
FedChannelConnection::mux
const bool & mux() const
Definition: FedChannelConnection.h:212
FedChannelConnection::dcu
const bool & dcu() const
Definition: FedChannelConnection.h:211
FedChannelConnection::ccuAddr
const uint16_t & ccuAddr() const
Definition: FedChannelConnection.h:208
FedChannelConnection::dcuId
const uint32_t & dcuId() const
Definition: FedChannelConnection.h:216
SiStripFecKey::fecCrate
const uint16_t & fecCrate() const
Definition: SiStripFecKey.h:204
SiStripModule::activeApvPair
PairOfU16 activeApvPair(const uint16_t &lld_channel) const
Definition: SiStripModule.cc:203
SiStripModule::nApvPairs
const uint16_t & nApvPairs() const
Definition: SiStripModule.h:204
SiStripModule::dcuId
const uint32_t & dcuId() const
Definition: SiStripModule.h:202
FedChannelConnection::nApvPairs
const uint16_t & nApvPairs() const
Definition: FedChannelConnection.h:219
SiStripFecKey::ccuAddr
const uint16_t & ccuAddr() const
Definition: SiStripFecKey.h:207
SiStripModule::PairOfU16
std::pair< uint16_t, uint16_t > PairOfU16
Definition: SiStripModule.h:42
FedChannelConnection::pll
const bool & pll() const
Definition: FedChannelConnection.h:213
SiStripModule::detId
const uint32_t & detId() const
Definition: SiStripModule.h:203
FedChannelConnection::fedCrate
const uint16_t & fedCrate() const
Definition: FedChannelConnection.h:222
SiStripModule::cabling_
FedCabling cabling_
Definition: SiStripModule.h:187
SiStripModule::lld0x60_
uint16_t lld0x60_
Definition: SiStripModule.h:179
SiStripModule::fedCh
FedChannel fedCh(const uint16_t &apv_pair_num) const
Definition: SiStripModule.cc:267
SiStripFecKey::ccuChan
const uint16_t & ccuChan() const
Definition: SiStripFecKey.h:208
SiStripModule::apv34_
uint16_t apv34_
Definition: SiStripModule.h:170
SiStripModule::nApvPairs_
uint16_t nApvPairs_
Definition: SiStripModule.h:184
SiStripModule::FedCabling
std::map< uint16_t, FedChannel > FedCabling
Definition: SiStripModule.h:59
FedChannelConnection::i2cAddr
const uint16_t & i2cAddr(const uint16_t &apv0_or_1) const
Definition: FedChannelConnection.cc:83
results_mgr.conn
tuple conn
Definition: results_mgr.py:53
SiStripModule::activeApv
const uint16_t & activeApv(const uint16_t &apv_address) const
Definition: SiStripModule.cc:125
SiStripModule::SiStripModule
SiStripModule(const FedChannelConnection &conn)
Definition: SiStripModule.cc:12
SiStripModule::apv36_
uint16_t apv36_
Definition: SiStripModule.h:172
SiStripModule::dcu0x00_
uint16_t dcu0x00_
Definition: SiStripModule.h:176
Generated for CMSSW Reference Manual by doxygen 1.8.5