CMS 3D CMS Logo
 All Classes Namespaces Files Functions Variables Typedefs Enumerations Enumerator Properties Friends Macros Pages
PixelFEDCard.cc
Go to the documentation of this file.
1 // Read the pixelFED setup parameters from an ASCII file
2 // Will Johns & Danek Kotlinski 04/06.
3 
4 #include <iostream>
5 
6 #include "CalibFormats/SiPixelObjects/interface/PixelFEDCard.h"
7 #include "CalibFormats/SiPixelObjects/interface/PixelTimeFormatter.h"
8 
9 #include <cassert>
10 #include <sstream>
11 #include <map>
12 #include <stdexcept>
13 
14 using namespace std;
15 
16 using namespace pos;
17 
18 
19 PixelFEDCard::PixelFEDCard():
20  PixelConfigBase(" "," "," ")
21 {
22  clear();
23 }
24 
25 // modified by MR on 24-04-2008 12:05:42
26 // Read configuration from DB
27 PixelFEDCard::PixelFEDCard(vector<vector<string> > &tableMat):PixelConfigBase(" "," "," ")
28 {
29  std::string mthn = "[PixelFEDCard::PixelFEDCard()]\t\t " ;
30  vector<string> ins = tableMat[0];
31  map<string , int > colM;
32  vector<string> colNames;
33  bool first = true ;
113  colNames.push_back("CONFIG_KEY" );
114  colNames.push_back("KEY_TYPE" );
115  colNames.push_back("KEY_ALIAS" );
116  colNames.push_back("VERSION" );
117  colNames.push_back("KIND_OF_COND" );
118  colNames.push_back("CRATE_LABEL" );
119  colNames.push_back("CRATE_NUMBER" );
120  colNames.push_back("SLOT_NUMBER" );
121  colNames.push_back("VME_ADDRS_HEX" );
122  colNames.push_back("PIXEL_FED" );
123  colNames.push_back("CHANNEL_ID" );
124  colNames.push_back("NUM_ROCS" );
125  colNames.push_back("CHAN_OFFST_DAC" );
126  colNames.push_back("CHAN_DELAY" );
127  colNames.push_back("CHAN_BHIGH" );
128  colNames.push_back("CHAN_BLOW" );
129  colNames.push_back("CHAN_UB" );
130  colNames.push_back("OPT1_CAP" );
131  colNames.push_back("OPT2_CAP" );
132  colNames.push_back("OPT3_CAP" );
133  colNames.push_back("OPT1_INP" );
134  colNames.push_back("OPT2_INP" );
135  colNames.push_back("OPT3_INP" );
136  colNames.push_back("OPT1_OUT" );
137  colNames.push_back("OPT2_OUT" );
138  colNames.push_back("OPT3_OUT" );
139  colNames.push_back("NORTH_CLKPHB" );
140  colNames.push_back("NORTHCENTER_CLKPHB" );
141  colNames.push_back("SOUTHCENTER_CLKPHB" );
142  colNames.push_back("SOUTH_CLKPHB" );
143  colNames.push_back("NORTH_CTRL" );
144  colNames.push_back("NORTHCENTER_CTRL" );
145  colNames.push_back("SOUTHCENTER_CTRL" );
146  colNames.push_back("SOUTH_CTRL" );
147  colNames.push_back("REG0_TTCRX_FDLA" );
148  colNames.push_back("REG1_TTCRX_FDLA" );
149  colNames.push_back("REG2_TTCRX_CDLA" );
150  colNames.push_back("REG3_TTCRX_CLKD2" );
151  colNames.push_back("CENTER_CTRL" );
152  colNames.push_back("CENTER_MODE" );
153  colNames.push_back("B1_ADCGN" );
154  colNames.push_back("B2_ADCGN" );
155  colNames.push_back("B3_ADCGN" );
156  colNames.push_back("B4_ADCGN" );
157  colNames.push_back("NORTH_BADJ" );
158  colNames.push_back("NORTHCENTER_BADJ" );
159  colNames.push_back("SOUTHCENTER_BADJ" );
160  colNames.push_back("SOUTH_BADJ" );
161  colNames.push_back("NORTH_TBMMASK" );
162  colNames.push_back("NORTHCENTER_TBMMASK" );
163  colNames.push_back("SOUTHCENTER_TBMMASK" );
164  colNames.push_back("SOUTH_TBMMASK" );
165  colNames.push_back("NORTH_PWORD" );
166  colNames.push_back("NORTHCENTER_PWORD" );
167  colNames.push_back("SOUTH_PWORD" );
168  colNames.push_back("SOUTHCENTER_PWORD" );
169  colNames.push_back("SPECDAC" );
170  colNames.push_back("OOS_LVL" );
171  colNames.push_back("ERR_LVL" );
172  colNames.push_back("NORTH_FIFO1_BZ_LVL" );
173  colNames.push_back("NORTHCENTER_FIFO1_BZ_LVL");
174  colNames.push_back("SOUTHCENTER_FIFO1_BZ_LVL");
175  colNames.push_back("SOUTH_FIFO1_BZ_LVL" );
176  colNames.push_back("FIFO3_WRN_LVL" );
177  colNames.push_back("FED_MASTER_DELAY" );
178  colNames.push_back("NO_HITLIMIT" );
179  colNames.push_back("NC_HITLIMIT" );
180  colNames.push_back("SC_HITLIMIT" );
181  colNames.push_back("SO_HITLIMIT" );
182  colNames.push_back("NO_TESTREG" );
183  colNames.push_back("NC_TESTREG" );
184  colNames.push_back("SC_TESTREG" );
185  colNames.push_back("SO_TESTREG" );
186 
187  for(unsigned int c = 0 ; c < ins.size() ; c++)
188  {
189  for(unsigned int n=0; n<colNames.size(); n++)
190  {
191  if(tableMat[0][c] == colNames[n]){
192  colM[colNames[n]] = c;
193  break;
194  }
195  }
196  }//end for
197  for(unsigned int n=0; n<colNames.size(); n++)
198  {
199  if(colM.find(colNames[n]) == colM.end())
200  {
201  std::cerr << "[PixelTBMSettings::PixelTBMSettings()]\tCouldn't find in the database the column with name " << colNames[n] << std::endl;
202  assert(0);
203  }
204  }
205  // disentagle different tables
206  int size[3] ;
207  int indexsize = 0 ;
208  for(unsigned int r = 0 ; r < tableMat.size() ; r++){ //Goes to every row of the Matrix
209  if(tableMat[r].size() == 0)
210  {
211 // cout << __LINE__ << "]\t" << mthn << "__________________ NEW TABLE __________________"<< endl ;
212  size[indexsize] = r ;
213 // cout << __LINE__ << "]\t" << mthn << "size[" << indexsize << "] = " << size[indexsize] << endl ;
214  indexsize++ ;
215  continue ;
216  }
217  for(vector<string>::iterator it = tableMat[r].begin() ; it != tableMat[r].end() ; it++)
218  {
219 // cout << __LINE__ << "]\t" << mthn << *it <<"["<<&*it<<"]\t" ;
220 // cout << __LINE__ << "]\t" << mthn << *it <<"\t" ;
221  }
222 // cout << __LINE__ << "]\t" << mthn << endl ;
223  }
224 
225  // Read below quantities pertaining to a single FED that are equal accross 36 channels
226  if(first)
227  {
228  first = false ;
229  //VME base address
230  //Fed Base Address
231  sscanf(tableMat[1][colM["VME_ADDRS_HEX"]].c_str(),"%lx",&FEDBASE_0);
232  // sscanf(tableMat[1][colM["PIXEL_FED"]].c_str(), "PxlFED_%ld",&fedNumber);
233  fedNumber = atoi(tableMat[1][colM["PIXEL_FED"]].c_str() ) ;
234  //Settable optical input parameters (one for each 12-receiver)
235  opt_cap[0] = atoi(tableMat[1][colM["OPT1_CAP"]].c_str() ) ;
236  opt_cap[1] = atoi(tableMat[1][colM["OPT2_CAP"]].c_str() ) ;
237  opt_cap[2] = atoi(tableMat[1][colM["OPT3_CAP"]].c_str() ) ;
238  opt_inadj[0] = atoi(tableMat[1][colM["OPT1_INP"]].c_str() ) ;
239  opt_inadj[1] = atoi(tableMat[1][colM["OPT2_INP"]].c_str() ) ;
240  opt_inadj[2] = atoi(tableMat[1][colM["OPT3_INP"]].c_str() ) ;
241  opt_ouadj[0] = atoi(tableMat[1][colM["OPT1_OUT"]].c_str() ) ;
242  opt_ouadj[1] = atoi(tableMat[1][colM["OPT2_OUT"]].c_str() ) ;
243  opt_ouadj[2] = atoi(tableMat[1][colM["OPT3_OUT"]].c_str() ) ;
244 
245  //clock phases, use bits 0-8, select the clock edged
246  clkphs1_9 = atoi(tableMat[1][colM["NORTH_CLKPHB"]].c_str() ) ; // TO BE VERIFIED
247  clkphs10_18 = atoi(tableMat[1][colM["NORTHCENTER_CLKPHB"]].c_str() ) ; // TO BE VERIFIED
248  clkphs19_27 = atoi(tableMat[1][colM["SOUTHCENTER_CLKPHB"]].c_str() ) ; // TO BE VERIFIED
249  clkphs28_36 = atoi(tableMat[1][colM["SOUTH_CLKPHB"]].c_str() ) ; // TO BE VERIFIED
250 
251  // Control register and delays for the TTCrx
252  CoarseDel = atoi(tableMat[1][colM["REG2_TTCRX_CDLA"]].c_str() ) ;
253  ClkDes2 = atoi(tableMat[1][colM["REG3_TTCRX_CLKD2"]].c_str() ) ;
254  FineDes2Del = atoi(tableMat[1][colM["REG1_TTCRX_FDLA"]].c_str() ) ;
255  FineDes1Del = atoi(tableMat[1][colM["REG0_TTCRX_FDLA"]].c_str() ) ;
256 
257  Ccntrl = atoi(tableMat[1][colM["CENTER_CTRL"]].c_str() ) ;
258  modeRegister = atoi(tableMat[1][colM["CENTER_MODE"]].c_str() ) ;
259 
260  //data Regs adjustable fifo Almost Full levels
261  Nfifo1Bzlvl = atoi(tableMat[1][colM["NORTH_FIFO1_BZ_LVL"]].c_str() ) ;
262  NCfifo1Bzlvl = atoi(tableMat[1][colM["NORTHCENTER_FIFO1_BZ_LVL"]].c_str() ) ;
263  SCfifo1Bzlvl = atoi(tableMat[1][colM["SOUTHCENTER_FIFO1_BZ_LVL"]].c_str() ) ;
264  Sfifo1Bzlvl = atoi(tableMat[1][colM["SOUTH_FIFO1_BZ_LVL"]].c_str() ) ;
265 
266  //Bits (1st 8) used to mask TBM trailer bits
267  N_TBMmask = atoi(tableMat[1][colM["NORTH_TBMMASK"]].c_str() ) ;
268  NC_TBMmask = atoi(tableMat[1][colM["NORTHCENTER_TBMMASK"]].c_str() ) ;
269  SC_TBMmask = atoi(tableMat[1][colM["SOUTHCENTER_TBMMASK"]].c_str() ) ;
270  S_TBMmask = atoi(tableMat[1][colM["SOUTH_TBMMASK"]].c_str() ) ;
271 
272  //Bits (1st 8) used to set the Private Word in the gap and filler words
273  N_Pword = atoi(tableMat[1][colM["NORTH_PWORD"]].c_str() ) ;
274  NC_Pword = atoi(tableMat[1][colM["NORTHCENTER_PWORD"]].c_str() ) ;
275  SC_Pword = atoi(tableMat[1][colM["SOUTHCENTER_PWORD"]].c_str() ) ;
276  S_Pword = atoi(tableMat[1][colM["SOUTH_PWORD"]].c_str() ) ;
277 
278  Nbaseln = atoi(tableMat[1][colM["NORTH_BADJ"]].c_str() ) ;
279  NCbaseln = atoi(tableMat[1][colM["NORTHCENTER_BADJ"]].c_str() ) ;
280  SCbaseln = atoi(tableMat[1][colM["SOUTHCENTER_BADJ"]].c_str() ) ;
281  Sbaseln = atoi(tableMat[1][colM["SOUTH_BADJ"]].c_str() ) ;
282 
283  Ncntrl = atoi(tableMat[1][colM["NORTH_CTRL"]].c_str() ) ;
284  NCcntrl = atoi(tableMat[1][colM["NORTHCENTER_CTRL"]].c_str() ) ;
285  SCcntrl = atoi(tableMat[1][colM["SOUTHCENTER_CTRL"]].c_str() ) ;
286  Scntrl = atoi(tableMat[1][colM["SOUTH_CTRL"]].c_str() ) ;
287 
288 
289  //These bit sets the special dac mode for random triggers
290  SpecialDac = atoi(tableMat[1][colM["SPECDAC"]].c_str() ) ;
291 
292  //These bits set the number of Out of consecutive out of sync events until a TTs OOs
293  Ooslvl = atoi(tableMat[1][colM["OOS_LVL"]].c_str() ) ;
294  //These bits set the number of Empty events until a TTs Error
295  Errlvl = atoi(tableMat[1][colM["ERR_LVL"]].c_str() ) ;
296 
297  //Control Regs for setting ADC 1Vpp and 2Vpp
298  Nadcg = atoi(tableMat[1][colM["B1_ADCGN"]].c_str() ) ;
299  NCadcg = atoi(tableMat[1][colM["B2_ADCGN"]].c_str() ) ;
300  SCadcg = atoi(tableMat[1][colM["B3_ADCGN"]].c_str() ) ;
301  Sadcg = atoi(tableMat[1][colM["B4_ADCGN"]].c_str() ) ;
302  fifo3Wrnlvl = atoi(tableMat[1][colM["FIFO3_WRN_LVL"]].c_str() ) ;
303  FedTTCDelay = atoi(tableMat[1][colM["FED_MASTER_DELAY"]].c_str() ) ;
304  N_hitlimit = atoi(tableMat[1][colM["NO_HITLIMIT"]].c_str() ) ;
305  NC_hitlimit = atoi(tableMat[1][colM["NC_HITLIMIT"]].c_str() ) ;
306  SC_hitlimit = atoi(tableMat[1][colM["SC_HITLIMIT"]].c_str() ) ;
307  S_hitlimit = atoi(tableMat[1][colM["SO_HITLIMIT"]].c_str() ) ;
308  N_testreg = atoi(tableMat[1][colM["NO_TESTREG"]].c_str() ) ;
309  NC_testreg = atoi(tableMat[1][colM["NC_TESTREG"]].c_str() ) ;
310  SC_testreg = atoi(tableMat[1][colM["SC_TESTREG"]].c_str() ) ;
311  S_testreg = atoi(tableMat[1][colM["SO_TESTREG"]].c_str() ) ;
312 
313  } // end of 'first' condition
314  for(int r = 1 ; r < size[0] ; r++) //Goes to every row of the FIRST Matrix (MUST BE 36, one for each FED channel)
315  {
316  //Number of ROCS per FED channel
317  NRocs[atoi(tableMat[r][colM["CHANNEL_ID"]].c_str())-1] = atoi(tableMat[r][colM["NUM_ROCS"]].c_str() ) ;
318  //input offset dac (one for each channel)
319  offs_dac[atoi(tableMat[r][colM["CHANNEL_ID"]].c_str())-1] = atoi(tableMat[r][colM["CHAN_OFFST_DAC"]].c_str() ) ;
320  //Channel delays, one for each channel, 0=15
321  DelayCh[atoi(tableMat[r][colM["CHANNEL_ID"]].c_str())-1] = atoi(tableMat[r][colM["CHAN_DELAY"]].c_str() ) ;
322  //Blacks and Ultra-blacks, 3 limit per channel
323  BlackHi[atoi(tableMat[r][colM["CHANNEL_ID"]].c_str())-1] = atoi(tableMat[r][colM["CHAN_BHIGH"]].c_str() ) ;
324  BlackLo[atoi(tableMat[r][colM["CHANNEL_ID"]].c_str())-1] = atoi(tableMat[r][colM["CHAN_BLOW"]].c_str() ) ;
325  Ublack[atoi(tableMat[r][colM["CHANNEL_ID"]].c_str())-1] = atoi(tableMat[r][colM["CHAN_UB"]].c_str() ) ;
326  }
327 
328  readDBTBMLevels(tableMat, size[0]+1, size[1]) ;
329  readDBROCLevels(tableMat, size[1]+1, size[2]) ;
330  Ccntrl_original=Ccntrl;
331  modeRegister_original=modeRegister;
332 
333 
334  Ncntrl_original=Ncntrl;
335  NCcntrl_original=NCcntrl;
336  SCcntrl_original=SCcntrl;
337  Scntrl_original=Scntrl;
338 
339  Nbaseln_original=Nbaseln;
340  NCbaseln_original=NCbaseln;
341  SCbaseln_original=SCbaseln;
342  Sbaseln_original=Sbaseln;
343 
344  // Modified by MR on 17-11-2008
345  // This new variable has to be read from DB!!!!!
346  // We need to add a column in the DB. Talk to Umesh.
347  FineDes1Del = 14 ;
348 }
349 
350 void PixelFEDCard::readDBTBMLevels(std::vector<std::vector<std::string> > &tableMat, int firstRow, int lastRow)
351 {
352  string mthn = "[PixelFEDCard::readDBTBMLevels()] ";
353  vector<string> ins = tableMat[firstRow];
354  map<string , int > colM;
355  vector<string> colNames;
356 
385  colNames.push_back("CONFIG_KEY" );
386  colNames.push_back("KEY_TYPE" );
387  colNames.push_back("KEY_ALIAS" );
388  colNames.push_back("VERSION" );
389  colNames.push_back("KIND_OF_COND" );
390  colNames.push_back("TBM_NAME" );
391  colNames.push_back("PIXEL_FED" );
392  colNames.push_back("FED_CHAN" );
393  colNames.push_back("TBMA_HEAD_L0" );
394  colNames.push_back("TBMA_HEAD_L1" );
395  colNames.push_back("TBMA_HEAD_L2" );
396  colNames.push_back("TBMA_HEAD_L3" );
397  colNames.push_back("TBMA_HEAD_L4" );
398  colNames.push_back("TBMA_TRAIL_L0");
399  colNames.push_back("TBMA_TRAIL_L1");
400  colNames.push_back("TBMA_TRAIL_L2");
401  colNames.push_back("TBMA_TRAIL_L3");
402  colNames.push_back("TBMA_TRAIL_L4");
403  colNames.push_back("TBMA_HEAD_B" );
404  colNames.push_back("TBMA_HEAD_UB" );
405  colNames.push_back("TBMA_TRAIL_B" );
406  colNames.push_back("TBMA_TRAIL_UB");
407 /*
408  colNames.push_back("CONFIG_KEY_ID" );
409  colNames.push_back("CONFIG_KEY" );
410  colNames.push_back("VERSION" );
411  colNames.push_back("CONDITION_DATA_SET_ID" );
412  colNames.push_back("KIND_OF_CONDITION_ID" );
413  colNames.push_back("KIND_OF_COND" );
414  colNames.push_back("PXLFED_NAME" );
415  colNames.push_back("FED_CHAN" );
416  colNames.push_back("TBM_PART_ID" );
417  colNames.push_back("TBM_SER_NUM" );
418  colNames.push_back("PANEL_NAME" );
419  colNames.push_back("HUB_ADDRS" );
420  colNames.push_back("TBMA_HEAD_L0" );
421  colNames.push_back("TBMA_HEAD_L1" );
422  colNames.push_back("TBMA_HEAD_L2" );
423  colNames.push_back("TBMA_HEAD_L3" );
424  colNames.push_back("TBMA_HEAD_L4" );
425  colNames.push_back("TBMA_TRAIL_L0" );
426  colNames.push_back("TBMA_TRAIL_L1" );
427  colNames.push_back("TBMA_TRAIL_L2" );
428  colNames.push_back("TBMA_TRAIL_L3" );
429  colNames.push_back("TBMA_TRAIL_L4" );
430 */
431  // Retrieve header row and cross check that everyfield is there.
432  for(unsigned int c = 0 ; c < ins.size() ; c++)
433  {
434  for(unsigned int n=0; n<colNames.size(); n++)
435  {
436  if(tableMat[firstRow][c] == colNames[n]){
437  colM[colNames[n]] = c;
438  break;
439  }
440  }
441  }//end for
442  for(unsigned int n=0; n<colNames.size(); n++)
443  {
444  if(colM.find(colNames[n]) == colM.end())
445  {
446  std::cerr << mthn << "\tCouldn't find in the database the column with name " << colNames[n] << std::endl;
447  assert(0);
448  }
449  }
450  for(int r = firstRow + 1 ; r < lastRow ; r++) //Goes to every row of the Matrix (MUST BE 36, one for each FED channel)
451  {
452  //Signal levels for the TBM, one per channel
453  TBM_L0[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1] = atoi(tableMat[r][colM["TBMA_HEAD_L0"]].c_str() ) ;
454  TBM_L1[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1] = atoi(tableMat[r][colM["TBMA_HEAD_L1"]].c_str() ) ;
455  TBM_L2[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1] = atoi(tableMat[r][colM["TBMA_HEAD_L2"]].c_str() ) ;
456  TBM_L3[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1] = atoi(tableMat[r][colM["TBMA_HEAD_L3"]].c_str() ) ;
457  TBM_L4[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1] = atoi(tableMat[r][colM["TBMA_HEAD_L4"]].c_str() ) ;
458  TRL_L0[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1] = atoi(tableMat[r][colM["TBMA_TRAIL_L0"]].c_str() ) ;
459  TRL_L1[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1] = atoi(tableMat[r][colM["TBMA_TRAIL_L1"]].c_str() ) ;
460  TRL_L2[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1] = atoi(tableMat[r][colM["TBMA_TRAIL_L2"]].c_str() ) ;
461  TRL_L3[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1] = atoi(tableMat[r][colM["TBMA_TRAIL_L3"]].c_str() ) ;
462  TRL_L4[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1] = atoi(tableMat[r][colM["TBMA_TRAIL_L4"]].c_str() ) ;
463  }
464 }
465 
466 void PixelFEDCard::readDBROCLevels(std::vector<std::vector<std::string> > &tableMat, int firstRow, int lastRow)
467 {
468  string mthn = "[PixelFEDCard::readDBROCLevels()] ";
469  map<string , int > colM;
470  vector<string> colNames;
471 
494  colNames.push_back("CONFIG_KEY" );
495  colNames.push_back("KEY_TYPE" );
496  colNames.push_back("KEY_ALIAS" );
497  colNames.push_back("VERSION" );
498  colNames.push_back("KIND_OF_COND");
499  colNames.push_back("ROC_NAME" );
500  colNames.push_back("FED_ROC_NUM" );
501  colNames.push_back("PIXEL_FED" );
502  colNames.push_back("FED_CHAN" );
503  colNames.push_back("ROC_L0" );
504  colNames.push_back("ROC_L1" );
505  colNames.push_back("ROC_L2" );
506  colNames.push_back("ROC_L3" );
507  colNames.push_back("ROC_L4" );
508  colNames.push_back("ROC_B" );
509  colNames.push_back("ROC_UB" );
510 /*
511  colNames.push_back("CONFIG_KEY_ID" );
512  colNames.push_back("CONFIG_KEY" );
513  colNames.push_back("VERSION" );
514  colNames.push_back("KIND_OF_COND" );
515  colNames.push_back("PXLFED_NAME" );
516  colNames.push_back("FED_CHAN" );
517  colNames.push_back("AOH_CHAN" );
518  colNames.push_back("ROC_NAME" );
519  colNames.push_back("HUB_ADDRS" );
520  colNames.push_back("PORT_NUMBER" );
521  colNames.push_back("ROC_I2C_ADDR" );
522  colNames.push_back("GEOM_ROC_NUM" );
523  colNames.push_back("FED_ROC_NUM" );
524  colNames.push_back("ROC_L0" );
525  colNames.push_back("ROC_L1" );
526  colNames.push_back("ROC_L2" );
527  colNames.push_back("ROC_L3" );
528  colNames.push_back("ROC_L4" );
529 */
530  // Retrieve header row and cross check that everyfield is there.
531  for(unsigned int c = 0 ; c < tableMat[firstRow].size() ; c++)
532  {
533  for(unsigned int n=0; n<colNames.size(); n++)
534  {
535  if(tableMat[firstRow][c] == colNames[n]){
536  colM[colNames[n]] = c;
537  break;
538  }
539  }
540  }//end for
541  for(unsigned int n=0; n<colNames.size(); n++)
542  {
543  if(colM.find(colNames[n]) == colM.end())
544  {
545  std::cerr << mthn << "\tCouldn't find in the database the column with name " << colNames[n] << std::endl;
546  assert(0);
547  }
548  }
549  // Address levels 1 per channel (36) per roc(max=26)
550 // int ROC_L0[36][26],ROC_L1[36][26],ROC_L2[36][26],ROC_L3[36][26],ROC_L4[36][26];
551 
552  for(int r = firstRow + 1 ; r < lastRow ; r++) //Goes to every row of the Matrix (MUST BE 36, one for each FED channel)
553  {
554  ROC_L0[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1][atoi(tableMat[r][colM["FED_ROC_NUM"]].c_str())] = atoi(tableMat[r][colM["ROC_L0"]].c_str()) ;
555  ROC_L1[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1][atoi(tableMat[r][colM["FED_ROC_NUM"]].c_str())] = atoi(tableMat[r][colM["ROC_L1"]].c_str()) ;
556  ROC_L2[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1][atoi(tableMat[r][colM["FED_ROC_NUM"]].c_str())] = atoi(tableMat[r][colM["ROC_L2"]].c_str()) ;
557  ROC_L3[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1][atoi(tableMat[r][colM["FED_ROC_NUM"]].c_str())] = atoi(tableMat[r][colM["ROC_L3"]].c_str()) ;
558  ROC_L4[atoi(tableMat[r][colM["FED_CHAN"]].c_str())-1][atoi(tableMat[r][colM["FED_ROC_NUM"]].c_str())] = atoi(tableMat[r][colM["ROC_L4"]].c_str()) ;
559  }
560 
561 }
562 
563 
564 // Read the configuration parameters from file
565 PixelFEDCard::PixelFEDCard(string fileName):
566  PixelConfigBase(" "," "," ")
567 {
568 
569  std::string mthn = "]\t[PixelFEDCard::PixelFEDCard()]\t\t\t\t " ;
570  //const bool localDEBUG = true;
571  const bool localDEBUG = false;
572 
573  // Added by Dario (March 26th, 2008): insure variables are all cleared before read-in
574  clear() ;
575 
576  // cout << __LINE__ << "]\t" << mthn <<" Get setup parameters from file "<<fileName<<endl;
577  FILE *infile = fopen((fileName.c_str()),"r");
578  if (infile == NULL) throw std::runtime_error("Failed to open FED Card parameter file: "+fileName);
579 
580  //Fed Base Address
581  fscanf(infile,"FED Base address :%lx\n",
582  &FEDBASE_0);
583  fscanf(infile,"FEDID Number :%lx\n",
584  &fedNumber);
585 
586 // if(localDEBUG) cout << __LINE__ << mthn << "FED Base address, FED # : " << std::hex << FEDBASE_0 << std::dec << std::endl ;
587 // if(localDEBUG) printf("FED Base address, FED # :%lx\n",FEDBASE_0);
588  //if(FEDBASE != FEDBASE_0) cout<< __LINE__ << "]\t" << mthn << " Inconsistent FED base address?"<<endl;
589 // if(localDEBUG) cout << __LINE__ << mthn << "FEDID # : " << std::hex << fedNumber << std::dec << std::endl ;
590 // if(localDEBUG) printf("FEDID # :%lx\n",fedNumber);
591 
592  // Number of ROCs
593  int ijx=0;
594  for(int i=0;i<36;i++){
595  ijx=i+1;
596  fscanf(infile,"Number of ROCs Chnl %d:%d \n",&ijx,&NRocs[i]);
597  if(localDEBUG)printf("Number of ROCs per Chnl %d:%d \n",ijx,NRocs[i]);
598  }
599 
600  //Settable optical input parameters
601  fscanf(infile,"Optical reciever 1 Capacitor Adjust(0-3):%d\n",&opt_cap[0]);
602  fscanf(infile,"Optical reciever 2 Capacitor Adjust(0-3):%d\n",&opt_cap[1]);
603  fscanf(infile,"Optical reciever 3 Capacitor Adjust(0-3):%d\n",&opt_cap[2]);
604  fscanf(infile,"Optical reciever 1 Input Offset (0-15) :%d\n",&opt_inadj[0]);
605  fscanf(infile,"Optical reciever 2 Input Offset (0-15) :%d\n",&opt_inadj[1]);
606  fscanf(infile,"Optical reciever 3 Input Offset (0-15) :%d\n",&opt_inadj[2]);
607  fscanf(infile,"Optical reciever 1 Output Offset (0-3) :%d\n",&opt_ouadj[0]);
608  fscanf(infile,"Optical reciever 2 Output Offset (0-3) :%d\n",&opt_ouadj[1]);
609  fscanf(infile,"Optical reciever 3 Output Offset (0-3) :%d\n",&opt_ouadj[2]);
610 
611  if(localDEBUG) {
612  printf("Optical reciever 1 Capacitor Adjust(0-3):%d\n",opt_cap[0]);
613  printf("Optical reciever 2 Capacitor Adjust(0-3):%d\n",opt_cap[1]);
614  printf("Optical reciever 3 Capacitor Adjust(0-3):%d\n",opt_cap[2]);
615  printf("Optical reciever 1 Input Offset (0-15) :%d\n",opt_inadj[0]);
616  printf("Optical reciever 2 Input Offset (0-15) :%d\n",opt_inadj[1]);
617  printf("Optical reciever 3 Input Offset (0-15) :%d\n",opt_inadj[2]);
618  printf("Optical reciever 1 Output Offset (0-3) :%d\n",opt_ouadj[0]);
619  printf("Optical reciever 2 Output Offset (0-3) :%d\n",opt_ouadj[1]);
620  printf("Optical reciever 3 Output Offset (0-3) :%d\n",opt_ouadj[2]);
621  }
622 
623  //input offset dac
624  for(int i=0;i<36;i++) {
625  fscanf(infile,"Offset DAC channel %d:%d\n",&ijx,&offs_dac[i]);
626  if(localDEBUG) printf("Offset DAC channel %d:%d\n",i+1,offs_dac[i]);
627  }
628 
629  //clock phases
630  fscanf(infile,"Clock Phase Bits ch 1-9:%x\n",& clkphs1_9 );
631  fscanf(infile,"Clock Phase Bits ch 10-18:%x\n",&clkphs10_18);
632  fscanf(infile,"Clock Phase Bits ch 19-27:%x\n",&clkphs19_27);
633  fscanf(infile,"Clock Phase Bits ch 28-36:%x\n",&clkphs28_36);
634  if(localDEBUG)printf("Clock Phase Bits ch 1-9:%x\n",clkphs1_9 );
635  if(localDEBUG)printf("Clock Phase Bits ch 10-18:%x\n",clkphs10_18 );
636  if(localDEBUG)printf("Clock Phase Bits ch 19-27:%x\n",clkphs19_27 );
637  if(localDEBUG)printf("Clock Phase Bits ch 28-36:%x\n",clkphs28_36 );
638 
639  //Blacks
640  for(int i=0;i<36;i++){
641  fscanf(infile,"Black HiThold ch %d:%d \n",&ijx,&BlackHi[i]);
642  fscanf(infile,"Black LoThold ch %d:%d \n",&ijx,&BlackLo[i]);
643  fscanf(infile,"ULblack Thold ch %d:%d \n",&ijx, &Ublack[i]);
644  if(localDEBUG)printf("Black HiThold ch %d:%d\n",ijx,BlackHi[i]);
645  if(localDEBUG)printf("Black LoThold ch %d:%d\n",ijx,BlackLo[i]);
646  if(localDEBUG)printf("ULblack Thold ch %d:%d\n",ijx, Ublack[i]);
647  }
648 
649  //Channel delays
650  for(int i=0;i<36;i++) {
651  fscanf(infile,"Delay channel %d(0-15):%d\n",&ijx,&DelayCh[i]);
652  if(localDEBUG)
653  printf("Delay channel %d(0-15):%d\n",i+1,DelayCh[i]);
654  }
655 
656  //Signal levels
657  for(int i=0;i<36;i++) {
658  fscanf(infile,"TBM level 0 Channel %d:%d\n",&ijx,&TBM_L0[i]);
659  fscanf(infile,"TBM level 1 Channel %d:%d\n",&ijx,&TBM_L1[i]);
660  fscanf(infile,"TBM level 2 Channel %d:%d\n",&ijx,&TBM_L2[i]);
661  fscanf(infile,"TBM level 3 Channel %d:%d\n",&ijx,&TBM_L3[i]);
662  fscanf(infile,"TBM level 4 Channel %d:%d\n",&ijx,&TBM_L4[i]);
663  if(localDEBUG)printf("TBM level 0 Channel %d:%d\n",ijx,TBM_L0[i]);
664  if(localDEBUG)printf("TBM level 1 Channel %d:%d\n",ijx,TBM_L1[i]);
665  if(localDEBUG)printf("TBM level 2 Channel %d:%d\n",ijx,TBM_L2[i]);
666  if(localDEBUG)printf("TBM level 3 Channel %d:%d\n",ijx,TBM_L3[i]);
667  if(localDEBUG)printf("TBM level 4 Channel %d:%d\n",ijx,TBM_L4[i]);
668 
669  int ijy=0;
670  for(int j=0;j<NRocs[i];j++) {
671  fscanf(infile,"ROC%d level 0 Channel %d :%d\n",
672  &ijy,&ijx,&ROC_L0[i][j]);
673  fscanf(infile,"ROC%d level 1 Channel %d :%d\n",
674  &ijy,&ijx,&ROC_L1[i][j]);
675  fscanf(infile,"ROC%d level 2 Channel %d :%d\n",
676  &ijy,&ijx,&ROC_L2[i][j]);
677  fscanf(infile,"ROC%d level 3 Channel %d :%d\n",
678  &ijy,&ijx,&ROC_L3[i][j]);
679  fscanf(infile,"ROC%d level 4 Channel %d :%d\n",
680  &ijy,&ijx,&ROC_L4[i][j]);
681  if(localDEBUG)
682  printf("ROC%d level 0 Channel %d :%d\n",ijy,ijx,ROC_L0[i][j]);
683  if(localDEBUG)
684  printf("ROC%d level 1 Channel %d :%d\n",ijy,ijx,ROC_L1[i][j]);
685  if(localDEBUG)
686  printf("ROC%d level 2 Channel %d :%d\n",ijy,ijx,ROC_L2[i][j]);
687  if(localDEBUG)
688  printf("ROC%d level 3 Channel %d :%d\n",ijy,ijx,ROC_L3[i][j]);
689  if(localDEBUG)
690  printf("ROC%d level 4 Channel %d :%d\n",ijy,ijx,ROC_L4[i][j]);
691  }
692 
693  fscanf(infile,"TRLR level 0 Channel %d:%d\n",&ijx,&TRL_L0[i]);
694  fscanf(infile,"TRLR level 1 Channel %d:%d\n",&ijx,&TRL_L1[i]);
695  fscanf(infile,"TRLR level 2 Channel %d:%d\n",&ijx,&TRL_L2[i]);
696  fscanf(infile,"TRLR level 3 Channel %d:%d\n",&ijx,&TRL_L3[i]);
697  fscanf(infile,"TRLR level 4 Channel %d:%d\n",&ijx,&TRL_L4[i]);
698  if(localDEBUG)printf("TRLR level 0 Channel %d:%d\n",ijx,TRL_L0[i]);
699  if(localDEBUG)printf("TRLR level 1 Channel %d:%d\n",ijx,TRL_L1[i]);
700  if(localDEBUG)printf("TRLR level 2 Channel %d:%d\n",ijx,TRL_L2[i]);
701  if(localDEBUG)printf("TRLR level 3 Channel %d:%d\n",ijx,TRL_L3[i]);
702  if(localDEBUG)printf("TRLR level 4 Channel %d:%d\n",ijx,TRL_L4[i]);
703  }
704 
705 
706  //These bits turn off(1) and on(0) channels
707  fscanf(infile,"Channel Enbable bits chnls 1-9 (on = 0):%x\n",
708  &Ncntrl);
709  fscanf(infile,"Channel Enbable bits chnls 10-18(on = 0):%x\n",
710  &NCcntrl);
711  fscanf(infile,"Channel Enbable bits chnls 19-27(on = 0):%x\n",
712  &SCcntrl);
713  fscanf(infile,"Channel Enbable bits chnls 28-36(on = 0):%x\n",
714  &Scntrl);
715  if(localDEBUG)
716  printf("Channel Enbable bits chnls 1-9 (on = 0):%x\n",Ncntrl);
717  if(localDEBUG)
718  printf("Channel Enbable bits chnls 10-18(on = 0):%x\n",NCcntrl);
719  if(localDEBUG)
720  printf("Channel Enbable bits chnls 19-27(on = 0):%x\n",SCcntrl);
721  if(localDEBUG)
722  printf("Channel Enbable bits chnls 28-36(on = 0):%x\n",Scntrl);
723 
724  //These are delays to the TTCrx
725  fscanf(infile,"TTCrx Coarse Delay Register 2:%d\n",&CoarseDel);
726  fscanf(infile,"TTCrc ClkDes2 Register 3:%x\n",&ClkDes2);
727  fscanf(infile,"TTCrc Fine Dlay ClkDes2 Reg 1:%d\n",&FineDes2Del);
728  if(localDEBUG)printf("TTCrx Coarse Delay Register 2:%d\n",CoarseDel);
729  if(localDEBUG)printf("TTCrc ClkDes2 Register 3:%x\n",ClkDes2);
730  if(localDEBUG)printf("TTCrc Fine Dlay ClkDes2 Reg 1:%d\n",FineDes2Del);
731 
732  // Control register
733  fscanf(infile,"Center Chip Control Reg:%x\n",&Ccntrl);
734  if(localDEBUG)printf("Control Reg:0x%x\n",Ccntrl);
735  fscanf(infile,"Initial Slink DAQ mode:%d\n",&modeRegister);
736  if(localDEBUG)printf("Mode Reg:%d\n",modeRegister);
737 
738  //These bits set ADC Gain/Range 1Vpp(0) and 2Vpp(1) for channels
739  fscanf(infile,"Channel ADC Gain bits chnls 1-12(1Vpp = 0):%x\n",
740  &Nadcg);
741  fscanf(infile,"Channel ADC Gain bits chnls 13-20(1Vpp = 0):%x\n",
742  &NCadcg);
743  fscanf(infile,"Channel ADC Gain bits chnls 21-28(1Vpp = 0):%x\n",
744  &SCadcg);
745  fscanf(infile,"Channel ADC Gain bits chnls 29-36(1Vpp = 0):%x\n",
746  &Sadcg);
747  if(localDEBUG)
748  printf("Channel ADC Gain bits chnls 1-12(1Vpp = 0):%x\n",Nadcg);
749  if(localDEBUG)
750  printf("Channel ADC Gain bits chnls 13-20(1Vpp = 0):%x\n",NCadcg);
751  if(localDEBUG)
752  printf("Channel ADC Gain bits chnls 21-28(1Vpp = 0):%x\n",SCadcg);
753  if(localDEBUG)
754  printf("Channel ADC Gain bits chnls 29-36(1Vpp = 0):%x\n",Sadcg);
755 
756  //These bits set Baseline adjustment value (common by FPGA)//can turn on by channel
757  fscanf(infile,"Channel Baseline Enbable chnls 1-9 (on = (0x1ff<<16)+):%x\n",
758  &Nbaseln);
759  fscanf(infile,"Channel Baseline Enbable chnls 10-18(on = (0x1ff<<16)+):%x\n",
760  &NCbaseln);
761  fscanf(infile,"Channel Baseline Enbable chnls 19-27(on = (0x1ff<<16)+):%x\n",
762  &SCbaseln);
763  fscanf(infile,"Channel Baseline Enbable chnls 28-36(on = (0x1ff<<16)+):%x\n",
764  &Sbaseln);
765  if(localDEBUG)
766  printf("Channel Baseline Enbable chnls 1-9 (on = (0x1ff<<16)+):%x\n",Nbaseln);
767  if(localDEBUG)
768  printf("Channel Baseline Enbable chnls 10-18(on = (0x1ff<<16)+):%x\n",NCbaseln);
769  if(localDEBUG)
770  printf("Channel Baseline Enbable chnls 19-27(on = (0x1ff<<16)+):%x\n",SCbaseln);
771  if(localDEBUG)
772  printf("Channel Baseline Enbable chnls 28-36(on = (0x1ff<<16)+):%x\n",Sbaseln);
773 
774  //These bits set TBM trailer mask (common by FPGA)
775  fscanf(infile,"TBM trailer mask chnls 1-9 (0xff = all masked):%x\n",
776  &N_TBMmask);
777  fscanf(infile,"TBM trailer mask chnls 10-18(0xff = all masked):%x\n",
778  &NC_TBMmask);
779  fscanf(infile,"TBM trailer mask chnls 19-27(0xff = all masked):%x\n",
780  &SC_TBMmask);
781  fscanf(infile,"TBM trailer mask chnls 28-36(0xff = all masked):%x\n",
782  &S_TBMmask);
783  if(localDEBUG)
784  printf("TBM trailer mask chnls 1-9 (0xff = all masked):%x\n",N_TBMmask);
785  if(localDEBUG)
786  printf("TBM trailer mask chnls 10-18(0xff = all masked):%x\n",NC_TBMmask);
787  if(localDEBUG)
788  printf("TBM trailer mask chnls 19-27(0xff = all masked):%x\n",SC_TBMmask);
789  if(localDEBUG)
790  printf("TBM trailer mask chnls 28-36(0xff = all masked):%x\n",S_TBMmask);
791 
792  //These bits set the Private fill/gap word value (common by FPGA)
793  fscanf(infile,"Private 8 bit word chnls 1-9 :%x\n",
794  &N_Pword);
795  fscanf(infile,"Private 8 bit word chnls 10-18:%x\n",
796  &NC_Pword);
797  fscanf(infile,"Private 8 bit word chnls 19-27:%x\n",
798  &SC_Pword);
799  fscanf(infile,"Private 8 bit word chnls 28-36:%x\n",
800  &S_Pword);
801  if(localDEBUG)
802  printf("Private 8 bit word chnls 1-9 :%x\n",N_Pword);
803  if(localDEBUG)
804  printf("Private 8 bit word chnls 10-18:%x\n",NC_Pword);
805  if(localDEBUG)
806  printf("Private 8 bit word chnls 19-27:%x\n",SC_Pword);
807  if(localDEBUG)
808  printf("Private 8 bit word chnls 28-36:%x\n",S_Pword);
809 
810  //These bit sets the special dac mode for random triggers
811  fscanf(infile,"Special Random testDAC mode (on = 0x1, off=0x0):%x\n",
812  &SpecialDac);
813  if(localDEBUG)
814  printf("Special Random testDAC mode (on = 0x1, off=0x0):%x\n",SpecialDac);
815 
816 
817  //These bits set the number of Out of consecutive out of sync events until a TTs OOs
818  fscanf(infile,"Number of Consecutive (max 1023) Out of Syncs till TTs OOS set:%d\n",
819  &Ooslvl);
820  if(localDEBUG)
821  printf("Number of Consecutive (max 1023) Out of Syncs till TTs OOS set:%d\n",Ooslvl);
822 
823  //These bits set the number of Empty events until a TTs Error
824  fscanf(infile,"Number of Consecutive (max 1023) Empty events till TTs ERR set:%d\n",
825  &Errlvl);
826  if(localDEBUG)
827  printf("Number of Consecutive (max 1023) Empty events till TTs ERR set:%d\n",Errlvl);
828 
829  //These bits set the Almost Full level in fifo-1, Almost full = TTs BUSY in fifo-1 N
830  fscanf(infile,"N Fifo-1 almost full level,sets TTs BUSY (max 1023):%d\n",
831  &Nfifo1Bzlvl);
832  if(localDEBUG)
833  printf("N Fifo-1 almost full level,sets TTs BUSY (max 1023):%d\n",Nfifo1Bzlvl);
834 
835  //These bits set the Almost Full level in fifo-1, Almost full = TTs BUSY in fifo-1 NC
836  fscanf(infile,"NC Fifo-1 almost full level,sets TTs BUSY (max 1023):%d\n",
837  &NCfifo1Bzlvl);
838  if(localDEBUG)
839  printf("NC Fifo-1 almost full level,sets TTs BUSY (max 1023):%d\n",NCfifo1Bzlvl);
840 
841  //These bits set the Almost Full level in fifo-1, Almost full = TTs BUSY in fifo-1 SC
842  fscanf(infile,"SC Fifo-1 almost full level,sets TTs BUSY (max 1023):%d\n",
843  &SCfifo1Bzlvl);
844  if(localDEBUG)
845  printf("SC Fifo-1 almost full level,sets TTs BUSY (max 1023):%d\n",SCfifo1Bzlvl);
846 
847  //These bits set the Almost Full level in fifo-1, Almost full = TTs BUSY in fifo-1 S
848  fscanf(infile,"S Fifo-1 almost full level,sets TTs BUSY (max 1023):%d\n",
849  &Sfifo1Bzlvl);
850  if(localDEBUG)
851  printf("S Fifo-1 almost full level,sets TTs BUSY (max 1023):%d\n",Sfifo1Bzlvl);
852 
853  //These bits set the Almost Full level in fifo-3, Almost full = TTs WARN in fifo-3
854  fscanf(infile,"Fifo-3 almost full level,sets TTs WARN (max 8191):%d\n",
855  &fifo3Wrnlvl);
856  if(localDEBUG)
857  printf("Fifo-3 almost full level,sets TTs WARN (max 8191):%d\n",fifo3Wrnlvl);
858 
859  fscanf(infile,"FED Master delay 0=0,1=32,2=48,3=64:%d\n",
860  &FedTTCDelay);
861  if(localDEBUG)
862  printf("FED Master delay 0=0,1=32,2=48,3=64:%d\n",FedTTCDelay);
863 
864  fscanf(infile,"TTCrx Register 0 fine delay ClkDes1:%d\n",&FineDes1Del);
865  if(localDEBUG)
866  printf("TTCrx Register 0 fine delay ClkDes1:%d\n",FineDes1Del);
867 
868  int checkword=0;
869  fscanf(infile,"Params FED file check word:%d\n",
870  &checkword);
871  if(checkword!=90508&&checkword!=91509) cout << __LINE__ << "]\t" << mthn
872  << "FEDID: " << fedNumber
873  << " Params FED File read error. Checkword read " << checkword
874  <<" check word expected 090508 or 91509" << endl;
875  assert((checkword==90508)|(checkword==91509));
876 
877  if(localDEBUG)
878  cout << __LINE__ << "]\t" << mthn << "Params FED file check word: " << checkword << endl;
879 
880  //These bits set the hit limit in fifo-1 for an event
881 
882  if(checkword==91509){
883  //These bits set the hit limit in fifo-1 for an event
884  fscanf(infile,"N fifo-1 hit limit (max 1023 (hard) 900 (soft):%d\n",&N_hitlimit);
885  if(localDEBUG)
886  printf("N fifo-1 hit limit (max 1023 (hard) 900 (soft):%d\n",N_hitlimit);
887  fscanf(infile,"NC fifo-1 hit limit (max 1023 (hard) 900 (soft):%d\n",&NC_hitlimit);
888  if(localDEBUG)
889  printf("NC fifo-1 hit limit (max 1023 (hard) 900 (soft):%d\n",NC_hitlimit);
890  fscanf(infile,"SC fifo-1 hit limit (max 1023 (hard) 900 (soft):%d\n",&SC_hitlimit);
891  if(localDEBUG)
892  printf("SC fifo-1 hit limit (max 1023 (hard) 900 (soft):%d\n",SC_hitlimit);
893  fscanf(infile,"S fifo-1 hit limit (max 1023 (hard) 900 (soft):%d\n",&S_hitlimit);
894  if(localDEBUG)
895  printf("S fifo-1 hit limit (max 1023 (hard) 900 (soft):%d\n",S_hitlimit);
896  //These bits allow a ROC to be skipped (1/fpga)
897 
898  fscanf(infile,"Skip a ROC in ch 1-9, bits 10-5 chnl, bits 0-4 ROC-1:%d\n",&N_testreg);
899  if(localDEBUG)
900  printf("Skip a ROC in ch 1-9, bits 10-5 chnl, bits 0-4 ROC-1:%d\n",N_testreg);
901  fscanf(infile,"Skip a ROC in ch 10-18, bits 10-5 chnl, bits 0-4 ROC-1:%d\n",&NC_testreg);
902  if(localDEBUG)
903  printf("Skip a ROC in ch 10-18, bits 10-5 chnl, bits 0-4 ROC-1:%d\n",NC_testreg);
904  fscanf(infile,"Skip a ROC in ch 19-27, bits 10-5 chnl, bits 0-4 ROC-1:%d\n",&SC_testreg);
905  if(localDEBUG)
906  printf("Skip a ROC in ch 19-27, bits 10-5 chnl, bits 0-4 ROC-1:%d\n",SC_testreg);
907  fscanf(infile,"Skip a ROC in ch 28-36, bits 10-5 chnl, bits 0-4 ROC-1:%d\n",&S_testreg);
908  if(localDEBUG)
909  printf("Skip a ROC in ch 28-36, bits 10-5 chnl, bits 0-4 ROC-1:%d\n",S_testreg);
910  } else {
911 
912  N_hitlimit=192;
913  NC_hitlimit=192;
914  SC_hitlimit=192;
915  S_hitlimit=192;
916 
917  N_testreg=0;
918  NC_testreg=0;
919  SC_testreg=0;
920  S_testreg=0;
921  }
922 
923  fclose(infile);
924 
925  Ccntrl_original=Ccntrl;
926  modeRegister_original=modeRegister;
927 
928 
929  Ncntrl_original=Ncntrl;
930  NCcntrl_original=NCcntrl;
931  SCcntrl_original=SCcntrl;
932  Scntrl_original=Scntrl;
933 
934  Nbaseln_original=Nbaseln;
935  NCbaseln_original=NCbaseln;
936  SCbaseln_original=SCbaseln;
937  Sbaseln_original=Sbaseln;
938 
939  return;
940 }
941 
942 //==================================================================================
943 // Added by Dario (March 26th 2008)
944 void PixelFEDCard::clear(void)
945 {
946  FEDBASE_0 = 0 ;
947  fedNumber = 999 ;
948  for(int i=0;i<36;i++){
949  NRocs[i] = 0;
950  offs_dac[i] = 0;
951  BlackHi[i] = 0;
952  BlackLo[i] = 0;
953  Ublack[i] = 0;
954  DelayCh[i] = 0;
955  TBM_L0[i] = 0;
956  TBM_L1[i] = 0;
957  TBM_L2[i] = 0;
958  TBM_L3[i] = 0;
959  TBM_L4[i] = 0;
960  TRL_L0[i] = 0;
961  TRL_L1[i] = 0;
962  TRL_L2[i] = 0;
963  TRL_L3[i] = 0;
964  TRL_L4[i] = 0;
965  }
966  for(int i=0;i<3;i++){
967  opt_cap[i] = 0;
968  opt_inadj[i] = 0;
969  opt_ouadj[i] = 0;
970  }
971  clkphs1_9 = 0;
972  clkphs10_18 = 0;
973  clkphs19_27 = 0;
974  clkphs28_36 = 0;
975 
976  for(int i=0;i<36;i++) {
977  for(int j=0;j<26;j++) {
978  ROC_L0[i][j] = 0;
979  ROC_L1[i][j] = 0;
980  ROC_L2[i][j] = 0;
981  ROC_L3[i][j] = 0;
982  ROC_L4[i][j] = 0;
983  }
984  }
985  Ncntrl = 0;
986  NCcntrl = 0;
987  SCcntrl = 0;
988  Scntrl = 0;
989  CoarseDel = 0;
990  ClkDes2 = 0;
991  FineDes2Del = 0;
992  FineDes1Del = 0;
993  Ccntrl = 0;
994  modeRegister = 0;
995  Nadcg = 0;
996  NCadcg = 0;
997  SCadcg = 0;
998  Sadcg = 0;
999  Nbaseln = 0;
1000  NCbaseln = 0;
1001  SCbaseln = 0;
1002  Sbaseln = 0;
1003  N_TBMmask = 0;
1004  NC_TBMmask = 0;
1005  SC_TBMmask = 0;
1006  S_TBMmask = 0;
1007  N_Pword = 0;
1008  NC_Pword = 0;
1009  SC_Pword = 0;
1010  S_Pword = 0;
1011  SpecialDac = 0;
1012  Ooslvl = 0;
1013  Errlvl = 0;
1014  Nfifo1Bzlvl = 0;
1015  NCfifo1Bzlvl = 0;
1016  SCfifo1Bzlvl = 0;
1017  Sfifo1Bzlvl = 0;
1018  fifo3Wrnlvl = 0;
1019 }
1020 //==================================================================================
1021 
1022 void PixelFEDCard::writeASCII(std::string dir) const{
1023 
1024  std::string mthn = "[PixelFEDCard::writeASCII()]\t\t\t\t " ;
1025 
1026  ostringstream s1;
1027  s1<<fedNumber;
1028  std::string fedNum=s1.str();
1029 
1030  if (dir!="") dir+="/";
1031 
1032  std::string filename=dir+"params_fed_"+fedNum+".dat";
1033 
1034  FILE *outfile = fopen((filename.c_str()),"w");
1035  if (outfile == NULL) {
1036  cout<< __LINE__ << "]\t" << mthn << "Could not open file: " << filename << " for writing" << endl;
1037  return;
1038  }
1039 
1040  //Fed Base Address
1041  fprintf(outfile,"FED Base address :0x%lx\n",
1042  FEDBASE_0);
1043  fprintf(outfile,"FEDID Number :0x%lx\n",
1044  fedNumber);
1045 
1046  // Number of ROCs
1047  int ijx=0;
1048  for(int i=0;i<36;i++){
1049  ijx=i+1;
1050  fprintf(outfile,"Number of ROCs Chnl %d:%d\n",ijx,NRocs[i]);
1051 }
1052 
1053  //Settable optical input parameters
1054  fprintf(outfile,"Optical reciever 1 Capacitor Adjust(0-3):%d\n",opt_cap[0]);
1055  fprintf(outfile,"Optical reciever 2 Capacitor Adjust(0-3):%d\n",opt_cap[1]);
1056  fprintf(outfile,"Optical reciever 3 Capacitor Adjust(0-3):%d\n",opt_cap[2]);
1057  fprintf(outfile,"Optical reciever 1 Input Offset (0-15) :%d\n",opt_inadj[0]);
1058  fprintf(outfile,"Optical reciever 2 Input Offset (0-15) :%d\n",opt_inadj[1]);
1059  fprintf(outfile,"Optical reciever 3 Input Offset (0-15) :%d\n",opt_inadj[2]);
1060  fprintf(outfile,"Optical reciever 1 Output Offset (0-3) :%d\n",opt_ouadj[0]);
1061  fprintf(outfile,"Optical reciever 2 Output Offset (0-3) :%d\n",opt_ouadj[1]);
1062  fprintf(outfile,"Optical reciever 3 Output Offset (0-3) :%d\n",opt_ouadj[2]);
1063 
1064  //input offset dac
1065  for(int i=0;i<36;i++) {
1066  fprintf(outfile,"Offset DAC channel %d:%d\n",i+1,offs_dac[i]);
1067  }
1068 
1069  //clock phases
1070  fprintf(outfile,"Clock Phase Bits ch 1-9:0x%x\n",clkphs1_9 );
1071  fprintf(outfile,"Clock Phase Bits ch 10-18:0x%x\n",clkphs10_18);
1072  fprintf(outfile,"Clock Phase Bits ch 19-27:0x%x\n",clkphs19_27);
1073  fprintf(outfile,"Clock Phase Bits ch 28-36:0x%x\n",clkphs28_36);
1074 
1075  //Blacks
1076  for(int i=0;i<36;i++){
1077  fprintf(outfile,"Black HiThold ch %d:%d \n",i+1,BlackHi[i]);
1078  fprintf(outfile,"Black LoThold ch %d:%d \n",i+1,BlackLo[i]);
1079  fprintf(outfile,"ULblack Thold ch %d:%d \n",i+1,Ublack[i]);
1080  }
1081 
1082  //Channel delays
1083  for(int i=0;i<36;i++) {
1084  fprintf(outfile,"Delay channel %d(0-15):%d\n",i+1,DelayCh[i]);
1085  }
1086 
1087  //Signal levels
1088  for(int i=0;i<36;i++) {
1089  fprintf(outfile,"TBM level 0 Channel %d:%d\n",i+1,TBM_L0[i]);
1090  fprintf(outfile,"TBM level 1 Channel %d:%d\n",i+1,TBM_L1[i]);
1091  fprintf(outfile,"TBM level 2 Channel %d:%d\n",i+1,TBM_L2[i]);
1092  fprintf(outfile,"TBM level 3 Channel %d:%d\n",i+1,TBM_L3[i]);
1093  fprintf(outfile,"TBM level 4 Channel %d:%d\n",i+1,TBM_L4[i]);
1094 
1095  for(int j=0;j<NRocs[i];j++) {
1096  fprintf(outfile,"ROC%d level 0 Channel %d :%d\n",
1097  j,i+1,ROC_L0[i][j]);
1098  fprintf(outfile,"ROC%d level 1 Channel %d :%d\n",
1099  j,i+1,ROC_L1[i][j]);
1100  fprintf(outfile,"ROC%d level 2 Channel %d :%d\n",
1101  j,i+1,ROC_L2[i][j]);
1102  fprintf(outfile,"ROC%d level 3 Channel %d :%d\n",
1103  j,i+1,ROC_L3[i][j]);
1104  fprintf(outfile,"ROC%d level 4 Channel %d :%d\n",
1105  j,i+1,ROC_L4[i][j]);
1106  }
1107 
1108  fprintf(outfile,"TRLR level 0 Channel %d:%d\n",i+1,TRL_L0[i]);
1109  fprintf(outfile,"TRLR level 1 Channel %d:%d\n",i+1,TRL_L1[i]);
1110  fprintf(outfile,"TRLR level 2 Channel %d:%d\n",i+1,TRL_L2[i]);
1111  fprintf(outfile,"TRLR level 3 Channel %d:%d\n",i+1,TRL_L3[i]);
1112  fprintf(outfile,"TRLR level 4 Channel %d:%d\n",i+1,TRL_L4[i]);
1113  }
1114 
1115 
1116  //These bits turn off(1) and on(0) channels
1117  fprintf(outfile,"Channel Enbable bits chnls 1-9 (on = 0):0x%x\n",
1118  Ncntrl);
1119  fprintf(outfile,"Channel Enbable bits chnls 10-18(on = 0):0x%x\n",
1120  NCcntrl);
1121  fprintf(outfile,"Channel Enbable bits chnls 19-27(on = 0):0x%x\n",
1122  SCcntrl);
1123  fprintf(outfile,"Channel Enbable bits chnls 28-36(on = 0):0x%x\n",
1124  Scntrl);
1125 
1126  //These are delays to the TTCrx
1127  fprintf(outfile,"TTCrx Coarse Delay Register 2:%d\n",CoarseDel);
1128  fprintf(outfile,"TTCrc ClkDes2 Register 3:0x%x\n",ClkDes2);
1129  fprintf(outfile,"TTCrc Fine Dlay ClkDes2 Reg 1:%d\n",FineDes2Del);
1130 
1131  // Control register
1132  fprintf(outfile,"Center Chip Control Reg:0x%x\n",Ccntrl);
1133  fprintf(outfile,"Initial Slink DAQ mode:%d\n",modeRegister);
1134 
1135  //These bits set ADC Gain/Range 1Vpp(0) and 2Vpp(1) for channels
1136  fprintf(outfile,"Channel ADC Gain bits chnls 1-12(1Vpp = 0):0x%x\n",
1137  Nadcg);
1138  fprintf(outfile,"Channel ADC Gain bits chnls 13-20(1Vpp = 0):0x%x\n",
1139  NCadcg);
1140  fprintf(outfile,"Channel ADC Gain bits chnls 21-28(1Vpp = 0):0x%x\n",
1141  SCadcg);
1142  fprintf(outfile,"Channel ADC Gain bits chnls 29-36(1Vpp = 0):0x%x\n",
1143  Sadcg);
1144 
1145  //These bits set Baseline adjustment value (common by FPGA)//can turn on by channel
1146  fprintf(outfile,"Channel Baseline Enbable chnls 1-9 (on = (0x1ff<<16)+):0x%x\n",
1147  Nbaseln);
1148  fprintf(outfile,"Channel Baseline Enbable chnls 10-18(on = (0x1ff<<16)+):0x%x\n",
1149  NCbaseln);
1150  fprintf(outfile,"Channel Baseline Enbable chnls 19-27(on = (0x1ff<<16)+):0x%x\n",
1151  SCbaseln);
1152  fprintf(outfile,"Channel Baseline Enbable chnls 28-36(on = (0x1ff<<16)+):0x%x\n",
1153  Sbaseln);
1154 
1155  //These bits set TBM trailer mask (common by FPGA)
1156  fprintf(outfile,"TBM trailer mask chnls 1-9 (0xff = all masked):0x%x\n",
1157  N_TBMmask);
1158  fprintf(outfile,"TBM trailer mask chnls 10-18(0xff = all masked):0x%x\n",
1159  NC_TBMmask);
1160  fprintf(outfile,"TBM trailer mask chnls 19-27(0xff = all masked):0x%x\n",
1161  SC_TBMmask);
1162  fprintf(outfile,"TBM trailer mask chnls 28-36(0xff = all masked):0x%x\n",
1163  S_TBMmask);
1164 
1165  //These bits set the Private fill/gap word value (common by FPGA)
1166  fprintf(outfile,"Private 8 bit word chnls 1-9 :0x%x\n",
1167  N_Pword);
1168  fprintf(outfile,"Private 8 bit word chnls 10-18:0x%x\n",
1169  NC_Pword);
1170  fprintf(outfile,"Private 8 bit word chnls 19-27:0x%x\n",
1171  SC_Pword);
1172  fprintf(outfile,"Private 8 bit word chnls 28-36:0x%x\n",
1173  S_Pword);
1174 
1175  //These bit sets the special dac mode for random triggers
1176  fprintf(outfile,"Special Random testDAC mode (on = 0x1, off=0x0):0x%x\n",
1177  SpecialDac);
1178 
1179  //These bits set the number of Out of consecutive out of sync events until a TTs OOs
1180  fprintf(outfile,"Number of Consecutive (max 1023) Out of Syncs till TTs OOS set:%d\n",
1181  Ooslvl);
1182 
1183  //These bits set the number of Empty events until a TTs Error
1184  fprintf(outfile,"Number of Consecutive (max 1023) Empty events till TTs ERR set:%d\n",
1185  Errlvl);
1186 
1187  //These bits set the Almost Full level in fifo-1, Almost full = TTs BUSY in fifo-1 N
1188  fprintf(outfile,"N Fifo-1 almost full level,sets TTs BUSY (max 1023):%d\n",
1189  Nfifo1Bzlvl);
1190 
1191  //These bits set the Almost Full level in fifo-1, Almost full = TTs BUSY in fifo-1 NC
1192  fprintf(outfile,"NC Fifo-1 almost full level,sets TTs BUSY (max 1023):%d\n",
1193  NCfifo1Bzlvl);
1194 
1195  //These bits set the Almost Full level in fifo-1, Almost full = TTs BUSY in fifo-1 SC
1196  fprintf(outfile,"SC Fifo-1 almost full level,sets TTs BUSY (max 1023):%d\n",
1197  SCfifo1Bzlvl);
1198 
1199  //These bits set the Almost Full level in fifo-1, Almost full = TTs BUSY in fifo-1 S
1200  fprintf(outfile,"S Fifo-1 almost full level,sets TTs BUSY (max 1023):%d\n",
1201  Sfifo1Bzlvl);
1202 
1203  //These bits set the Almost Full level in fifo-3, Almost full = TTs WARN in fifo-3
1204  fprintf(outfile,"Fifo-3 almost full level,sets TTs WARN (max 8191):%d\n",
1205  fifo3Wrnlvl);
1206 
1207  fprintf(outfile,"FED Master delay 0=0,1=32,2=48,3=64:%d\n",
1208  FedTTCDelay);
1209 
1210  fprintf(outfile,"TTCrx Register 0 fine delay ClkDes1:%d\n",
1211  FineDes1Del);
1212 
1213  int checkword=91509;
1214 
1215  fprintf(outfile,"Params FED file check word:%d\n",
1216  checkword);
1217 
1218 
1219  //These bits set the hit limit in fifo-1 for an event
1220  fprintf(outfile,"N fifo-1 hit limit (max 1023 (hard) 900 (soft):%d\n",
1221  N_hitlimit); //ch 1-9
1222 
1223  fprintf(outfile,"NC fifo-1 hit limit (max 1023 (hard) 900 (soft):%d\n",
1224  NC_hitlimit); //ch 10-18
1225 
1226  fprintf(outfile,"SC fifo-1 hit limit (max 1023 (hard) 900 (soft):%d\n",
1227  SC_hitlimit); //ch 19-27
1228 
1229  fprintf(outfile,"S fifo-1 hit limit (max 1023 (hard) 900 (soft):%d\n",
1230  S_hitlimit); //ch 28-36
1231 
1232 
1233  //These bits allow a ROC to be skipped (1/fpga)
1234  fprintf(outfile,"Skip a ROC in ch 1-9, bits 10-5 chnl, bits 0-4 ROC-1:%d\n",
1235  N_testreg);
1236 
1237  fprintf(outfile,"Skip a ROC in ch 10-18, bits 10-5 chnl, bits 0-4 ROC-1:%d\n",
1238  NC_testreg);
1239 
1240  fprintf(outfile,"Skip a ROC in ch 19-27, bits 10-5 chnl, bits 0-4 ROC-1:%d\n",
1241  SC_testreg);
1242 
1243  fprintf(outfile,"Skip a ROC in ch 28-36, bits 10-5 chnl, bits 0-4 ROC-1:%d\n",
1244  S_testreg);
1245 
1246 
1247 
1248  fclose(outfile);
1249 
1250 
1251 }
1252 
1253 
1254 //=============================================================================================
1255 void PixelFEDCard::writeXMLHeader(pos::PixelConfigKey key,
1256  int version,
1257  std::string path,
1258  std::ofstream *fedstream,
1259  std::ofstream *rocstream,
1260  std::ofstream *tbmstream) const
1261 {
1262  std::string mthn = "[PixelFEDCard::writeXMLHeader()]\t\t\t " ;
1263  std::stringstream fedfullPath ;
1264  std::stringstream rocfullPath ;
1265  std::stringstream tbmfullPath ;
1266 
1267  // modified by MR on 05-08-2008 16:50:28
1268  // FED MAIN XML FILE
1269  fedfullPath << path << "/FedConfiguration_Template_" << PixelTimeFormatter::getmSecTime() << ".xml" ;
1270  std::cout << __LINE__ << "]\t" << mthn << "Writing to: " << fedfullPath.str() << "" << std::endl ;
1271 
1272  fedstream->open(fedfullPath.str().c_str()) ;
1273 
1274  *fedstream << "<?xml version='1.0' encoding='UTF-8' standalone='yes'?>" << std::endl ;
1275  *fedstream << "<ROOT xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'>" << std::endl ;
1276  *fedstream << "" << std::endl ;
1277  *fedstream << " <HEADER>" << std::endl ;
1278  *fedstream << " <HINTS mode='load-as-group' /> " << std::endl ;
1279  *fedstream << " <TYPE>" << std::endl ;
1280  *fedstream << " <EXTENSION_TABLE_NAME>FED_CONFIGURATION</EXTENSION_TABLE_NAME>" << std::endl ;
1281  *fedstream << " <NAME>Pixel FED Configuration</NAME>" << std::endl ;
1282  *fedstream << " </TYPE>" << std::endl ;
1283  *fedstream << " <RUN>" << std::endl ;
1284  *fedstream << " <RUN_TYPE>Pixel FED Configuration</RUN_TYPE>" << std::endl ;
1285  *fedstream << " <RUN_NUMBER>1</RUN_NUMBER>" << std::endl ;
1286  *fedstream << " <RUN_BEGIN_TIMESTAMP>" << PixelTimeFormatter::getTime() << "</RUN_BEGIN_TIMESTAMP>" << std::endl ;
1287  *fedstream << " <LOCATION>CERN P5</LOCATION>" << std::endl ;
1288  *fedstream << " </RUN>" << std::endl ;
1289  *fedstream << " </HEADER>" << std::endl ;
1290  *fedstream << "" << std::endl ;
1291  *fedstream << " <DATA_SET>" << std::endl ;
1292  *fedstream << "" << std::endl ;
1293  *fedstream << " <VERSION>" << version << "</VERSION>" << std::endl ;
1294  *fedstream << " <COMMENT_DESCRIPTION>" << getComment() << "</COMMENT_DESCRIPTION>" << std::endl ;
1295  *fedstream << " <CREATED_BY_USER>" << getAuthor() << "</CREATED_BY_USER>" << std::endl ;
1296  *fedstream << "" << std::endl ;
1297  *fedstream << " <PART>" << std::endl ;
1298  *fedstream << " <NAME_LABEL>CMS-PIXEL-ROOT</NAME_LABEL>" << std::endl ;
1299  *fedstream << " <KIND_OF_PART>Detector ROOT</KIND_OF_PART>" << std::endl ;
1300  *fedstream << " </PART>" << std::endl ;
1301 
1302  // ROC LEVELS MAIN XML FILE
1303  rocfullPath << path << "/Pixel_RocAnalogLevels_" << PixelTimeFormatter::getmSecTime() << ".xml" ;
1304  std::cout << __LINE__ << "]\t" << mthn << "Writing to: " << rocfullPath.str() << "" << std::endl ;
1305 
1306  rocstream->open(rocfullPath.str().c_str()) ;
1307 
1308 
1309  *rocstream << "<?xml version=\"1.0\" encoding=\"UTF-8\" standalone=\"yes\"?>" << std::endl ;
1310  *rocstream << "<ROOT xmlns:xsi=\"http://www.w3.org/2001/XMLSchema-instance\">" << std::endl ;
1311  *rocstream << "" << std::endl ;
1312  *rocstream << " <HEADER>" << std::endl ;
1313  *rocstream << " <HINTS mode='only-det-root,load-as-group'/>" << std::endl ;
1314  *rocstream << " <TYPE>" << std::endl ;
1315  *rocstream << " <EXTENSION_TABLE_NAME>ROC_ANALOG_LEVELS</EXTENSION_TABLE_NAME>" << std::endl ;
1316  *rocstream << " <NAME>ROC Analog Levels</NAME>" << std::endl ;
1317  *rocstream << " </TYPE>" << std::endl ;
1318  *rocstream << " <RUN>" << std::endl ;
1319  *rocstream << " <RUN_TYPE>ROC Analog Levels</RUN_TYPE>" << std::endl ;
1320  *rocstream << " <RUN_NUMBER>1</RUN_NUMBER> " << std::endl ;
1321  *rocstream << " <RUN_BEGIN_TIMESTAMP>" << PixelTimeFormatter::getTime() << "</RUN_BEGIN_TIMESTAMP>" << std::endl ;
1322  *rocstream << " <CREATED_BY_USER>Umesh Joshi</CREATED_BY_USER> " << std::endl ;
1323  *rocstream << " <LOCATION>CERN</LOCATION> " << std::endl ;
1324  *rocstream << " <COMMENT_DESCRIPTION>ROC Analog Levels Template</COMMENT_DESCRIPTION>" << std::endl ;
1325  *rocstream << " </RUN>" << std::endl ;
1326  *rocstream << " </HEADER>" << std::endl ;
1327  *rocstream << "" << std::endl ;
1328  *rocstream << " <DATA_SET>" << std::endl ;
1329  *rocstream << " <COMMENT_DESCRIPTION>ROC Analog Levels Template</COMMENT_DESCRIPTION>" << std::endl ;
1330  *rocstream << " <VERSION>" << version << "</VERSION>" << std::endl ;
1331  *rocstream << " " << std::endl ;
1332  *rocstream << " <PART>" << std::endl ;
1333  *rocstream << " <SERIAL_NUMBER>CMS-PIXEL-ROOT</SERIAL_NUMBER>" << std::endl ;
1334  *rocstream << " <KIND_OF_PART>Detector ROOT</KIND_OF_PART>" << std::endl ;
1335  *rocstream << " </PART>" << std::endl ;
1336 
1337  // TBM LEVELS MAIN XML FILE
1338  tbmfullPath << path << "/Pixel_TbmAnalogLevels_" << PixelTimeFormatter::getmSecTime() << ".xml" ;
1339  std::cout << __LINE__ << "]\t" << mthn << "Writing to: " << tbmfullPath.str() << "" << std::endl ;
1340 
1341  tbmstream->open(tbmfullPath.str().c_str()) ;
1342 
1343 
1344  *tbmstream << "<?xml version=\"1.0\" encoding=\"UTF-8\" standalone=\"yes\"?>" << std::endl ;
1345  *tbmstream << "<ROOT xmlns:xsi=\"http://www.w3.org/2001/XMLSchema-instance\">" << std::endl ;
1346  *tbmstream << "" << std::endl ;
1347  *tbmstream << " <HEADER>" << std::endl ;
1348  *tbmstream << " <HINTS mode='only-det-root,load-as-group' />" << std::endl ;
1349  *tbmstream << " <TYPE>" << std::endl ;
1350  *tbmstream << " <EXTENSION_TABLE_NAME>TBM_ANALOG_LEVELS</EXTENSION_TABLE_NAME>" << std::endl ;
1351  *tbmstream << " <NAME>TBM Analog Levels</NAME>" << std::endl ;
1352  *tbmstream << " </TYPE>" << std::endl ;
1353  *tbmstream << " <RUN>" << std::endl ;
1354  *tbmstream << " <RUN_TYPE>TBM Analog Levels</RUN_TYPE>" << std::endl ;
1355  *tbmstream << " <RUN_NUMBER>1</RUN_NUMBER>" << std::endl ;
1356  *tbmstream << " <RUN_BEGIN_TIMESTAMP>" << PixelTimeFormatter::getTime() << "</RUN_BEGIN_TIMESTAMP>" << std::endl ;
1357  *tbmstream << " <CREATED_BY_USER>Umesh Joshi</CREATED_BY_USER> " << std::endl ;
1358  *tbmstream << " <LOCATION>CERN</LOCATION> " << std::endl ;
1359  *tbmstream << " <COMMENT_DESCRIPTION>TBM Analog Levels</COMMENT_DESCRIPTION>" << std::endl ;
1360  *tbmstream << " </RUN>" << std::endl ;
1361  *tbmstream << " </HEADER>" << std::endl ;
1362  *tbmstream << "" << std::endl ;
1363  *tbmstream << " <DATA_SET>" << std::endl ;
1364  *tbmstream << " <VERSION>" << version << "</VERSION>" << std::endl ;
1365  *tbmstream << " " << std::endl ;
1366  *tbmstream << " <PART>" << std::endl ;
1367  *tbmstream << " <SERIAL_NUMBER>CMS-PIXEL-ROOT</SERIAL_NUMBER>" << std::endl ;
1368  *tbmstream << " <KIND_OF_PART>Detector ROOT</KIND_OF_PART>" << std::endl ;
1369  *tbmstream << " </PART>" << std::endl ;
1370 
1371 }
1372 
1373 //=============================================================================================
1374 void PixelFEDCard::writeXMLHeader(pos::PixelConfigKey key, int version, std::string path, std::ofstream *out) const {
1375  std::string mthn = "[PixelFEDCard::writeXMLHeader()]\t\t\t " ;
1376  std::stringstream fullPath ;
1377 
1378  fullPath << path << "/fedcard_" << PixelTimeFormatter::getmSecTime() << ".xml" ;
1379  std::cout << __LINE__ << "]\t" << mthn << "Writing to: " << fullPath.str() << "" << std::endl ;
1380 
1381  out->open(fullPath.str().c_str()) ;
1382 
1383  *out << "<?xml version='1.0' encoding='UTF-8' standalone='yes'?>" << std::endl ;
1384  *out << "<ROOT>" << std::endl ;
1385  *out << "" << std::endl ;
1386  *out << " <HEADER>" << std::endl ;
1387  *out << " <TYPE>" << std::endl ;
1388  *out << " <EXTENSION_TABLE_NAME>FED_CONFIGURATION</EXTENSION_TABLE_NAME>" << std::endl ;
1389  *out << " <NAME>Pixel FED Configuration</NAME>" << std::endl ;
1390  *out << " </TYPE>" << std::endl ;
1391  *out << " <RUN>" << std::endl ;
1392  *out << " <RUN_TYPE>Pixel FED Configuration</RUN_TYPE>" << std::endl ;
1393  *out << " <RUN_NUMBER>1</RUN_NUMBER>" << std::endl ;
1394  *out << " <RUN_BEGIN_TIMESTAMP>" << PixelTimeFormatter::getTime() << "</RUN_BEGIN_TIMESTAMP>" << std::endl ;
1395  *out << " <COMMENT_DESCRIPTION>Pixel FED Configuration</COMMENT_DESCRIPTION>" << std::endl ;
1396  *out << " <LOCATION>CERN TAC</LOCATION>" << std::endl ;
1397  *out << " <CREATED_BY_USER>Dario Menasce</CREATED_BY_USER>" << std::endl ;
1398  *out << " </RUN>" << std::endl ;
1399  *out << " </HEADER>" << std::endl ;
1400  *out << "" << std::endl ;
1401  *out << " <DATA_SET>" << std::endl ;
1402  *out << "" << std::endl ;
1403  *out << " <VERSION>" << version << "</VERSION>" << std::endl ;
1404  *out << " <COMMENT_DESCRIPTION>Pixel FED Configuration</COMMENT_DESCRIPTION>" << std::endl ;
1405  *out << "" << std::endl ;
1406  *out << " <PART>" << std::endl ;
1407  *out << " <NAME_LABEL>CMS-PIXEL-ROOT</NAME_LABEL>" << std::endl ;
1408  *out << " <KIND_OF_PART>Detector ROOT</KIND_OF_PART>" << std::endl ;
1409  *out << " </PART>" << std::endl ;
1410 }
1411 //=============================================================================================
1412 void PixelFEDCard::writeXML( std::ofstream *out) const {
1413  std::string mthn = "[PixelFEDCard::writeXML()]\t\t\t " ;
1414 
1415  *out << " <DATA>" << std::endl ;
1416  *out << " " << std::endl ;
1417  *out << " <PXLFED_NAME>PxlFED_" << fedNumber<< "</PXLFED_NAME>" << std::endl ;
1418  *out << " <VME_ADDRESS>268435456</VME_ADDRESS>" << std::endl ;
1419 // *out << " <CRATE_NUMBER>1</CRATE_NUMBER>" << std::endl ;
1420 // *out << " <SLOT_NUMBER>5</SLOT_NUMBER> " << std::endl ;
1421 // *out << " <VME_ADDRESS>268435456</VME_ADDRESS>" << std::endl ;
1422 // *out << " <CRATE_LABEL>S1G03e</CRATE_LABEL>" << std::endl ;
1423  *out << "" << std::endl ;
1424  *out << " <CHANNEL_ID>1</CHANNEL_ID>" << std::endl ;
1425  *out << " <NUMBER_OF_ROCS>21</NUMBER_OF_ROCS>" << std::endl ;
1426  *out << " <CHANNEL_OFFSET_DAC_SETTINGS>0</CHANNEL_OFFSET_DAC_SETTINGS>" << std::endl ;
1427  *out << " <CHANNEL_DELAY_SETTINGS>3</CHANNEL_DELAY_SETTINGS>" << std::endl ;
1428  *out << " <CHANNEL_BLACK_HIGH>400</CHANNEL_BLACK_HIGH>" << std::endl ;
1429  *out << " <CHANNEL_BLACK_LOW>150</CHANNEL_BLACK_LOW>" << std::endl ;
1430  *out << " <CHANNEL_ULTRA_BLACK>120</CHANNEL_ULTRA_BLACK>" << std::endl ;
1431  *out << "" << std::endl ;
1432  *out << " <OPT1_CAP>0</OPT1_CAP>" << std::endl ;
1433  *out << " <OPT2_CAP>0</OPT2_CAP>" << std::endl ;
1434  *out << " <OPT3_CAP>0</OPT3_CAP>" << std::endl ;
1435  *out << " <OPT1_INP>0</OPT1_INP>" << std::endl ;
1436  *out << " <OPT2_INP>0</OPT2_INP>" << std::endl ;
1437  *out << " <OPT3_INP>0</OPT3_INP>" << std::endl ;
1438  *out << " <OPT1_OUT>0</OPT1_OUT>" << std::endl ;
1439  *out << " <OPT2_OUT>0</OPT2_OUT>" << std::endl ;
1440  *out << " <OPT3_OUT>0</OPT3_OUT>" << std::endl ;
1441  *out << " <NORTH_CLKPHB>511</NORTH_CLKPHB>" << std::endl ;
1442  *out << " <NORTHCENTER_CLKPHB>511</NORTHCENTER_CLKPHB>" << std::endl ;
1443  *out << " <SOUTHCENTER_CLKPHB>511</SOUTHCENTER_CLKPHB>" << std::endl ;
1444  *out << " <SOUTH_CLKPHB>511</SOUTH_CLKPHB>" << std::endl ;
1445  *out << " <NORTH_CTRL>0</NORTH_CTRL> " << std::endl ;
1446  *out << " <NORTHCENTER_CTRL>0</NORTHCENTER_CTRL>" << std::endl ;
1447  *out << " <SOUTHCENTER_CTRL>0</SOUTHCENTER_CTRL>" << std::endl ;
1448  *out << " <SOUTH_CTRL>0</SOUTH_CTRL>" << std::endl ;
1449  *out << " <REG1_TTCRX_FDLA>5</REG1_TTCRX_FDLA>" << std::endl ;
1450  *out << " <REG2_TTCRX_CDLA>0</REG2_TTCRX_CDLA>" << std::endl ;
1451  *out << " <REG3_TTCRX_CLKD2>155</REG3_TTCRX_CLKD2>" << std::endl ;
1452  *out << " <CENTER_CTRL>0</CENTER_CTRL>" << std::endl ;
1453  *out << " <CENTER_MODE>0</CENTER_MODE>" << std::endl ;
1454  *out << " <B1_ADCGN>0</B1_ADCGN>" << std::endl ;
1455  *out << " <B2_ADCGN>0</B2_ADCGN>" << std::endl ;
1456  *out << " <B3_ADCGN>0</B3_ADCGN>" << std::endl ;
1457  *out << " <B4_ADCGN>0</B4_ADCGN>" << std::endl ;
1458  *out << " <NORTH_BADJ>330</NORTH_BADJ>" << std::endl ;
1459  *out << " <NORTHCENTER_BADJ>330</NORTHCENTER_BADJ>" << std::endl ;
1460  *out << " <SOUTHCENTER_BADJ>330</SOUTHCENTER_BADJ>" << std::endl ;
1461  *out << " <SOUTH_BADJ>330</SOUTH_BADJ>" << std::endl ;
1462  *out << " <NORTH_TBMMASK>2</NORTH_TBMMASK>" << std::endl ;
1463  *out << " <NORTHCENTER_TBMMASK>2</NORTHCENTER_TBMMASK>" << std::endl ;
1464  *out << " <SOUTHCENTER_TBMMASK>2</SOUTHCENTER_TBMMASK>" << std::endl ;
1465  *out << " <SOUTH_TBMMASK>2</SOUTH_TBMMASK>" << std::endl ;
1466  *out << " <NORTH_PWORD>177</NORTH_PWORD>" << std::endl ;
1467  *out << " <NORTHCENTER_PWORD>178</NORTHCENTER_PWORD>" << std::endl ;
1468  *out << " <SOUTHCENTER_PWORD>179</SOUTHCENTER_PWORD>" << std::endl ;
1469  *out << " <SOUTH_PWORD>180</SOUTH_PWORD>" << std::endl ;
1470  *out << " <SPECDAC>0</SPECDAC>" << std::endl ;
1471  *out << " <OOS_LVL>0</OOS_LVL>" << std::endl ;
1472  *out << " <ERR_LVL>0</ERR_LVL>" << std::endl ;
1473  *out << " <NORTH_FIFO1_BZ_LVL>900</NORTH_FIFO1_BZ_LVL>" << std::endl ;
1474  *out << " <NORTHCENTER_FIFO1_BZ_LVL>900</NORTHCENTER_FIFO1_BZ_LVL>" << std::endl ;
1475  *out << " <SOUTHCENTER_FIFO1_BZ_LVL>900</SOUTHCENTER_FIFO1_BZ_LVL>" << std::endl ;
1476  *out << " <SOUTH_FIFO1_BZ_LVL>900</SOUTH_FIFO1_BZ_LVL>" << std::endl ;
1477  *out << " <FIFO3_WRN_LVL>7680</FIFO3_WRN_LVL> " << std::endl ;
1478  *out << " <FED_MASTER_DELAY>0</FED_MASTER_DELAY>" << std::endl ;
1479  *out << " <NO_HITLIMIT>0</NO_HITLIMIT>" << std::endl ;
1480  *out << " <NC_HITLIMIT>0</NC_HITLIMIT>" << std::endl ;
1481  *out << " <SC_HITLIMIT>0</SC_HITLIMIT>" << std::endl ;
1482  *out << " <SO_HITLIMIT>0</SO_HITLIMIT>" << std::endl ;
1483  *out << " <NO_TESTREG>0</NO_TESTREG>" << std::endl ;
1484  *out << " <NC_TESTREG>0</NC_TESTREG>" << std::endl ;
1485  *out << " <SC_TESTREG>0</SC_TESTREG>" << std::endl ;
1486  *out << " <SO_TESTREG>0</SO_TESTREG>" << std::endl ;
1487  *out << " " << std::endl ;
1488  *out << " </DATA>" << std::endl ;
1489  *out << " " << std::endl ;
1490 }
1491 
1492 //=============================================================================================
1493 void PixelFEDCard::writeXML( std::ofstream *fedstream,
1494  std::ofstream *rocstream,
1495  std::ofstream *tbmstream) const
1496 {
1497  std::string mthn = "[PixelFEDCard::writeXML()]\t\t\t " ;
1498 
1499  for(int i=0;i<36;i++)
1500  {
1501  *fedstream << " <DATA>" << std::endl ;
1502  *fedstream << " " << std::endl ;
1503  *fedstream << " <PIXEL_FED>" << fedNumber << "</PIXEL_FED>" << std::endl ;
1504  *fedstream << " <VME_ADDRS_HEX>0x" << hex << FEDBASE_0 << dec << "</VME_ADDRS_HEX>" << std::endl ;
1505  *fedstream << "" << std::endl ;
1506  *fedstream << " <CHANNEL_ID>" << i+1 << "</CHANNEL_ID>" << std::endl ;
1507  *fedstream << " <NUM_ROCS>" << NRocs[i] << "</NUM_ROCS>" << std::endl ;
1508  *fedstream << " <CHAN_OFFST_DAC>" << offs_dac[i] << "</CHAN_OFFST_DAC>" << std::endl ;
1509  *fedstream << " <CHAN_DELAY>" << DelayCh[i] << "</CHAN_DELAY>" << std::endl ;
1510  *fedstream << " <CHAN_BHIGH>" << BlackHi[i] << "</CHAN_BHIGH>" << std::endl ;
1511  *fedstream << " <CHAN_BLOW>" << BlackLo[i] << "</CHAN_BLOW>" << std::endl ;
1512  *fedstream << " <CHAN_UB>" << Ublack[i] << "</CHAN_UB>" << std::endl ;
1513  *fedstream << "" << std::endl ;
1514  *fedstream << " <OPT1_CAP>" << opt_cap[0] << "</OPT1_CAP>" << std::endl ;
1515  *fedstream << " <OPT2_CAP>" << opt_cap[1] << "</OPT2_CAP>" << std::endl ;
1516  *fedstream << " <OPT3_CAP>" << opt_cap[2] << "</OPT3_CAP>" << std::endl ;
1517  *fedstream << " <OPT1_INP>" << opt_inadj[0] << "</OPT1_INP>" << std::endl ;
1518  *fedstream << " <OPT2_INP>" << opt_inadj[1] << "</OPT2_INP>" << std::endl ;
1519  *fedstream << " <OPT3_INP>" << opt_inadj[2] << "</OPT3_INP>" << std::endl ;
1520  *fedstream << " <OPT1_OUT>" << opt_ouadj[0] << "</OPT1_OUT>" << std::endl ;
1521  *fedstream << " <OPT2_OUT>" << opt_ouadj[1] << "</OPT2_OUT>" << std::endl ;
1522  *fedstream << " <OPT3_OUT>" << opt_ouadj[2] << "</OPT3_OUT>" << std::endl ;
1523  *fedstream << " <NORTH_CLKPHB>" << clkphs1_9 << "</NORTH_CLKPHB>" << std::endl ;
1524  *fedstream << " <NORTHCENTER_CLKPHB>" << clkphs10_18 << "</NORTHCENTER_CLKPHB>" << std::endl ;
1525  *fedstream << " <SOUTHCENTER_CLKPHB>" << clkphs19_27 << "</SOUTHCENTER_CLKPHB>" << std::endl ;
1526  *fedstream << " <SOUTH_CLKPHB>" << clkphs28_36 << "</SOUTH_CLKPHB>" << std::endl ;
1527  *fedstream << " <NORTH_CTRL>" << Ncntrl << "</NORTH_CTRL> " << std::endl ;
1528  *fedstream << " <NORTHCENTER_CTRL>" << NCcntrl << "</NORTHCENTER_CTRL>" << std::endl ;
1529  *fedstream << " <SOUTHCENTER_CTRL>" << SCcntrl << "</SOUTHCENTER_CTRL>" << std::endl ;
1530  *fedstream << " <SOUTH_CTRL>" << Scntrl << "</SOUTH_CTRL>" << std::endl ;
1531  *fedstream << " <REG0_TTCRX_FDLA>" << FineDes1Del << "</REG0_TTCRX_FDLA>" << std::endl ;
1532  *fedstream << " <REG1_TTCRX_FDLA>" << FineDes2Del << "</REG1_TTCRX_FDLA>" << std::endl ;
1533  *fedstream << " <REG2_TTCRX_CDLA>" << CoarseDel << "</REG2_TTCRX_CDLA>" << std::endl ;
1534  *fedstream << " <REG3_TTCRX_CLKD2>" << ClkDes2 << "</REG3_TTCRX_CLKD2>" << std::endl ;
1535  *fedstream << " <CENTER_CTRL>" << Ccntrl << "</CENTER_CTRL>" << std::endl ;
1536  *fedstream << " <CENTER_MODE>" << modeRegister << "</CENTER_MODE>" << std::endl ;
1537  *fedstream << " <B1_ADCGN>" << Nadcg << "</B1_ADCGN>" << std::endl ;
1538  *fedstream << " <B2_ADCGN>" << NCadcg << "</B2_ADCGN>" << std::endl ;
1539  *fedstream << " <B3_ADCGN>" << SCadcg << "</B3_ADCGN>" << std::endl ;
1540  *fedstream << " <B4_ADCGN>" << Sadcg << "</B4_ADCGN>" << std::endl ;
1541 // std::cout << "PixelFEDCard::WriteXML()\tNbaseln:" << Nbaseln << std::endl ;
1542 // std::cout << "PixelFEDCard::WriteXML()\tNbaseln:" << std::hex << Nbaseln << std::dec << std::endl ;
1543  *fedstream << " <NORTH_BADJ>" << Nbaseln << "</NORTH_BADJ>" << std::endl ;
1544  *fedstream << " <NORTHCENTER_BADJ>" << NCbaseln << "</NORTHCENTER_BADJ>" << std::endl ;
1545  *fedstream << " <SOUTHCENTER_BADJ>" << SCbaseln << "</SOUTHCENTER_BADJ>" << std::endl ;
1546  *fedstream << " <SOUTH_BADJ>" << Sbaseln << "</SOUTH_BADJ>" << std::endl ;
1547  *fedstream << " <NORTH_TBMMASK>" << N_TBMmask << "</NORTH_TBMMASK>" << std::endl ;
1548  *fedstream << " <NORTHCENTER_TBMMASK>" << NC_TBMmask << "</NORTHCENTER_TBMMASK>" << std::endl ;
1549  *fedstream << " <SOUTHCENTER_TBMMASK>" << SC_TBMmask << "</SOUTHCENTER_TBMMASK>" << std::endl ;
1550  *fedstream << " <SOUTH_TBMMASK>" << S_TBMmask << "</SOUTH_TBMMASK>" << std::endl ;
1551  *fedstream << " <NORTH_PWORD>" << N_Pword << "</NORTH_PWORD>" << std::endl ;
1552  *fedstream << " <NORTHCENTER_PWORD>" << NC_Pword << "</NORTHCENTER_PWORD>" << std::endl ;
1553  *fedstream << " <SOUTHCENTER_PWORD>" << SC_Pword << "</SOUTHCENTER_PWORD>" << std::endl ;
1554  *fedstream << " <SOUTH_PWORD>" << S_Pword << "</SOUTH_PWORD>" << std::endl ;
1555  *fedstream << " <SPECDAC>" << SpecialDac << "</SPECDAC>" << std::endl ;
1556  *fedstream << " <OOS_LVL>" << Ooslvl << "</OOS_LVL>" << std::endl ;
1557  *fedstream << " <ERR_LVL>" << Errlvl << "</ERR_LVL>" << std::endl ;
1558  *fedstream << " <NORTH_FIFO1_BZ_LVL>" << Nfifo1Bzlvl << "</NORTH_FIFO1_BZ_LVL>" << std::endl ;
1559  *fedstream << " <NORTHCENTER_FIFO1_BZ_LVL>" << NCfifo1Bzlvl << "</NORTHCENTER_FIFO1_BZ_LVL>" << std::endl ;
1560  *fedstream << " <SOUTHCENTER_FIFO1_BZ_LVL>" << SCfifo1Bzlvl << "</SOUTHCENTER_FIFO1_BZ_LVL>" << std::endl ;
1561  *fedstream << " <SOUTH_FIFO1_BZ_LVL>" << Sfifo1Bzlvl << "</SOUTH_FIFO1_BZ_LVL>" << std::endl ;
1562  *fedstream << " <FIFO3_WRN_LVL>" << fifo3Wrnlvl << "</FIFO3_WRN_LVL>" << std::endl ;
1563  *fedstream << " <FED_MASTER_DELAY>" << FedTTCDelay << "</FED_MASTER_DELAY>" << std::endl ;
1564  *fedstream << " <NO_HITLIMIT>" << N_hitlimit << "</NO_HITLIMIT>" << std::endl ;
1565  *fedstream << " <NC_HITLIMIT>" << NC_hitlimit << "</NC_HITLIMIT>" << std::endl ;
1566  *fedstream << " <SC_HITLIMIT>" << SC_hitlimit << "</SC_HITLIMIT>" << std::endl ;
1567  *fedstream << " <SO_HITLIMIT>" << S_hitlimit << "</SO_HITLIMIT>" << std::endl ;
1568  *fedstream << " <NO_TESTREG>" << N_testreg << "</NO_TESTREG>" << std::endl ;
1569  *fedstream << " <NC_TESTREG>" << NC_testreg << "</NC_TESTREG>" << std::endl ;
1570  *fedstream << " <SC_TESTREG>" << SC_testreg << "</SC_TESTREG>" << std::endl ;
1571  *fedstream << " <SO_TESTREG>" << S_testreg << "</SO_TESTREG>" << std::endl ;
1572 
1573  *fedstream << " " << std::endl ;
1574  *fedstream << " </DATA>" << std::endl ;
1575  *fedstream << " " << std::endl ;
1576  }
1577 
1578  //ROC & TBM LEVELS
1579  for(int i=0;i<36;i++)
1580  {
1581  for(int j=0;j<NRocs[i];j++)
1582  {
1583  *rocstream << "" << std::endl ;
1584  *rocstream << " <DATA>" << std::endl ;
1585  *rocstream << " <PIXEL_FED>" << fedNumber << "</PIXEL_FED>" << std::endl ;
1586  *rocstream << " <FED_CHAN>" << i+1 << "</FED_CHAN>" << std::endl ;
1587  *rocstream << " <FED_ROC_NUM>" << j << "</FED_ROC_NUM>" << std::endl ;
1588  *rocstream << " <ROC_L0>" << ROC_L0[i][j] << "</ROC_L0>" << std::endl ;
1589  *rocstream << " <ROC_L1>" << ROC_L1[i][j] << "</ROC_L1>" << std::endl ;
1590  *rocstream << " <ROC_L2>" << ROC_L2[i][j] << "</ROC_L2>" << std::endl ;
1591  *rocstream << " <ROC_L3>" << ROC_L3[i][j] << "</ROC_L3>" << std::endl ;
1592  *rocstream << " <ROC_L4>" << ROC_L4[i][j] << "</ROC_L4>" << std::endl ;
1593  *rocstream << " </DATA>" << std::endl << std::endl ;
1594  *rocstream << " " << std::endl ;
1595  }
1596 
1597  *tbmstream << "" << std::endl ;
1598  *tbmstream << " <DATA>" << std::endl ;
1599  *tbmstream << " <PIXEL_FED>" << fedNumber << "</PIXEL_FED>" << std::endl ;
1600  *tbmstream << " <FED_CHAN>" << i+1 << "</FED_CHAN>" << std::endl ;
1601  *tbmstream << " <TBMA_HEAD_L0>" << TBM_L0[i] << "</TBMA_HEAD_L0>" << std::endl ;
1602  *tbmstream << " <TBMA_HEAD_L1>" << TBM_L1[i] << "</TBMA_HEAD_L1>" << std::endl ;
1603  *tbmstream << " <TBMA_HEAD_L2>" << TBM_L2[i] << "</TBMA_HEAD_L2>" << std::endl ;
1604  *tbmstream << " <TBMA_HEAD_L3>" << TBM_L3[i] << "</TBMA_HEAD_L3>" << std::endl ;
1605  *tbmstream << " <TBMA_HEAD_L4>" << TBM_L4[i] << "</TBMA_HEAD_L4>" << std::endl ;
1606  *tbmstream << " <TBMA_TRAIL_L0>" << TRL_L0[i] << "</TBMA_TRAIL_L0>" << std::endl ;
1607  *tbmstream << " <TBMA_TRAIL_L1>" << TRL_L1[i] << "</TBMA_TRAIL_L1>" << std::endl ;
1608  *tbmstream << " <TBMA_TRAIL_L2>" << TRL_L2[i] << "</TBMA_TRAIL_L2>" << std::endl ;
1609  *tbmstream << " <TBMA_TRAIL_L3>" << TRL_L3[i] << "</TBMA_TRAIL_L3>" << std::endl ;
1610  *tbmstream << " <TBMA_TRAIL_L4>" << TRL_L4[i] << "</TBMA_TRAIL_L4>" << std::endl ;
1611  *tbmstream << " </DATA>" << std::endl << std::endl ;
1612  *tbmstream << "" << std::endl ;
1613  }
1614 }
1615 
1616 //=============================================================================================
1617 void PixelFEDCard::writeXMLTrailer(std::ofstream *fedstream,
1618  std::ofstream *rocstream,
1619  std::ofstream *tbmstream ) const
1620 {
1621  std::string mthn = "[PixelFEDCard::writeXMLTrailer()]\t\t\t " ;
1622 
1623  // Main FED
1624  *fedstream << " </DATA_SET>" << std::endl ;
1625  *fedstream << "</ROOT>" << std::endl ;
1626 
1627  fedstream->close() ;
1628  std::cout << __LINE__ << "]\t" << mthn << "Data written for main fed" << std::endl ;
1629 
1630  // ROC LVLS
1631  *rocstream << " </DATA_SET>" << std::endl ;
1632  *rocstream << "</ROOT>" << std::endl ;
1633 
1634  rocstream->close() ;
1635  std::cout << __LINE__ << "]\t" << mthn << "Data written for roc analog levels" << std::endl ;
1636 
1637  // TBM LVLS
1638  *tbmstream << " </DATA_SET>" << std::endl ;
1639  *tbmstream << "</ROOT>" << std::endl ;
1640 
1641  tbmstream->close() ;
1642  std::cout << __LINE__ << "]\t" << mthn << "Data written for tbm analog levels" << std::endl ;
1643 }
1644 
1645 //=============================================================================================
1646 void PixelFEDCard::writeXMLTrailer(std::ofstream *out) const {
1647  std::string mthn = "[PixelFEDCard::writeXMLTrailer()]\t\t\t " ;
1648 
1649  *out << " </DATA_SET>" << std::endl ;
1650  *out << "</ROOT>" << std::endl ;
1651 
1652  out->close() ;
1653  std::cout << __LINE__ << "]\t" << mthn << "Data written" << std::endl ;
1654 }
1655 
1656 //=============================================================================================
1657 void PixelFEDCard::writeXML(pos::PixelConfigKey key, int version, std::string path) const {
1658  std::string mthn = "[PixelFEDCard::writeXML()]\t\t\t " ;
1659  std::stringstream fullPath ;
1660 
1661  fullPath << path << "/fedcard.xml" ;
1662  std::cout << __LINE__ << "]\t" << mthn << "Writing to: |" << fullPath.str() << "|" << std::endl ;
1663 
1664  std::ofstream out(fullPath.str().c_str()) ;
1665 
1666  out << "<ROOT>" << std::endl ;
1667  out << "" << std::endl ;
1668  out << " <HEADER>" << std::endl ;
1669  out << " <TYPE>" << std::endl ;
1670  out << " <EXTENSION_TABLE_NAME>FED_CONFIGURATION</EXTENSION_TABLE_NAME>" << std::endl ;
1671  out << " <NAME>Pixel FED Configuration</NAME>" << std::endl ;
1672  out << " </TYPE>" << std::endl ;
1673  out << " <RUN>" << std::endl ;
1674  out << " <RUN_TYPE>Pixel FED Configuration</RUN_TYPE>" << std::endl ;
1675  out << " <RUN_NUMBER>1</RUN_NUMBER>" << std::endl ;
1676  out << " <RUN_BEGIN_TIMESTAMP>" << PixelTimeFormatter::getTime() << "</RUN_BEGIN_TIMESTAMP>" << std::endl ;
1677  out << " <COMMENT_DESCRIPTION>Pixel FED Configuration</COMMENT_DESCRIPTION>" << std::endl ;
1678  out << " <LOCATION>CERN TAC</LOCATION>" << std::endl ;
1679  out << " <CREATED_BY_USER>Dario Menasce</CREATED_BY_USER>" << std::endl ;
1680  out << " </RUN>" << std::endl ;
1681  out << " </HEADER>" << std::endl ;
1682  out << "" << std::endl ;
1683  out << " <DATA_SET>" << std::endl ;
1684  out << "" << std::endl ;
1685  out << " <VERSION>T_E_S_T</VERSION>" << std::endl ;
1686  out << " <COMMENT_DESCRIPTION>Pixel FED Configuration</COMMENT_DESCRIPTION>" << std::endl ;
1687  out << "" << std::endl ;
1688  out << " <PART>" << std::endl ;
1689  out << " <NAME_LABEL>CMS-PIXEL-ROOT</NAME_LABEL>" << std::endl ;
1690  out << " <KIND_OF_PART>Detector ROOT</KIND_OF_PART>" << std::endl ;
1691  out << " </PART>" << std::endl ;
1692  out << "" << std::endl ;
1693  out << " <DATA>" << std::endl ;
1694  out << " <PXLFED_NAME>PxlFED_32</PXLFED_NAME>" << std::endl ;
1695  out << " <CRATE_NUMBER>1</CRATE_NUMBER>" << std::endl ;
1696  out << " <SLOT_NUMBER>5</SLOT_NUMBER> " << std::endl ;
1697  out << " <VME_ADDRESS>268435456</VME_ADDRESS>" << std::endl ;
1698  out << " <CRATE_LABEL>S1G03e</CRATE_LABEL>" << std::endl ;
1699  out << "" << std::endl ;
1700  out << " <CHANNEL_ID>1</CHANNEL_ID>" << std::endl ;
1701  out << " <NUMBER_OF_ROCS>21</NUMBER_OF_ROCS>" << std::endl ;
1702  out << " <CHANNEL_OFFSET_DAC_SETTINGS>0</CHANNEL_OFFSET_DAC_SETTINGS>" << std::endl ;
1703  out << " <CHANNEL_DELAY_SETTINGS>3</CHANNEL_DELAY_SETTINGS>" << std::endl ;
1704  out << " <CHANNEL_BLACK_HIGH>400</CHANNEL_BLACK_HIGH>" << std::endl ;
1705  out << " <CHANNEL_BLACK_LOW>150</CHANNEL_BLACK_LOW>" << std::endl ;
1706  out << " <CHANNEL_ULTRA_BLACK>120</CHANNEL_ULTRA_BLACK>" << std::endl ;
1707  out << "" << std::endl ;
1708  out << " <OPT1_CAP>0</OPT1_CAP>" << std::endl ;
1709  out << " <OPT2_CAP>0</OPT2_CAP>" << std::endl ;
1710  out << " <OPT3_CAP>0</OPT3_CAP>" << std::endl ;
1711  out << " <OPT1_INP>0</OPT1_INP>" << std::endl ;
1712  out << " <OPT2_INP>0</OPT2_INP>" << std::endl ;
1713  out << " <OPT3_INP>0</OPT3_INP>" << std::endl ;
1714  out << " <OPT1_OUT>0</OPT1_OUT>" << std::endl ;
1715  out << " <OPT2_OUT>0</OPT2_OUT>" << std::endl ;
1716  out << " <OPT3_OUT>0</OPT3_OUT>" << std::endl ;
1717  out << " <NORTH_CLKPHB>511</NORTH_CLKPHB>" << std::endl ;
1718  out << " <NORTHCENTER_CLKPHB>511</NORTHCENTER_CLKPHB>" << std::endl ;
1719  out << " <SOUTHCENTER_CLKPHB>511</SOUTHCENTER_CLKPHB>" << std::endl ;
1720  out << " <SOUTH_CLKPHB>511</SOUTH_CLKPHB>" << std::endl ;
1721  out << " <NORTH_CTRL>0</NORTH_CTRL> " << std::endl ;
1722  out << " <NORTHCENTER_CTRL>0</NORTHCENTER_CTRL>" << std::endl ;
1723  out << " <SOUTHCENTER_CTRL>0</SOUTHCENTER_CTRL>" << std::endl ;
1724  out << " <SOUTH_CTRL>0</SOUTH_CTRL>" << std::endl ;
1725  out << " <REG1_TTCRX_FDLA>5</REG1_TTCRX_FDLA>" << std::endl ;
1726  out << " <REG2_TTCRX_CDLA>0</REG2_TTCRX_CDLA>" << std::endl ;
1727  out << " <REG3_TTCRX_CLKD2>155</REG3_TTCRX_CLKD2>" << std::endl ;
1728  out << " <CENTER_CTRL>0</CENTER_CTRL>" << std::endl ;
1729  out << " <CENTER_MODE>0</CENTER_MODE>" << std::endl ;
1730  out << " <B1_ADCGN>0</B1_ADCGN>" << std::endl ;
1731  out << " <B2_ADCGN>0</B2_ADCGN>" << std::endl ;
1732  out << " <B3_ADCGN>0</B3_ADCGN>" << std::endl ;
1733  out << " <B4_ADCGN>0</B4_ADCGN>" << std::endl ;
1734  out << " <NORTH_BADJ>330</NORTH_BADJ>" << std::endl ;
1735  out << " <NORTHCENTER_BADJ>330</NORTHCENTER_BADJ>" << std::endl ;
1736  out << " <SOUTHCENTER_BADJ>330</SOUTHCENTER_BADJ>" << std::endl ;
1737  out << " <SOUTH_BADJ>330</SOUTH_BADJ>" << std::endl ;
1738  out << " <NORTH_TBMMASK>2</NORTH_TBMMASK>" << std::endl ;
1739  out << " <NORTHCENTER_TBMMASK>2</NORTHCENTER_TBMMASK>" << std::endl ;
1740  out << " <SOUTHCENTER_TBMMASK>2</SOUTHCENTER_TBMMASK>" << std::endl ;
1741  out << " <SOUTH_TBMMASK>2</SOUTH_TBMMASK>" << std::endl ;
1742  out << " <NORTH_PWORD>177</NORTH_PWORD>" << std::endl ;
1743  out << " <NORTHCENTER_PWORD>178</NORTHCENTER_PWORD>" << std::endl ;
1744  out << " <SOUTHCENTER_PWORD>179</SOUTHCENTER_PWORD>" << std::endl ;
1745  out << " <SOUTH_PWORD>180</SOUTH_PWORD>" << std::endl ;
1746  out << " <SPECDAC>0</SPECDAC>" << std::endl ;
1747  out << " <OOS_LVL>0</OOS_LVL>" << std::endl ;
1748  out << " <ERR_LVL>0</ERR_LVL>" << std::endl ;
1749  out << " <NORTH_FIFO1_BZ_LVL>900</NORTH_FIFO1_BZ_LVL>" << std::endl ;
1750  out << " <NORTHCENTER_FIFO1_BZ_LVL>900</NORTHCENTER_FIFO1_BZ_LVL>" << std::endl ;
1751  out << " <SOUTHCENTER_FIFO1_BZ_LVL>900</SOUTHCENTER_FIFO1_BZ_LVL>" << std::endl ;
1752  out << " <SOUTH_FIFO1_BZ_LVL>900</SOUTH_FIFO1_BZ_LVL>" << std::endl ;
1753  out << " <FIFO3_WRN_LVL>7680</FIFO3_WRN_LVL> " << std::endl ;
1754  out << " <FED_MASTER_DELAY>0</FED_MASTER_DELAY>" << std::endl ;
1755  out << " <NO_HITLIMIT>0</NO_HITLIMIT>" << std::endl ;
1756  out << " <NC_HITLIMIT>0</NC_HITLIMIT>" << std::endl ;
1757  out << " <SC_HITLIMIT>0</SC_HITLIMIT>" << std::endl ;
1758  out << " <SO_HITLIMIT>0</SO_HITLIMIT>" << std::endl ;
1759  out << " <NO_TESTREG>0</NO_TESTREG>" << std::endl ;
1760  out << " <NC_TESTREG>0</NC_TESTREG>" << std::endl ;
1761  out << " <SC_TESTREG>0</SC_TESTREG>" << std::endl ;
1762  out << " <SO_TESTREG>0</SO_TESTREG>" << std::endl ;
1763  out << " </DATA>" << std::endl ;
1764 /*
1765  out<< " <DATA>
1766  <OPT1_CAP>0</OPT1_CAP>
1767  <OPT2_CAP>0</OPT2_CAP>
1768  <OPT3_CAP>0</OPT3_CAP>
1769  <OPT1_INP>0</OPT1_INP>
1770  <OPT2_INP>0</OPT2_INP>
1771  <OPT3_INP>0</OPT3_INP>
1772  <OPT1_OUT>0</OPT1_OUT>
1773  <OPT2_OUT>0</OPT2_OUT>
1774  <OPT3_OUT>0</OPT3_OUT>
1775  <NORTH_CLKPHB>511</NORTH_CLKPHB>
1776  <NORTHCENTER_CLKPHB>511</NORTHCENTER_CLKPHB>
1777  <SOUTHCENTER_CLKPHB>511</SOUTHCENTER_CLKPHB>
1778  <SOUTH_CLKPHB>511</SOUTH_CLKPHB>
1779  <NORTH_CTRL>0</NORTH_CTRL>
1780  <NORTHCENTER_CTRL>0</NORTHCENTER_CTRL>
1781  <SOUTHCENTER_CTRL>0</SOUTHCENTER_CTRL>
1782  <SOUTH_CTRL>0</SOUTH_CTRL>
1783  <REG1_TTCRX_FDLA>5</REG1_TTCRX_FDLA>
1784  <REG2_TTCRX_CDLA>0</REG2_TTCRX_CDLA>
1785  <REG3_TTCRX_CLKD2>155</REG3_TTCRX_CLKD2>
1786  <CENTER_CTRL>0</CENTER_CTRL>
1787  <CENTER_MODE>0</CENTER_MODE>
1788  <B1_ADCGN>0</B1_ADCGN>
1789  <B2_ADCGN>0</B2_ADCGN>
1790  <B3_ADCGN>0</B3_ADCGN>
1791  <B4_ADCGN>0</B4_ADCGN>
1792  <NORTH_BADJ>330</NORTH_BADJ>
1793  <NORTHCENTER_BADJ>330</NORTHCENTER_BADJ>
1794  <SOUTHCENTER_BADJ>330</SOUTHCENTER_BADJ>
1795  <SOUTH_BADJ>330</SOUTH_BADJ>
1796  <NORTH_TBMMASK>2</NORTH_TBMMASK>
1797  <NORTHCENTER_TBMMASK>2</NORTHCENTER_TBMMASK>
1798  <SOUTHCENTER_TBMMASK>2</SOUTHCENTER_TBMMASK>
1799  <SOUTH_TBMMASK>2</SOUTH_TBMMASK>
1800  <NORTH_PWORD>177</NORTH_PWORD>
1801  <NORTHCENTER_PWORD>178</NORTHCENTER_PWORD>
1802  <SOUTHCENTER_PWORD>179</SOUTHCENTER_PWORD>
1803  <SOUTH_PWORD>180</SOUTH_PWORD>
1804  <SPECDAC>0</SPECDAC>
1805  <OOS_LVL>0</OOS_LVL>
1806  <ERR_LVL>0</ERR_LVL>
1807  <NORTH_FIFO1_BZ_LVL>900</NORTH_FIFO1_BZ_LVL>
1808  <NORTHCENTER_FIFO1_BZ_LVL>900</NORTHCENTER_FIFO1_BZ_LVL>
1809  <SOUTHCENTER_FIFO1_BZ_LVL>900</SOUTHCENTER_FIFO1_BZ_LVL>
1810  <SOUTH_FIFO1_BZ_LVL>900</SOUTH_FIFO1_BZ_LVL>
1811  <FIFO3_WRN_LVL>7680</FIFO3_WRN_LVL>
1812  </DATA>
1813 
1814  </DATA_SET>
1815  out << " </DATA_SET>" << std::endl ;
1816  out << "</ROOT>" << std::endl ;
1817 
1818  out.close() ;
1819 */
1820  std::cout << __LINE__ << "]\t" << mthn << "Data written" << std::endl ;
1821 }
1822 
1823 //=============================================================================================
1824 unsigned long long PixelFEDCard::enabledChannels() {
1825  unsigned long long channels=0;
1826 // return a 64-bit word with low 36 bits set if a channel is enabled
1827 // if bits are set in the control registers, transfer of data from
1828 // fifo1 to fifo 2 is not done, meaning the channel is disabled.
1829  channels = (Ncntrl & 0x1ffLL); // Add LL for SLC4, d.k. 12/07
1830  channels += (NCcntrl & 0x1ffLL) << 9;
1831  channels += (SCcntrl & 0x1ffLL) << 18;
1832  channels += (Scntrl & 0x1ffLL) << 27;
1833  return ~channels; //bitwise complement to get enabled channels
1834 }
1835 
1836 bool PixelFEDCard::useChannel(unsigned int iChannel){
1837  assert(iChannel>0&&iChannel<37);
1838  return (enabledChannels()>>(iChannel-1))&0x1LL;
1839 }
1840 
1841 void PixelFEDCard::setChannel(unsigned int iChannel, bool mode){
1842  assert(iChannel>0&&iChannel<37);
1843  long long mask=enabledChannels();
1844  long long bit=0x1LL<<(iChannel-1);
1845  if (mode) {
1846  mask=mask|bit;
1847  }
1848  else{
1849  bit=~bit;
1850  mask=mask&bit;
1851  }
1852  mask=~mask;
1853  Ncntrl=mask & 0x1ffLL;
1854  mask=mask>>9;
1855  NCcntrl=mask & 0x1ffLL;
1856  mask=mask>>9;
1857  SCcntrl=mask & 0x1ffLL;
1858  mask=mask>>9;
1859  Scntrl=mask & 0x1ffLL;
1860 
1861 }
1862 
1863 void PixelFEDCard::restoreBaselinAndChannelMasks(){
1864 
1865  Ncntrl=Ncntrl_original;
1866  NCcntrl=NCcntrl_original;
1867  SCcntrl=SCcntrl_original;
1868  Scntrl=Scntrl_original;
1869 
1870  Nbaseln=Nbaseln_original;
1871  NCbaseln=NCbaseln_original;
1872  SCbaseln=SCbaseln_original;
1873  Sbaseln=Sbaseln_original;
1874 
1875 
1876 }
1877 
1878 
1879 void PixelFEDCard::restoreControlAndModeRegister(){
1880 
1881  Ccntrl=Ccntrl_original;
1882  modeRegister=modeRegister_original;
1883 
1884 }
1885 
1886 /* Emacs specific customization
1887  ;;; Local Variables: ***
1888  ;;; indent-tabs-mode:nil ***
1889  ;;; c-set-style:gnu ***
1890  ;;; End: ***
1891 */
i
int i
Definition: DBlmapReader.cc:9
pos::PixelFEDCard::FEDBASE_0
unsigned long FEDBASE_0
Definition: PixelFEDCard.h:155
pos::PixelConfigBase
This file contains the base class for &quot;pixel configuration data&quot; management.
Definition: PixelConfigBase.h:33
pos::PixelFEDCard::ROC_L3
int ROC_L3[36][26]
Definition: PixelFEDCard.h:93
pos::PixelFEDCard::ClkDes2
unsigned int ClkDes2
Definition: PixelFEDCard.h:114
pos::PixelFEDCard::SC_Pword
unsigned int SC_Pword
Definition: PixelFEDCard.h:107
pos::PixelFEDCard::restoreBaselinAndChannelMasks
void restoreBaselinAndChannelMasks()
Definition: PixelFEDCard.cc:1863
pos::PixelFEDCard::writeXMLTrailer
virtual void writeXMLTrailer(std::ofstream *out) const
Definition: PixelFEDCard.cc:1646
pos::PixelFEDCard::enabledChannels
unsigned long long enabledChannels()
Definition: PixelFEDCard.cc:1824
pos::PixelFEDCard::NCbaseln
unsigned int NCbaseln
Definition: PixelFEDCard.h:129
pos::PixelFEDCard::restoreControlAndModeRegister
void restoreControlAndModeRegister()
Definition: PixelFEDCard.cc:1879
pos::PixelFEDCard::Scntrl
unsigned int Scntrl
Definition: PixelFEDCard.h:97
pos::PixelFEDCard::S_Pword
unsigned int S_Pword
Definition: PixelFEDCard.h:107
pos::PixelFEDCard::SCbaseln
unsigned int SCbaseln
Definition: PixelFEDCard.h:129
NULL
#define NULL
Definition: scimark2.h:8
alignBH_cfg.mode
list mode
Definition: alignBH_cfg.py:7
pos::PixelFEDCard::ROC_L4
int ROC_L4[36][26]
Definition: PixelFEDCard.h:93
convertXMLtoSQLite_cfg.fileName
tuple fileName
Definition: convertXMLtoSQLite_cfg.py:12
pos::PixelFEDCard::readDBROCLevels
void readDBROCLevels(std::vector< std::vector< std::string > > &tableMat, int first, int last)
Definition: PixelFEDCard.cc:466
AlCaHLTBitMon_QueryRunRegistry.string
string string
Definition: AlCaHLTBitMon_QueryRunRegistry.py:255
pos::PixelFEDCard::Sadcg
unsigned int Sadcg
Definition: PixelFEDCard.h:126
pos::PixelFEDCard::Sbaseln
unsigned int Sbaseln
Definition: PixelFEDCard.h:129
pos::PixelTimeFormatter::getmSecTime
static std::string getmSecTime(void)
Definition: PixelTimeFormatter.h:80
pos::PixelFEDCard::useChannel
bool useChannel(unsigned int iChannel)
Definition: PixelFEDCard.cc:1836
pos::PixelFEDCard::NC_TBMmask
unsigned int NC_TBMmask
Definition: PixelFEDCard.h:104
cmsHarvester.path
tuple path
else: Piece not in the list, fine.
Definition: cmsHarvester.py:1591
pos::PixelFEDCard::Nbaseln
unsigned int Nbaseln
Definition: PixelFEDCard.h:129
pos::PixelTimeFormatter::getTime
static std::string getTime(void)
Definition: PixelTimeFormatter.h:48
pos::PixelFEDCard::readDBTBMLevels
void readDBTBMLevels(std::vector< std::vector< std::string > > &tableMat, int first, int last)
Definition: PixelFEDCard.cc:350
pos::PixelConfigBase::getComment
std::string getComment() const
Definition: PixelConfigBase.h:75
j
int j
Definition: DBlmapReader.cc:9
PixelTimeFormatter.h
This class provides utility methods to manipulate ASCII formatted timestamps.
cuy.ins
tuple ins
Definition: cuy.py:312
pos::PixelFEDCard::N_TBMmask
unsigned int N_TBMmask
Definition: PixelFEDCard.h:104
pos::PixelConfigBase::getAuthor
std::string getAuthor() const
Definition: PixelConfigBase.h:74
pos::PixelFEDCard::Nadcg
unsigned int Nadcg
Definition: PixelFEDCard.h:126
pos::PixelFEDCard::S_TBMmask
unsigned int S_TBMmask
Definition: PixelFEDCard.h:104
pos::PixelFEDCard::ROC_L0
int ROC_L0[36][26]
Definition: PixelFEDCard.h:93
first
bool first
Definition: L1TdeRCT.cc:75
pos::PixelFEDCard::Ccntrl
unsigned int Ccntrl
Definition: PixelFEDCard.h:117
pos::PixelFEDCard::NC_Pword
unsigned int NC_Pword
Definition: PixelFEDCard.h:107
pos::PixelFEDCard::NCadcg
unsigned int NCadcg
Definition: PixelFEDCard.h:126
pos::PixelConfigKey
This class implements..
Definition: PixelConfigKey.h:20
dbtoconf.out
tuple out
Definition: dbtoconf.py:99
pos::PixelFEDCard::SCadcg
unsigned int SCadcg
Definition: PixelFEDCard.h:126
BeamSplash_cfg.version
tuple version
Definition: BeamSplash_cfg.py:45
pos::PixelFEDCard::SC_TBMmask
unsigned int SC_TBMmask
Definition: PixelFEDCard.h:104
pos::PixelFEDCard::NCcntrl_original
unsigned int NCcntrl_original
Definition: PixelFEDCard.h:101
pos::PixelFEDCard::clkphs1_9
unsigned int clkphs1_9
Definition: PixelFEDCard.h:79
pos::PixelFEDCard::Ncntrl_original
unsigned int Ncntrl_original
Definition: PixelFEDCard.h:101
pos::PixelFEDCard::clkphs19_27
unsigned int clkphs19_27
Definition: PixelFEDCard.h:79
PixelFEDCard.h
This class implements..
pos::PixelFEDCard::writeXML
void writeXML(pos::PixelConfigKey key, int version, std::string path) const
Definition: PixelFEDCard.cc:1657
dtNoiseDBValidation_cfg.cerr
tuple cerr
Definition: dtNoiseDBValidation_cfg.py:22
pos::PixelFEDCard::clkphs10_18
unsigned int clkphs10_18
Definition: PixelFEDCard.h:79
pos::PixelFEDCard::N_Pword
unsigned int N_Pword
Definition: PixelFEDCard.h:107
pos::PixelFEDCard::SpecialDac
unsigned int SpecialDac
Definition: PixelFEDCard.h:110
begin
#define begin
Definition: vmac.h:30
combine.key
list key
Definition: combine.py:13
lut2db_cfg.filename
tuple filename
Definition: lut2db_cfg.py:20
pos::PixelFEDCard::setChannel
void setChannel(unsigned int iChannel, bool mode)
Definition: PixelFEDCard.cc:1841
gather_cfg.cout
tuple cout
Definition: gather_cfg.py:121
pos::PixelFEDCard::ROC_L2
int ROC_L2[36][26]
Definition: PixelFEDCard.h:93
pos::PixelFEDCard::Scntrl_original
unsigned int Scntrl_original
Definition: PixelFEDCard.h:101
pos::PixelFEDCard::Ncntrl
unsigned int Ncntrl
Definition: PixelFEDCard.h:97
dir
dbl *** dir
Definition: mlp_gen.cc:35
edm::false
volatile std::atomic< bool > shutdown_flag false
Definition: UnixSignalHandlers.cc:22
pos::PixelFEDCard::writeASCII
void writeASCII(std::string dir="") const
Definition: PixelFEDCard.cc:1022
pos::PixelFEDCard::writeXMLHeader
virtual void writeXMLHeader(pos::PixelConfigKey key, int version, std::string path, std::ofstream *out) const
Definition: PixelFEDCard.cc:1374
pos::PixelFEDCard::SCcntrl
unsigned int SCcntrl
Definition: PixelFEDCard.h:97
pos::PixelFEDCard::fedNumber
unsigned long fedNumber
Definition: PixelFEDCard.h:155
pos::PixelFEDCard::NCcntrl
unsigned int NCcntrl
Definition: PixelFEDCard.h:97
findQualityFiles.size
tuple size
Write out results.
Definition: findQualityFiles.py:442
pos::PixelFEDCard::clkphs28_36
unsigned int clkphs28_36
Definition: PixelFEDCard.h:79
pos::PixelFEDCard::SCcntrl_original
unsigned int SCcntrl_original
Definition: PixelFEDCard.h:101
pos::PixelFEDCard::ROC_L1
int ROC_L1[36][26]
Definition: PixelFEDCard.h:93
Generated for CMSSW Reference Manual by doxygen 1.8.5