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ApvTimingHistosUsingDb.cc
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1 
8 #include <iostream>
9 
10 using namespace sistrip;
11 
12 // -----------------------------------------------------------------------------
15  DQMStore* bei,
16  SiStripConfigDb* const db )
17  : CommissioningHistograms( pset.getParameter<edm::ParameterSet>("ApvTimingParameters"),
18  bei,
19  sistrip::APV_TIMING ),
21  sistrip::APV_TIMING ),
22  ApvTimingHistograms( pset.getParameter<edm::ParameterSet>("ApvTimingParameters"),
23  bei )
24 {
26  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
27  << " Constructing object...";
28  skipFecUpdate_ = this->pset().getParameter<bool>("SkipFecUpdate");
29  skipFedUpdate_ = this->pset().getParameter<bool>("SkipFedUpdate");
30  if (skipFecUpdate_)
32  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
33  << " Skipping update of FEC parameters.";
34  if (skipFedUpdate_)
36  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
37  << " Skipping update of FED parameters.";
38 }
39 
40 // -----------------------------------------------------------------------------
44  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
45  << " Destructing object...";
46 }
47 
48 // -----------------------------------------------------------------------------
52  << "[ApvTimingHistosUsingDb::" << __func__ << "]";
53 
54  if ( !db() ) {
56  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
57  << " NULL pointer to SiStripConfigDb interface!"
58  << " Aborting upload...";
59  return;
60  }
61 
62  if ( !skipFecUpdate_ ) {
63 
64  // Retrieve and update PLL device descriptions
66  bool upload = update( devices );
67 
68  // Check if new PLL settings are valid
69  if ( !upload ) {
71  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
72  << " Found invalid PLL settings (coarse > 15)"
73  << " Aborting update to database...";
74  return;
75  }
76 
77  // Upload PLL device descriptions
78  if ( doUploadConf() ) {
80  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
81  << " Uploading PLL settings to DB...";
84  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
85  << " Upload of PLL settings to DB finished!";
86  } else {
88  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
89  << " TEST only! No PLL settings will be uploaded to DB...";
90  }
91 
92  } else {
94  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
95  << " No upload of PLL settings to DB, as defined by .cfg file!";
96  }
97 
98  if ( !skipFedUpdate_ ) {
99 
100  // Update FED descriptions with new ticker thresholds
102  update( feds );
103 
104  // Update FED descriptions with new ticker thresholds
105  if ( doUploadConf() ) {
107  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
108  << " Uploading FED ticker thresholds to DB...";
111  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
112  << " Upload of FED ticker thresholds to DB finished!";
113  } else {
115  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
116  << " TEST only! No FED ticker thresholds will be uploaded to DB...";
117  }
118 
119  } else {
121  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
122  << " No Upload of FED ticker thresholds to DB, as defined by .cfg file!";
123  }
124 
125 }
126 
127 // -----------------------------------------------------------------------------
130 
131  // Iterate through devices and update device descriptions
132  uint16_t updated = 0;
133  std::vector<SiStripFecKey> invalid;
134  SiStripConfigDb::DeviceDescriptionsV::const_iterator idevice;
135 
136  for ( idevice = devices.begin(); idevice != devices.end(); idevice++ ) {
137 
138  // Check device type
139  if ( (*idevice)->getDeviceType() != PLL ) { continue; }
140 
141  // Cast to retrieve appropriate description object
142  pllDescription* desc = dynamic_cast<pllDescription*>( *idevice );
143  if ( !desc ) { continue; }
144 
145  // Retrieve device addresses from device description
146  const SiStripConfigDb::DeviceAddress& addr = db()->deviceAddress(*desc);
147  SiStripFecKey fec_path;
148 
149  // PLL delay settings
150  uint32_t coarse = sistrip::invalid_;
151  uint32_t fine = sistrip::invalid_;
152 
153  // Iterate through LLD channels
154  for ( uint16_t ichan = 0; ichan < sistrip::CHANS_PER_LLD; ichan++ ) {
155 
156  // Construct key from device description
157  SiStripFecKey fec_key( addr.fecCrate_,
158  addr.fecSlot_,
159  addr.fecRing_,
160  addr.ccuAddr_,
161  addr.ccuChan_,
162  ichan+1 );
163  fec_path = fec_key;
164 
165  // Locate appropriate analysis object
166  Analyses::const_iterator iter = data().find( fec_key.key() );
167  if ( iter != data().end() ) {
168 
169  ApvTimingAnalysis* anal = dynamic_cast<ApvTimingAnalysis*>( iter->second );
170  if ( !anal ) {
172  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
173  << " NULL pointer to analysis object!";
174  continue;
175  }
176 
177  // Calculate coarse and fine delays
178  int32_t delay = static_cast<int32_t>( rint( anal->delay() )*24./25 );
179  // first set course delay
180  coarse = static_cast<uint16_t>( desc->getDelayCoarse() + (delay/24) )
181  + ( static_cast<uint16_t>( desc->getDelayFine() ) + (delay%24) ) / 24;
182  delay = delay % 24; // only bother with fine delay now
183  if ( ( static_cast<uint16_t>( desc->getDelayFine() ) + delay ) % 24 < 0 ) {
184  coarse -= 1;
185  delay += 24;
186  }
187  fine = ( static_cast<uint16_t>( desc->getDelayFine() ) + delay ) % 24;
188 
189  // Record PPLs maximum coarse setting
190  if ( coarse > 15 ) { invalid.push_back(fec_key); }
191 
192  } else {
193  if ( deviceIsPresent(fec_key) ) {
195  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
196  << " Unable to find FEC key with params crate/FEC/ring/CCU/module/LLD: "
197  << fec_key.fecCrate() << "/"
198  << fec_key.fecSlot() << "/"
199  << fec_key.fecRing() << "/"
200  << fec_key.ccuAddr() << "/"
201  << fec_key.ccuChan() << "/"
202  << fec_key.channel();
203  }
204  }
205 
206  // Exit LLD channel loop if coarse and fine delays are known
207  if ( coarse != sistrip::invalid_ &&
208  fine != sistrip::invalid_ ) { break; }
209 
210  } // lld channel loop
211 
212  // Update PLL settings
213  if ( coarse != sistrip::invalid_ &&
214  fine != sistrip::invalid_ ) {
215 
216  std::stringstream ss;
217  if ( edm::isDebugEnabled() ) {
218  ss << "[ApvTimingHistosUsingDb::" << __func__ << "]"
219  << " Updating coarse/fine PLL settings"
220  << " for crate/FEC/ring/CCU/module "
221  << fec_path.fecCrate() << "/"
222  << fec_path.fecSlot() << "/"
223  << fec_path.fecRing() << "/"
224  << fec_path.ccuAddr() << "/"
225  << fec_path.ccuChan()
226  << " from "
227  << static_cast<uint16_t>( desc->getDelayCoarse() ) << "/"
228  << static_cast<uint16_t>( desc->getDelayFine() );
229  }
230  desc->setDelayCoarse(coarse);
231  desc->setDelayFine(fine);
232  updated++;
233  if ( edm::isDebugEnabled() ) {
234  ss << " to "
235  << static_cast<uint16_t>( desc->getDelayCoarse() ) << "/"
236  << static_cast<uint16_t>( desc->getDelayFine() );
237  LogTrace(mlDqmClient_) << ss.str();
238  }
239 
240  } else {
242  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
243  << " Invalid PLL delay settings course/fine = "
244  << coarse << "/" << fine
245  << " for crate/FEC/ring/CCU/module "
246  << fec_path.fecCrate() << "/"
247  << fec_path.fecSlot() << "/"
248  << fec_path.fecRing() << "/"
249  << fec_path.ccuAddr() << "/"
250  << fec_path.ccuChan();
251  }
252 
253  }
254 
255  // Check if invalid settings were found
256  if ( !invalid.empty() ) {
257  std::stringstream ss;
258  ss << "[ApvTimingHistosUsingDb::" << __func__ << "]"
259  << " Found PLL coarse setting of >15"
260  << " (not allowed!) for "
261  << invalid.size()
262  << " channels";
263  ss << " (Example is crate/FEC/ring/CCU/module/LLD: "
264  << invalid.front().fecCrate() << "/"
265  << invalid.front().fecSlot() << "/"
266  << invalid.front().fecRing() << "/"
267  << invalid.front().ccuAddr() << "/"
268  << invalid.front().ccuChan() << "/"
269  << invalid.front().channel();
270  edm::LogWarning(mlDqmClient_) << ss.str();
271  return false;
272  }
273 
275  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
276  << " Updated PLL settings for "
277  << updated << " modules";
278  return true;
279 
280 }
281 
282 // -----------------------------------------------------------------------------
285 
286  // Retrieve FED ids from cabling
287  auto ids = cabling()->fedIds();
288 
289  // Iterate through feds and update fed descriptions
290  uint16_t updated = 0;
291  for ( auto ifed = feds.begin(); ifed != feds.end(); ++ifed ) {
292 
293  // If FED id not found in list (from cabling), then continue
294  if ( find( ids.begin(), ids.end(), (*ifed)->getFedId() ) == ids.end() ) { continue; }
295 
296  for ( uint16_t ichan = 0; ichan < sistrip::FEDCH_PER_FED; ichan++ ) {
297 
298  // Build FED and FEC keys
299  const FedChannelConnection& conn = cabling()->fedConnection( (*ifed)->getFedId(), ichan );
300  if ( conn.fecCrate() == sistrip::invalid_ ||
301  conn.fecSlot() == sistrip::invalid_ ||
302  conn.fecRing() == sistrip::invalid_ ||
303  conn.ccuAddr() == sistrip::invalid_ ||
304  conn.ccuChan() == sistrip::invalid_ ||
305  conn.lldChannel() == sistrip::invalid_ ) { continue; }
306  SiStripFedKey fed_key( conn.fedId(),
307  SiStripFedKey::feUnit( conn.fedCh() ),
308  SiStripFedKey::feChan( conn.fedCh() ) );
309  SiStripFecKey fec_key( conn.fecCrate(),
310  conn.fecSlot(),
311  conn.fecRing(),
312  conn.ccuAddr(),
313  conn.ccuChan(),
314  conn.lldChannel() );
315 
316  // Locate appropriate analysis object
317  Analyses::const_iterator iter = data().find( fec_key.key() );
318  if ( iter != data().end() ) {
319 
320  ApvTimingAnalysis* anal = dynamic_cast<ApvTimingAnalysis*>( iter->second );
321  if ( !anal ) {
323  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
324  << " NULL pointer to analysis object!";
325  continue;
326  }
327 
328  // Update frame finding threshold
329  Fed9U::Fed9UAddress addr( ichan );
330  uint16_t old_threshold = static_cast<uint16_t>( (*ifed)->getFrameThreshold( addr ) );
331  if ( anal->isValid() ) {
332  (*ifed)->setFrameThreshold( addr, anal->frameFindingThreshold() );
333  updated++;
334  }
335  uint16_t new_threshold = static_cast<uint16_t>( (*ifed)->getFrameThreshold( addr ) );
336 
337  // Debug
338  std::stringstream ss;
339  ss << "[ApvTimingHistosUsingDb::" << __func__ << "]";
340  if ( anal->isValid() ) {
341  ss << " Updating the frame-finding threshold"
342  << " from " << old_threshold
343  << " to " << new_threshold
344  << " using tick mark base/peak/height "
345  << anal->base() << "/"
346  << anal->peak() << "/"
347  << anal->height();
348  } else {
349  ss << " Cannot update the frame-finding threshold"
350  << " from " << old_threshold
351  << " to a new value using invalid analysis ";
352  }
353  ss << " for crate/FEC/ring/CCU/module/LLD "
354  << fec_key.fecCrate() << "/"
355  << fec_key.fecSlot() << "/"
356  << fec_key.fecRing() << "/"
357  << fec_key.ccuAddr() << "/"
358  << fec_key.ccuChan()
359  << fec_key.channel()
360  << " and FED id/ch "
361  << fed_key.fedId() << "/"
362  << fed_key.fedChannel();
363  anal->print(ss);
364  //LogTrace(mlDqmClient_) << ss.str();
365 
366  } else {
367  if ( deviceIsPresent(fec_key) ) {
368  std::stringstream ss;
369  ss << "[ApvTimingHistosUsingDb::" << __func__ << "]"
370  << " Unable to find analysis object and update ticker thresholds"
371  << " for key/crate/FEC/ring/CCU/module/LLD "
372  << std::hex << std::setw(8) << std::setfill('0') << fec_key.key() << std::dec
373  << fec_key.fecCrate() << "/"
374  << fec_key.fecSlot() << "/"
375  << fec_key.fecRing() << "/"
376  << fec_key.ccuAddr() << "/"
377  << fec_key.ccuChan() << "/"
378  << fec_key.channel()
379  << " and FED key/id/ch "
380  << std::hex << std::setw(8) << std::setfill('0') << fed_key.key() << std::dec
381  << fed_key.fedId() << "/"
382  << fed_key.fedChannel();
383  edm::LogWarning(mlDqmClient_) << ss.str();
384  }
385  }
386  }
387  }
388 
390  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
391  << " Updated ticker thresholds for " << updated
392  << " channels on " << ids.size() << " FEDs!";
393 
394 }
395 
396 // -----------------------------------------------------------------------------
399  Analysis analysis ) {
400 
401  ApvTimingAnalysis* anal = dynamic_cast<ApvTimingAnalysis*>( analysis->second );
402  if ( !anal ) { return; }
403 
404  SiStripFecKey fec_key( anal->fecKey() );
405  SiStripFedKey fed_key( anal->fedKey() );
406 
407  for ( uint16_t iapv = 0; iapv < 2; ++iapv ) {
408 
409 // std::stringstream ss;
410 // if ( anal->isValid() ) { ss << " TEST VALID "; }
411 // else { ss << " TEST INVALID "; }
412 // ss << std::hex << anal->fecKey() << std::dec << " "
413 // << anal->base() << " "
414 // << anal->peak() << " "
415 // << anal->height() << " "
416 // << ( anal->base() + anal->height() * ApvTimingAnalysis::frameFindingThreshold_ ) << " "
417 // << anal->frameFindingThreshold();
418 // edm::LogError("TEST") << ss.str();
419 
420  // Create description
421  TimingAnalysisDescription* tmp;
422  tmp = new TimingAnalysisDescription( anal->time(),
423  anal->refTime(),
424  anal->delay(),
425  anal->height(),
426  anal->base(),
427  anal->peak(),
428  anal->frameFindingThreshold(),
429  anal->optimumSamplingPoint(),
431  true, //@@ APV timing analysis (not FED timing)
432  fec_key.fecCrate(),
433  fec_key.fecSlot(),
434  fec_key.fecRing(),
435  fec_key.ccuAddr(),
436  fec_key.ccuChan(),
437  SiStripFecKey::i2cAddr( fec_key.lldChan(), !iapv ),
438  db()->dbParams().partitions().begin()->second.partitionName(),
439  db()->dbParams().partitions().begin()->second.runNumber(),
440  anal->isValid(),
441  "",
442  fed_key.fedId(),
443  fed_key.feUnit(),
444  fed_key.feChan(),
445  fed_key.fedApv() );
446 
447  // Add comments
448  typedef std::vector<std::string> Strings;
449  Strings errors = anal->getErrorCodes();
450  Strings::const_iterator istr = errors.begin();
451  Strings::const_iterator jstr = errors.end();
452  for ( ; istr != jstr; ++istr ) { tmp->addComments( *istr ); }
453 
454  // Store description
455  desc.push_back( tmp );
456 
457  }
458 
459 }
const uint16_t & fecSlot() const
T getParameter(std::string const &) const
bool isDebugEnabled()
const uint16_t & fecCrate() const
const uint32_t & fedKey() const
const uint16_t & fecRing() const
FedChannelConnection fedConnection(uint16_t fed_id, uint16_t fed_ch) const
A container class for generic run and event-related info, information required by the commissioning a...
Definition: SiStripFedKey.h:56
const uint16_t & fedCh() const
const edm::ParameterSet & pset() const
bool deviceIsPresent(const SiStripFecKey &)
FedDescriptionsRange getFedDescriptions(std::string partition="")
std::vector< std::string > Strings
Definition: MsgTools.h:18
const float & refTime() const
tuple db
Definition: EcalCondDB.py:151
FedDescriptions::range FedDescriptionsRange
static const float tickMarkHeightThreshold_
static const char mlDqmClient_[]
ApvTimingHistosUsingDb(const edm::ParameterSet &pset, DQMStore *, SiStripConfigDb *const )
const uint16_t & fecSlot() const
const float & optimumSamplingPoint() const
uint16_t lldChannel() const
void find(edm::Handle< EcalRecHitCollection > &hits, DetId thisDet, std::vector< EcalRecHitCollection::const_iterator > &hit, bool debug=false)
Definition: FindCaloHit.cc:7
const uint16_t & i2cAddr() const
const uint16_t & fedId() const
bool update(SiStripConfigDb::DeviceDescriptionsRange)
const float & base() const
const uint32_t & key() const
Definition: SiStripKey.h:125
Utility class that identifies a position within the strip tracker control structure, down to the level of an APV25.
Definition: SiStripFecKey.h:45
const_iterator_range partitions() const
const uint16_t & fecRing() const
Class containning control, module, detector and connection information, at the level of a FED channel...
FedsConstIterRange fedIds() const
DeviceDescriptions::range DeviceDescriptionsRange
static const uint16_t CHANS_PER_LLD
An interface class to the DeviceFactory.
const uint16_t & ccuChan() const
const uint32_t & fecKey() const
DeviceAddress deviceAddress(const deviceDescription &)
uint16_t fedChannel() const
const float & peak() const
const uint16_t & ccuAddr() const
const float & time() const
#define LogTrace(id)
const float & delay() const
void print(std::stringstream &, uint32_t not_used=0)
const uint16_t & fecCrate() const
uint16_t frameFindingThreshold() const
const uint16_t & feUnit() const
const SiStripDbParams & dbParams() const
const uint16_t & channel() const
Definition: SiStripKey.h:128
void uploadFedDescriptions(std::string partition="")
const uint16_t & ccuAddr() const
static const uint16_t invalid_
Definition: Constants.h:16
void create(SiStripConfigDb::AnalysisDescriptionsV &, Analysis)
std::vector< std::vector< double > > tmp
Definition: MVATrainer.cc:100
static const uint16_t FEDCH_PER_FED
std::vector< AnalysisDescription * > AnalysisDescriptionsV
const uint16_t & feChan() const
const uint16_t & ccuChan() const
const uint16_t & fedId() const
SiStripConfigDb *const db() const
DeviceDescriptionsRange getDeviceDescriptions(std::string partition="")
void uploadDeviceDescriptions(std::string partition="")
Analysis for timing run using APV tick marks.
SiStripFedCabling *const cabling() const
const VString & getErrorCodes() const
const float & height() const
tuple conn
Definition: results_mgr.py:53