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Functions

/data/doxygen/doxygen-1.7.3/gen/CMSSW_4_2_8/src/DetectorDescription/Core/src/DDLogicalPart.cc File Reference

#include "DetectorDescription/Core/interface/DDLogicalPart.h"
#include "LogicalPart.h"
#include "DetectorDescription/Base/interface/DDdebug.h"
#include <ostream>
#include "FWCore/MessageLogger/interface/MessageLogger.h"
#include <regex.h>
#include <set>

Go to the source code of this file.

Functions

void DD_NC (const DDName &n)
std::pair< bool, std::string > DDIsValid (const std::string &ns, const std::string &nm, std::vector< DDLogicalPart > &result, bool doRegex)
std::ostream & operator<< (std::ostream &os, const DDLogicalPart &part)

Function Documentation

void DD_NC ( const DDName n)

Definition at line 16 of file DDLogicalPart.cc.

References DDI::Singleton< I >::instance(), DDName::name(), DDName::ns(), and L1TEmulatorMonitor_cff::p.

Referenced by DDLogicalPart::DDLogicalPart().

                             {
 std::vector<DDName> & ns = LPNAMES::instance()[n.name()];
 typedef std::vector<DDName>::iterator IT;
 bool alreadyIn(false);
 for(IT p = ns.begin(); p != ns.end() ; ++p) {
   if ( p->ns() == n.ns()) {
     alreadyIn = true;
     break;
   } 
 }
 if (!alreadyIn) {
   ns.push_back(n);
 }  
}
std::pair<bool,std::string> DDIsValid ( const std::string &  ns,
const std::string &  nm,
std::vector< DDLogicalPart > &  result,
bool  doRegex 
)

Definition at line 318 of file DDLogicalPart.cc.

References begin, end, i, DDI::Singleton< I >::instance(), argparse::message, and ntuplemaker::status.

Referenced by DDI::Specific::createPartSelections().

{
  //return std::make_pair(true,"");      
  if (!doRegex) {
    DDName ddnm(nm,ns);
    result.push_back(DDLogicalPart(ddnm));
    return std::make_pair(true,"");
  }
  std::string status;
  Regex aRegex(nm);
  Regex aNsRegex(ns);
  bool emptyNs = aNsRegex.empty();
    // std::cerr <<  "regex " << nm << " " << ns << std::endl;
 
  //edm::LogInfo("DDLogicalPart") << " . emptyNs=" << emptyNs << std::endl;
  //edm::LogInfo("DDLogicalPart") << " . qname=[" << ns << ":" << nm << "]" << std::endl;
  
  // THIS IS THE SLOW PART: I have to compare every namespace & name of every
  // logical part with a regex-comparison .... a linear search always through the
  // full range of logical parts!!!!
  /*
    Algorithm description:
    x. empty nm and ns argument of method means: use all matching regex ^.*$
    a. iterate over all logical part names, match against regex for names
    b. iterate over all namespaces of names found in a & match against regex for namespaces   
  */
  LPNAMES::value_type::const_iterator bn(LPNAMES::instance().begin()),
                                      ed(LPNAMES::instance().end());
  typedef std::vector< LPNAMES::value_type::const_iterator> Candidates;
  Candidates candidates;
  if ( aRegex.notRegex() ) {
    LPNAMES::value_type::const_iterator it = LPNAMES::instance().find(aRegex.value());
    if (it!=ed) candidates.push_back(it);
  }
  else {
    if ( !aRegex.range().first.empty()) {
      bn =  LPNAMES::instance().lower_bound(aRegex.range().first);
      ed =  LPNAMES::instance().upper_bound(aRegex.range().second);
    }
    for (LPNAMES::value_type::const_iterator it=bn; it != ed; ++it)
      if(aRegex.match(it->first)) candidates.push_back(it);
  }
  for (int i=0; i<int(candidates.size()); ++i) {
    LPNAMES::value_type::const_iterator it = candidates[i];
    //if (doit)  edm::LogInfo("DDLogicalPart") << "rgx: " << aName << ' ' << it->first << ' ' << doit << std::endl;
    std::vector<DDName>::size_type sz = it->second.size(); // no of 'compatible' namespaces
    if ( emptyNs && (sz==1) ) { // accept all logical parts in all the namespaces
      result.push_back(it->second[0]);
      //std::vector<DDName>::const_iterator nsIt(it->second.begin()), nsEd(it->second.end());
      //for(; nsIt != nsEd; ++nsIt) {
      //   result.push_back(DDLogicalPart(*nsIt));
      //   edm::LogInfo("DDLogicalPart") << "DDD-WARNING: multiple namespaces match (in SpecPars PartSelector): " << *nsIt << std::endl;
      //}
    }
    else if ( !emptyNs ) { // only accept matching namespaces
      std::vector<DDName>::const_iterator nsit(it->second.begin()), nsed(it->second.end());
      for (; nsit !=nsed; ++nsit) {
        //edm::LogInfo("DDLogicalPart") << "comparing " << aNs << " with " << *nsit << std::endl;
        bool another_doit = aNsRegex.match(nsit->ns());
        if ( another_doit ) {
          //temp.push_back(std::make_pair(it->first,*nsit));
          result.push_back(DDLogicalPart(*nsit));
        }
      }
    }
    else { // emtpyNs and sz>1 -> error, too ambigous
      std::string message = "DDLogicalPart-name \"" + it->first +"\" matching regex \""
        + nm + "\" has been found at least in following namespaces:\n";
      std::vector<DDName>::const_iterator vit = it->second.begin();
      for(; vit != it->second.end(); ++vit) {
        message += vit->ns();
        message += " "; 
      } 
        message += "\nQualify the name with a regexp for the namespace, i.e \".*:name-regexp\" !";
        return std::make_pair(false,message);        
    }
  }
  bool flag=true;    
  std::string message;
  
  // check whether the found logical-parts are also defined (i.e. have material, solid ...)
  if (result.size()) {
    std::vector<DDLogicalPart>::const_iterator lpit(result.begin()), lped(result.end());
    for (; lpit != lped; ++lpit) { 
      // std::cout << "VI- " << std::string(lpit->name()) << std::endl;
      if (!lpit->isDefined().second) {
         message = message + "LogicalPart " + lpit->name().fullname() + " not (yet) defined!\n";
         flag = false;
      }
    }
  }
  else {
    flag = false;
    message = "No regex-match for namespace=" + ns + "  name=" + nm + "\n";
  }


  return std::make_pair(flag,message);
}
std::ostream& operator<< ( std::ostream &  os,
const DDLogicalPart part 
)

Definition at line 33 of file DDLogicalPart.cc.

References DDBase< N, C >::isDefined(), and DDBase< N, C >::rep().

{
  DDBase<DDName,DDI::LogicalPart*>::def_type defined(part.isDefined());
  if (defined.first) {
    os << *(defined.first) << " ";
    if (defined.second) {
      part.rep().stream(os); 
    }
    else {
      os << "* logicalpart not defined * ";  
    }
  }  
  else {
    os << "* logicalpart not declared * ";  
  }  
  return os;
}