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L1GtHwValidation.cc
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1 
18 // this class header
20 
21 // system include files
22 #include <memory>
23 #include <iostream>
24 #include <iomanip>
25 
26 // user include files
31 
34 
38 
41 
45 
49 
50 #include "TH1.h"
51 #include "TH2.h"
52 #include "TTree.h"
53 
54 // constructor(s)
56  //
57  // input tag for the L1 GT hardware DAQ record
58  m_l1GtDataDaqInputTag(paramSet.getParameter<edm::InputTag>(
59  "L1GtDataDaqInputTag")),
60  // input tag for the L1 GT hardware EVM record
61  m_l1GtDataEvmInputTag(paramSet.getParameter<edm::InputTag>(
62  "L1GtDataEvmInputTag")),
63  // input tag for the L1 GT emulator DAQ record
64  m_l1GtEmulDaqInputTag(paramSet.getParameter<edm::InputTag>(
65  "L1GtEmulDaqInputTag")),
66  // input tag for the L1 GT emulator EVM record
67  m_l1GtEmulEvmInputTag(paramSet.getParameter<edm::InputTag>(
68  "L1GtEmulEvmInputTag")),
69  // input tag for the L1 GCT hardware record
70  m_l1GctDataInputTag(paramSet.getParameter<edm::InputTag>(
71  "L1GctDataInputTag")),
72  //
73  m_dirName(paramSet.getUntrackedParameter("DirName", std::string(
74  "L1Trigger/L1ExtraDQM/source"))),
75  // initialize counters
76  m_nrDataEventError(0),
77  m_nrEmulEventError(0),
78  // cache
79  m_l1GtMenuCacheID(0ULL), m_l1GtPfAlgoCacheID(0ULL),
80  m_l1GtPfTechCacheID(0ULL), m_l1GtTmAlgoCacheID(0ULL),
81  m_l1GtTmTechCacheID(0ULL),
82  //
83  m_dbe(0),
84  //
85  m_nrEvJob(0), m_nrEvRun(0) {
86 
87  LogDebug("L1GtHwValidation")
88  << "\nInput tag for the L1 GT DAQ hardware record: "
90  << "\nInput tag for the L1 GT EVM hardware record: "
92  << "\nInput tag for the L1 GT DAQ emulator records: "
94  << "\nInput tag for the L1 GT EVM emulator records: "
96  << "\nInput tag for the L1 GCT hardware record: "
97  << m_l1GctDataInputTag << std::endl;
98 
100  if (m_dbe == 0) {
101  edm::LogInfo("L1GtHwValidation")
102  << "\n Unable to get DQMStore service.";
103  } else {
104 
105  if (paramSet.getUntrackedParameter<bool>("DQMStore", false)) {
106  m_dbe->setVerbose(0);
107  }
108 
110 
111  }
112 
113 }
114 
115 // destructor
117  // empty
118 }
119 
120 // member functions
121 
122 // method called once each job just before starting event loop
124 
125  DQMStore* dbe = 0;
126  dbe = edm::Service<DQMStore>().operator->();
127 
128  // clean up directory
129  if (dbe) {
131  if (dbe->dirExists(m_dirName)) {
132  dbe->rmdir(m_dirName);
133  }
135  }
136 
137  // book histograms
138  bookHistograms();
139 
140 }
141 
143  const edm::EventSetup& evSetup) {
144 
145  m_nrEvRun = 0;
146 
147  // get / update the trigger menu from the EventSetup
148  // local cache & check on cacheIdentifier
149 
150  unsigned long long l1GtMenuCacheID =
151  evSetup.get<L1GtTriggerMenuRcd>().cacheIdentifier();
152 
153  if (m_l1GtMenuCacheID != l1GtMenuCacheID) {
154 
156  evSetup.get<L1GtTriggerMenuRcd>().get(l1GtMenu);
157  m_l1GtMenu = l1GtMenu.product();
158 
159  m_l1GtMenuCacheID = l1GtMenuCacheID;
160 
161  }
162 
163  // FIXME when the menu changes, make a copy of histograms, and clear the old one
164  // otherwise the labels are wrong
165  const AlgorithmMap& algorithmMap = m_l1GtMenu->gtAlgorithmMap();
166 
167  for (CItAlgo itAlgo = algorithmMap.begin(); itAlgo != algorithmMap.end(); itAlgo++) {
168 
169  std::string aName = itAlgo->first;
170  const char* algName = aName.c_str();
171  int algBitNumber = (itAlgo->second).algoBitNumber();
172 
173  for (int iRec = 0; iRec < NumberOfGtRecords; ++iRec) {
174  for (int iBxInEvent = 0; iBxInEvent < TotalBxInEvent; ++iBxInEvent) {
175  m_fdlDataAlgoDecision[iBxInEvent][iRec]->setBinLabel(
176  algBitNumber + 1, algName, 1);
177  m_fdlDataAlgoDecisionPrescaled[iBxInEvent][iRec]->setBinLabel(
178  algBitNumber + 1, algName, 1);
180  algBitNumber + 1, algName, 1);
181  m_fdlDataAlgoDecisionMask[iBxInEvent][iRec]->setBinLabel(
182  algBitNumber + 1, algName, 1);
183  m_fdlDataAlgoDecision_NoMatch[iBxInEvent][iRec]->setBinLabel(
184  algBitNumber + 1, algName, 1);
185  m_fdlDataAlgoDecision_Err[iRec]->setBinLabel(algBitNumber + 1,
186  algName, 1);
187 
188  m_fdlEmulAlgoDecision[iBxInEvent][iRec]->setBinLabel(
189  algBitNumber + 1, algName, 1);
190  m_fdlEmulAlgoDecisionPrescaled[iBxInEvent][iRec]->setBinLabel(
191  algBitNumber + 1, algName, 1);
193  algBitNumber + 1, algName, 1);
194  m_fdlEmulAlgoDecisionMask[iBxInEvent][iRec]->setBinLabel(
195  algBitNumber + 1, algName, 1);
196  m_fdlEmulAlgoDecision_NoMatch[iBxInEvent][iRec]->setBinLabel(
197  algBitNumber + 1, algName, 1);
198  m_fdlEmulAlgoDecision_Err[iRec]->setBinLabel(algBitNumber + 1,
199  algName, 1);
200 
201  m_fdlDataEmulAlgoDecision[iBxInEvent][iRec]->setBinLabel(
202  algBitNumber + 1, algName, 1);
204  algBitNumber + 1, algName, 1);
206  algBitNumber + 1, algName, 1);
207  m_fdlDataEmulAlgoDecisionMask[iBxInEvent][iRec]->setBinLabel(
208  algBitNumber + 1, algName, 1);
209  m_fdlDataEmulAlgoDecision_Err[iRec]->setBinLabel(algBitNumber
210  + 1, algName, 1);
211  }
212  }
213 
214  }
215 
216  // get / update the prescale factors from the EventSetup
217  // local cache & check on cacheIdentifier
218 
219  unsigned long long l1GtPfAlgoCacheID = evSetup.get<
220  L1GtPrescaleFactorsAlgoTrigRcd>().cacheIdentifier();
221 
222  if (m_l1GtPfAlgoCacheID != l1GtPfAlgoCacheID) {
223 
225  evSetup.get<L1GtPrescaleFactorsAlgoTrigRcd>().get(l1GtPfAlgo);
226  m_l1GtPfAlgo = l1GtPfAlgo.product();
227 
229 
230  m_l1GtPfAlgoCacheID = l1GtPfAlgoCacheID;
231 
232  }
233 
234  unsigned long long l1GtPfTechCacheID = evSetup.get<
235  L1GtPrescaleFactorsTechTrigRcd>().cacheIdentifier();
236 
237  if (m_l1GtPfTechCacheID != l1GtPfTechCacheID) {
238 
240  evSetup.get<L1GtPrescaleFactorsTechTrigRcd>().get(l1GtPfTech);
241  m_l1GtPfTech = l1GtPfTech.product();
242 
244 
245  m_l1GtPfTechCacheID = l1GtPfTechCacheID;
246 
247  }
248 
249  // get / update the trigger mask from the EventSetup
250  // local cache & check on cacheIdentifier
251 
252  unsigned long long l1GtTmAlgoCacheID = evSetup.get<
253  L1GtTriggerMaskAlgoTrigRcd>().cacheIdentifier();
254 
255  if (m_l1GtTmAlgoCacheID != l1GtTmAlgoCacheID) {
256 
258  evSetup.get<L1GtTriggerMaskAlgoTrigRcd>().get(l1GtTmAlgo);
259  m_l1GtTmAlgo = l1GtTmAlgo.product();
260 
262 
263  m_l1GtTmAlgoCacheID = l1GtTmAlgoCacheID;
264 
265  }
266 
267  unsigned long long l1GtTmTechCacheID = evSetup.get<
268  L1GtTriggerMaskTechTrigRcd>().cacheIdentifier();
269 
270  if (m_l1GtTmTechCacheID != l1GtTmTechCacheID) {
271 
273  evSetup.get<L1GtTriggerMaskTechTrigRcd>().get(l1GtTmTech);
274  m_l1GtTmTech = l1GtTmTech.product();
275 
277 
278  m_l1GtTmTechCacheID = l1GtTmTechCacheID;
279 
280  }
281 
282 }
283 
284 //compare the GTFE board
286  const edm::EventSetup& evSetup, const L1GtfeWord& gtfeBlockData,
287  const L1GtfeWord& gtfeBlockEmul, const int iRec) {
288 
289  //
290  std::string recString;
291  if (iRec == 0) {
292  recString = "DAQ";
293  } else {
294  recString = "EVM";
295  }
296 
297  if (gtfeBlockData == gtfeBlockEmul) {
298  m_myCoutStream << "\n" << recString
299  << " Data and emulated GTFE blocks: identical.\n";
300  gtfeBlockData.print(m_myCoutStream);
301  } else {
302  m_myCoutStream << "\n" << recString
303  << " Data and emulated GTFE blocks: different.\n";
304 
305  m_myCoutStream << "\nData: GTFE block\n";
306  gtfeBlockData.print(m_myCoutStream);
307 
308  m_myCoutStream << "\nEmul: GTFE block\n";
309  gtfeBlockEmul.print(m_myCoutStream);
310 
311  }
312 
313  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
314 
315  m_myCoutStream.str("");
316  m_myCoutStream.clear();
317 
318  // get BoardId value
319  const boost::uint16_t boardIdData = gtfeBlockData.boardId();
320  const boost::uint16_t boardIdEmul = gtfeBlockEmul.boardId();
321 
322  if (boardIdData == boardIdEmul) {
323  m_myCoutStream << "\n" << recString
324  << " Data and emulated GTFE boardId identical.";
325  m_myCoutStream << "\n boardId() = " << std::hex << "0x" << std::setw(4)
326  << std::setfill('0') << boardIdData << std::setfill(' ')
327  << std::dec;
328  m_myCoutStream << "\n";
329 
330  } else {
331  m_myCoutStream << "\n" << recString
332  << " Data and emulated GTFE boardId different.";
333  m_myCoutStream << "\n Data: boardId() = " << std::hex << "0x"
334  << std::setw(4) << std::setfill('0') << boardIdData
335  << std::setfill(' ') << std::dec;
336  m_myCoutStream << "\n Emul: boardId() = " << std::hex << "0x"
337  << std::setw(4) << std::setfill('0') << boardIdEmul
338  << std::setfill(' ') << std::dec;
339  m_myCoutStream << "\n";
340  m_gtfeDataEmul[iRec]->Fill(0);
341 
342  }
343 
345  const boost::uint16_t recordLength1Data = gtfeBlockData.recordLength1();
346  const boost::uint16_t recordLength1Emul = gtfeBlockEmul.recordLength1();
347 
348  if (recordLength1Data == recordLength1Emul) {
349  m_myCoutStream << "\n" << recString
350  << " Data and emulated GTFE recordLength for alternative 1 identical.";
351  m_myCoutStream << "\n recordLength1() = " << recordLength1Data;
352  m_myCoutStream << "\n";
353 
354  } else {
355  m_myCoutStream << "\n" << recString
356  << " Data and emulated GTFE recordLength for alternative 1 different.";
357  m_myCoutStream << "\n Data: recordLength1() = " << recordLength1Data;
358  m_myCoutStream << "\n Emul: recordLength1() = " << recordLength1Emul;
359  m_myCoutStream << "\n";
360  m_gtfeDataEmul[iRec]->Fill(1);
361 
362  }
363 
365  const boost::uint16_t recordLengthData = gtfeBlockData.recordLength();
366  const boost::uint16_t recordLengthEmul = gtfeBlockEmul.recordLength();
367 
368  if (recordLengthData == recordLengthEmul) {
369  m_myCoutStream << "\n" << recString
370  << " Data and emulated GTFE recordLength for alternative 0 identical.";
371  m_myCoutStream << "\n recordLength() = " << recordLengthData;
372  m_myCoutStream << "\n";
373 
374  } else {
375  m_myCoutStream << "\n" << recString
376  << " Data and emulated GTFE recordLength for alternative 1 different.";
377  m_myCoutStream << "\n Data: recordLength() = " << recordLengthData;
378  m_myCoutStream << "\n Emul: recordLength() = " << recordLengthEmul;
379  m_myCoutStream << "\n";
380  m_gtfeDataEmul[iRec]->Fill(2);
381 
382  }
383 
385  const boost::uint16_t bxNrData = gtfeBlockData.bxNr();
386  const boost::uint16_t bxNrEmul = gtfeBlockEmul.bxNr();
387 
388  if (bxNrData == bxNrEmul) {
389  m_myCoutStream << "\n" << recString
390  << " Data and emulated GTFE bxNr identical.";
391  m_myCoutStream << "\n bxNr() = " << bxNrData;
392  m_myCoutStream << "\n";
393 
394  } else {
395  m_myCoutStream << "\n" << recString
396  << " Data and emulated GTFE bxNr different.";
397  m_myCoutStream << "\n Data: bxNr() = " << bxNrData;
398  m_myCoutStream << "\n Emul: bxNr() = " << bxNrEmul;
399  m_myCoutStream << "\n";
400  m_gtfeDataEmul[iRec]->Fill(3);
401 
402  }
403 
405  const boost::uint32_t setupVersionData = gtfeBlockData.setupVersion();
406  const boost::uint32_t setupVersionEmul = gtfeBlockEmul.setupVersion();
407 
408  if (setupVersionData == setupVersionEmul) {
409  m_myCoutStream << "\n" << recString
410  << " Data and emulated GTFE setupVersion identical.";
411  m_myCoutStream << "\n setupVersion() = " << setupVersionData;
412  m_myCoutStream << "\n";
413 
414  } else {
415  m_myCoutStream << "\n" << recString
416  << " Data and emulated GTFE setupVersion different.";
417  m_myCoutStream << "\n Data: setupVersion() = " << setupVersionData;
418  m_myCoutStream << "\n Emul: setupVersion() = " << setupVersionEmul;
419  m_myCoutStream << "\n";
420  m_gtfeDataEmul[iRec]->Fill(4);
421 
422  }
423 
425  const boost::uint16_t activeBoardsData = gtfeBlockData.activeBoards();
426  const boost::uint16_t activeBoardsEmul = gtfeBlockEmul.activeBoards();
427 
428  if (activeBoardsData == activeBoardsEmul) {
429  m_myCoutStream << "\n" << recString
430  << " Data and emulated GTFE activeBoards identical.";
431  m_myCoutStream << "\n activeBoards() = " << std::hex << "0x"
432  << std::setw(4) << std::setfill('0') << activeBoardsData
433  << std::setfill(' ') << std::dec;
434  m_myCoutStream << "\n";
435 
436  } else {
437  m_myCoutStream << "\n" << recString
438  << " Data and emulated GTFE activeBoards different.";
439  m_myCoutStream << "\n Data: activeBoards() = " << std::hex << "0x"
440  << std::setw(4) << std::setfill('0') << activeBoardsData
441  << std::setfill(' ') << std::dec;
442  m_myCoutStream << "\n Emul: activeBoards() = " << std::hex << "0x"
443  << std::setw(4) << std::setfill('0') << activeBoardsEmul
444  << std::setfill(' ') << std::dec;
445  m_myCoutStream << "\n";
446  m_gtfeDataEmul[iRec]->Fill(5);
447 
448  }
453  const boost::uint16_t altNrBxBoardData = gtfeBlockData.altNrBxBoard();
454  const boost::uint16_t altNrBxBoardEmul = gtfeBlockEmul.altNrBxBoard();
455 
456  if (altNrBxBoardData == altNrBxBoardEmul) {
457  m_myCoutStream << "\n" << recString
458  << " Data and emulated GTFE altNrBxBoard identical.";
459  m_myCoutStream << "\n altNrBxBoard() = " << altNrBxBoardData;
460  m_myCoutStream << "\n";
461 
462  } else {
463  m_myCoutStream << "\n" << recString
464  << " Data and emulated GTFE altNrBxBoard different.";
465  m_myCoutStream << "\n Data: altNrBxBoard() = " << altNrBxBoardData;
466  m_myCoutStream << "\n Emul: altNrBxBoard() = " << altNrBxBoardEmul;
467  m_myCoutStream << "\n";
468  m_gtfeDataEmul[iRec]->Fill(6);
469 
470  }
471 
473  const boost::uint32_t totalTriggerNrData = gtfeBlockData.totalTriggerNr();
474  const boost::uint32_t totalTriggerNrEmul = gtfeBlockEmul.totalTriggerNr();
475 
476  if (totalTriggerNrData == totalTriggerNrEmul) {
477  m_myCoutStream << "\n" << recString
478  << " Data and emulated GTFE totalTriggerNr identical.";
479  m_myCoutStream << "\n totalTriggerNr() = " << totalTriggerNrData;
480  m_myCoutStream << "\n";
481 
482  } else {
483  m_myCoutStream << "\n" << recString
484  << " Data and emulated GTFE totalTriggerNr different.";
485  m_myCoutStream << "\n Data: totalTriggerNr() = " << totalTriggerNrData;
486  m_myCoutStream << "\n Emul: totalTriggerNr() = " << totalTriggerNrEmul;
487  m_myCoutStream << "\n";
488  m_gtfeDataEmul[iRec]->Fill(7);
489 
490  }
491 
492  edm::LogInfo("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
493  m_myCoutStream.str("");
494  m_myCoutStream.clear();
495 
496 }
497 
498 //compare the FDL board
500  const edm::EventSetup& evSetup, const L1GtFdlWord& fdlBlockData,
501  const L1GtFdlWord& fdlBlockEmul, const int iRec) {
502 
503  // index of physics partition
504  int PhysicsPartition = 0;
505 
506  //
507  std::string recString;
508  if (iRec == 0) {
509  recString = "DAQ";
510  } else {
511  recString = "EVM";
512  }
513 
514  if (fdlBlockData == fdlBlockEmul) {
515  m_myCoutStream << "\n" << recString
516  << " Data and emulated FDL blocks: identical.\n";
517  fdlBlockData.print(m_myCoutStream);
518 
519  } else {
520  m_myCoutStream << "\n" << recString
521  << " Data and emulated FDL blocks: different.\n";
522 
523  m_myCoutStream << "\nData: FDL block\n";
524  fdlBlockData.print(m_myCoutStream);
525 
526  m_myCoutStream << "\nEmul: FDL block\n";
527  fdlBlockEmul.print(m_myCoutStream);
528 
529  }
530 
531  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
532 
533  m_myCoutStream.str("");
534  m_myCoutStream.clear();
535 
536  // get bunch cross in the GT event record -
537  // move it first as histograms are BxInEvent dependent
538  const int bxInEventData = fdlBlockData.bxInEvent();
539  const int bxInEventEmul = fdlBlockEmul.bxInEvent();
540 
541  bool matchBxInEvent = false;
542 
543  if (bxInEventData == bxInEventEmul) {
544  m_myCoutStream << "\n" << recString
545  << " Data and emulated FDL bxInEvent identical.";
546  m_myCoutStream << "\n bxInEvent() = " << bxInEventData;
547  m_myCoutStream << "\n";
548  matchBxInEvent = true;
549 
550  } else {
551  m_myCoutStream << "\n" << recString
552  << " Data and emulated FDL bxInEvent different.";
553  m_myCoutStream << "\n Data: bxInEvent() = " << bxInEventData;
554  m_myCoutStream << "\n Emul: bxInEvent() = " << bxInEventEmul;
555  m_myCoutStream << "\n";
556 
557  m_fdlDataEmul_Err[iRec]->Fill(1);
558  }
559 
560  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
561  m_myCoutStream.str("");
562  m_myCoutStream.clear();
563 
564  // symmetrize
565  bool validBxInEvent = false;
566  int histIndex = bxInEventData + (TotalBxInEvent + 1) / 2 - 1;
567  LogDebug("L1GtHwValidation") << "\n Convert bxInEvent = " << bxInEventData
568  << " to histIndex = " << histIndex << std::endl;
569  if ((histIndex <= TotalBxInEvent) && (histIndex >= 0)) {
570  validBxInEvent = true;
571  }
572 
573  // loop over algorithms and increase the corresponding counters
574 
575  // get BoardId value
576  const boost::uint16_t boardIdData = fdlBlockData.boardId();
577  const boost::uint16_t boardIdEmul = fdlBlockEmul.boardId();
578 
579  if (boardIdData == boardIdEmul) {
580  m_myCoutStream << "\n" << recString
581  << " Data and emulated FDL boardId identical.";
582  m_myCoutStream << "\n boardId() = " << std::hex << "0x" << std::setw(4)
583  << std::setfill('0') << boardIdData << std::setfill(' ')
584  << std::dec;
585  m_myCoutStream << "\n";
586 
587  } else {
588  m_myCoutStream << "\n" << recString
589  << " Data and emulated FDL boardId different.";
590  m_myCoutStream << "\n Data: boardId() = " << std::hex << "0x"
591  << std::setw(4) << std::setfill('0') << boardIdData
592  << std::setfill(' ') << std::dec;
593  m_myCoutStream << "\n Emul: boardId() = " << std::hex << "0x"
594  << std::setw(4) << std::setfill('0') << boardIdEmul
595  << std::setfill(' ') << std::dec;
596  m_myCoutStream << "\n";
597 
598  if (matchBxInEvent && validBxInEvent) {
599  m_fdlDataEmul[histIndex][iRec]->Fill(0);
600  } else {
601  m_fdlDataEmul_Err[iRec]->Fill(0);
602  }
603 
604  }
605 
606  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
607  m_myCoutStream.str("");
608  m_myCoutStream.clear();
609 
610  // get BxNr - bunch cross number of the actual bx
611  const boost::uint16_t bxNrData = fdlBlockData.bxNr();
612  const boost::uint16_t bxNrEmul = fdlBlockEmul.bxNr();
613 
614  if (bxNrData == bxNrEmul) {
615  m_myCoutStream << "\n" << recString
616  << " Data and emulated FDL bxNr identical.";
617  m_myCoutStream << "\n bxNr() = " << bxNrData;
618  m_myCoutStream << "\n";
619 
620  } else {
621  m_myCoutStream << "\n" << recString
622  << " Data and emulated FDL bxNr different.";
623  m_myCoutStream << "\n Data: bxNr() = " << bxNrData;
624  m_myCoutStream << "\n Emul: bxNr() = " << bxNrEmul;
625  m_myCoutStream << "\n";
626 
627  if (matchBxInEvent && validBxInEvent) {
628  m_fdlDataEmul[histIndex][iRec]->Fill(2);
629  } else {
630  m_fdlDataEmul_Err[iRec]->Fill(2);
631  }
632  }
633 
634  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
635  m_myCoutStream.str("");
636  m_myCoutStream.clear();
637 
638  // get event number since last L1 reset generated in FDL
639  const boost::uint32_t eventNrData = fdlBlockData.eventNr();
640  const boost::uint32_t eventNrEmul = fdlBlockEmul.eventNr();
641 
642  if (eventNrData == eventNrEmul) {
643  m_myCoutStream << "\n" << recString
644  << " Data and emulated FDL eventNr identical.";
645  m_myCoutStream << "\n eventNr() = " << eventNrData;
646  m_myCoutStream << "\n";
647 
648  } else {
649  m_myCoutStream << "\n" << recString
650  << " Data and emulated FDL eventNr different.";
651  m_myCoutStream << "\n Data: eventNr() = " << eventNrData;
652  m_myCoutStream << "\n Emul: eventNr() = " << eventNrEmul;
653  m_myCoutStream << "\n";
654 
655  if (matchBxInEvent && validBxInEvent) {
656  m_fdlDataEmul[histIndex][iRec]->Fill(3);
657  } else {
658  m_fdlDataEmul_Err[iRec]->Fill(3);
659  }
660 
661  }
662 
663  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
664  m_myCoutStream.str("");
665  m_myCoutStream.clear();
666 
667  // get technical trigger bits
668  const TechnicalTriggerWord& gtTechnicalTriggerWordData =
669  fdlBlockData.gtTechnicalTriggerWord();
670  const TechnicalTriggerWord& gtTechnicalTriggerWordEmul =
671  fdlBlockEmul.gtTechnicalTriggerWord();
672 
673  int nTechBits = gtTechnicalTriggerWordData.size();
674 
675  TechnicalTriggerWord gtTechnicalTriggerWordDataMask(nTechBits);
676  TechnicalTriggerWord gtTechnicalTriggerWordEmulMask(nTechBits);
677 
678  unsigned int bitValue = 0;
679 
680  if (matchBxInEvent && validBxInEvent) {
681  for (int iBit = 0; iBit < nTechBits; ++iBit) {
682 
683  unsigned int triggerMask = (m_triggerMaskTechTrig.at(iBit)) & (1
684  << PhysicsPartition);
685 
686  if (gtTechnicalTriggerWordData[iBit]) {
687  m_fdlDataTechDecision[histIndex][iRec]->Fill(iBit);
688 
689  bitValue = (triggerMask) ? 0 : 1;
690  gtTechnicalTriggerWordDataMask[iBit] = bitValue;
691  if (bitValue) {
692  m_fdlDataTechDecisionMask[histIndex][iRec]->Fill(iBit);
693  }
694  }
695 
696  if (gtTechnicalTriggerWordEmul.at(iBit)) {
697  m_fdlEmulTechDecision[histIndex][iRec]->Fill(iBit);
698 
699  bitValue = (triggerMask) ? 0 : 1;
700  gtTechnicalTriggerWordEmulMask[iBit] = bitValue;
701  if (bitValue) {
702  m_fdlEmulTechDecisionMask[histIndex][iRec]->Fill(iBit);
703  }
704  }
705  }
706  } else {
707  for (int iBit = 0; iBit < nTechBits; ++iBit) {
708 
709  if (gtTechnicalTriggerWordData[iBit]) {
710  m_fdlDataTechDecision_Err[iRec]->Fill(iBit);
711  }
712 
713  if (gtTechnicalTriggerWordEmul.at(iBit)) {
714  m_fdlEmulTechDecision_Err[iRec]->Fill(iBit);
715  }
716  }
717  }
718 
719  if (gtTechnicalTriggerWordData == gtTechnicalTriggerWordEmul) {
720  m_myCoutStream << "\n" << recString
721  << " Data and emulated FDL gtTechnicalTriggerWord identical.\n";
723  m_myCoutStream << "\n";
724 
725  } else {
726  m_myCoutStream << "\n" << recString
727  << " Data and emulated FDL gtTechnicalTriggerWord different.";
728  m_myCoutStream << "\n Data: ";
730  m_myCoutStream << "\n Emul: ";
732  m_myCoutStream << "\n";
733 
734  if (matchBxInEvent && validBxInEvent) {
735  m_fdlDataEmul[histIndex][iRec]->Fill(4);
736  } else {
737  m_fdlDataEmul_Err[iRec]->Fill(4);
738  }
739 
740  if (matchBxInEvent && validBxInEvent) {
741  for (int iBit = 0; iBit < nTechBits; ++iBit) {
742  if (gtTechnicalTriggerWordData[iBit]
743  != gtTechnicalTriggerWordEmul.at(iBit)) {
744  m_fdlDataEmulTechDecision[histIndex][iRec]->Fill(iBit);
745  }
746  }
747  } else {
748  for (int iBit = 0; iBit < nTechBits; ++iBit) {
749  if (gtTechnicalTriggerWordData[iBit]
750  != gtTechnicalTriggerWordEmul.at(iBit)) {
751  m_fdlDataEmulTechDecision_Err[iRec]->Fill(iBit);
752  }
753  }
754  }
755  }
756 
757  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
758  m_myCoutStream.str("");
759  m_myCoutStream.clear();
760 
761  if (gtTechnicalTriggerWordDataMask == gtTechnicalTriggerWordEmulMask) {
762  m_myCoutStream << "\n" << recString
763  << " Data and emulated FDL gtTechnicalTriggerWord after mask identical.\n";
764  m_myCoutStream << "\n";
765 
766  } else {
767  m_myCoutStream << "\n" << recString
768  << " Data and emulated FDL gtTechnicalTriggerWord after mask different.";
769  m_myCoutStream << "\n Data: ";
770  m_myCoutStream << "\n Emul: ";
771  m_myCoutStream << "\n";
772 
773  if (matchBxInEvent && validBxInEvent) {
774  m_fdlDataEmul[histIndex][iRec]->Fill(5);
775  } else {
776  m_fdlDataEmul_Err[iRec]->Fill(5);
777  }
778 
779  if (matchBxInEvent && validBxInEvent) {
780  for (int iBit = 0; iBit < nTechBits; ++iBit) {
781  if (gtTechnicalTriggerWordData[iBit]
782  != gtTechnicalTriggerWordEmul.at(iBit)) {
783  m_fdlDataEmulTechDecisionMask[histIndex][iRec]->Fill(iBit);
784  }
785  }
786  }
787  }
788 
789  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
790  m_myCoutStream.str("");
791  m_myCoutStream.clear();
792 
793  // get algorithms bits (decision word)
794  const DecisionWord& gtDecisionWordData = fdlBlockData.gtDecisionWord();
795  const DecisionWord& gtDecisionWordEmul = fdlBlockEmul.gtDecisionWord();
796 
797  int nAlgoBits = gtDecisionWordData.size();
798 
799  DecisionWord gtDecisionWordDataMask(nAlgoBits);
800  DecisionWord gtDecisionWordEmulMask(nAlgoBits);
801 
802  // get the index of the prescale factor set from data
803  int iPfSet = fdlBlockData.gtPrescaleFactorIndexAlgo();
804  const std::vector<int>& prescaleFactorsAlgoTrig =
805  (*m_prescaleFactorsAlgoTrig).at(iPfSet);
806 
807 
808  if (matchBxInEvent && validBxInEvent) {
809 
810  for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
811 
812  unsigned int triggerMask = (m_triggerMaskAlgoTrig.at(iBit)) & (1
813  << PhysicsPartition);
814 
815  int prescaleFactor = prescaleFactorsAlgoTrig.at(iBit);
816 
817  LogTrace("L1GtHwValidation") << "Bit " << iBit
818  << ": prescale factor = " << prescaleFactor
819  << " trigger mask = " << triggerMask << std::endl;
820 
821  if (gtDecisionWordData[iBit]) {
822  m_fdlDataAlgoDecision[histIndex][iRec]->Fill(iBit);
823 
824  if (prescaleFactor == 1) {
825  m_fdlDataAlgoDecisionUnprescaled[histIndex][iRec]->Fill(
826  iBit);
827  } else {
828  m_fdlDataAlgoDecisionPrescaled[histIndex][iRec]->Fill(iBit);
829  }
830 
831  bitValue = (triggerMask) ? 0 : 1;
832  gtDecisionWordDataMask[iBit] = bitValue;
833  if (bitValue) {
834  m_fdlDataAlgoDecisionMask[histIndex][iRec]->Fill(iBit);
835  }
836  }
837 
838  if (gtDecisionWordEmul.at(iBit)) {
839  m_fdlEmulAlgoDecision[histIndex][iRec]->Fill(iBit);
840 
841  bitValue = (triggerMask) ? 0 : 1;
842  gtDecisionWordEmulMask[iBit] = bitValue;
843  if (bitValue) {
844  m_fdlEmulAlgoDecisionMask[histIndex][iRec]->Fill(iBit);
845  }
846  }
847  }
848  } else {
849  for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
850  if (gtDecisionWordData[iBit]) {
851  m_fdlDataAlgoDecision_Err[iRec]->Fill(iBit);
852  }
853  }
854 
855  for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
856  if (gtDecisionWordEmul.at(iBit)) {
857  m_fdlEmulAlgoDecision_Err[iRec]->Fill(iBit);
858  }
859  }
860  }
861 
862  if (gtDecisionWordData == gtDecisionWordEmul) {
863  m_myCoutStream << "\n" << recString
864  << " Data and emulated FDL gtDecisionWord identical.";
865  fdlBlockData.printGtDecisionWord(m_myCoutStream);
866  m_myCoutStream << "\n";
867 
868  } else {
869  m_myCoutStream << "\n" << recString
870  << " Data and emulated FDL gtDecisionWord different.";
871  m_myCoutStream << "\n Data: ";
872  fdlBlockData.printGtDecisionWord(m_myCoutStream);
873  m_myCoutStream << "\n Emul: ";
874  fdlBlockEmul.printGtDecisionWord(m_myCoutStream);
875  m_myCoutStream << "\n";
876 
877  if (matchBxInEvent && validBxInEvent) {
878  m_fdlDataEmul[histIndex][iRec]->Fill(6);
879  } else {
880  m_fdlDataEmul_Err[iRec]->Fill(6);
881  }
882 
883  if (matchBxInEvent && validBxInEvent) {
884  for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
885 
886  int prescaleFactor = prescaleFactorsAlgoTrig.at(iBit);
887 
888  if (gtDecisionWordData[iBit] != gtDecisionWordEmul.at(iBit)) {
889 
890  m_fdlDataEmulAlgoDecision[histIndex][iRec]->Fill(iBit);
891 
892  if (prescaleFactor == 1) {
893  m_fdlDataEmulAlgoDecisionUnprescaled[histIndex][iRec]->Fill(
894  iBit);
895  } else {
896  m_fdlDataEmulAlgoDecisionPrescaled[histIndex][iRec]->Fill(
897  iBit);
898  }
899 
900  if (gtDecisionWordData[iBit]) {
901  m_fdlDataAlgoDecision_NoMatch[histIndex][iRec]->Fill(
902  iBit);
903 
904  if (prescaleFactor == 1) {
906  iBit);
907  } else {
909  iBit);
910  }
911 
912  } else {
913  m_fdlEmulAlgoDecision_NoMatch[histIndex][iRec]->Fill(
914  iBit);
915 
916  if (prescaleFactor == 1) {
918  iBit);
919  } else {
921  iBit);
922  }
923  }
924  }
925  }
926  } else {
927  for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
928  if (gtDecisionWordData[iBit] != gtDecisionWordEmul.at(iBit)) {
929  m_fdlDataEmulAlgoDecision_Err[iRec]->Fill(iBit);
930  }
931  }
932  }
933 
934  }
935 
936  if (gtDecisionWordDataMask == gtDecisionWordEmulMask) {
937  m_myCoutStream << "\n" << recString
938  << " Data and emulated FDL gtDecisionWord after mask identical.";
939  m_myCoutStream << "\n";
940 
941  } else {
942  m_myCoutStream << "\n" << recString
943  << " Data and emulated FDL gtDecisionWord after mask different.";
944  m_myCoutStream << "\n Data: ";
945  m_myCoutStream << "\n Emul: ";
946  m_myCoutStream << "\n";
947 
948  if (matchBxInEvent && validBxInEvent) {
949  m_fdlDataEmul[histIndex][iRec]->Fill(7);
950  } else {
951  m_fdlDataEmul_Err[iRec]->Fill(7);
952  }
953 
954  if (matchBxInEvent && validBxInEvent) {
955  for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
956  if (gtDecisionWordDataMask[iBit] != gtDecisionWordEmulMask.at(
957  iBit)) {
958  m_fdlDataEmulAlgoDecisionMask[histIndex][iRec]->Fill(iBit);
959  }
960  }
961  }
962 
963  }
964 
965  // get extended algorithms bits (extended decision word)
966  const DecisionWordExtended gtDecisionWordExtendedData =
967  fdlBlockData.gtDecisionWordExtended();
968  const DecisionWordExtended gtDecisionWordExtendedEmul =
969  fdlBlockEmul.gtDecisionWordExtended();
970 
971  if (gtDecisionWordExtendedData == gtDecisionWordExtendedEmul) {
972  m_myCoutStream << "\n" << recString
973  << " Data and emulated FDL gtDecisionWordExtended identical.\n";
975  m_myCoutStream << "\n";
976 
977  } else {
978  m_myCoutStream << "\n" << recString
979  << " Data and emulated FDL gtDecisionWordExtended different.\n";
980  m_myCoutStream << "\n Data: ";
982  m_myCoutStream << "\n Emul: ";
984  m_myCoutStream << "\n";
985 
986  if (matchBxInEvent && validBxInEvent) {
987  m_fdlDataEmul[histIndex][iRec]->Fill(8);
988  } else {
989  m_fdlDataEmul_Err[iRec]->Fill(8);
990  }
991 
992  }
993 
994  // get NoAlgo
995  const boost::uint16_t noAlgoData = fdlBlockData.noAlgo();
996  const boost::uint16_t noAlgoEmul = fdlBlockEmul.noAlgo();
997 
998  if (noAlgoData == noAlgoEmul) {
999  m_myCoutStream << "\n" << recString
1000  << " Data and emulated FDL noAlgo identical.";
1001  m_myCoutStream << "\n noAlgo() = " << noAlgoData;
1002  m_myCoutStream << "\n";
1003 
1004  } else {
1005  m_myCoutStream << "\n" << recString
1006  << " Data and emulated FDL noAlgo different.";
1007  m_myCoutStream << "\n Data: noAlgo() = " << noAlgoData;
1008  m_myCoutStream << "\n Emul: noAlgo() = " << noAlgoEmul;
1009  m_myCoutStream << "\n";
1010 
1011  if (matchBxInEvent && validBxInEvent) {
1012  m_fdlDataEmul[histIndex][iRec]->Fill(9);
1013  } else {
1014  m_fdlDataEmul_Err[iRec]->Fill(9);
1015  }
1016 
1017  }
1018 
1019  // get "Final OR" bits
1020  const boost::uint16_t finalORData = fdlBlockData.finalOR();
1021  const boost::uint16_t finalOREmul = fdlBlockEmul.finalOR();
1022 
1023  if (finalORData == finalOREmul) {
1024  m_myCoutStream << "\n" << recString
1025  << " Data and emulated FDL finalOR identical.";
1026  m_myCoutStream << "\n finalOR() = " << std::hex << "0x" << std::setw(2)
1027  << std::setfill('0') << finalORData << std::setfill(' ')
1028  << std::dec;
1029  m_myCoutStream << "\n";
1030 
1031  } else {
1032  m_myCoutStream << "\n" << recString
1033  << " Data and emulated FDL finalOR different.";
1034  m_myCoutStream << "\n Data: finalOR() = " << std::hex << "0x"
1035  << std::setw(2) << std::setfill('0') << finalORData
1036  << std::setfill(' ') << std::dec;
1037  m_myCoutStream << "\n Emul: finalOR() = " << std::hex << "0x"
1038  << std::setw(2) << std::setfill('0') << finalOREmul
1039  << std::setfill(' ') << std::dec;
1040  m_myCoutStream << "\n";
1041 
1042  if (matchBxInEvent && validBxInEvent) {
1043  m_fdlDataEmul[histIndex][iRec]->Fill(10);
1044  } else {
1045  m_fdlDataEmul_Err[iRec]->Fill(10);
1046  }
1047 
1048  }
1049 
1050  // get "Final OR" for physics partition
1051  const int finalORPhysData = finalORData & (1 << PhysicsPartition);
1052  const int finalORPhysEmul = finalOREmul & (1 << PhysicsPartition);
1053 
1054  if (finalORPhysData == finalORPhysEmul) {
1055  m_myCoutStream << "\n" << recString
1056  << " Data and emulated FDL finalOR for the physics partition identical.";
1057  m_myCoutStream << "\n finalOR() = " << finalORPhysData;
1058  m_myCoutStream << "\n";
1059 
1060  } else {
1061  m_myCoutStream << "\n" << recString
1062  << " Data and emulated FDL finalOR for the physics partition different.";
1063  m_myCoutStream << "\n Data: finalOR() = " << finalORPhysData;
1064  m_myCoutStream << "\n Emul: finalOR() = " << finalORPhysEmul;
1065  m_myCoutStream << "\n";
1066 
1067  if (matchBxInEvent && validBxInEvent) {
1068  m_fdlDataEmul[histIndex][iRec]->Fill(11);
1069  } else {
1070  m_fdlDataEmul_Err[iRec]->Fill(11);
1071  }
1072 
1073  }
1074 
1075  // get local bunch cross number of the actual bx
1076  const boost::uint16_t localBxNrData = fdlBlockData.localBxNr();
1077  const boost::uint16_t localBxNrEmul = fdlBlockEmul.localBxNr();
1078 
1079  if (localBxNrData == localBxNrEmul) {
1080  m_myCoutStream << "\n" << recString
1081  << " Data and emulated FDL localBxNr identical.";
1082  m_myCoutStream << "\n localBxNr() = " << localBxNrData;
1083  m_myCoutStream << "\n";
1084 
1085  } else {
1086  m_myCoutStream << "\n" << recString
1087  << " Data and emulated FDL localBxNr different.";
1088  m_myCoutStream << "\n Data: localBxNr() = " << localBxNrData;
1089  m_myCoutStream << "\n Emul: localBxNr() = " << localBxNrEmul;
1090  m_myCoutStream << "\n";
1091 
1092  if (matchBxInEvent && validBxInEvent) {
1093  m_fdlDataEmul[histIndex][iRec]->Fill(12);
1094  } else {
1095  m_fdlDataEmul_Err[iRec]->Fill(12);
1096  }
1097 
1098  }
1099 
1100  edm::LogInfo("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1101  m_myCoutStream.str("");
1102  m_myCoutStream.clear();
1103 
1104 }
1105 
1106 //compare the PSB board
1108  const edm::EventSetup& evSetup, const L1GtPsbWord& psbBlockData,
1109  const L1GtPsbWord& psbBlockEmul) {
1110 
1111  if (psbBlockData == psbBlockEmul) {
1112  m_myCoutStream << "\nData and emulated PSB blocks: identical.\n";
1113  psbBlockData.print(m_myCoutStream);
1114 
1115  } else {
1116  m_myCoutStream << "\nData and emulated PSB blocks: different.\n";
1117 
1118  m_myCoutStream << "\nData: PSB block\n";
1119  psbBlockData.print(m_myCoutStream);
1120 
1121  m_myCoutStream << "\nEmul: PSB block\n";
1122  psbBlockEmul.print(m_myCoutStream);
1123 
1124  }
1125 
1126  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1127 
1128  m_myCoutStream.str("");
1129  m_myCoutStream.clear();
1130 
1131  // get BoardId value
1132  const boost::uint16_t boardIdData = psbBlockData.boardId();
1133  const boost::uint16_t boardIdEmul = psbBlockEmul.boardId();
1134 
1135  if (boardIdData == boardIdEmul) {
1136  m_myCoutStream << "\nData and emulated PSB boardId identical.";
1137  m_myCoutStream << "\n boardId() = " << std::hex << "0x" << std::setw(4)
1138  << std::setfill('0') << boardIdData << std::setfill(' ')
1139  << std::dec;
1140  m_myCoutStream << "\n";
1141 
1142  } else {
1143  m_myCoutStream << "\nData and emulated PSB boardId different.";
1144  m_myCoutStream << "\n Data: boardId() = " << std::hex << "0x"
1145  << std::setw(4) << std::setfill('0') << boardIdData
1146  << std::setfill(' ') << std::dec;
1147  m_myCoutStream << "\n Emul: boardId() = " << std::hex << "0x"
1148  << std::setw(4) << std::setfill('0') << boardIdEmul
1149  << std::setfill(' ') << std::dec;
1150  m_myCoutStream << "\n";
1151 
1152  }
1153 
1154  // get bunch cross in the GT event record
1155  const int bxInEventData = psbBlockData.bxInEvent();
1156  const int bxInEventEmul = psbBlockEmul.bxInEvent();
1157 
1158  if (bxInEventData == bxInEventEmul) {
1159  m_myCoutStream << "\nData and emulated PSB bxInEvent identical.";
1160  m_myCoutStream << "\n bxInEvent() = " << bxInEventData;
1161  m_myCoutStream << "\n";
1162 
1163  } else {
1164  m_myCoutStream << "\nData and emulated PSB bxInEvent different.";
1165  m_myCoutStream << "\n Data: bxInEvent() = " << bxInEventData;
1166  m_myCoutStream << "\n Emul: bxInEvent() = " << bxInEventEmul;
1167  m_myCoutStream << "\n";
1168 
1169  }
1170 
1171  // get BxNr - bunch cross number of the actual bx
1172  const boost::uint16_t bxNrData = psbBlockData.bxNr();
1173  const boost::uint16_t bxNrEmul = psbBlockEmul.bxNr();
1174 
1175  if (bxNrData == bxNrEmul) {
1176  m_myCoutStream << "\nData and emulated PSB bxNr identical.";
1177  m_myCoutStream << "\n bxNr() = " << bxNrData;
1178  m_myCoutStream << "\n";
1179 
1180  } else {
1181  m_myCoutStream << "\nData and emulated PSB bxNr different.";
1182  m_myCoutStream << "\n Data: bxNr() = " << bxNrData;
1183  m_myCoutStream << "\n Emul: bxNr() = " << bxNrEmul;
1184  m_myCoutStream << "\n";
1185 
1186  }
1187 
1188  // get event number since last L1 reset generated in FDL
1189  const boost::uint32_t eventNrData = psbBlockData.eventNr();
1190  const boost::uint32_t eventNrEmul = psbBlockEmul.eventNr();
1191 
1192  if (eventNrData == eventNrEmul) {
1193  m_myCoutStream << "\nData and emulated PSB eventNr identical.";
1194  m_myCoutStream << "\n eventNr() = " << eventNrData;
1195  m_myCoutStream << "\n";
1196 
1197  } else {
1198  m_myCoutStream << "\nData and emulated PSB eventNr different.";
1199  m_myCoutStream << "\n Data: eventNr() = " << eventNrData;
1200  m_myCoutStream << "\n Emul: eventNr() = " << eventNrEmul;
1201  m_myCoutStream << "\n";
1202 
1203  }
1204 
1206  boost::uint16_t valData;
1207  boost::uint16_t valEmul;
1208 
1209  for (int iA = 0; iA < psbBlockData.NumberAData; ++iA) {
1210  valData = psbBlockData.aData(iA);
1211  valEmul = psbBlockEmul.aData(iA);
1212 
1213  if (valData == valEmul) {
1214  m_myCoutStream << "\nData and emulated PSB aData(" << iA
1215  << ") identical.";
1216  m_myCoutStream << "\n aData(iA) = " << std::hex << "0x"
1217  << std::setw(4) << std::setfill('0') << valData
1218  << std::setfill(' ') << std::dec;
1219  m_myCoutStream << "\n";
1220 
1221  } else {
1222  m_myCoutStream << "\nData and emulated PSB aData(" << iA
1223  << ") different.";
1224  m_myCoutStream << "\n Data: aData(iA) = " << std::hex << "0x"
1225  << std::setw(4) << std::setfill('0') << valData
1226  << std::setfill(' ') << std::dec;
1227  m_myCoutStream << "\n Emul: aData(iA) = " << std::hex << "0x"
1228  << std::setw(4) << std::setfill('0') << valEmul
1229  << std::setfill(' ') << std::dec;
1230  m_myCoutStream << "\n";
1231 
1232  }
1233 
1234  }
1235 
1237  for (int iB = 0; iB < psbBlockData.NumberBData; ++iB) {
1238  valData = psbBlockData.bData(iB);
1239  valEmul = psbBlockEmul.bData(iB);
1240 
1241  if (valData == valEmul) {
1242  m_myCoutStream << "\nData and emulated PSB bData(" << iB
1243  << ") identical.";
1244  m_myCoutStream << "\n bData(iA) = " << std::hex << "0x"
1245  << std::setw(4) << std::setfill('0') << valData
1246  << std::setfill(' ') << std::dec;
1247  m_myCoutStream << "\n";
1248 
1249  } else {
1250  m_myCoutStream << "\nData and emulated PSB bData(" << iB
1251  << ") different.";
1252  m_myCoutStream << "\n Data: bData(iA) = " << std::hex << "0x"
1253  << std::setw(4) << std::setfill('0') << valData
1254  << std::setfill(' ') << std::dec;
1255  m_myCoutStream << "\n Emul: bData(iA) = " << std::hex << "0x"
1256  << std::setw(4) << std::setfill('0') << valEmul
1257  << std::setfill(' ') << std::dec;
1258  m_myCoutStream << "\n";
1259 
1260  }
1261 
1262  }
1263 
1264  // get local bunch cross number of the actual bx
1265  const boost::uint16_t localBxNrData = psbBlockData.localBxNr();
1266  const boost::uint16_t localBxNrEmul = psbBlockEmul.localBxNr();
1267 
1268  if (localBxNrData == localBxNrEmul) {
1269  m_myCoutStream << "\nData and emulated PSB localBxNr identical.";
1270  m_myCoutStream << "\n localBxNr() = " << localBxNrData;
1271  m_myCoutStream << "\n";
1272 
1273  } else {
1274  m_myCoutStream << "\nData and emulated PSB localBxNr different.";
1275  m_myCoutStream << "\n Data: localBxNr() = " << localBxNrData;
1276  m_myCoutStream << "\n Emul: localBxNr() = " << localBxNrEmul;
1277  m_myCoutStream << "\n";
1278 
1279  }
1280 
1281  edm::LogInfo("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1282  m_myCoutStream.str("");
1283  m_myCoutStream.clear();
1284 
1285 }
1286 
1287 //compare the TCS board
1289  const edm::EventSetup& evSetup, const L1TcsWord&, const L1TcsWord&) {
1290  // empty
1291 }
1292 
1293 //L1 GT DAQ record comparison
1295  const edm::EventSetup& evSetup) {
1296 
1297  // formal index for DAQ record
1298  int iRec = 0;
1299 
1300  // get the L1 GT hardware DAQ record L1GlobalTriggerReadoutRecord
1301  edm::Handle<L1GlobalTriggerReadoutRecord> gtReadoutRecordData;
1302  iEvent.getByLabel(m_l1GtDataDaqInputTag, gtReadoutRecordData);
1303 
1304  bool validData = false;
1305 
1306  if (!gtReadoutRecordData.isValid()) {
1308  } else {
1309  validData = true;
1310  }
1311 
1312  // get the L1 GT emulator DAQ record L1GlobalTriggerReadoutRecord
1313  edm::Handle<L1GlobalTriggerReadoutRecord> gtReadoutRecordEmul;
1314  iEvent.getByLabel(m_l1GtEmulDaqInputTag, gtReadoutRecordEmul);
1315 
1316  bool validEmul = false;
1317 
1318  if (!gtReadoutRecordEmul.isValid()) {
1320  } else {
1321  validEmul = true;
1322  }
1323 
1324  if ((!validData) || (!validEmul)) {
1325  edm::LogWarning("L1GtHwValidation")
1326  << "\n No valid product found: DAQ L1GlobalTriggerReadoutRecord"
1327  << "\n Data validity [1 = true; 0 = false]: " << validData
1328  << "\n Emulator validity: [1 = true; 0 = false]: "
1329  << validEmul << "\n DAQ histograms will not be filled.\n"
1330  << std::endl;
1331 
1332  return;
1333  }
1334 
1335  // compare GTFE
1336  const L1GtfeWord& gtfeBlockData = gtReadoutRecordData->gtfeWord();
1337  const L1GtfeWord& gtfeBlockEmul = gtReadoutRecordEmul->gtfeWord();
1338 
1339  compareGTFE(iEvent, evSetup, gtfeBlockData, gtfeBlockEmul, iRec);
1340 
1341  // FDL comparison
1342  const std::vector<L1GtFdlWord>& gtFdlVectorData =
1343  gtReadoutRecordData->gtFdlVector();
1344  const std::vector<L1GtFdlWord>& gtFdlVectorEmul =
1345  gtReadoutRecordEmul->gtFdlVector();
1346 
1347  int gtFdlVectorDataSize = gtFdlVectorData.size();
1348  int gtFdlVectorEmulSize = gtFdlVectorEmul.size();
1349 
1350  if (gtFdlVectorDataSize == gtFdlVectorEmulSize) {
1351  m_myCoutStream << "\nData and emulated FDL vector size: identical.\n";
1352  m_myCoutStream << " Size: " << gtFdlVectorDataSize << std::endl;
1353 
1354  for (int iFdl = 0; iFdl < gtFdlVectorDataSize; ++iFdl) {
1355 
1356  const L1GtFdlWord& fdlBlockData = gtFdlVectorData[iFdl];
1357  const L1GtFdlWord& fdlBlockEmul = gtFdlVectorEmul[iFdl];
1358 
1359  compareFDL(iEvent, evSetup, fdlBlockData, fdlBlockEmul, iRec);
1360  }
1361  } else {
1362  m_myCoutStream << "\nData and emulated FDL vector size: different.\n";
1363  m_myCoutStream << " Data: size = " << gtFdlVectorDataSize << std::endl;
1364  m_myCoutStream << " Emul: size = " << gtFdlVectorEmulSize << std::endl;
1365 
1366  }
1367 
1368  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1369 
1370  m_myCoutStream.str("");
1371  m_myCoutStream.clear();
1372 
1373  // PSB comparison
1374  const std::vector<L1GtPsbWord>& gtPsbVectorData =
1375  gtReadoutRecordData->gtPsbVector();
1376  const std::vector<L1GtPsbWord>& gtPsbVectorEmul =
1377  gtReadoutRecordEmul->gtPsbVector();
1378 
1379  int gtPsbVectorDataSize = gtPsbVectorData.size();
1380  int gtPsbVectorEmulSize = gtPsbVectorEmul.size();
1381 
1382  if (gtPsbVectorDataSize == gtPsbVectorEmulSize) {
1383  m_myCoutStream << "\nData and emulated PSB vector size: identical.\n";
1384  m_myCoutStream << " Size: " << gtPsbVectorDataSize << std::endl;
1385  } else {
1386  m_myCoutStream << "\nData and emulated PSB vector size: different.\n";
1387  m_myCoutStream << " Data: size = " << gtPsbVectorDataSize << std::endl;
1388  m_myCoutStream << " Emul: size = " << gtPsbVectorEmulSize << std::endl;
1389 
1390  }
1391 
1392  // the order of PSB block in the gtPsbVector is different in emulator and in data
1393  // in emulator: all active PSB in one BxInEvent, ordered L1A-1, L1A, L1A+1
1394  // in unpacker: every PSB in all BxInEvent
1395  for (int iPsb = 0; iPsb < gtPsbVectorDataSize; ++iPsb) {
1396 
1397  const L1GtPsbWord& psbBlockData = gtPsbVectorData[iPsb];
1398  const boost::uint16_t boardIdData = psbBlockData.boardId();
1399  const int bxInEventData = psbBlockData.bxInEvent();
1400 
1401  // search the corresponding PSB in the emulated record using the
1402  // BoardId and the BxInEvent
1403 
1404  bool foundPSB = false;
1405 
1406  for (int iPsbF = 0; iPsbF < gtPsbVectorEmulSize; ++iPsbF) {
1407 
1408  const L1GtPsbWord& psbBlockEmul = gtPsbVectorEmul[iPsbF];
1409  const boost::uint16_t boardIdEmul = psbBlockEmul.boardId();
1410  const int bxInEventEmul = psbBlockEmul.bxInEvent();
1411 
1412  if ((boardIdEmul == boardIdData)
1413  && (bxInEventData == bxInEventEmul)) {
1414 
1415  foundPSB = true;
1416 
1417  // compare the boards
1418  comparePSB(iEvent, evSetup, psbBlockData, psbBlockEmul);
1419  }
1420 
1421  }
1422 
1423  if (!foundPSB) {
1424  m_myCoutStream << "\nNo emulated PSB with boardId() = " << std::hex
1425  << "0x" << std::setw(4) << std::setfill('0') << boardIdData
1426  << std::setfill(' ') << std::dec << " and BxInEvent = "
1427  << bxInEventData << " was found";
1428 
1429  }
1430 
1431  }
1432 
1433  edm::LogInfo("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1434 
1435  m_myCoutStream.str("");
1436  m_myCoutStream.clear();
1437 
1438 }
1439 
1440 // L1 GT EVM record comparison
1442  const edm::EventSetup& evSetup) {
1443 
1444  // formal index for EVM record
1445  int iRec = 1;
1446 
1447  // get the L1 GT hardware EVM record L1GlobalTriggerEvmReadoutRecord
1449  iEvent.getByLabel(m_l1GtDataEvmInputTag, gtReadoutRecordData);
1450 
1451  bool validData = false;
1452 
1453  if (!gtReadoutRecordData.isValid()) {
1455  } else {
1456  validData = true;
1457  }
1458 
1459  // get the L1 GT emulator EVM record L1GlobalTriggerEvmReadoutRecord
1461  iEvent.getByLabel(m_l1GtEmulEvmInputTag, gtReadoutRecordEmul);
1462 
1463  bool validEmul = false;
1464 
1465  if (!gtReadoutRecordEmul.isValid()) {
1467  } else {
1468  validEmul = true;
1469  }
1470 
1471  if ((!validData) || (!validEmul)) {
1472  edm::LogWarning("L1GtHwValidation")
1473  << "\n No valid product found: EVM L1GlobalTriggerEvmReadoutRecord"
1474  << "\n Data validity [1 = true; 0 = false]: " << validData
1475  << "\n Emulator validity: [1 = true; 0 = false]: "
1476  << validEmul << "\n EVM histograms will not be filled.\n"
1477  << std::endl;
1478 
1479  return;
1480  }
1481 
1482  // compare GTFE
1483  const L1GtfeWord& gtfeBlockData = gtReadoutRecordData->gtfeWord();
1484  const L1GtfeWord& gtfeBlockEmul = gtReadoutRecordEmul->gtfeWord();
1485 
1486  compareGTFE(iEvent, evSetup, gtfeBlockData, gtfeBlockEmul, iRec);
1487 
1488  // FDL comparison
1489  const std::vector<L1GtFdlWord>& gtFdlVectorData =
1490  gtReadoutRecordData->gtFdlVector();
1491  const std::vector<L1GtFdlWord>& gtFdlVectorEmul =
1492  gtReadoutRecordEmul->gtFdlVector();
1493 
1494  int gtFdlVectorDataSize = gtFdlVectorData.size();
1495  int gtFdlVectorEmulSize = gtFdlVectorEmul.size();
1496 
1497  if (gtFdlVectorDataSize == gtFdlVectorEmulSize) {
1498  m_myCoutStream << "\nData and emulated FDL vector size: identical.\n";
1499  m_myCoutStream << " Size: " << gtFdlVectorDataSize << std::endl;
1500 
1501  for (int iFdl = 0; iFdl < gtFdlVectorDataSize; ++iFdl) {
1502 
1503  const L1GtFdlWord& fdlBlockData = gtFdlVectorData[iFdl];
1504  const L1GtFdlWord& fdlBlockEmul = gtFdlVectorEmul[iFdl];
1505 
1506  compareFDL(iEvent, evSetup, fdlBlockData, fdlBlockEmul, iRec);
1507  }
1508  } else {
1509  m_myCoutStream << "\nData and emulated FDL vector size: different.\n";
1510  m_myCoutStream << " Data: size = " << gtFdlVectorDataSize << std::endl;
1511  m_myCoutStream << " Emul: size = " << gtFdlVectorEmulSize << std::endl;
1512 
1513  }
1514 
1515  // FIXME compare TCS
1516 
1517  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1518 
1519  m_myCoutStream.str("");
1520  m_myCoutStream.clear();
1521 
1522  edm::LogInfo("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1523 
1524  m_myCoutStream.str("");
1525  m_myCoutStream.clear();
1526 
1527 }
1528 
1529 // compare the GCT collections obtained from L1 GT PSB with the input
1530 // GCT collections
1532  const edm::EventSetup&) {
1533 
1534  // FIXME
1535 
1536 }
1537 
1538 // analyze each event: event loop
1540  const edm::EventSetup& evSetup) {
1541 
1542  ++m_nrEvJob;
1543  ++m_nrEvRun;
1544 
1545  // L1 GT DAQ record comparison
1546  compareDaqRecord(iEvent, evSetup);
1547 
1548  // L1 GT EVM record comparison
1549  compareEvmRecord(iEvent, evSetup);
1550 
1551  // GCT collections from L1 GT PSB versus unpacked GCT
1552  compareGt_Gct(iEvent, evSetup);
1553 
1554 }
1555 
1556 // book all histograms for the module
1558 
1559  // histograms
1560 
1561  const unsigned int numberTechTriggers =
1563 
1564  const unsigned int numberAlgoTriggers =
1566 
1567  for (int iRec = 0; iRec < NumberOfGtRecords; ++iRec) {
1568 
1569  std::string recString;
1570  if (iRec == 0) {
1571  recString = "Daq_";
1572  } else {
1573  recString = "Evm_";
1574  }
1575 
1576  std::string hName;
1577  const char* histName;
1578 
1579  hName = recString + "gtfeDataEmul";
1580  histName = hName.c_str();
1581 
1582  // GTFE histograms
1583  m_gtfeDataEmul[iRec] = m_dbe->book1D(histName,
1584  "GTFE data vs emul mismatch", 8, 0., 7.);
1585  m_gtfeDataEmul[iRec]->setBinLabel(1, "BoardId", 1);
1586  m_gtfeDataEmul[iRec]->setBinLabel(2, "RecordLength1", 1);
1587  m_gtfeDataEmul[iRec]->setBinLabel(3, "RecordLength0", 1);
1588  m_gtfeDataEmul[iRec]->setBinLabel(4, "BxNr", 1);
1589  m_gtfeDataEmul[iRec]->setBinLabel(5, "SetupVersion", 1);
1590  m_gtfeDataEmul[iRec]->setBinLabel(6, "DaqActiveBoards", 1);
1591  m_gtfeDataEmul[iRec]->setBinLabel(7, "AltNrBxBoard", 1);
1592  m_gtfeDataEmul[iRec]->setBinLabel(8, "TotalTriggerNr", 1);
1593 
1594  // FDL histograms
1595 
1596  for (int iHist = 0; iHist < TotalBxInEvent; ++iHist) {
1597 
1598  // convert [0, TotalBxInEvent] to [-X, +X] and add to histogram name
1599  int iIndex = iHist - ((TotalBxInEvent + 1) / 2 - 1);
1600  int hIndex = (iIndex + 16) % 16;
1601 
1602  std::stringstream ss;
1603  std::string str;
1604  ss << std::uppercase << std::hex << hIndex;
1605  ss >> str;
1606 
1607  hName = recString + "FdlDataEmul_" + str;
1608  histName = hName.c_str();
1609 
1610  std::string hTitle = "FDL data vs emul mismatch for BxInEvent = "
1611  + str;
1612  const char* histTitle = hTitle.c_str();
1613 
1614  //
1615 
1616  m_fdlDataEmul[iHist][iRec] = m_dbe->book1D(histName, histTitle, 13,
1617  0., 13.);
1618  m_fdlDataEmul[iHist][iRec]->setBinLabel(1, "BoardId", 1);
1619  m_fdlDataEmul[iHist][iRec]->setBinLabel(2, "BxInEvent", 1);
1620  m_fdlDataEmul[iHist][iRec]->setBinLabel(3, "BxNr", 1);
1621  m_fdlDataEmul[iHist][iRec]->setBinLabel(4, "EventNr", 1);
1622  m_fdlDataEmul[iHist][iRec]->setBinLabel(5, "TechTrigger", 1);
1623  m_fdlDataEmul[iHist][iRec]->setBinLabel(6, "TechTriggerMask", 1);
1624  m_fdlDataEmul[iHist][iRec]->setBinLabel(7, "AlgoTrigger", 1);
1625  m_fdlDataEmul[iHist][iRec]->setBinLabel(8, "AlgoTriggerMask", 1);
1626  m_fdlDataEmul[iHist][iRec]->setBinLabel(9, "AlgoExtend", 1);
1627  m_fdlDataEmul[iHist][iRec]->setBinLabel(10, "NoAlgo", 1);
1628  m_fdlDataEmul[iHist][iRec]->setBinLabel(11, "FinalORAllParts", 1);
1629  m_fdlDataEmul[iHist][iRec]->setBinLabel(12, "FinalORPhysPart", 1);
1630  m_fdlDataEmul[iHist][iRec]->setBinLabel(13, "LocalBxNr", 1);
1631 
1632  // algorithm decision
1633  // data
1634  hName = recString + "Data_AlgoDecision_" + str;
1635  histName = hName.c_str();
1636 
1637  hTitle = "Data: algorithm decision word for BxInEvent = " + str;
1638  histTitle = hTitle.c_str();
1639 
1640  m_fdlDataAlgoDecision[iHist][iRec] = m_dbe->book1D(histName,
1641  histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
1642 
1643  // emul
1644  hName = recString + "Emul_AlgoDecision_" + str;
1645  histName = hName.c_str();
1646 
1647  hTitle = "Emul: algorithm decision word for BxInEvent = " + str;
1648  histTitle = hTitle.c_str();
1649 
1650  m_fdlEmulAlgoDecision[iHist][iRec] = m_dbe->book1D(histName,
1651  histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
1652 
1653  // algorithm decision for prescaled algorithms
1654  // data
1655  hName = recString + "Data_AlgoDecision_Prescaled_" + str;
1656  histName = hName.c_str();
1657 
1658  hTitle
1659  = "Data: prescaled algorithms: algorithm decision for BxInEvent = "
1660  + str;
1661  histTitle = hTitle.c_str();
1662 
1664  histName, histTitle, numberAlgoTriggers, 0.,
1665  numberAlgoTriggers);
1666 
1667  // emul
1668  hName = recString + "Emul_AlgoDecision_Prescaled_" + str;
1669  histName = hName.c_str();
1670 
1671  hTitle
1672  = "Emul: prescaled algorithms: algorithm decision for BxInEvent = "
1673  + str;
1674  histTitle = hTitle.c_str();
1675 
1677  histName, histTitle, numberAlgoTriggers, 0.,
1678  numberAlgoTriggers);
1679 
1680  // algorithm decision for unprescaled algorithms
1681  // data
1682  hName = recString + "Data_AlgoDecision_Unprescaled_" + str;
1683  histName = hName.c_str();
1684 
1685  hTitle
1686  = "Data: unprescaled algorithms: algorithm decision for BxInEvent = "
1687  + str;
1688  histTitle = hTitle.c_str();
1689 
1691  histName, histTitle, numberAlgoTriggers, 0.,
1692  numberAlgoTriggers);
1693 
1694  // emul
1695  hName = recString + "Emul_AlgoDecision_Unprescaled_" + str;
1696  histName = hName.c_str();
1697 
1698  hTitle
1699  = "Emul: unprescaled algorithms: algorithm decision for BxInEvent = "
1700  + str;
1701  histTitle = hTitle.c_str();
1702 
1704  histName, histTitle, numberAlgoTriggers, 0.,
1705  numberAlgoTriggers);
1706 
1707  // algorithm decision after masking (partition physics)
1708  // data
1709  hName = recString + "Data_AlgoDecisionAfterMask_" + str;
1710  histName = hName.c_str();
1711 
1712  hTitle
1713  = "Data, physics partition: algorithm decision word after mask for BxInEvent = "
1714  + str;
1715  histTitle = hTitle.c_str();
1716 
1717  m_fdlDataAlgoDecisionMask[iHist][iRec] = m_dbe->book1D(histName,
1718  histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
1719 
1720  // emul
1721  hName = recString + "Emul_AlgoDecisionAfterMask_" + str;
1722  histName = hName.c_str();
1723 
1724  hTitle
1725  = "Emul, physics partition: algorithm decision word after mask for BxInEvent = "
1726  + str;
1727  histTitle = hTitle.c_str();
1728 
1729  m_fdlEmulAlgoDecisionMask[iHist][iRec] = m_dbe->book1D(histName,
1730  histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
1731 
1732  //
1733  hName = recString + "DataEmul_AlgoDecision_" + str;
1734  histName = hName.c_str();
1735 
1736  hTitle
1737  = "Data vs emul: non-matching algorithm decision word for BxInEvent = "
1738  + str;
1739  histTitle = hTitle.c_str();
1740 
1741  m_fdlDataEmulAlgoDecision[iHist][iRec] = m_dbe->book1D(histName,
1742  histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
1743 
1744  //
1745  hName = recString + "DataEmul_AlgoDecision_Prescaled_" + str;
1746  histName = hName.c_str();
1747 
1748  hTitle
1749  = "Data vs emul: prescaled algorithms with non-matching decision for BxInEvent = "
1750  + str;
1751  histTitle = hTitle.c_str();
1752 
1754  histName, histTitle, numberAlgoTriggers, 0.,
1755  numberAlgoTriggers);
1756 
1757  //
1758  hName = recString + "DataEmul_AlgoDecision_Unprescaled_" + str;
1759  histName = hName.c_str();
1760 
1761  hTitle
1762  = "Data vs emul: unprescaled algorithms with non-matching decision for BxInEvent = "
1763  + str;
1764  histTitle = hTitle.c_str();
1765 
1767  histName, histTitle, numberAlgoTriggers, 0.,
1768  numberAlgoTriggers);
1769 
1770  //
1771  hName = recString + "Data_AlgoDecision_NoMatch_" + str;
1772  histName = hName.c_str();
1773 
1774  hTitle
1775  = "Data: algorithm decision for non-matching cases for BxInEvent = "
1776  + str;
1777  histTitle = hTitle.c_str();
1778 
1779  m_fdlDataAlgoDecision_NoMatch[iHist][iRec] = m_dbe->book1D(
1780  histName, histTitle, numberAlgoTriggers, 0.,
1781  numberAlgoTriggers);
1782 
1783  //
1784  hName = recString + "Emul_AlgoDecision_NoMatch_" + str;
1785  histName = hName.c_str();
1786 
1787  hTitle
1788  = "Emul: algorithm decision for non-matching cases for BxInEvent = "
1789  + str;
1790  histTitle = hTitle.c_str();
1791 
1792  m_fdlEmulAlgoDecision_NoMatch[iHist][iRec] = m_dbe->book1D(
1793  histName, histTitle, numberAlgoTriggers, 0.,
1794  numberAlgoTriggers);
1795 
1796  // prescaled algorithms
1797  hName = recString + "Data_AlgoDecision_Prescaled_NoMatch_" + str;
1798  histName = hName.c_str();
1799 
1800  hTitle
1801  = "Data: prescaled algorithms: non-matching algorithm decision for BxInEvent = "
1802  + str;
1803  histTitle = hTitle.c_str();
1804 
1806  = m_dbe->book1D(histName, histTitle, numberAlgoTriggers,
1807  0., numberAlgoTriggers);
1808 
1809  //
1810  hName = recString + "Emul_AlgoDecision_Prescaled_NoMatch_" + str;
1811  histName = hName.c_str();
1812 
1813  hTitle
1814  = "Emul: prescaled algorithms: non-matching algorithm decision for BxInEvent = "
1815  + str;
1816  histTitle = hTitle.c_str();
1817 
1819  = m_dbe->book1D(histName, histTitle, numberAlgoTriggers,
1820  0., numberAlgoTriggers);
1821 
1822 
1823  // unprescaled algorithms - non-matching
1824  hName = recString + "Data_AlgoDecision_Unprescaled_NoMatch_" + str;
1825  histName = hName.c_str();
1826 
1827  hTitle
1828  = "Data: unprescaled algorithms: non-matching algorithm decision for BxInEvent = "
1829  + str;
1830  histTitle = hTitle.c_str();
1831 
1833  = m_dbe->book1D(histName, histTitle, numberAlgoTriggers,
1834  0., numberAlgoTriggers);
1835 
1836  //
1837  hName = recString + "Emul_AlgoDecision_Unprescaled_NoMatch_" + str;
1838  histName = hName.c_str();
1839 
1840  hTitle
1841  = "Emul: unprescaled algorithms: non-matching algorithm decision for BxInEvent = "
1842  + str;
1843  histTitle = hTitle.c_str();
1844 
1846  = m_dbe->book1D(histName, histTitle, numberAlgoTriggers,
1847  0., numberAlgoTriggers);
1848 
1849 
1850  //
1851  hName = recString + "DataEmul_AlgoDecisionAfterMask_" + str;
1852  histName = hName.c_str();
1853 
1854  hTitle
1855  = "Data vs emul, physics partition: non-matching algorithm decision word after mask for BxInEvent = "
1856  + str;
1857  histTitle = hTitle.c_str();
1858 
1859  m_fdlDataEmulAlgoDecisionMask[iHist][iRec] = m_dbe->book1D(
1860  histName, histTitle, numberAlgoTriggers, 0.,
1861  numberAlgoTriggers);
1862 
1863  // technical trigger decision
1864  // data
1865  hName = recString + "Data_TechDecision_" + str;
1866  histName = hName.c_str();
1867 
1868  hTitle = "Data technical trigger decision word for BxInEvent = "
1869  + str;
1870  histTitle = hTitle.c_str();
1871 
1872  m_fdlDataTechDecision[iHist][iRec] = m_dbe->book1D(histName,
1873  histTitle, numberTechTriggers, 0., numberTechTriggers);
1874 
1875  // emul
1876  hName = recString + "Emul_TechDecision_" + str;
1877  histName = hName.c_str();
1878 
1879  hTitle = "Emul: technical trigger decision word for BxInEvent = "
1880  + str;
1881  histTitle = hTitle.c_str();
1882 
1883  m_fdlEmulTechDecision[iHist][iRec] = m_dbe->book1D(histName,
1884  histTitle, numberTechTriggers, 0., numberTechTriggers);
1885 
1886  // technical trigger decision after masking (partition physics)
1887  hName = recString + "Data_TechDecisionAfterMask_" + str;
1888  histName = hName.c_str();
1889 
1890  hTitle
1891  = "Data technical trigger decision word after mask for BxInEvent = "
1892  + str;
1893  histTitle = hTitle.c_str();
1894 
1895  m_fdlDataTechDecisionMask[iHist][iRec] = m_dbe->book1D(histName,
1896  histTitle, numberTechTriggers, 0., numberTechTriggers);
1897 
1898  //
1899  hName = recString + "Emul_TechDecisionAfterMask_" + str;
1900  histName = hName.c_str();
1901 
1902  hTitle
1903  = "Emul: technical trigger decision word after mask for BxInEvent = "
1904  + str;
1905  histTitle = hTitle.c_str();
1906 
1907  m_fdlEmulTechDecisionMask[iHist][iRec] = m_dbe->book1D(histName,
1908  histTitle, numberTechTriggers, 0., numberTechTriggers);
1909 
1910  //
1911  hName = recString + "DataEmul_TechDecision_" + str;
1912  histName = hName.c_str();
1913 
1914  hTitle
1915  = "Data vs emul: non-matching technical trigger decision word for BxInEvent = "
1916  + str;
1917  histTitle = hTitle.c_str();
1918 
1919  m_fdlDataEmulTechDecision[iHist][iRec] = m_dbe->book1D(histName,
1920  histTitle, numberTechTriggers, 0., numberTechTriggers);
1921 
1922  hName = recString + "DataEmul_TechDecisionAfterMask_" + str;
1923  histName = hName.c_str();
1924 
1925  hTitle
1926  = "Data vs emul: non-matching technical trigger decision word after mask for BxInEvent = "
1927  + str;
1928  histTitle = hTitle.c_str();
1929 
1930  m_fdlDataEmulTechDecisionMask[iHist][iRec] = m_dbe->book1D(
1931  histName, histTitle, numberTechTriggers, 0.,
1932  numberTechTriggers);
1933 
1934  }
1935 
1936  hName = recString + "FdlDataEmul_Err";
1937  histName = hName.c_str();
1938 
1939  m_fdlDataEmul_Err[iRec]
1940  = m_dbe->book1D(
1941  histName,
1942  "FDL data vs emul mismatch for non-matching BxInEvent in FDL payload",
1943  13, 0., 13.);
1944  m_fdlDataEmul_Err[iRec]->setBinLabel(1, "BoardId", 1);
1945  m_fdlDataEmul_Err[iRec]->setBinLabel(2, "BxInEvent", 1);
1946  m_fdlDataEmul_Err[iRec]->setBinLabel(3, "BxNr", 1);
1947  m_fdlDataEmul_Err[iRec]->setBinLabel(4, "EventNr", 1);
1948  m_fdlDataEmul_Err[iRec]->setBinLabel(5, "TechTrigger", 1);
1949  m_fdlDataEmul_Err[iRec]->setBinLabel(6, "TechTriggerMask", 1);
1950  m_fdlDataEmul_Err[iRec]->setBinLabel(7, "AlgoTrigger", 1);
1951  m_fdlDataEmul_Err[iRec]->setBinLabel(8, "AlgoTriggerMask", 1);
1952  m_fdlDataEmul_Err[iRec]->setBinLabel(9, "AlgoExtend", 1);
1953  m_fdlDataEmul_Err[iRec]->setBinLabel(10, "NoAlgo", 1);
1954  m_fdlDataEmul_Err[iRec]->setBinLabel(11, "FinalORAllParts", 1);
1955  m_fdlDataEmul_Err[iRec]->setBinLabel(12, "FinalORPhysPart", 1);
1956  m_fdlDataEmul_Err[iRec]->setBinLabel(13, "LocalBxNr", 1);
1957 
1958  hName = recString + "FdlDataAlgoDecision_Err";
1959  histName = hName.c_str();
1960 
1962  = m_dbe->book1D(
1963  histName,
1964  "Data: algorithm trigger decision word, non-matching BxInEvent",
1965  numberAlgoTriggers, 0., numberAlgoTriggers);
1966 
1967  //
1968  hName = recString + "Emul_AlgoDecision_Err";
1969  histName = hName.c_str();
1970 
1972  = m_dbe->book1D(
1973  histName,
1974  "Emul: algorithm trigger decision word, non-matching BxInEvent",
1975  numberAlgoTriggers, 0., numberAlgoTriggers);
1976 
1977  hName = recString + "DataEmul_AlgoDecision_Err";
1978  histName = hName.c_str();
1979 
1981  = m_dbe->book1D(
1982  histName,
1983  "Data vs emul: algorithm trigger decision word, non-matching BxInEvent",
1984  numberAlgoTriggers, 0., numberAlgoTriggers);
1985 
1986  //
1987  hName = recString + "Data_TechDecision_Err";
1988  histName = hName.c_str();
1989 
1991  = m_dbe->book1D(
1992  histName,
1993  "Data: technical trigger decision word, non-matching BxInEvent",
1994  numberTechTriggers, 0., numberTechTriggers);
1995 
1996  hName = recString + "Emul_TechDecision_Err";
1997  histName = hName.c_str();
1998 
2000  = m_dbe->book1D(
2001  histName,
2002  "Emul: technical trigger decision word, non-matching BxInEvent",
2003  numberTechTriggers, 0., numberTechTriggers);
2004 
2005  hName = recString + "DataEmul_TechDecision_Err";
2006  histName = hName.c_str();
2007 
2009  = m_dbe->book1D(
2010  histName,
2011  "Data vs emul: technical trigger decision word, non-matching BxInEvent",
2012  numberTechTriggers, 0., numberTechTriggers);
2013 
2014  }
2015 }
2016 
2018  const edm::EventSetup& evSetup) {
2019 
2020  LogDebug("L1GtHwValidation") << "\n\n endRun: " << run.id()
2021  << "\n Number of events analyzed in this run: " << m_nrEvRun
2022  << "\n Total number of events analyzed in this job: " << m_nrEvJob
2023  << "\n" << std::endl;
2024 
2025 }
2026 
2027 // method called once each job just after ending the event loop
2029 
2030  edm::LogInfo("L1GtHwValidation")
2031  << "\n\nTotal number of events analyzed in this job: " << m_nrEvJob
2032  << "\n" << std::endl;
2033 
2034  return;
2035 
2036 }
2037 
2038 //define this as a plug-in
#define LogDebug(id)
MonitorElement * m_fdlDataEmulAlgoDecision[TotalBxInEvent][NumberOfGtRecords]
const boost::uint16_t noAlgo() const
get/set NoAlgo
Definition: L1GtFdlWord.h:288
T getUntrackedParameter(std::string const &, T const &) const
const TechnicalTriggerWord & gtTechnicalTriggerWord() const
get/set technical trigger bits
Definition: L1GtFdlWord.h:151
const boost::uint16_t gtPrescaleFactorIndexAlgo() const
Definition: L1GtFdlWord.h:269
MonitorElement * m_fdlEmulAlgoDecisionUnprescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
const boost::uint16_t bxNr() const
get/set bunch cross number of the actual bx
Definition: L1GtPsbWord.h:110
const L1GtTriggerMask * m_l1GtTmTech
RunID const & id() const
Definition: RunBase.h:43
const boost::uint16_t localBxNr() const
get/set local bunch cross number of the actual bx
Definition: L1GtPsbWord.h:180
MonitorElement * m_fdlDataAlgoDecision_Err[NumberOfGtRecords]
virtual void compareGTFE(const edm::Event &, const edm::EventSetup &, const L1GtfeWord &, const L1GtfeWord &, const int)
compare the GTFE board
virtual void analyze(const edm::Event &, const edm::EventSetup &)
const boost::uint32_t eventNr() const
get/set event number since last L1 reset generated in FDL
Definition: L1GtFdlWord.h:132
virtual void comparePSB(const edm::Event &, const edm::EventSetup &, const L1GtPsbWord &, const L1GtPsbWord &)
compare the PSB board
const boost::uint16_t boardId() const
get/set board ID
Definition: L1GtFdlWord.h:71
MonitorElement * book1D(const char *name, const char *title, int nchX, double lowX, double highX)
Book 1D histogram.
Definition: DQMStore.cc:519
virtual void print(std::ostream &myCout) const
pretty print the content of a L1GtfeWord
Definition: L1GtfeWord.cc:323
void rmdir(const std::string &fullpath)
Definition: DQMStore.cc:2296
const std::vector< std::vector< int > > * m_prescaleFactorsAlgoTrig
#define DEFINE_FWK_MODULE(type)
Definition: MakerMacros.h:17
const boost::uint16_t recordLength() const
get/set record length for alternative 0
Definition: L1GtfeWord.h:106
std::map< std::string, L1GtAlgorithm > AlgorithmMap
map containing the algorithms
static const unsigned int NumberTechnicalTriggers
MonitorElement * m_fdlEmulTechDecision[TotalBxInEvent][NumberOfGtRecords]
const boost::uint16_t bxNr() const
get/set bunch cross number as counted in the GTFE board
Definition: L1GtfeWord.h:124
void setBinLabel(int bin, const std::string &label, int axis=1)
set bin label for x, y or z axis (axis=1, 2, 3 respectively)
MonitorElement * m_fdlDataEmulAlgoDecisionPrescaled[TotalBxInEvent][NumberOfGtRecords]
const boost::uint32_t totalTriggerNr() const
get/set total number of L1A sent since start of run
Definition: L1GtfeWord.h:213
void bookHistograms()
book all histograms for the module
edm::InputTag m_l1GtEmulEvmInputTag
input tag for the L1 GT emulator EVM record
MonitorElement * m_fdlEmulAlgoDecisionMask[TotalBxInEvent][NumberOfGtRecords]
const boost::uint32_t setupVersion() const
get/set setup version
Definition: L1GtfeWord.h:142
MonitorElement * m_fdlDataAlgoDecisionUnprescaled[TotalBxInEvent][NumberOfGtRecords]
unsigned long long m_l1GtMenuCacheID
const L1GtPrescaleFactors * m_l1GtPfTech
virtual void compareFDL(const edm::Event &, const edm::EventSetup &, const L1GtFdlWord &, const L1GtFdlWord &, const int)
compare the FDL board
virtual void compareTCS(const edm::Event &, const edm::EventSetup &, const L1TcsWord &, const L1TcsWord &)
compare the TCS board
DQMStore * m_dbe
internal members
void Fill(long long x)
AlgorithmMap::const_iterator CItAlgo
iterators through map containing the algorithms
unsigned long long m_l1GtTmAlgoCacheID
MonitorElement * m_fdlEmulTechDecisionMask[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataAlgoDecisionPrescaled[TotalBxInEvent][NumberOfGtRecords]
void printGtDecisionWord(std::ostream &myCout) const
Definition: L1GtFdlWord.cc:347
MonitorElement * m_gtfeDataEmul[NumberOfGtRecords]
histograms
MonitorElement * m_fdlDataAlgoDecisionUnprescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
std::vector< bool > DecisionWordExtended
void beginRun(const edm::Run &run, const edm::EventSetup &c)
std::vector< unsigned int > m_triggerMaskTechTrig
int iEvent
Definition: GenABIO.cc:243
virtual ~L1GtHwValidation()
MonitorElement * m_fdlDataEmulAlgoDecisionMask[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataAlgoDecisionPrescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
const std::vector< unsigned int > & gtTriggerMask() const
get the trigger mask
std::vector< bool > DecisionWord
typedefs
const boost::uint16_t localBxNr() const
get/set local bunch cross number of the actual bx
Definition: L1GtFdlWord.h:374
const L1GtTriggerMask * m_l1GtTmAlgo
trigger masks
edm::InputTag m_l1GtEmulDaqInputTag
input tag for the L1 GT emulator DAQ record
MonitorElement * m_fdlDataEmulTechDecision[TotalBxInEvent][NumberOfGtRecords]
const int bxInEvent() const
get/set bunch cross in the GT event record
Definition: L1GtFdlWord.h:92
void printGtDecisionWordExtended(std::ostream &myCout) const
Definition: L1GtFdlWord.cc:505
void endRun(const edm::Run &run, const edm::EventSetup &c)
virtual void compareEvmRecord(const edm::Event &, const edm::EventSetup &)
L1 GT EVM record comparison.
MonitorElement * m_fdlDataTechDecision_Err[NumberOfGtRecords]
const boost::uint16_t boardId() const
get/set board ID
Definition: L1GtfeWord.h:67
MonitorElement * m_fdlDataAlgoDecision[TotalBxInEvent][NumberOfGtRecords]
std::vector< bool > TechnicalTriggerWord
technical trigger bits (64 bits)
L1GtHwValidation(const edm::ParameterSet &)
static const unsigned int NumberPhysTriggers
const boost::uint32_t eventNr() const
get/set event number since last L1 reset generated in PSB
Definition: L1GtPsbWord.h:131
void setVerbose(unsigned level)
Definition: DQMStore.cc:201
static const int TotalBxInEvent
MonitorElement * m_fdlEmulAlgoDecisionUnprescaled[TotalBxInEvent][NumberOfGtRecords]
bool isValid() const
Definition: HandleBase.h:76
bool getByLabel(InputTag const &tag, Handle< PROD > &result) const
Definition: Event.h:359
#define LogTrace(id)
const L1GtTriggerMenu * m_l1GtMenu
trigger menu
MonitorElement * m_fdlEmulAlgoDecision_Err[NumberOfGtRecords]
const boost::uint16_t aData(int iA) const
get/set A_DATA_CH_IA
Definition: L1GtPsbWord.cc:230
const boost::uint16_t recordLength1() const
get/set record length for alternative 1
Definition: L1GtfeWord.h:87
void print(std::ostream &myCout) const
pretty print the content of a L1GtFdlWord
Definition: L1GtFdlWord.cc:768
void print(std::ostream &myCout) const
pretty print
Definition: L1GtPsbWord.cc:455
bool dirExists(const std::string &path) const
true if directory exists
Definition: DQMStore.cc:301
unsigned long long m_l1GtPfAlgoCacheID
MonitorElement * m_fdlDataTechDecisionMask[TotalBxInEvent][NumberOfGtRecords]
edm::InputTag m_l1GtDataDaqInputTag
input tag for the L1 GT hardware DAQ record
MonitorElement * m_fdlDataAlgoDecision_NoMatch[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataEmul[TotalBxInEvent][NumberOfGtRecords]
FDL (0 for DAQ, 1 for EVM record)
MonitorElement * m_fdlDataEmul_Err[NumberOfGtRecords]
const std::vector< std::vector< int > > & gtPrescaleFactors() const
get the prescale factors by reference
std::ostringstream m_myCoutStream
static const int NumberBData
Definition: L1GtPsbWord.h:37
virtual void beginJob()
int m_nrDataEventError
counters
const T & get() const
Definition: EventSetup.h:55
const boost::uint16_t bData(int iB) const
get/set B_DATA_CH_IB
Definition: L1GtPsbWord.cc:325
T const * product() const
Definition: ESHandle.h:62
const int bxInEvent() const
get/set bunch cross in the GT event record
Definition: L1GtPsbWord.h:89
const DecisionWord & gtDecisionWord() const
get/set/print algorithms bits (decision word)
Definition: L1GtFdlWord.h:173
unsigned long long m_l1GtTmTechCacheID
virtual void compareGt_Gct(const edm::Event &, const edm::EventSetup &)
const boost::uint16_t bxNr() const
get/set BxNr - bunch cross number of the actual bx
Definition: L1GtFdlWord.h:112
MonitorElement * m_fdlEmulTechDecision_Err[NumberOfGtRecords]
static const int NumberAData
Definition: L1GtPsbWord.h:36
const boost::uint16_t boardId() const
get/set board ID
Definition: L1GtPsbWord.h:68
edm::InputTag m_l1GctDataInputTag
input tag for the L1 GCT hardware record
void printGtTechnicalTriggerWord(std::ostream &myCout) const
Definition: L1GtFdlWord.cc:273
MonitorElement * m_fdlDataEmulAlgoDecision_Err[NumberOfGtRecords]
const AlgorithmMap & gtAlgorithmMap() const
get / set the algorithm map (by name)
const boost::uint16_t finalOR() const
get/set &quot;Final OR&quot; bits
Definition: L1GtFdlWord.h:308
const boost::uint16_t activeBoards() const
get/set boards contributing to EVM respectively DAQ record
Definition: L1GtfeWord.h:165
static const int NumberOfGtRecords
MonitorElement * m_fdlDataTechDecision[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlEmulAlgoDecision[TotalBxInEvent][NumberOfGtRecords]
const std::vector< std::vector< int > > * m_prescaleFactorsTechTrig
MonitorElement * m_fdlEmulAlgoDecision_NoMatch[TotalBxInEvent][NumberOfGtRecords]
const DecisionWordExtended & gtDecisionWordExtended() const
get/set extended algorithms bits (extended decision word)
Definition: L1GtFdlWord.h:205
MonitorElement * m_fdlDataEmulTechDecisionMask[TotalBxInEvent][NumberOfGtRecords]
MonitorElement * m_fdlDataAlgoDecisionMask[TotalBxInEvent][NumberOfGtRecords]
virtual void compareDaqRecord(const edm::Event &, const edm::EventSetup &)
L1 GT DAQ record comparison.
std::vector< unsigned int > m_triggerMaskAlgoTrig
const boost::uint16_t altNrBxBoard() const
get/set alternative for number of BX per board
Definition: L1GtfeWord.h:189
MonitorElement * m_fdlDataEmulTechDecision_Err[NumberOfGtRecords]
MonitorElement * m_fdlEmulAlgoDecisionPrescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
void setCurrentFolder(const std::string &fullpath)
Definition: DQMStore.cc:237
const L1GtPrescaleFactors * m_l1GtPfAlgo
prescale factors
edm::InputTag m_l1GtDataEvmInputTag
input tag for the L1 GT hardware EVM record
Definition: Run.h:31
unsigned long long m_l1GtPfTechCacheID
MonitorElement * m_fdlEmulAlgoDecisionPrescaled[TotalBxInEvent][NumberOfGtRecords]
std::string m_dirName
directory name for L1Extra plots
virtual void endJob()
MonitorElement * m_fdlDataEmulAlgoDecisionUnprescaled[TotalBxInEvent][NumberOfGtRecords]