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FastFedCablingHistosUsingDb.cc
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1 // Last commit: $Id: FastFedCablingHistosUsingDb.cc,v 1.22 2009/06/18 20:52:37 lowette Exp $
2 
3 #include "DQM/SiStripCommissioningDbClients/interface/FastFedCablingHistosUsingDb.h"
4 #include "CondFormats/SiStripObjects/interface/FastFedCablingAnalysis.h"
5 #include "DataFormats/SiStripCommon/interface/SiStripConstants.h"
6 #include "DataFormats/SiStripCommon/interface/SiStripFecKey.h"
7 #include "FWCore/MessageLogger/interface/MessageLogger.h"
8 #include <iostream>
9 
10 using namespace sistrip;
11 
12 // -----------------------------------------------------------------------------
14 FastFedCablingHistosUsingDb::FastFedCablingHistosUsingDb( const edm::ParameterSet & pset,
15  DQMStore* bei,
16  SiStripConfigDb* const db )
17  : CommissioningHistograms( pset.getParameter<edm::ParameterSet>("FastFedCablingParameters"),
18  bei,
19  sistrip::FAST_CABLING ),
20  CommissioningHistosUsingDb( db,
21  sistrip::FAST_CABLING ),
22  FastFedCablingHistograms( pset.getParameter<edm::ParameterSet>("FastFedCablingParameters"),
23  bei )
24 {
25  LogTrace(mlDqmClient_)
26  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
27  << " Constructing object...";
28 }
29 
30 // -----------------------------------------------------------------------------
32 FastFedCablingHistosUsingDb::~FastFedCablingHistosUsingDb() {
33  LogTrace(mlDqmClient_)
34  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
35  << " Destructing object...";
36 }
37 
38 // -----------------------------------------------------------------------------
40 void FastFedCablingHistosUsingDb::uploadConfigurations() {
41  LogTrace(mlDqmClient_)
42  << "[FastFedCablingHistosUsingDb::" << __func__ << "]";
43 
44  if ( !db() ) {
45  edm::LogError(mlDqmClient_)
46  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
47  << " NULL pointer to SiStripConfigDb interface!"
48  << " Aborting upload...";
49  return;
50  }
51 
52  SiStripDbParams::SiStripPartitions::const_iterator ip = db()->dbParams().partitions().begin();
53  SiStripDbParams::SiStripPartitions::const_iterator jp = db()->dbParams().partitions().end();
54  for ( ; ip != jp; ++ip ) {
55 
56  // Retrieve descriptions
57  db()->clearFedConnections();
58  SiStripConfigDb::FedDescriptionsRange feds = db()->getFedDescriptions( ip->second.partitionName() );
59  SiStripConfigDb::DeviceDescriptionsRange dcus = db()->getDeviceDescriptions( DCU, ip->second.partitionName() );
60  SiStripConfigDb::DcuDetIdsRange detids = db()->getDcuDetIds( ip->second.partitionName() );
61 
62  // Update FED connection descriptions
63  SiStripConfigDb::FedConnectionsV conns;
64  update( conns, feds, dcus, detids );
65 
66  if ( doUploadConf() ) {
67  edm::LogVerbatim(mlDqmClient_)
68  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
69  << " Uploading FED connections for partition \""
70  << ip->second.partitionName() << "\" to DB...";
71  db()->clearFedConnections( ip->second.partitionName() );
72  db()->addFedConnections( ip->second.partitionName(), conns );
73  db()->uploadFedConnections( ip->second.partitionName() );
74  edm::LogVerbatim(mlDqmClient_)
75  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
76  << " Completed database upload of " << conns.size()
77  << " ConnectionDescriptions!";
78  } else {
79  edm::LogWarning(mlDqmClient_)
80  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
81  << " TEST only! No FED connections will be uploaded to DB...";
82  }
83 
84  // Update FED descriptions with enabled/disabled channels
85  update( feds );
86  if ( doUploadConf() ) {
87  edm::LogVerbatim(mlDqmClient_)
88  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
89  << " Uploading FED descriptions to DB...";
90  db()->uploadFedDescriptions( ip->second.partitionName() );
91  edm::LogVerbatim(mlDqmClient_)
92  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
93  << " Completed database upload of " << feds.size()
94  << " Fed9UDescriptions (with connected channels enabled)!";
95  } else {
96  edm::LogWarning(mlDqmClient_)
97  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
98  << " TEST only! No FED descriptions will be uploaded to DB...";
99  }
100 
101  // Some debug on good / dirty / missing connections
102  connections( dcus, detids );
103 
104  }
105 
106 }
107 
108 // -----------------------------------------------------------------------------
110 void FastFedCablingHistosUsingDb::update( SiStripConfigDb::FedConnectionsV& conns,
111  SiStripConfigDb::FedDescriptionsRange feds,
112  SiStripConfigDb::DeviceDescriptionsRange dcus,
113  SiStripConfigDb::DcuDetIdsRange detids ) {
114 
115  // Update FED-FEC mapping in base class, based on analysis results
116  Analyses::iterator ianal = data().begin();
117  Analyses::iterator janal = data().end();
118  for ( ; ianal != janal; ++ianal ) {
119 
120  FastFedCablingAnalysis* anal = dynamic_cast<FastFedCablingAnalysis*>( ianal->second );
121  if ( !anal ) {
122  edm::LogError(mlDqmClient_)
123  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
124  << " NULL pointer to analysis object!";
125  continue;
126  }
127 
128  if ( !anal->isValid() || anal->dcuId() == sistrip::invalid32_ ) { continue; }
129 
130  SiStripFecKey fec_key( anal->fecKey() );
131  SiStripFedKey fed_key( anal->fedKey() );
132 
133  ConnectionDescription* conn = new ConnectionDescription();
134  conn->setFedId( fed_key.fedId() );
135  conn->setFedChannel( fed_key.fedChannel() );
136  conn->setFecHardwareId( "" ); //@@
137  conn->setFecCrateId( fec_key.fecCrate() );
138  conn->setFecSlot( fec_key.fecSlot() );
139  conn->setRingSlot( fec_key.fecRing() );
140  conn->setCcuAddress( fec_key.ccuAddr() );
141  conn->setI2cChannel( fec_key.ccuChan() );
142  conn->setApvAddress( SiStripFecKey::i2cAddr(anal->lldCh(),true) );
143  conn->setDcuHardId( anal->dcuHardId() );
144 
145  // Retrieve FED crate and slot numbers
146  bool found = false;
147  SiStripConfigDb::FedDescriptionsV::const_iterator ifed = feds.begin();
148  while ( ifed != feds.end() && !found ) {
149  if ( *ifed ) {
150  uint16_t fed_id = static_cast<uint16_t>( (*ifed)->getFedId() );
151  if ( fed_key.fedId() == fed_id ) {
152  conn->setFedCrateId( static_cast<uint16_t>( (*ifed)->getCrateNumber() ) );
153  conn->setFedSlot( static_cast<uint16_t>( (*ifed)->getSlotNumber() ) );
154  found = true;
155  }
156  } else {
157  edm::LogError(mlDqmClient_)
158  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
159  << " NULL pointer to Fed9UDescription object!";
160  continue;
161  }
162  ++ifed;
163  }
164  if ( !found ) {
165  edm::LogError(mlDqmClient_)
166  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
167  << " Could not find FED id " << fed_key.fedId()
168  << " in vector of FED descriptions!"
169  << " Unable to set FED crate and slot for this FED!";
170  }
171 
172  conns.push_back(conn);
173 
174  }
175 
176  if (0) {
177  SiStripConfigDb::FedConnectionsV::iterator ifed = conns.begin();
178  for ( ; ifed != conns.end(); ifed++ ) { (*ifed)->display(); }
179  }
180 
181 }
182 
183 // -----------------------------------------------------------------------------
185 void FastFedCablingHistosUsingDb::update( SiStripConfigDb::FedDescriptionsRange feds ) {
186 
187  // Iterate through feds and disable all channels
188  SiStripConfigDb::FedDescriptionsV::const_iterator ifed = feds.begin();
189  SiStripConfigDb::FedDescriptionsV::const_iterator jfed = feds.end();
190  try {
191  for ( ; ifed != jfed; ++ifed ) {
192  for ( uint16_t ichan = 0; ichan < sistrip::FEDCH_PER_FED; ichan++ ) {
193  Fed9U::Fed9UAddress addr( ichan );
194  Fed9U::Fed9UAddress addr0( ichan, static_cast<Fed9U::u8>(0) );
195  Fed9U::Fed9UAddress addr1( ichan, static_cast<Fed9U::u8>(1) );
196  (*ifed)->setFedFeUnitDisable( addr, true );
197  (*ifed)->setApvDisable( addr0, true );
198  (*ifed)->setApvDisable( addr1, true );
199  }
200  }
201  } catch( ICUtils::ICException& e ) {
202  edm::LogWarning(mlDqmClient_) << e.what();
203  }
204 
205  // Counters for number of connected / enabled channels
206  uint16_t connected = 0;
207  std::map< uint16_t, std::vector<uint16_t> > enabled;
208 
209  // Iterate through feds and enable connected channels
210  for ( ifed = feds.begin(); ifed != feds.end(); ifed++ ) {
211  for ( uint16_t ichan = 0; ichan < sistrip::FEDCH_PER_FED; ichan++ ) {
212 
213  // Retrieve FEC key from FED-FEC map
214  SiStripFedKey fed( static_cast<uint16_t>( (*ifed)->getFedId() ),
215  SiStripFedKey::feUnit(ichan),
216  SiStripFedKey::feChan(ichan) );
217  uint32_t fed_key = fed.key();
218 
219  // Retrieve analysis for given FED id and channel
220  Analyses::const_iterator iter = data().find( fed_key );
221  if ( iter == data().end() ) { continue; }
222 
223  if ( !iter->second->isValid() ) { continue; }
224 
225  FastFedCablingAnalysis* anal = dynamic_cast<FastFedCablingAnalysis*>( iter->second );
226  if ( !anal ) {
227  edm::LogError(mlDqmClient_)
228  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
229  << " NULL pointer to OptoScanAnalysis object!";
230  continue;
231  }
232 
233  // Retrieve FED id and channel
234  SiStripFedKey key( anal->fedKey() );
235  uint16_t fed_id = key.fedId();
236  uint16_t fed_ch = key.fedChannel();
237 
238  // Enable front-end unit and channel
239  Fed9U::Fed9UAddress addr( fed_ch );
240  Fed9U::Fed9UAddress addr0( fed_ch, static_cast<Fed9U::u8>(0) );
241  Fed9U::Fed9UAddress addr1( fed_ch, static_cast<Fed9U::u8>(1) );
242  (*ifed)->setFedFeUnitDisable( addr, false );
243  (*ifed)->setApvDisable( addr0, false );
244  (*ifed)->setApvDisable( addr1, false );
245  connected++;
246  enabled[fed_id].push_back(fed_ch);
247 
248  }
249  }
250 
251  // Some debug
252  std::stringstream sss;
253  if ( !feds.empty() ) {
254  sss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
255  << " Enabled a total of " << connected
256  << " FED channels and disabled " << feds.size() * 96 - connected
257  << " FED channels (" << 100 * connected / ( feds.size() * 96 )
258  << "% of total)";
259  edm::LogVerbatim(mlDqmClient_) << sss.str();
260  } else {
261  sss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
262  << " Found no FEDs! (and therefore no connected channels)";
263  edm::LogWarning(mlDqmClient_) << sss.str();
264  }
265 
266  // Some debug
267  std::stringstream ss;
268  ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
269  << " Dump of enabled FED channels:"
270  << std::endl;
271  std::map< uint16_t, std::vector<uint16_t> >::const_iterator fed = enabled.begin();
272  for ( ; fed != enabled.end(); fed++ ) {
273  ss << " Enabled " << fed->second.size()
274  << " channels for FED id "
275  << std::setw(3) << fed->first << ": ";
276  if ( !fed->second.empty() ) {
277  uint16_t first = fed->second.front();
278  uint16_t last = fed->second.front();
279  std::vector<uint16_t>::const_iterator chan = fed->second.begin();
280  for ( ; chan != fed->second.end(); chan++ ) {
281  if ( chan != fed->second.begin() ) {
282  if ( *chan != last+1 ) {
283  ss << std::setw(2) << first << "->" << std::setw(2) << last << ", ";
284  if ( chan != fed->second.end() ) { first = *(chan+1); }
285  }
286  }
287  last = *chan;
288  }
289  if ( first != last ) { ss << std::setw(2) << first << "->" << std::setw(2) << last; }
290  ss << std::endl;
291  }
292  }
293  LogTrace(mlDqmClient_) << ss.str();
294 
295 }
296 
297 // -----------------------------------------------------------------------------
298 //
299 void FastFedCablingHistosUsingDb::addDcuDetIds() {
300 
301  if ( !cabling() ) {
302  edm::LogError(mlDqmClient_)
303  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
304  << " NULL pointer to SiStripFedCabling object!";
305  return;
306  }
307 
308  // retrieve descriptions for dcu id and det id
309  SiStripConfigDb::DeviceDescriptionsRange dcus = db()->getDeviceDescriptions( DCU );
310  SiStripConfigDb::DcuDetIdsRange detids = db()->getDcuDetIds();
311 
312  if ( dcus.empty() ) {
313  edm::LogError(mlCabling_)
314  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
315  << " No DCU descriptions found!";
316  return;
317  }
318 
319  if ( detids.empty() ) {
320  edm::LogWarning(mlCabling_)
321  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
322  << " DCU-DetId map is empty!";
323  }
324 
325  Analyses::iterator ianal = data().begin();
326  Analyses::iterator janal = data().end();
327  for ( ; ianal != janal; ++ianal ) {
328 
329  // check if analysis is valid (ie, dcu id and lld channel have been identified)
330  if ( !ianal->second->isValid() ) { continue; }
331 
332  // retrieve analysis object
333  FastFedCablingAnalysis* anal = dynamic_cast<FastFedCablingAnalysis*>( ianal->second );
334 
335  if ( !anal ) {
336  edm::LogError(mlDqmClient_)
337  << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
338  << " NULL pointer to FastFedCablingAnalysis object!";
339  return;
340  }
341 
342  // find dcu that matches analysis result
343  bool found = false;
344  SiStripConfigDb::DeviceDescriptionsV::const_iterator idcu = dcus.begin();
345  SiStripConfigDb::DeviceDescriptionsV::const_iterator jdcu = dcus.end();
346  while ( !found && idcu != jdcu ) {
347  dcuDescription* dcu = dynamic_cast<dcuDescription*>( *idcu );
348  if ( dcu ) {
349  if ( dcu->getDcuType() == "FEH" ) {
350  if ( dcu->getDcuHardId() == anal->dcuHardId() ) {
351  found = true;
352  anal->dcuId( dcu->getDcuHardId() );
353  const SiStripConfigDb::DeviceAddress& addr = db()->deviceAddress(*dcu);
354  uint32_t fec_key = SiStripFecKey( addr.fecCrate_,
355  addr.fecSlot_,
356  addr.fecRing_,
357  addr.ccuAddr_,
358  addr.ccuChan_,
359  anal->lldCh() ).key();
360  anal->fecKey( fec_key );
361  SiStripConfigDb::DcuDetIdsV::const_iterator idet = detids.end();
362  idet = SiStripConfigDb::findDcuDetId( detids.begin(), detids.end(), dcu->getDcuHardId() );
363  if ( idet != detids.end() ) { anal->detId( idet->second->getDetId() ); }
364  }
365  }
366  }
367  idcu++;
368  }
369 
370  }
371 
372 }
373 
374 // -----------------------------------------------------------------------------
376 void FastFedCablingHistosUsingDb::create( SiStripConfigDb::AnalysisDescriptionsV& desc,
377  Analysis analysis ) {
378 
379  FastFedCablingAnalysis* anal = dynamic_cast<FastFedCablingAnalysis*>( analysis->second );
380  if ( !anal ) { return; }
381 
382  if ( !anal->isValid() || anal->dcuId() == sistrip::invalid32_ ) { return; } //@@ only store valid descriptions!
383 
384  SiStripFecKey fec_key( anal->fecKey() );
385  SiStripFedKey fed_key( anal->fedKey() );
386 
387  for ( uint16_t iapv = 0; iapv < 2; ++iapv ) {
388 
389  // Create description
390  FastFedCablingAnalysisDescription* tmp;
391  tmp = new FastFedCablingAnalysisDescription( anal->highLevel(),
392  anal->highRms(),
393  anal->lowLevel(),
394  anal->lowRms(),
395  anal->max(),
396  anal->min(),
397  anal->dcuId(),
398  anal->lldCh(),
399  anal->isDirty(),
400  FastFedCablingAnalysis::threshold_,
401  FastFedCablingAnalysis::dirtyThreshold_,
402  fec_key.fecCrate(),
403  fec_key.fecSlot(),
404  fec_key.fecRing(),
405  fec_key.ccuAddr(),
406  fec_key.ccuChan(),
407  SiStripFecKey::i2cAddr( fec_key.lldChan(), !iapv ),
408  db()->dbParams().partitions().begin()->second.partitionName(),
409  db()->dbParams().partitions().begin()->second.runNumber(),
410  anal->isValid(),
411  "",
412  fed_key.fedId(),
413  fed_key.feUnit(),
414  fed_key.feChan(),
415  fed_key.fedApv() );
416 
417  // Add comments
418  typedef std::vector<std::string> Strings;
419  Strings errors = anal->getErrorCodes();
420  Strings::const_iterator istr = errors.begin();
421  Strings::const_iterator jstr = errors.end();
422  for ( ; istr != jstr; ++istr ) { tmp->addComments( *istr ); }
423 
424  // Store description
425  desc.push_back( tmp );
426 
427  }
428 
429 }
430 
431 // -----------------------------------------------------------------------------
432 // prints debug info on good, dirty, missing connections, and missing devices
433 void FastFedCablingHistosUsingDb::connections( SiStripConfigDb::DeviceDescriptionsRange dcus,
434  SiStripConfigDb::DcuDetIdsRange detids ) {
435 
436  // strings
437  std::vector<std::string> valid;
438  std::vector<std::string> dirty;
439  std::vector<std::string> trimdac;
440  std::vector<std::string> missing;
441  std::vector<std::string> devices;
442  uint32_t missing_pairs = 0;
443 
444  // iterate through analyses
445  std::vector<uint32_t> found_dcus;
446  Analyses::iterator ianal = data().begin();
447  Analyses::iterator janal = data().end();
448  for ( ; ianal != janal; ++ianal ) {
449 
450  // extract fast fed cabling object
451  FastFedCablingAnalysis* anal = dynamic_cast<FastFedCablingAnalysis*>( ianal->second );
452  if ( !anal ) { continue; }
453 
454  // construct strings for various categories of connections
455  std::stringstream ss;
456  SiStripFedKey( anal->fedKey() ).terse(ss); ss << " ";
457  SiStripFecKey( anal->fecKey() ).terse(ss); ss << " ";
458  ss << "DcuId= " << std::hex << std::setw(8) << std::setfill('0') << anal->dcuId() << std::dec << " ";
459  ss << "DetId= " << std::hex << std::setw(8) << std::setfill('0') << anal->detId() << std::dec;
460  if ( anal->isValid() &&
461  !(anal->isDirty()) &&
462  !(anal->badTrimDac()) ) { valid.push_back( ss.str() ); }
463  if ( anal->isDirty() ) { dirty.push_back( ss.str() ); }
464  if ( anal->badTrimDac() ) { trimdac.push_back( ss.str() ); }
465 
466  // record "found" dcus
467  found_dcus.push_back( anal->dcuHardId() );
468 
469  }
470 
471  // iterate through dcu devices
472  SiStripConfigDb::DeviceDescriptionsV::const_iterator idcu = dcus.begin();
473  SiStripConfigDb::DeviceDescriptionsV::const_iterator jdcu = dcus.end();
474  for ( ; idcu != jdcu; ++idcu ) {
475 
476  // extract dcu description
477  dcuDescription* dcu = dynamic_cast<dcuDescription*>( *idcu );
478  if ( !dcu ) { continue; }
479  if ( dcu->getDcuType() != "FEH" ) { continue; }
480  SiStripConfigDb::DeviceAddress dcu_addr = db()->deviceAddress( *dcu );
481 
482  // continue if dcu has been "found"
483  std::vector<uint32_t>::const_iterator iter = find( found_dcus.begin(), found_dcus.end(), dcu->getDcuHardId() );
484  if ( iter != found_dcus.end() ) { continue; }
485 
486  // find detid for "missing" dcu
487  SiStripConfigDb::DcuDetIdsV::const_iterator idet = detids.end();
488  idet = SiStripConfigDb::findDcuDetId( detids.begin(), detids.end(), dcu->getDcuHardId() );
489  if ( idet == detids.end() ) { continue; }
490  if ( idet->second ) { continue; }
491 
492  // retrieve number of apv pairs
493  uint16_t npairs = idet->second->getApvNumber()/2;
494 
495  // retrieve apvs for given dcu
496  vector<bool> addrs;
497  addrs.resize(6,false);
498  SiStripConfigDb::DeviceDescriptionsRange apvs = db()->getDeviceDescriptions( APV25 );
499  SiStripConfigDb::DeviceDescriptionsV::const_iterator iapv = apvs.begin();
500  SiStripConfigDb::DeviceDescriptionsV::const_iterator japv = apvs.end();
501  for ( ; iapv != japv; ++iapv ) {
502  apvDescription* apv = dynamic_cast<apvDescription*>( *iapv );
503  if ( !apv ) { continue; }
504  SiStripConfigDb::DeviceAddress apv_addr = db()->deviceAddress( *apv );
505  if ( apv_addr.fecCrate_ == dcu_addr.fecCrate_ &&
506  apv_addr.fecSlot_ == dcu_addr.fecSlot_ &&
507  apv_addr.fecRing_ == dcu_addr.fecRing_ &&
508  apv_addr.ccuAddr_ == dcu_addr.ccuAddr_ &&
509  apv_addr.ccuChan_ == dcu_addr.ccuChan_ ) {
510  uint16_t pos = apv_addr.i2cAddr_ - 32;
511  if ( pos < 6 ) { addrs[pos] = true; }
512  }
513  }
514 
515  // construct strings for missing fibres
516  uint16_t pairs = 0;
517  if ( addrs[0] || addrs[1] ) {
518  pairs++;
519  std::stringstream ss;
520  SiStripFecKey( dcu_addr.fecCrate_,
521  dcu_addr.fecSlot_,
522  dcu_addr.fecRing_,
523  dcu_addr.ccuAddr_,
524  dcu_addr.ccuChan_,
525  1 ).terse(ss);
526  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
527  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
528  missing.push_back( ss.str() );
529  }
530  if ( addrs[2] || addrs[3] ) {
531  pairs++;
532  std::stringstream ss;
533  SiStripFecKey( dcu_addr.fecCrate_,
534  dcu_addr.fecSlot_,
535  dcu_addr.fecRing_,
536  dcu_addr.ccuAddr_,
537  dcu_addr.ccuChan_,
538  2 ).terse(ss);
539  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
540  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
541  missing.push_back( ss.str() );
542  }
543  if ( addrs[4] || addrs[5] ) {
544  pairs++;
545  std::stringstream ss;
546  SiStripFecKey( dcu_addr.fecCrate_,
547  dcu_addr.fecSlot_,
548  dcu_addr.fecRing_,
549  dcu_addr.ccuAddr_,
550  dcu_addr.ccuChan_,
551  3 ).terse(ss);
552  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
553  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
554  missing.push_back( ss.str() );
555  }
556 
557  if ( pairs != npairs ) {
558 
559  missing_pairs = npairs - pairs;
560 
561  if ( !addrs[0] ) {
562  std::stringstream ss;
563  SiStripFecKey( dcu_addr.fecCrate_,
564  dcu_addr.fecSlot_,
565  dcu_addr.fecRing_,
566  dcu_addr.ccuAddr_,
567  dcu_addr.ccuChan_,
568  1, 32 ).terse(ss);
569  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
570  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
571  devices.push_back( ss.str() );
572  }
573 
574  if ( !addrs[1] ) {
575  std::stringstream ss;
576  SiStripFecKey( dcu_addr.fecCrate_,
577  dcu_addr.fecSlot_,
578  dcu_addr.fecRing_,
579  dcu_addr.ccuAddr_,
580  dcu_addr.ccuChan_,
581  1, 33 ).terse(ss);
582  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
583  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
584  devices.push_back( ss.str() );
585  }
586 
587  if ( !addrs[2] && npairs == 3 ) {
588  std::stringstream ss;
589  SiStripFecKey( dcu_addr.fecCrate_,
590  dcu_addr.fecSlot_,
591  dcu_addr.fecRing_,
592  dcu_addr.ccuAddr_,
593  dcu_addr.ccuChan_,
594  2, 34 ).terse(ss);
595  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
596  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
597  devices.push_back( ss.str() );
598  }
599 
600  if ( !addrs[3] && npairs == 3 ) {
601  std::stringstream ss;
602  SiStripFecKey( dcu_addr.fecCrate_,
603  dcu_addr.fecSlot_,
604  dcu_addr.fecRing_,
605  dcu_addr.ccuAddr_,
606  dcu_addr.ccuChan_,
607  2, 35 ).terse(ss);
608  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
609  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
610  devices.push_back( ss.str() );
611  }
612 
613  if ( !addrs[4] ) {
614  std::stringstream ss;
615  SiStripFecKey( dcu_addr.fecCrate_,
616  dcu_addr.fecSlot_,
617  dcu_addr.fecRing_,
618  dcu_addr.ccuAddr_,
619  dcu_addr.ccuChan_,
620  3, 36 ).terse(ss);
621  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
622  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
623  devices.push_back( ss.str() );
624  }
625 
626  if ( !addrs[5] ) {
627  std::stringstream ss;
628  SiStripFecKey( dcu_addr.fecCrate_,
629  dcu_addr.fecSlot_,
630  dcu_addr.fecRing_,
631  dcu_addr.ccuAddr_,
632  dcu_addr.ccuChan_,
633  3, 37 ).terse(ss);
634  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
635  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
636  devices.push_back( ss.str() );
637  }
638 
639  }
640 
641  }
642 
643  // summary
644  {
645  std::stringstream ss;
646  ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
647  << " Summary of connections: " << std::endl
648  << " \"Good\" connections : " << valid.size() << std::endl
649  << " \"Dirty\" connections : " << dirty.size() << std::endl
650  << " \"Bad\" TrimDAQ settings : " << trimdac.size() << std::endl
651  << " (\"Missing\" connections : " << missing.size() << ")" << std::endl
652  << " (\"Missing\" APV pairs : " << missing_pairs << ")" << std::endl
653  << " (\"Missing\" APVs : " << devices.size() << ")" << std::endl;
654  edm::LogVerbatim(mlCabling_) << ss.str();
655  }
656 
657  // good connections
658  if ( !valid.empty() ) {
659  std::stringstream ss;
660  ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
661  << " List of \"good\" connections: " << std::endl;
662  std::vector<std::string>::const_iterator istr = valid.begin();
663  std::vector<std::string>::const_iterator jstr = valid.end();
664  for ( ; istr != jstr; ++istr ) { ss << *istr << std::endl; }
665  LogTrace(mlCabling_) << ss.str();
666  }
667 
668  // dirty connections
669  if ( !dirty.empty() ) {
670  std::stringstream ss;
671  ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
672  << " List of \"dirty\" connections: " << std::endl;
673  std::vector<std::string>::const_iterator istr = dirty.begin();
674  std::vector<std::string>::const_iterator jstr = dirty.end();
675  for ( ; istr != jstr; ++istr ) { ss << *istr << std::endl; }
676  edm::LogWarning(mlCabling_) << ss.str();
677  }
678 
679  // TrimDAC connections
680  if ( !trimdac.empty() ) {
681  std::stringstream ss;
682  ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
683  << " List of \"bad\" TrimDAC settings: " << std::endl;
684  std::vector<std::string>::const_iterator istr = trimdac.begin();
685  std::vector<std::string>::const_iterator jstr = trimdac.end();
686  for ( ; istr != jstr; ++istr ) { ss << *istr << std::endl; }
687  edm::LogWarning(mlCabling_) << ss.str();
688  }
689 
690  // missing connections
691  if ( !missing.empty() ) {
692  std::stringstream ss;
693  ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
694  << " List of \"missing\" connections: " << std::endl;
695  std::vector<std::string>::const_iterator istr = missing.begin();
696  std::vector<std::string>::const_iterator jstr = missing.end();
697  for ( ; istr != jstr; ++istr ) { ss << *istr << std::endl; }
698  edm::LogError(mlCabling_) << ss.str();
699  }
700 
701  // missing devices
702  if ( !devices.empty() ) {
703  std::stringstream ss;
704  ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
705  << " List of \"missing\" APVs: " << std::endl;
706  std::vector<std::string>::const_iterator istr = devices.begin();
707  std::vector<std::string>::const_iterator jstr = devices.end();
708  for ( ; istr != jstr; ++istr ) { ss << *istr << std::endl; }
709  edm::LogError(mlCabling_) << ss.str();
710  }
711 
712 }
TrackValidation_HighPurity_cff.valid
tuple valid
Definition: TrackValidation_HighPurity_cff.py:20
ExpressReco_HICollisions_FallBack.e
tuple e
Definition: ExpressReco_HICollisions_FallBack.py:1068
combine.missing
dictionary missing
Definition: combine.py:4
FastFedCablingAnalysis::lldCh
const uint16_t & lldCh() const
Definition: FastFedCablingAnalysis.h:145
SiStripConfigDb::DcuDetIdsRange
DcuDetIds::range DcuDetIdsRange
Definition: SiStripConfigDb.h:136
CommissioningAnalysis::fedKey
const uint32_t & fedKey() const
Definition: CommissioningAnalysis.h:136
FastFedCablingHistosUsingDb::create
void create(SiStripConfigDb::AnalysisDescriptionsV &, Analysis)
Definition: FastFedCablingHistosUsingDb.cc:376
FastFedCablingAnalysis::dcuHardId
const uint32_t & dcuHardId() const
Definition: FastFedCablingAnalysis.h:144
SiStripFedKey
A container class for generic run and event-related info, information required by the commissioning a...
Definition: SiStripFedKey.h:57
sistrip::invalid32_
static const uint32_t invalid32_
Definition: Constants.h:16
SiStripConfigDb::uploadFedConnections
void uploadFedConnections(std::string partition="")
Definition: FedConnections.cc:198
SiStripConfigDb::getFedDescriptions
FedDescriptionsRange getFedDescriptions(std::string partition="")
Definition: FedDescriptions.cc:13
Strings
std::vector< std::string > Strings
Definition: MsgTools.h:18
FastFedCablingAnalysis::dirtyThreshold_
static const float dirtyThreshold_
Definition: FastFedCablingAnalysis.h:89
EcalCondDB.db
tuple db
Definition: EcalCondDB.py:151
SiStripConfigDb::FedDescriptionsRange
FedDescriptions::range FedDescriptionsRange
Definition: SiStripConfigDb.h:125
sistrip::mlDqmClient_
static const char mlDqmClient_[]
Definition: ConstantsForLogger.h:20
ExpressReco_HICollisions_FallBack.errors
tuple errors
Definition: ExpressReco_HICollisions_FallBack.py:21108
FastFedCablingAnalysis::lowLevel
const float & lowLevel() const
Definition: FastFedCablingAnalysis.h:148
spr::find
void find(edm::Handle< EcalRecHitCollection > &hits, DetId thisDet, std::vector< EcalRecHitCollection::const_iterator > &hit, bool debug=false)
Definition: FindCaloHit.cc:7
SiStripFecKey::i2cAddr
const uint16_t & i2cAddr() const
Definition: SiStripFecKey.h:211
FastFedCablingAnalysis::highLevel
const float & highLevel() const
Definition: FastFedCablingAnalysis.h:146
SiStripKey::key
const uint32_t & key() const
Definition: SiStripKey.h:126
FastFedCablingHistosUsingDb::FastFedCablingHistosUsingDb
FastFedCablingHistosUsingDb(const edm::ParameterSet &pset, DQMStore *, SiStripConfigDb *const )
Definition: FastFedCablingHistosUsingDb.cc:14
SiStripFecKey
Utility class that identifies a position within the strip tracker control structure, down to the level of an APV25.
Definition: SiStripFecKey.h:46
SiStripDbParams::partitions
const_iterator_range partitions() const
Definition: SiStripDbParams.h:186
sistrip::mlCabling_
static const char mlCabling_[]
Definition: ConstantsForLogger.h:15
FastFedCablingAnalysis
Histogram-based analysis for connection loop.
Definition: FastFedCablingAnalysis.h:16
SiStripConfigDb::findDcuDetId
static DcuDetIdsV::const_iterator findDcuDetId(DcuDetIdsV::const_iterator begin, DcuDetIdsV::const_iterator end, uint32_t dcu_id)
Definition: DcuDetIds.cc:396
FastFedCablingAnalysis::min
const float & min() const
Definition: FastFedCablingAnalysis.h:151
SiStripConfigDb::DeviceDescriptionsRange
DeviceDescriptions::range DeviceDescriptionsRange
Definition: SiStripConfigDb.h:119
CommissioningAnalysis::dcuId
const uint32_t & dcuId() const
Definition: CommissioningAnalysis.h:138
SiStripConfigDb
An interface class to the DeviceFactory.
Definition: SiStripConfigDb.h:45
FastFedCablingAnalysis::max
const float & max() const
Definition: FastFedCablingAnalysis.h:150
CommissioningAnalysis::fecKey
const uint32_t & fecKey() const
Definition: CommissioningAnalysis.h:135
CrabTask.pset
tuple pset
Definition: CrabTask.py:85
end
#define end
Definition: vmac.h:38
SiStripConfigDb::deviceAddress
DeviceAddress deviceAddress(const deviceDescription &)
Definition: DeviceDescriptions.cc:513
first
bool first
Definition: L1TdeRCT.cc:79
LogTrace
#define LogTrace(id)
Definition: MessageLogger.h:511
SiStripConfigDb::clearFedConnections
void clearFedConnections(std::string partition="")
Definition: FedConnections.cc:278
FastFedCablingHistosUsingDb::connections
void connections(SiStripConfigDb::DeviceDescriptionsRange, SiStripConfigDb::DcuDetIdsRange)
Definition: FastFedCablingHistosUsingDb.cc:433
SiStripFedKey::feUnit
const uint16_t & feUnit() const
Definition: SiStripFedKey.h:196
SiStripConfigDb::dbParams
const SiStripDbParams & dbParams() const
Definition: SiStripConfigDb.h:468
FastFedCablingHistosUsingDb::update
void update(SiStripConfigDb::FedConnectionsV &, SiStripConfigDb::FedDescriptionsRange, SiStripConfigDb::DeviceDescriptionsRange, SiStripConfigDb::DcuDetIdsRange)
Definition: FastFedCablingHistosUsingDb.cc:110
SiStripConfigDb::uploadFedDescriptions
void uploadFedDescriptions(std::string partition="")
Definition: FedDescriptions.cc:202
FastFedCablingAnalysis::highRms
const float & highRms() const
Definition: FastFedCablingAnalysis.h:147
FastFedCablingAnalysis::lowRms
const float & lowRms() const
Definition: FastFedCablingAnalysis.h:149
tmp
std::vector< std::vector< double > > tmp
Definition: MVATrainer.cc:100
combine.key
list key
Definition: combine.py:13
sistrip::FEDCH_PER_FED
static const uint16_t FEDCH_PER_FED
Definition: ConstantsForHardwareSystems.h:31
SiStripConfigDb::AnalysisDescriptionsV
std::vector< AnalysisDescription * > AnalysisDescriptionsV
Definition: SiStripConfigDb.h:145
SiStripFedKey::feChan
const uint16_t & feChan() const
Definition: SiStripFedKey.h:197
CommissioningAnalysis::detId
const uint32_t & detId() const
Definition: CommissioningAnalysis.h:139
SiStripConfigDb::FedConnectionsV
std::vector< FedConnection * > FedConnectionsV
Definition: SiStripConfigDb.h:113
CommissioningHistosUsingDb::db
SiStripConfigDb *const db() const
Definition: CommissioningHistosUsingDb.h:101
SiStripConfigDb::addFedConnections
void addFedConnections(std::string partition, FedConnectionsV &)
Definition: FedConnections.cc:128
SiStripConfigDb::getDeviceDescriptions
DeviceDescriptionsRange getDeviceDescriptions(std::string partition="")
Definition: DeviceDescriptions.cc:12
SiStripConfigDb::getDcuDetIds
DcuDetIdsRange getDcuDetIds(std::string partition="")
Definition: DcuDetIds.cc:11
CommissioningHistosUsingDb::cabling
SiStripFedCabling *const cabling() const
Definition: CommissioningHistosUsingDb.h:102
CommissioningAnalysis::getErrorCodes
const VString & getErrorCodes() const
Definition: CommissioningAnalysis.h:133
SiStripFecKey::terse
virtual void terse(std::stringstream &ss) const
Definition: SiStripFecKey.cc:758
FastFedCablingAnalysis::threshold_
static const float threshold_
Definition: FastFedCablingAnalysis.h:86
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