38 void endJob()
override;
47 std::map<l1t::demo::LinkId, std::vector<ap_uint<64>>>
linkData_;
55 channelFinOr_(
config.getParameter<unsigned
int>(
"channelFinOr")),
62 config.getParameter<unsigned
int>(
"maxLines"),
97 auto algoBlockIt = algoBlocks.begin();
113 for (std::size_t
idx = 0;
idx < 64 && algoBlockIt != algoBlocks.end();
idx++, algoBlockIt++) {
114 auto& [alogName, algoBlock] = *algoBlockIt;
116 idx, algoBlock.decisionBeforeBxMaskAndPrescale());
118 idx, algoBlock.decisionBeforePrescale());
120 algoBlock.decisionFinal());
125 for (std::size_t
idx = 0;
idx < 64 && algoBlockIt != algoBlocks.end();
idx++, algoBlockIt++) {
126 auto& [alogName, algoBlock] = *algoBlockIt;
128 idx, algoBlock.decisionBeforeBxMaskAndPrescale());
130 idx, algoBlock.decisionBeforePrescale());
132 algoBlock.decisionFinal());
137 for (std::size_t
idx = 0;
idx < 64 && algoBlockIt != algoBlocks.end();
idx++, algoBlockIt++) {
138 auto& [
algoName, algoBlock] = *algoBlockIt;
140 idx, algoBlock.decisionBeforeBxMaskAndPrescale());
142 idx, algoBlock.decisionBeforePrescale());
144 idx, algoBlock.decisionFinal());
148 bool vetoed =
false, vetoedPreview =
false;
149 int finOrByTypes = 0, finOrPreviewByTypes = 0;
150 for (
auto algoBlockIt = algoBlocks.begin(); algoBlockIt != algoBlocks.end(); algoBlockIt++) {
151 auto& [alogName, algoBlock] = *algoBlockIt;
152 vetoed |= (algoBlock.isVeto() && algoBlock.decisionFinal());
153 vetoedPreview |= (algoBlock.isVeto() && algoBlock.decisionFinalPreview());
154 finOrByTypes |= algoBlock.decisionFinal() ? algoBlock.triggerTypes() : 0;
155 finOrPreviewByTypes |= algoBlock.decisionFinalPreview() ? algoBlock.triggerTypes() : 0;
159 ap_uint<64> finOrBits(0);
160 finOrBits(7, 0) = finOrByTypes;
161 finOrBits(15, 8) = finOrPreviewByTypes;
162 finOrBits(23, 16) = vetoed ? 0 : finOrByTypes;
163 finOrBits(31, 24) = vetoedPreview ? 0 : finOrPreviewByTypes;
187 desc.add<std::vector<unsigned int>>(
"channelsLow");
188 desc.add<std::vector<unsigned int>>(
"channelsMid");
189 desc.add<std::vector<unsigned int>>(
"channelsHigh");
190 desc.add<
unsigned int>(
"channelFinOr");
191 desc.add<
unsigned int>(
"maxLines", 1024);
std::map< l1t::demo::LinkId, std::vector< ap_uint< 64 > > > linkData_
Logical ID for link within any given time slice (e.g. ["tracks", 0] -> ["tracks", 17] for links from ...
L1GTFinOrBoardWriter(const edm::ParameterSet &)
void addEvent(const EventData &data)
std::map< std::string, P2GTAlgoBlock > P2GTAlgoBlockMap
FileFormat parseFileFormat(const std::string &)
const std::array< unsigned int, 3 > channelsMid_
example_stream void analyze(const edm::Event &, const edm::EventSetup &) override
void analyze(const edm::Event &, const edm::EventSetup &) override
const edm::EDGetTokenT< P2GTAlgoBlockMap > algoBlocksToken_
void addDefault(ParameterSetDescription const &psetDescription)
#define DEFINE_FWK_MODULE(type)
std::map< LinkId, std::pair< ChannelSpec, std::vector< size_t > > > ChannelMap_t
static void fillDescriptions(edm::ConfigurationDescriptions &descriptions)
static void fillDescriptions(edm::ConfigurationDescriptions &descriptions)
const unsigned int channelFinOr_
Class representing information phase-2 ATCA I/O data corresponding to a single event, with logical channel IDs (essentially string-uint pairs, e.g. tracks-0 to tracks-17).
const std::array< unsigned int, 3 > channelsHigh_
const std::array< unsigned int, 3 > channelsLow_
l1t::demo::BoardDataWriter boardDataWriter_