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customiseReEmul Namespace Reference

Functions

def L1TAddBitwiseLayer1 (process)
 
def L1TCaloStage2ParamsForHW (process)
 
def L1TEventSetupForHF1x1TPs (process)
 
def L1TReEmulFromNANO (process)
 
def L1TReEmulFromRAW (process)
 
def L1TReEmulFromRAW2015 (process)
 
def L1TReEmulFromRAW2015simCaloTP (process)
 
def L1TReEmulFromRAW2016 (process)
 
def L1TReEmulFromRAWCalo (process)
 
def L1TReEmulFromRAWCaloSimTP (process)
 
def L1TReEmulFromRAWCalouGT (process)
 
def L1TReEmulFromRAWLegacyMuon (process)
 
def L1TReEmulFromRAWsimEcalTP (process)
 
def L1TReEmulFromRAWsimHcalTP (process)
 
def L1TReEmulFromRAWsimTP (process)
 
def L1TReEmulMCFrom90xRAWSimHcalTP (process)
 
def L1TReEmulMCFromRAW (process)
 
def L1TReEmulMCFromRAW2015 (process)
 
def L1TReEmulMCFromRAWSimCalTP (process)
 
def L1TReEmulMCFromRAWSimEcalTP (process)
 
def L1TReEmulMCFromRAWSimHcalTP (process)
 

Variables

 CSCCandidates
 
 CSCComparatorDigiProducer
 
 CSCInput
 
 CSCStub_Source
 
 CSCTrackProducer
 
 CSCWireDigiProducer
 
 digiTag
 
 DTCandidates
 
 DTDigi_Source
 
 DTDigi_Theta_Source
 
 DTproducer
 
 DTThetaDigi_Source
 
 ecalToken
 
 hcalToken
 
 L1TMuonTriggerPrimitives
 
 L1TReEmul
 
 L1TReEmulPath
 
 label
 
 muonSource
 
 RPC_Source
 
 RPCbCandidates
 
 RPCfCandidates
 
 RPCInput
 
 RPCTriggerDebug
 
 SectorReceiverInput
 
 simCsctfDigis
 
 simCsctfTrackDigis
 
 simCscTriggerPrimitiveDigis
 
 simDttfDigis
 
 simDtTriggerPrimitiveDigis
 
 simGmtDigis
 
 simRpcTriggerDigis
 
 simTwinMuxDigisForDttf
 
 srcCSC
 
 srcDTPh
 
 srcDTTh
 
 srcRPC
 

Function Documentation

◆ L1TAddBitwiseLayer1()

def customiseReEmul.L1TAddBitwiseLayer1 (   process)

Definition at line 12 of file customiseReEmul.py.

References print().

12 def L1TAddBitwiseLayer1(process):
13  from L1Trigger.L1TCaloLayer1.simCaloStage2Layer1Digis_cfi import simCaloStage2Layer1Digis as simCaloStage2BitwiseLayer1Digis
14  from L1Trigger.L1TCalorimeter.simCaloStage2Digis_cfi import simCaloStage2Digis as simCaloStage2BitwiseDigis
15  process.simCaloStage2BitwiseLayer1Digis = simCaloStage2BitwiseLayer1Digis.clone()
16  process.simCaloStage2BitwiseLayer1Digis.ecalToken = cms.InputTag("ecalDigis:EcalTriggerPrimitives")
17  process.simCaloStage2BitwiseDigis = simCaloStage2BitwiseDigis.clone()
18  process.simCaloStage2BitwiseDigis.towerToken = cms.InputTag("simCaloStage2BitwiseLayer1Digis")
19  process.SimL1TCalorimeter = cms.Sequence( process.simCaloStage2Layer1Digis + process.simCaloStage2Digis + process.simCaloStage2BitwiseLayer1Digis + process.simCaloStage2BitwiseDigis)
20  from L1Trigger.L1TNtuples.l1UpgradeTree_cfi import l1UpgradeTree
21  process.l1UpgradeBitwiseTree = l1UpgradeTree.clone()
22  process.l1UpgradeBitwiseTree.egToken = cms.untracked.InputTag("simCaloStage2BitwiseDigis")
23  process.l1UpgradeBitwiseTree.tauTokens = cms.untracked.VInputTag("simCaloStage2BitwiseDigis")
24  process.l1UpgradeBitwiseTree.jetToken = cms.untracked.InputTag("simCaloStage2BitwiseDigis")
25  process.l1UpgradeBitwiseTree.muonToken = cms.untracked.InputTag("simGmtStage2Digis")
26  process.l1UpgradeBitwiseTree.sumToken = cms.untracked.InputTag("simCaloStage2BitwiseDigis")
27  process.l1ntuplebitwise = cms.Path(
28  process.l1UpgradeBitwiseTree
29  )
30  process.schedule.append(process.l1ntuplebitwise)
31  print("# modified L1TReEmul: ")
32  print("# {0}".format(process.L1TReEmul))
33  return process
34 
35 # As of 80X, this ES configuration is needed for *data* GTs (mc tags work w/o)
void print(TMatrixD &m, const char *label=nullptr, bool mathematicaFormat=false)
Definition: Utilities.cc:47
def L1TAddBitwiseLayer1(process)

◆ L1TCaloStage2ParamsForHW()

def customiseReEmul.L1TCaloStage2ParamsForHW (   process)

Definition at line 8 of file customiseReEmul.py.

8 def L1TCaloStage2ParamsForHW(process):
9  process.load("L1Trigger.L1TCalorimeter.caloStage2Params_HWConfig_cfi")
10  return process
11 
def L1TCaloStage2ParamsForHW(process)

◆ L1TEventSetupForHF1x1TPs()

def customiseReEmul.L1TEventSetupForHF1x1TPs (   process)

Definition at line 36 of file customiseReEmul.py.

36 def L1TEventSetupForHF1x1TPs(process):
37  process.es_pool_hf1x1 = cms.ESSource(
38  "PoolDBESSource",
39  #process.CondDBSetup,
40  timetype = cms.string('runnumber'),
41  toGet = cms.VPSet(
42  cms.PSet(record = cms.string("HcalLutMetadataRcd"),
43  tag = cms.string("HcalLutMetadata_HFTP_1x1")
44  ),
45  cms.PSet(record = cms.string("HcalElectronicsMapRcd"),
46  tag = cms.string("HcalElectronicsMap_HFTP_1x1")
47  )
48  ),
49  connect = cms.string('frontier://FrontierProd/CMS_CONDITIONS'),
50  authenticationMethod = cms.untracked.uint32(0)
51  )
52  process.es_prefer_es_pool_hf1x1 = cms.ESPrefer("PoolDBESSource", "es_pool_hf1x1")
53  return process
54 
def L1TEventSetupForHF1x1TPs(process)

◆ L1TReEmulFromNANO()

def customiseReEmul.L1TReEmulFromNANO (   process)

Definition at line 240 of file customiseReEmul.py.

240 def L1TReEmulFromNANO(process):
241 
242  process.load('L1Trigger.Configuration.SimL1Emulator_cff')
243  process.L1TReEmul = cms.Sequence(process.SimL1TGlobal)
244  stage2L1Trigger_2017.toModify(process.simGtStage2Digis,
245  ExtInputTag = "hltGtStage2Digis",
246  MuonInputTag = "hltGtStage2Digis:Muon",
247  EtSumInputTag = "hltGtStage2Digis:EtSum",
248  EGammaInputTag = "hltGtStage2Digis:EGamma",
249  TauInputTag = "hltGtStage2Digis:Tau",
250  JetInputTag = "hltGtStage2Digis:Jet"
251  )
252 
253  if not hasattr(process, 'L1TReEmulPath'):
254  process.L1TReEmulPath = cms.Path(process.L1TReEmul)
255  process.schedule.append(process.L1TReEmulPath)
256 
257  print ("# L1TReEmul sequence: ")
258  print ("# {0}".format(process.L1TReEmul))
259  print ("# {0}".format(process.schedule))
260  return process
261 
def L1TReEmulFromNANO(process)

◆ L1TReEmulFromRAW()

def customiseReEmul.L1TReEmulFromRAW (   process)

Definition at line 190 of file customiseReEmul.py.

References L1TReEmulFromRAW2016(), and print().

Referenced by L1TReEmulFromRAWCalouGT(), L1TReEmulFromRAWsimEcalTP(), L1TReEmulFromRAWsimHcalTP(), L1TReEmulFromRAWsimTP(), and L1TReEmulMCFromRAW().

190 def L1TReEmulFromRAW(process):
191  L1TReEmulFromRAW2016(process)
192 
193 
194  stage2L1Trigger_2017.toModify(process.simOmtfDigis,
195  srcRPC = 'omtfStage2Digis',
196  srcCSC = 'omtfStage2Digis',
197  srcDTPh = 'omtfStage2Digis',
198  srcDTTh = 'omtfStage2Digis'
199  )
200 
201  stage2L1Trigger.toModify(process.simEmtfDigis,
202  CSCInput = cms.InputTag('emtfStage2Digis'),
203  RPCInput = cms.InputTag('muonRPCDigis'),
204  CPPFInput = cms.InputTag('emtfStage2Digis'),
205  GEMEnable = cms.bool(False),
206  GEMInput = cms.InputTag('muonGEMPadDigis'),
207  CPPFEnable = cms.bool(True), # Use CPPF-emulated clustered RPC hits from CPPF as the RPC hits
208  )
209 
210  run3_GEM.toModify(process.simMuonGEMPadDigis,
211  InputCollection = 'muonGEMDigis',
212  )
213 
214  run3_GEM.toModify(process.simTwinMuxDigis,
215  RPC_Source = 'rpcTwinMuxRawToDigi',
216  DTDigi_Source = 'simDtTriggerPrimitiveDigis',
217  DTThetaDigi_Source = 'simDtTriggerPrimitiveDigis'
218  )
219 
220  run3_GEM.toModify(process.simKBmtfStubs,
221  srcPhi = 'bmtfDigis',
222  srcTheta = 'bmtfDigis'
223  )
224 
225  run3_GEM.toModify(process.simBmtfDigis,
226  DTDigi_Source = 'bmtfDigis',
227  DTDigi_Theta_Source = 'bmtfDigis'
228  )
229 
230  print("# L1TReEmul sequence: ")
231  print("# {0}".format(process.L1TReEmul))
232  print("# {0}".format(process.schedule))
233  return process
234 
def L1TReEmulFromRAW2016(process)
void print(TMatrixD &m, const char *label=nullptr, bool mathematicaFormat=false)
Definition: Utilities.cc:47
def L1TReEmulFromRAW(process)

◆ L1TReEmulFromRAW2015()

def customiseReEmul.L1TReEmulFromRAW2015 (   process)

Definition at line 55 of file customiseReEmul.py.

References print().

Referenced by L1TReEmulFromRAW2015simCaloTP(), and L1TReEmulMCFromRAW2015().

55 def L1TReEmulFromRAW2015(process):
56  process.load('L1Trigger.Configuration.SimL1Emulator_cff')
57  process.load('L1Trigger.Configuration.CaloTriggerPrimitives_cff')
58  process.simEcalTriggerPrimitiveDigis.Label = 'ecalDigis'
59  process.simHcalTriggerPrimitiveDigis.inputLabel = cms.VInputTag(
60  cms.InputTag('hcalDigis'),
61  cms.InputTag('hcalDigis')
62  )
63  process.L1TReEmul = cms.Sequence(process.simEcalTriggerPrimitiveDigis * process.simHcalTriggerPrimitiveDigis * process.SimL1Emulator)
64  process.simDtTriggerPrimitiveDigis.digiTag = 'muonDTDigis'
65  process.simCscTriggerPrimitiveDigis.CSCComparatorDigiProducer = cms.InputTag( 'muonCSCDigis', 'MuonCSCComparatorDigi')
66  process.simCscTriggerPrimitiveDigis.CSCWireDigiProducer = cms.InputTag( 'muonCSCDigis', 'MuonCSCWireDigi' )
67 
68  stage2L1Trigger.toModify(process.simTwinMuxDigis,
69  RPC_Source = 'muonRPCDigis',
70  # When available, this will switch to TwinMux input Digis:
71  DTDigi_Source = "dttfDigis",
72  DTThetaDigi_Source = "dttfDigis"
73  )
74  stage2L1Trigger.toModify(process.simOmtfDigis,
75  srcRPC = 'muonRPCDigis',
76  srcCSC = "csctfDigis"
77  )
78  stage2L1Trigger.toModify(process.simBmtfDigis,
79  DTDigi_Source = "simTwinMuxDigis",
80  DTDigi_Theta_Source = "dttfDigis"
81  )
82  stage2L1Trigger.toModify(process.simKBmtfStubs,
83  srcPhi = "simTwinMuxDigis",
84  srcTheta = "dttfDigis"
85  )
86  stage2L1Trigger.toModify(process.simEmtfDigis,
87  CSCInput = "csctfDigis",
88  RPCInput = 'muonRPCDigis'
89  )
90  stage2L1Trigger.toModify(process.simCaloStage2Layer1Digis, ecalToken = "ecalDigis:EcalTriggerPrimitives")
91  # quiet warning abouts missing Stage-2 payloads, since they won't reliably exist in 2015 data.
92  stage2L1Trigger.toModify(process.caloStage2Digis, MinFeds = 0)
93  stage2L1Trigger.toModify(process.gmtStage2Digis, MinFeds = 0)
94  stage2L1Trigger.toModify(process.gtStage2Digis, MinFeds = 0)
95 
96  (~stage2L1Trigger).toModify(process.simRctDigis,
97  ecalDigis = ['simEcalTriggerPrimitiveDigis'],
98  hcalDigis = ['simHcalTriggerPrimitiveDigis']
99  )
100  (~stage2L1Trigger).toModify(process.simRpcTriggerDigis, label = 'muonRPCDigis')
101  (~stage2L1Trigger).toModify(process.simRpcTechTrigDigis, RPCDigiLabel = 'muonRPCDigis')
102 
103  if not hasattr(process, 'L1TReEmulPath'):
104  process.L1TReEmulPath = cms.Path(process.L1TReEmul)
105  process.schedule.append(process.L1TReEmulPath)
106 
107  print("# L1TReEmul sequence: ")
108  print("# {0}".format(process.L1TReEmul))
109  print("# {0}".format(process.schedule))
110  return process
111 
def L1TReEmulFromRAW2015(process)
void print(TMatrixD &m, const char *label=nullptr, bool mathematicaFormat=false)
Definition: Utilities.cc:47

◆ L1TReEmulFromRAW2015simCaloTP()

def customiseReEmul.L1TReEmulFromRAW2015simCaloTP (   process)

Definition at line 118 of file customiseReEmul.py.

References L1TReEmulFromRAW2015().

118 def L1TReEmulFromRAW2015simCaloTP(process):
119  L1TReEmulFromRAW2015(process)
120  stage2L1Trigger.toModify(process.simCaloStage2Layer1Digis, ecalToken = "simEcalTriggerPrimitiveDigis")
121  return process
122 
def L1TReEmulFromRAW2015simCaloTP(process)
def L1TReEmulFromRAW2015(process)

◆ L1TReEmulFromRAW2016()

def customiseReEmul.L1TReEmulFromRAW2016 (   process)

Definition at line 123 of file customiseReEmul.py.

Referenced by L1TReEmulFromRAW().

123 def L1TReEmulFromRAW2016(process):
124  process.load('L1Trigger.Configuration.SimL1Emulator_cff')
125  process.load('L1Trigger.Configuration.CaloTriggerPrimitives_cff')
126  process.simEcalTriggerPrimitiveDigis.Label = 'ecalDigis'
127  process.simHcalTriggerPrimitiveDigis.inputLabel = cms.VInputTag(
128  cms.InputTag('hcalDigis'),
129  cms.InputTag('hcalDigis')
130  )
131  process.simHcalTriggerPrimitiveDigis.inputUpgradeLabel = cms.VInputTag(
132  cms.InputTag('hcalDigis'),
133  cms.InputTag('hcalDigis')
134  )
135  process.simDtTriggerPrimitiveDigis.digiTag = cms.InputTag("muonDTDigis")
136  process.simCscTriggerPrimitiveDigis.CSCComparatorDigiProducer = cms.InputTag( 'muonCSCDigis', 'MuonCSCComparatorDigi')
137  process.simCscTriggerPrimitiveDigis.CSCWireDigiProducer = cms.InputTag( 'muonCSCDigis', 'MuonCSCWireDigi' )
138  process.L1TReEmul = cms.Sequence(process.simEcalTriggerPrimitiveDigis * process.simHcalTriggerPrimitiveDigis * process.SimL1Emulator)
139 
140 
141  #cutlist=['simDtTriggerPrimitiveDigis','simCscTriggerPrimitiveDigis']
142  #for b in cutlist:
143  # process.SimL1Emulator.remove(getattr(process,b))
144  # TwinMux
145  stage2L1Trigger.toModify(process.simTwinMuxDigis,
146  RPC_Source = 'rpcTwinMuxRawToDigi',
147  DTDigi_Source = 'twinMuxStage2Digis:PhIn',
148  DTThetaDigi_Source = 'twinMuxStage2Digis:ThIn'
149  )
150  # BMTF
151  stage2L1Trigger.toModify(process.simBmtfDigis,
152  DTDigi_Source = "simTwinMuxDigis",
153  DTDigi_Theta_Source = "bmtfDigis"
154  )
155  # KBMTF
156  stage2L1Trigger.toModify(process.simKBmtfStubs,
157  srcPhi = 'simTwinMuxDigis',
158  srcTheta = 'bmtfDigis'
159  )
160  # OMTF
161  stage2L1Trigger.toModify(process.simOmtfDigis,
162  srcRPC = 'muonRPCDigis',
163  srcCSC = 'csctfDigis',
164  srcDTPh = 'bmtfDigis',
165  srcDTTh = 'bmtfDigis'
166  )
167  # EMTF
168  stage2L1Trigger.toModify(process.simEmtfDigis,
169  CSCInput = 'emtfStage2Digis',
170  RPCInput = 'muonRPCDigis'
171  )
172  # Calo Layer1
173  stage2L1Trigger.toModify(process.simCaloStage2Layer1Digis,
174  ecalToken = 'ecalDigis:EcalTriggerPrimitives',
175  hcalToken = 'hcalDigis:'
176  )
177 
178  (~stage2L1Trigger).toModify(process.simRctDigis,
179  ecalDigis = ['ecalDigis:EcalTriggerPrimitives'],
180  hcalDigis = ['hcalDigis:']
181  )
182  (~stage2L1Trigger).toModify(process.simRpcTriggerDigis, label = 'muonRPCDigis')
183 
184  if not hasattr(process, 'L1TReEmulPath'):
185  process.L1TReEmulPath = cms.Path(process.L1TReEmul)
186  process.schedule.append(process.L1TReEmulPath)
187 
188  return process
189 
def L1TReEmulFromRAW2016(process)

◆ L1TReEmulFromRAWCalo()

def customiseReEmul.L1TReEmulFromRAWCalo (   process)

Definition at line 262 of file customiseReEmul.py.

262 def L1TReEmulFromRAWCalo(process):
263  process.load('L1Trigger.Configuration.SimL1CaloEmulator_cff')
264  process.L1TReEmul = cms.Sequence(process.SimL1CaloEmulator)
265  process.simCaloStage2Layer1Digis.ecalToken = cms.InputTag('ecalDigis:EcalTriggerPrimitives')
266  process.simCaloStage2Layer1Digis.hcalToken = cms.InputTag('hcalDigis:')
267 
268  if not hasattr(process, 'L1TReEmulPath'):
269  process.L1TReEmulPath = cms.Path(process.L1TReEmul)
270  process.schedule.append(process.L1TReEmulPath)
271 
272  print ("# L1TReEmul sequence: ")
273  print ("# {0}".format(process.L1TReEmul))
274  print ("# {0}".format(process.schedule))
275  return process
276 
def L1TReEmulFromRAWCalo(process)

◆ L1TReEmulFromRAWCaloSimTP()

def customiseReEmul.L1TReEmulFromRAWCaloSimTP (   process)

Definition at line 277 of file customiseReEmul.py.

277 def L1TReEmulFromRAWCaloSimTP(process):
278  process.load('L1Trigger.Configuration.SimL1CaloEmulator_cff')
279  process.L1TReEmul = cms.Sequence(process.SimL1CaloEmulator)
280  if not hasattr(process, 'L1TReEmulPath'):
281  process.L1TReEmulPath = cms.Path(process.L1TReEmul)
282  process.schedule.append(process.L1TReEmulPath)
283 
284  print ("# L1TReEmul sequence: ")
285  print ("# {0}".format(process.L1TReEmul))
286  print ("# {0}".format(process.schedule))
287  return process
288 
def L1TReEmulFromRAWCaloSimTP(process)

◆ L1TReEmulFromRAWCalouGT()

def customiseReEmul.L1TReEmulFromRAWCalouGT (   process)

Definition at line 235 of file customiseReEmul.py.

References L1TReEmulFromRAW().

235 def L1TReEmulFromRAWCalouGT(process):
236  L1TReEmulFromRAW(process)
237  process.simGtStage2Digis.MuonInputTag = cms.InputTag("gtStage2Digis","Muon")
238  return process
239 
def L1TReEmulFromRAW(process)
def L1TReEmulFromRAWCalouGT(process)

◆ L1TReEmulFromRAWLegacyMuon()

def customiseReEmul.L1TReEmulFromRAWLegacyMuon (   process)

Definition at line 404 of file customiseReEmul.py.

404 def L1TReEmulFromRAWLegacyMuon(process):
405  process.load('L1Trigger.Configuration.SimL1Emulator_cff')
406  process.load('L1Trigger.Configuration.CaloTriggerPrimitives_cff')
407  process.simEcalTriggerPrimitiveDigis.Label = 'ecalDigis'
408  process.simHcalTriggerPrimitiveDigis.inputLabel = cms.VInputTag(
409  cms.InputTag('hcalDigis'),
410  cms.InputTag('hcalDigis')
411  )
412 
def L1TReEmulFromRAWLegacyMuon(process)

◆ L1TReEmulFromRAWsimEcalTP()

def customiseReEmul.L1TReEmulFromRAWsimEcalTP (   process)

Definition at line 357 of file customiseReEmul.py.

References L1TReEmulFromRAW().

357 def L1TReEmulFromRAWsimEcalTP(process):
358  L1TReEmulFromRAW(process)
359  stage2L1Trigger.toModify(process.simCaloStage2Layer1Digis, ecalToken = "simEcalTriggerPrimitiveDigis")
360  return process
361 
def L1TReEmulFromRAWsimEcalTP(process)
def L1TReEmulFromRAW(process)

◆ L1TReEmulFromRAWsimHcalTP()

def customiseReEmul.L1TReEmulFromRAWsimHcalTP (   process)

Definition at line 362 of file customiseReEmul.py.

References L1TReEmulFromRAW().

362 def L1TReEmulFromRAWsimHcalTP(process):
363  L1TReEmulFromRAW(process)
364  stage2L1Trigger.toModify(process.simCaloStage2Layer1Digis, hcalToken = 'simHcalTriggerPrimitiveDigis')
365  return process
366 
def L1TReEmulFromRAW(process)
def L1TReEmulFromRAWsimHcalTP(process)

◆ L1TReEmulFromRAWsimTP()

def customiseReEmul.L1TReEmulFromRAWsimTP (   process)

Definition at line 367 of file customiseReEmul.py.

References L1TReEmulFromRAW().

367 def L1TReEmulFromRAWsimTP(process):
368  L1TReEmulFromRAW(process)
369  # TwinMux
370  stage2L1Trigger.toModify(process.simTwinMuxDigis,
371  RPC_Source = 'muonRPCDigis',
372  DTDigi_Source = 'simDtTriggerPrimitiveDigis',
373  DTThetaDigi_Source = 'simDtTriggerPrimitiveDigis'
374  )
375  # BMTF
376  stage2L1Trigger.toModify(process.simBmtfDigis,
377  DTDigi_Source = 'simTwinMuxDigis',
378  DTDigi_Theta_Source = 'simDtTriggerPrimitiveDigis'
379  )
380  # KBMTF
381  stage2L1Trigger.toModify(process.simKBmtfStubs,
382  srcPhi = "simTwinMuxDigis",
383  srcTheta = "simDtTriggerPrimitiveDigis"
384  )
385  # OMTF
386  stage2L1Trigger.toModify(process.simOmtfDigis,
387  srcRPC = 'muonRPCDigis',
388  srcCSC = 'simCscTriggerPrimitiveDigis',
389  srcDTPh = 'simDtTriggerPrimitiveDigis',
390  srcDTTh = 'simDtTriggerPrimitiveDigis'
391  )
392  # EMTF
393  stage2L1Trigger.toModify(process.simEmtfDigis,
394  CSCInput = 'simCscTriggerPrimitiveDigis',
395  RPCInput = 'muonRPCDigis'
396  )
397  # Layer1
398  stage2L1Trigger.toModify(process.simCaloStage2Layer1Digis,
399  ecalToken = "simEcalTriggerPrimitiveDigis",
400  hcalToken = 'simHcalTriggerPrimitiveDigis'
401  )
402  return process
403 
def L1TReEmulFromRAW(process)
def L1TReEmulFromRAWsimTP(process)

◆ L1TReEmulMCFrom90xRAWSimHcalTP()

def customiseReEmul.L1TReEmulMCFrom90xRAWSimHcalTP (   process)

Definition at line 331 of file customiseReEmul.py.

References L1TReEmulMCFromRAW().

331 def L1TReEmulMCFrom90xRAWSimHcalTP(process):
332  L1TReEmulMCFromRAW(process)
333  stage2L1Trigger.toModify(process.simHcalTriggerPrimitiveDigis,
334  inputLabel = [
335  'simHcalUnsuppressedDigis',
336  'simHcalUnsuppressedDigis'
337  ],
338  inputUpgradeLabel = [
339  'simHcalUnsuppressedDigis:HBHEQIE11DigiCollection',
340  'simHcalUnsuppressedDigis:HFQIE10DigiCollection'
341  ]
342  )
343  stage2L1Trigger.toModify(process.simCaloStage2Layer1Digis, hcalToken = 'simHcalTriggerPrimitiveDigis')
344  return process
345  #inputUpgradeLabel = cms.VInputTag(
346  # cms.InputTag('simHcalUnsuppressedDigis:HBHEQIE11DigiCollection'),
347  # cms.InputTag('simHcalUnsuppressedDigis:HFQIE10DigiCollection')),
348 
def L1TReEmulMCFromRAW(process)
def L1TReEmulMCFrom90xRAWSimHcalTP(process)

◆ L1TReEmulMCFromRAW()

def customiseReEmul.L1TReEmulMCFromRAW (   process)

Definition at line 289 of file customiseReEmul.py.

References L1TReEmulFromRAW().

Referenced by L1TReEmulMCFrom90xRAWSimHcalTP(), L1TReEmulMCFromRAWSimCalTP(), L1TReEmulMCFromRAWSimEcalTP(), and L1TReEmulMCFromRAWSimHcalTP().

289 def L1TReEmulMCFromRAW(process):
290  L1TReEmulFromRAW(process)
291  stage2L1Trigger.toModify(process.simEmtfDigis, CSCInput = 'simCscTriggerPrimitiveDigis:MPCSORTED')
292  stage2L1Trigger.toModify(process.simOmtfDigis, srcCSC = 'simCscTriggerPrimitiveDigis:MPCSORTED')
293 
294  # Correct input collections for MC re-emulation
295  run3_GEM.toModify(process.simBmtfDigis,
296  DTDigi_Source = 'simTwinMuxDigis',
297  DTDigi_Theta_Source = 'simDtTriggerPrimitiveDigis'
298  )
299 
300  run3_GEM.toModify(process.simKBmtfStubs,
301  srcPhi = "simTwinMuxDigis",
302  srcTheta = "simDtTriggerPrimitiveDigis"
303  )
304 
305  run3_GEM.toModify(process.simOmtfDigis,
306  srcRPC = 'muonRPCDigis',
307  srcDTPh = 'simDtTriggerPrimitiveDigis',
308  srcDTTh = 'simDtTriggerPrimitiveDigis'
309  )
310 
311  run3_GEM.toModify(process.simEmtfDigis,
312  RPCInput = 'muonRPCDigis',
313  GEMEnable = False, # Will be enabled when GEM is in use.
314  GEMInput = 'simMuonGEMPadDigiClusters',
315  CPPFEnable = False, # Use CPPF-emulated clustered RPC hits from CPPF as the RPC hits. Set to "False" for MC
316  UseRun3CCLUT_OTMB = False, # TODO: Enable UseRun3CCLUT_OTMB once it's ready.
317  )
318 
319  return process
320 
def L1TReEmulMCFromRAW(process)
def L1TReEmulFromRAW(process)

◆ L1TReEmulMCFromRAW2015()

def customiseReEmul.L1TReEmulMCFromRAW2015 (   process)

Definition at line 112 of file customiseReEmul.py.

References L1TReEmulFromRAW2015().

112 def L1TReEmulMCFromRAW2015(process):
113  L1TReEmulFromRAW2015(process)
114  stage2L1Trigger.toModify(process.simEmtfDigis, CSCInput = 'simCscTriggerPrimitiveDigis:MPCSORTED')
115  stage2L1Trigger.toModify(process.simOmtfDigis, srcCSC = 'simCscTriggerPrimitiveDigis:MPCSORTED')
116  return process
117 
def L1TReEmulFromRAW2015(process)
def L1TReEmulMCFromRAW2015(process)

◆ L1TReEmulMCFromRAWSimCalTP()

def customiseReEmul.L1TReEmulMCFromRAWSimCalTP (   process)

Definition at line 349 of file customiseReEmul.py.

References L1TReEmulMCFromRAW().

349 def L1TReEmulMCFromRAWSimCalTP(process):
350  L1TReEmulMCFromRAW(process)
351  stage2L1Trigger.toModify(process.simCaloStage2Layer1Digis,
352  ecalToken = "simEcalTriggerPrimitiveDigis",
353  hcalToken = 'simHcalTriggerPrimitiveDigis'
354  )
355  return process
356 
def L1TReEmulMCFromRAWSimCalTP(process)
def L1TReEmulMCFromRAW(process)

◆ L1TReEmulMCFromRAWSimEcalTP()

def customiseReEmul.L1TReEmulMCFromRAWSimEcalTP (   process)

Definition at line 321 of file customiseReEmul.py.

References L1TReEmulMCFromRAW().

321 def L1TReEmulMCFromRAWSimEcalTP(process):
322  L1TReEmulMCFromRAW(process)
323  stage2L1Trigger.toModify(process.simCaloStage2Layer1Digis, ecalToken = "simEcalTriggerPrimitiveDigis")
324  return process
325 
def L1TReEmulMCFromRAW(process)
def L1TReEmulMCFromRAWSimEcalTP(process)

◆ L1TReEmulMCFromRAWSimHcalTP()

def customiseReEmul.L1TReEmulMCFromRAWSimHcalTP (   process)

Definition at line 326 of file customiseReEmul.py.

References L1TReEmulMCFromRAW().

326 def L1TReEmulMCFromRAWSimHcalTP(process):
327  L1TReEmulMCFromRAW(process)
328  stage2L1Trigger.toModify(process.simCaloStage2Layer1Digis, hcalToken = 'simHcalTriggerPrimitiveDigis')
329  return process
330 
def L1TReEmulMCFromRAW(process)
def L1TReEmulMCFromRAWSimHcalTP(process)

Variable Documentation

◆ CSCCandidates

customiseReEmul.CSCCandidates

Definition at line 468 of file customiseReEmul.py.

◆ CSCComparatorDigiProducer

customiseReEmul.CSCComparatorDigiProducer

Definition at line 434 of file customiseReEmul.py.

◆ CSCInput

customiseReEmul.CSCInput

Definition at line 488 of file customiseReEmul.py.

◆ CSCStub_Source

customiseReEmul.CSCStub_Source

Definition at line 452 of file customiseReEmul.py.

◆ CSCTrackProducer

customiseReEmul.CSCTrackProducer

Definition at line 445 of file customiseReEmul.py.

◆ CSCWireDigiProducer

customiseReEmul.CSCWireDigiProducer

Definition at line 435 of file customiseReEmul.py.

◆ digiTag

customiseReEmul.digiTag

Definition at line 420 of file customiseReEmul.py.

◆ DTCandidates

customiseReEmul.DTCandidates

Definition at line 467 of file customiseReEmul.py.

◆ DTDigi_Source

customiseReEmul.DTDigi_Source

Definition at line 426 of file customiseReEmul.py.

◆ DTDigi_Theta_Source

customiseReEmul.DTDigi_Theta_Source

Definition at line 477 of file customiseReEmul.py.

◆ DTproducer

customiseReEmul.DTproducer

Definition at line 442 of file customiseReEmul.py.

◆ DTThetaDigi_Source

customiseReEmul.DTThetaDigi_Source

Definition at line 427 of file customiseReEmul.py.

◆ ecalToken

customiseReEmul.ecalToken

Definition at line 491 of file customiseReEmul.py.

◆ hcalToken

customiseReEmul.hcalToken

Definition at line 492 of file customiseReEmul.py.

◆ L1TMuonTriggerPrimitives

customiseReEmul.L1TMuonTriggerPrimitives

Definition at line 496 of file customiseReEmul.py.

◆ L1TReEmul

customiseReEmul.L1TReEmul

Definition at line 498 of file customiseReEmul.py.

◆ L1TReEmulPath

customiseReEmul.L1TReEmulPath

Definition at line 507 of file customiseReEmul.py.

◆ label

customiseReEmul.label

Definition at line 459 of file customiseReEmul.py.

◆ muonSource

customiseReEmul.muonSource
  • Legacy to upgrade format muon converter

Definition at line 415 of file customiseReEmul.py.

◆ RPC_Source

customiseReEmul.RPC_Source

Definition at line 425 of file customiseReEmul.py.

◆ RPCbCandidates

customiseReEmul.RPCbCandidates

Definition at line 469 of file customiseReEmul.py.

◆ RPCfCandidates

customiseReEmul.RPCfCandidates

Definition at line 470 of file customiseReEmul.py.

◆ RPCInput

customiseReEmul.RPCInput

Definition at line 489 of file customiseReEmul.py.

◆ RPCTriggerDebug

customiseReEmul.RPCTriggerDebug

Definition at line 460 of file customiseReEmul.py.

◆ SectorReceiverInput

customiseReEmul.SectorReceiverInput

Definition at line 441 of file customiseReEmul.py.

◆ simCsctfDigis

customiseReEmul.simCsctfDigis

Definition at line 444 of file customiseReEmul.py.

◆ simCsctfTrackDigis

customiseReEmul.simCsctfTrackDigis

Definition at line 440 of file customiseReEmul.py.

◆ simCscTriggerPrimitiveDigis

customiseReEmul.simCscTriggerPrimitiveDigis

Definition at line 433 of file customiseReEmul.py.

◆ simDttfDigis

customiseReEmul.simDttfDigis

Definition at line 450 of file customiseReEmul.py.

◆ simDtTriggerPrimitiveDigis

customiseReEmul.simDtTriggerPrimitiveDigis

Definition at line 419 of file customiseReEmul.py.

◆ simGmtDigis

customiseReEmul.simGmtDigis

Definition at line 466 of file customiseReEmul.py.

◆ simRpcTriggerDigis

customiseReEmul.simRpcTriggerDigis

Definition at line 458 of file customiseReEmul.py.

◆ simTwinMuxDigisForDttf

customiseReEmul.simTwinMuxDigisForDttf

Definition at line 424 of file customiseReEmul.py.

◆ srcCSC

customiseReEmul.srcCSC

Definition at line 484 of file customiseReEmul.py.

◆ srcDTPh

customiseReEmul.srcDTPh

Definition at line 485 of file customiseReEmul.py.

◆ srcDTTh

customiseReEmul.srcDTTh

Definition at line 486 of file customiseReEmul.py.

◆ srcRPC

customiseReEmul.srcRPC

Definition at line 483 of file customiseReEmul.py.