CMS 3D CMS Logo

SiStripRawToDigiUnpacker.h
Go to the documentation of this file.
1 
2 #ifndef EventFilter_SiStripRawToDigi_SiStripRawToDigiUnpacker_H
3 #define EventFilter_SiStripRawToDigi_SiStripRawToDigiUnpacker_H
4 
11 #include "WarningSummary.h"
12 
14 namespace sistrip {
15  class RawToClustersLazyUnpacker;
16 }
17 namespace sistrip {
18  class RawToDigiUnpacker;
19 }
20 
23 class FEDRawData;
24 class SiStripDigi;
25 class SiStripRawDigi;
27 class SiStripFedCabling;
28 
29 namespace sistrip {
30 
32  friend class RawToClustersLazyUnpacker;
33 
34  public:
37 
39  RawToDigiUnpacker(int16_t appended_bytes,
40  int16_t fed_buffer_dump_freq,
41  int16_t fed_event_dump_freq,
42  int16_t trigger_fed_id,
43  bool using_fed_key,
44  bool unpack_bad_channels,
45  bool mark_missing_feds,
46  const uint32_t errorThreshold);
47 
49  RawToDigiUnpacker() = delete;
50 
53 
55  void createDigis(const SiStripFedCabling&,
56  const FEDRawDataCollection&,
58  RawDigis& scope_mode,
59  RawDigis& virgin_raw,
60  RawDigis& proc_raw,
61  Digis& zero_suppr,
62  DetIdVector&,
63  RawDigis& common_mode);
64 
66  void triggerFed(const FEDRawDataCollection&, SiStripEventSummary&, const uint32_t& event);
67 
69  void locateStartOfFedBuffer(const uint16_t& fed_id, const FEDRawData& input, FEDRawData& output);
70 
72  inline void quiet(bool);
73 
75  inline void useDaqRegister(bool);
76 
77  inline void extractCm(bool);
78 
79  inline void doFullCorruptBufferChecks(bool);
80 
81  inline void doAPVEmulatorCheck(bool);
82 
83  inline void legacy(bool);
84 
85  void printWarningSummary() const { warnings_.printSummary(); }
86 
87  private:
89  void update(
90  RawDigis& scope_mode, RawDigis& virgin_raw, RawDigis& proc_raw, Digis& zero_suppr, RawDigis& common_mode);
91 
93  void updateEventSummary(const sistrip::FEDBuffer&, SiStripEventSummary&);
94 
96  inline void readoutOrder(uint16_t& physical_order, uint16_t& readout_order);
97 
99  inline void physicalOrder(uint16_t& readout_order, uint16_t& physical_order);
100 
102  inline sistrip::FedBufferFormat fedBufferFormat(const uint16_t& register_value);
103 
105  inline sistrip::FedReadoutMode fedReadoutMode(const uint16_t& register_value);
106 
108  static void dumpRawData(uint16_t fed_id, const FEDRawData&, std::stringstream&);
109 
111  void cleanupWorkVectors();
112 
114  class Registry {
115  public:
117  Registry(uint32_t aDetid, uint16_t firstStrip, size_t indexInVector, uint16_t numberOfDigis)
118  : detid(aDetid), first(firstStrip), index(indexInVector), length(numberOfDigis) {}
120  bool operator<(const Registry& other) const {
121  return (detid != other.detid ? detid < other.detid : first < other.first);
122  }
124  uint32_t detid;
125  uint16_t first;
126  size_t index;
127  uint16_t length;
128  };
129 
131  int16_t headerBytes_;
134  int16_t triggerFedId_;
138 
140  uint32_t event_;
141  bool once_;
142  bool first_;
144  bool quiet_;
148  bool legacy_;
149  uint32_t errorThreshold_;
150 
152  std::vector<Registry> zs_work_registry_;
153  std::vector<Registry> virgin_work_registry_;
154  std::vector<Registry> scope_work_registry_;
155  std::vector<Registry> proc_work_registry_;
156  std::vector<Registry> cm_work_registry_;
157 
159  std::vector<SiStripDigi> zs_work_digis_;
160  std::vector<SiStripRawDigi> virgin_work_digis_;
161  std::vector<SiStripRawDigi> scope_work_digis_;
162  std::vector<SiStripRawDigi> proc_work_digis_;
163  std::vector<SiStripRawDigi> cm_work_digis_;
164 
166  };
167 } // namespace sistrip
168 
169 void sistrip::RawToDigiUnpacker::readoutOrder(uint16_t& physical_order, uint16_t& readout_order) {
170  readout_order = (4 * ((static_cast<uint16_t>((static_cast<float>(physical_order) / 8.0))) % 4) +
171  static_cast<uint16_t>(static_cast<float>(physical_order) / 32.0) + 16 * (physical_order % 8));
172 }
173 
174 void sistrip::RawToDigiUnpacker::physicalOrder(uint16_t& readout_order, uint16_t& physical_order) {
175  physical_order = ((32 * (readout_order % 4)) + (8 * static_cast<uint16_t>(static_cast<float>(readout_order) / 4.0)) -
176  (31 * static_cast<uint16_t>(static_cast<float>(readout_order) / 16.0)));
177 }
178 
180  if ((register_value & 0xF) == 0x1) {
182  } else if ((register_value & 0xF) == 0x2) {
184  } else if ((register_value & 0xF) == 0x0) {
186  } else {
188  }
189 }
190 
192  return static_cast<sistrip::FedReadoutMode>(register_value & 0xF);
193 }
194 
195 void sistrip::RawToDigiUnpacker::quiet(bool quiet) { quiet_ = quiet; }
196 
197 void sistrip::RawToDigiUnpacker::useDaqRegister(bool use) { useDaqRegister_ = use; }
198 
199 void sistrip::RawToDigiUnpacker::extractCm(bool extract_cm) { extractCm_ = extract_cm; }
200 
201 void sistrip::RawToDigiUnpacker::doFullCorruptBufferChecks(bool do_full_corrupt_buffer_checks) {
202  doFullCorruptBufferChecks_ = do_full_corrupt_buffer_checks;
203 }
204 
205 void sistrip::RawToDigiUnpacker::doAPVEmulatorCheck(bool do_APVEmulator_check) {
206  doAPVEmulatorCheck_ = do_APVEmulator_check;
207 }
208 
210 
211 #endif // EventFilter_SiStripRawToDigi_SiStripRawToDigiUnpacker_H
void useDaqRegister(bool)
EventSummary update request -> not yet implemented for FEDBuffer class.
std::vector< Registry > proc_work_registry_
std::vector< SiStripDigi > zs_work_digis_
digi collections
std::vector< Registry > scope_work_registry_
std::vector< Registry > zs_work_registry_
registries
Registry(uint32_t aDetid, uint16_t firstStrip, size_t indexInVector, uint16_t numberOfDigis)
constructor
void physicalOrder(uint16_t &readout_order, uint16_t &physical_order)
order of strips
sistrip::FedBufferFormat fedBufferFormat(const uint16_t &register_value)
returns buffer format
sistrip classes
private class to register start and end index of digis in a collection
static std::string const input
Definition: EdmProvDump.cc:50
std::vector< SiStripRawDigi > virgin_work_digis_
void readoutOrder(uint16_t &physical_order, uint16_t &readout_order)
order of strips
edm::DetSetVector< SiStripRawDigi > RawDigis
bool operator<(const Registry &other) const
< operator to sort registries
std::vector< SiStripRawDigi > scope_work_digis_
A Digi for the silicon strip detector, containing both strip and adc information, and suitable for st...
Definition: SiStripDigi.h:12
std::vector< SiStripRawDigi > proc_work_digis_
#define dso_hidden
Definition: Visibility.h:12
std::vector< DetId > DetIdVector
Definition: DetIdVector.h:7
std::vector< SiStripRawDigi > cm_work_digis_
Contains cabling info at the device level, including DetId, APV pair numbers, hardware addresses...
#define update(a, b)
uint16_t readoutOrder(uint16_t physical_order)
std::vector< Registry > cm_work_registry_
Definition: output.py:1
edm::DetSetVector< SiStripDigi > Digis
A Digi for the silicon strip detector, containing only adc information, and suitable for storing raw ...
std::vector< Registry > virgin_work_registry_
Definition: event.py:1
sistrip::FedReadoutMode fedReadoutMode(const uint16_t &register_value)
returns buffer readout mode