DDLogicalPart.h File Reference

#include <iosfwd>
#include <map>
#include <memory>
#include <string>
#include <utility>
#include <vector>
#include "DetectorDescription/Core/interface/Singleton.h"
#include "DetectorDescription/Core/interface/DDBase.h"
#include "DetectorDescription/Core/interface/DDEnums.h"
#include "DetectorDescription/Core/interface/DDName.h"
#include "DetectorDescription/Core/interface/DDsvalues.h"

Go to the source code of this file.

Classes
class	DDLogicalPart
	A DDLogicalPart aggregates information concerning material, solid and sensitveness ... More...

Namespaces
	DDI

Typedefs
typedef DDI::Singleton< std::map< std::string, std::vector< DDName > > >	LPNAMES

Functions
void	DD_NC (const DDName &)
std::pair< bool, std::string >	DDIsValid (const std::string &ns, const std::string &name, std::vector< DDLogicalPart > &result, bool doRegex=true)
std::ostream &	operator<< (std::ostream &, const DDLogicalPart &)

Typedef Documentation

LPNAMES

typedef DDI::Singleton<std::map<std::string, std::vector<DDName> > > LPNAMES

Definition at line 136 of file DDLogicalPart.h.

Function Documentation

DD_NC()

void DD_NC

(

const DDName &

)

Definition at line 12 of file DDLogicalPart.cc.

References DDI::Singleton< I >::instance(), dqmiodumpmetadata::n, and AlCaHLTBitMon_ParallelJobs::p.

Referenced by DDLogicalPart::DDLogicalPart().

                            {
  auto& ns = LPNAMES::instance()[n.name()];

  bool alreadyIn(false);
  for (const auto& p : ns) {
    if (p.ns() == n.ns()) {
      alreadyIn = true;
      break;
    }
  }
  if (!alreadyIn) {
    ns.emplace_back(n);
  }
}

DDIsValid()

std::pair<bool, std::string> DDIsValid	(	const std::string &	ns,
		const std::string &	name,
		std::vector< DDLogicalPart > &	result,
		bool	doRegex = true
	)

Definition at line 248 of file DDLogicalPart.cc.

References HLT_2024v14_cff::candidates, mps_fire::end, RemoveAddSevLevel::flag, DDI::Singleton< I >::instance(), ALPAKA_ACCELERATOR_NAMESPACE::vertexFinder::it, mps_fire::result, mps_update::status, and AlCaHLTBitMon_QueryRunRegistry::string.

Referenced by DDI::Specific::createPartSelections().

                                                     {
  if (!doRegex) {
    DDName ddnm(nm, ns);
    result.emplace_back(DDLogicalPart(ddnm));
    return std::make_pair(true, "");
  }
  std::string status;
  Regex aRegex(nm);
  Regex aNsRegex(ns);
  bool emptyNs = aNsRegex.empty();

  // THIS IS THE SLOW PART: I have to compare every namespace & name of every
  // logical part with a regex-comparison .... a linear search always through the
  // full range of logical parts!!!!
  /*
    Algorithm description:
    x. empty nm and ns argument of method means: use all matching regex ^.*$
    a. iterate over all logical part names, match against regex for names
    b. iterate over all namespaces of names found in a & match against regex for namespaces   
  */
  LPNAMES::value_type::const_iterator bn(LPNAMES::instance().begin()), ed(LPNAMES::instance().end());
  typedef std::vector<LPNAMES::value_type::const_iterator> Candidates;
  Candidates candidates;
  if (aRegex.notRegex()) {
    LPNAMES::value_type::const_iterator it = LPNAMES::instance().find(aRegex.value());
    if (it != ed)
      candidates.emplace_back(it);
  } else {
    if (!aRegex.range().first.empty()) {
      bn = LPNAMES::instance().lower_bound(aRegex.range().first);
      ed = LPNAMES::instance().upper_bound(aRegex.range().second);
    }
    for (LPNAMES::value_type::const_iterator it = bn; it != ed; ++it)
      if (aRegex.match(it->first))
        candidates.emplace_back(it);
  }
  for (const auto& it : candidates) {
    //if (doit)  edm::LogInfo("DDLogicalPart") << "rgx: " << aName << ' ' << it->first << ' ' << doit << std::endl;
    std::vector<DDName>::size_type sz = it->second.size();  // no of 'compatible' namespaces
    if (emptyNs && (sz == 1)) {                             // accept all logical parts in all the namespaces
      result.emplace_back(it->second[0]);
      //std::vector<DDName>::const_iterator nsIt(it->second.begin()), nsEd(it->second.end());
      //for(; nsIt != nsEd; ++nsIt) {
      //   result.emplace_back(DDLogicalPart(*nsIt));
      //   edm::LogInfo("DDLogicalPart") << "DDD-WARNING: multiple namespaces match (in SpecPars PartSelector): " << *nsIt << std::endl;
      //}
    } else if (!emptyNs) {  // only accept matching namespaces
      std::vector<DDName>::const_iterator nsit(it->second.begin()), nsed(it->second.end());
      for (; nsit != nsed; ++nsit) {
        //edm::LogInfo("DDLogicalPart") << "comparing " << aNs << " with " << *nsit << std::endl;
        bool another_doit = aNsRegex.match(nsit->ns());
        if (another_doit) {
          //temp.emplace_back(std::make_pair(it->first,*nsit));
          result.emplace_back(DDLogicalPart(*nsit));
        }
      }
    } else {  // emtpyNs and sz>1 -> error, too ambigous
      std::string message = "DDLogicalPart-name \"" + it->first + "\" matching regex \"" + nm +
                            "\" has been found at least in following namespaces:\n";
      std::vector<DDName>::const_iterator vit = it->second.begin();
      for (; vit != it->second.end(); ++vit) {
        message += vit->ns();
        message += " ";
      }
      message += "\nQualify the name with a regexp for the namespace, i.e \".*:name-regexp\" !";
      return std::make_pair(false, message);
    }
  }
  bool flag = true;
  std::string message;

  // check whether the found logical-parts are also defined (i.e. have material, solid ...)
  if (!result.empty()) {
    std::vector<DDLogicalPart>::const_iterator lpit(result.begin()), lped(result.end());
    for (; lpit != lped; ++lpit) {
      // std::cout << "VI- " << std::string(lpit->name()) << std::endl;
      if (!lpit->isDefined().second) {
        message = message + "LogicalPart " + lpit->name().fullname() + " not (yet) defined!\n";
        flag = false;
      }
    }
  } else {
    flag = false;
    message = "No regex-match for namespace=" + ns + "  name=" + nm + "\n";
  }

  return std::make_pair(flag, message);
}

operator<<()

std::ostream& operator<<	(	std::ostream &	,
		const DDLogicalPart &
	)

Definition at line 27 of file DDLogicalPart.cc.

                                                                  {
  DDBase<DDName, DDI::LogicalPart*>::def_type defined(part.isDefined());
  if (defined.first) {
    os << *(defined.first) << " ";
    if (defined.second) {
      part.rep().stream(os);
    } else {
      os << "* logicalpart not defined * ";
    }
  } else {
    os << "* logicalpart not declared * ";
  }
  return os;
}