108 #ifndef L1Trigger_TrackFindingTracklet_interface_imath_h 109 #define L1Trigger_TrackFindingTracklet_interface_imath_h 140 #define MULT_LATENCY 1 141 #define LUT_LATENCY 2 142 #define DSP_LATENCY 3 152 TFile *h_file_ =
new TFile(
"imath.root",
"RECREATE");
218 const std::map<
const VarBase *, std::vector<bool> > *
const previous_passes =
nullptr)
const;
222 const std::map<
const VarBase *, std::set<std::string> > *
const previous_cut_strings =
nullptr)
const;
226 const std::map<
const VarBase *, std::set<std::string> > *
const previous_cut_strings =
nullptr)
const;
234 TH2F *
h() {
return h_; }
245 std::map<std::string, int>
Kmap()
const {
return Kmap_; }
247 double K()
const {
return K_; };
257 virtual void print(std::ofstream &
fs,
Verilog,
int l1 = 0,
int l2 = 0,
int l3 = 0) {
258 fs <<
"// VarBase here. Soemthing is wrong!! " << l1 <<
", " << l2 <<
", " << l3 <<
"\n";
260 virtual void print(std::ofstream &
fs,
HLS,
int l1 = 0,
int l2 = 0,
int l3 = 0) {
261 fs <<
"// VarBase here. Soemthing is wrong!! " << l1 <<
", " << l2 <<
", " << l3 <<
"\n";
269 void inputs(std::vector<VarBase *> *
vd);
277 static void design_print(
const std::vector<VarBase *> &
v, std::ofstream &
fs, Verilog);
278 static void design_print(
const std::vector<VarBase *> &
v, std::ofstream &
fs, HLS);
286 static TTree *addToTree(
imathGlobals *globals,
double *
v,
char *
s);
326 void set_hist_pars(
int n = 256,
double p = 0.05) {
343 bool do_assert =
false,
350 double r = Knew /
K_;
370 void print(std::ofstream &
fs, Verilog,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
371 void print(std::ofstream &
fs, HLS,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
384 bool do_assert =
false,
391 double r = Knew /
K_;
409 void print(std::ofstream &
fs, Verilog,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
410 void print(std::ofstream &
fs, HLS,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
419 :
VarBase(globals,
name, nullptr, nullptr, nullptr, 0) {
429 :
VarBase(globals,
name, nullptr, nullptr, nullptr, 0) {
440 snprintf(slog, 100,
"defining unitless constant, yet K is not a power of 2! %g, %g",
K,
pow(2,
l));
462 void print(std::ofstream &
fs, Verilog,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
463 void print(std::ofstream &
fs, HLS,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
470 :
VarBase(globals,
name, nullptr, nullptr, nullptr, 1) {
473 nbits_ = log2(fmax /
K) + 1.999999;
481 snprintf(slog, 100,
"defining unitless constant, yet K is not a power of 2! %g, %g",
K,
pow(2,
l));
508 void print(std::ofstream &
fs, Verilog,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
509 void print(std::ofstream &
fs, HLS,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
518 std::map<std::string, int> map1 =
p1->
Kmap();
519 std::map<std::string, int> map2 =
p2->
Kmap();
525 for (
const auto &it : map2) {
526 if (map1.find(it.first) == map1.end())
527 map1[it.first] = -it.second;
529 map1[it.first] = map1[it.first] - it.second;
535 for (
const auto &it : map1) {
536 if (it.second != 0) {
537 if (it.first !=
"2") {
539 slog, 100,
"VarAdd: bad units! %s^%i for variable %s", (it.first).c_str(), it.second,
name_.c_str());
543 throw cms::Exception(
"BadConfig") <<
"imath units are different!";
548 double ki1 =
p1->
K() /
pow(2, s1);
549 double ki2 =
p2->
K() /
pow(2, s2);
552 snprintf(slog, 100,
"VarAdd: bad constants! %f %f for variable %s", ki1, ki2,
name_.c_str());
556 throw cms::Exception(
"BadConfig") <<
"imath constants are different!";
562 int s0 = s1 < s2 ? s1 : s2;
568 int n0 = 1 + (n1 > n2 ? n1 : n2);
590 void print(std::ofstream &
fs, Verilog,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
591 void print(std::ofstream &
fs, HLS,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
605 std::map<std::string, int> map1 =
p1->
Kmap();
606 std::map<std::string, int> map2 =
p2->
Kmap();
611 for (
const auto &it : map2) {
612 if (map1.find(it.first) == map1.end())
613 map1[it.first] = -it.second;
615 map1[it.first] = map1[it.first] - it.second;
621 for (
const auto &it : map1) {
622 if (it.second != 0) {
623 if (it.first !=
"2") {
625 slog, 100,
"VarAdd: bad units! %s^%i for variable %s", (it.first).c_str(), it.second,
name_.c_str());
629 throw cms::Exception(
"BadConfig") <<
"imath units are different!";
634 double ki1 =
p1->
K() /
pow(2, s1);
635 double ki2 =
p2->
K() /
pow(2, s2);
638 snprintf(slog, 100,
"VarAdd: bad constants! %f %f for variable %s", ki1, ki2,
name_.c_str());
642 throw cms::Exception(
"BadConfig") <<
"imath constants are different!";
648 int s0 = s1 < s2 ? s1 : s2;
654 int n0 = 1 + (n1 > n2 ? n1 : n2);
678 void print(std::ofstream &
fs, Verilog,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
679 void print(std::ofstream &
fs, HLS,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
696 double ki =
p1->
K() /
pow(2, s1);
701 double c = ki *
pow(2, -
m);
707 void print(std::ofstream &
fs, Verilog,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
708 void print(std::ofstream &
fs, HLS,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
729 void print(std::ofstream &
fs, Verilog,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
730 void print(std::ofstream &
fs, HLS,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
749 void print(std::ofstream &
fs, Verilog,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
750 void print(std::ofstream &
fs, HLS,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
766 void print(std::ofstream &
fs, Verilog,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
767 void print(std::ofstream &
fs, HLS,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
794 void print(std::ofstream &
fs, Verilog,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
795 void print(std::ofstream &
fs, HLS,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
809 const std::map<std::string, int> map1 =
p1->
Kmap();
810 const std::map<std::string, int> map2 =
p2->
Kmap();
811 for (
const auto &it : map1) {
813 Kmap_[it.first] = it.second;
815 Kmap_[it.first] =
Kmap_[it.first] + it.second;
817 for (
const auto &it : map2) {
819 Kmap_[it.first] = it.second;
821 Kmap_[it.first] =
Kmap_[it.first] + it.second;
843 void print(std::ofstream &
fs, Verilog,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
844 void print(std::ofstream &
fs, HLS,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
858 std::map<std::string, int> map1 =
p1->
Kmap();
859 std::map<std::string, int> map2 =
p2->
Kmap();
860 for (
const auto &it : map2) {
861 if (map1.find(it.first) == map1.end())
862 map1[it.first] = it.second;
864 map1[it.first] = map1[it.first] + it.second;
870 std::map<std::string, int> map3 =
p3->
Kmap();
875 for (
const auto &it : map3) {
876 if (map1.find(it.first) == map1.end())
877 map1[it.first] = -it.second;
879 map1[it.first] = map1[it.first] - it.second;
885 for (
const auto &it : map1) {
886 if (it.second != 0) {
887 if (it.first !=
"2") {
890 "VarDSPPostadd: bad units! %s^%i for variable %s",
898 throw cms::Exception(
"BadConfig") <<
"imath units are different!";
903 double ki1 =
k0 /
pow(2, s0);
904 double ki2 =
p3->
K() /
pow(2, s3);
907 snprintf(slog, 100,
"VarDSPPostadd: bad constants! %f %f for variable %s", ki1, ki2,
name_.c_str());
912 throw cms::Exception(
"BadConfig") <<
"imath constants are different!";
918 throw cms::Exception(
"BadConfig") <<
"imath VarDSPPostadd: loosing precision on C in A*B+C: " <<
shift3_;
926 int n0 = 1 + (n12 > n3 ? n12 : n3);
949 void print(std::ofstream &
fs, Verilog,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
985 const std::map<std::string, int> map1 =
p1->
Kmap();
986 for (
const auto &it : map1)
987 Kmap_[it.first] = -it.second;
1006 void print(std::ofstream &
fs, Verilog,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
1007 void print(std::ofstream &
fs, HLS,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
1009 void writeLUT(std::ofstream &
fs, Verilog)
const;
1025 unsigned int ms =
sizeof(
int) * 8 -
nbits_;
1029 int lut1 = (lround((1 <<
n_) /
i) << ms) >> ms;
1030 int lut2 = (lround((1 <<
n_) / (
i1)) << ms) >> ms;
1031 lut = 0.5 * (lut1 + lut2);
1032 }
else if (
i < -1) {
1035 int lut1 = (lround((1 <<
n_) /
i1) << ms) >> ms;
1036 int lut2 = (lround((1 <<
n_) /
i2) << ms) >> ms;
1037 lut = 0.5 * (lut1 + lut2);
1058 :
VarBase(globals,
"", nullptr, nullptr, nullptr, 0),
1075 const std::map<
const VarBase *, std::vector<bool> > *
const previous_passes =
nullptr)
const;
1080 const std::map<
const VarBase *, std::set<std::string> > *
const previous_cut_strings =
nullptr)
const;
1084 const std::map<
const VarBase *, std::set<std::string> > *
const previous_cut_strings =
nullptr)
const;
1098 template <
class... Args>
1100 :
VarBase(globals,
name, nullptr, nullptr, nullptr, 0) {
1106 template <
class... Args>
1118 void print(std::ofstream &
fs, Verilog,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
1119 void print(std::ofstream &
fs, HLS,
int l1 = 0,
int l2 = 0,
int l3 = 0)
override;
void set_cut_var(VarBase *cut_var, const bool call_add_cut=true)
VarShiftround(imathGlobals *globals, std::string name, VarBase *p1, int shift)
Log< level::Info, true > LogVerbatim
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
void calcDebug(int debug_level, long int ival_prev, bool &all_ok)
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
static void verilog_print(const std::vector< VarBase *> &v, std::ofstream &fs)
static void hls_print(const std::vector< VarBase *> &v, std::ofstream &fs)
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
VarDef(imathGlobals *globals, std::string name, VarBase *p)
~VarMult() override=default
void inputs(std::vector< VarBase *> *vd)
void add_cut(VarCut *cut, const bool call_set_cut_var=true)
void local_calculate() override
void print_step(int step, std::ofstream &fs, Verilog)
void local_calculate() override
void add_cuts(VarBase *cut, Args... args)
void print_all(std::ofstream &fs, Verilog)
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
VarFlag(imathGlobals *globals, std::string name, VarBase *cut, Args... args)
~VarTimesC() override=default
void local_calculate() override
void add_cuts(VarBase *cut)
std::string pipe_delays(const int step)
void set_fval(double fval)
std::string kstring() const
VarDef(imathGlobals *globals, std::string name, std::string units, double fmax, double K)
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
~VarAdd() override=default
~VarParam() override=default
std::vector< int > pipe_delays_
void print(std::map< const VarBase *, std::set< std::string > > &cut_strings, const int step, Verilog, const std::map< const VarBase *, std::set< std::string > > *const previous_cut_strings=nullptr) const
static struct trklet::VarBase::Verilog verilog
VarInv(imathGlobals *globals, std::string name, VarBase *p1, double offset, int nbits, int n, unsigned int shift, mode m, int nbaddr=-1)
int ival_to_addr(int ival)
void passes(std::map< const VarBase *, std::vector< bool > > &passes, const std::map< const VarBase *, std::vector< bool > > *const previous_passes=nullptr) const
int addr_to_ival(int addr)
VarBase(imathGlobals *globals, std::string name, VarBase *p1, VarBase *p2, VarBase *p3, int l)
void local_calculate() override
VarSubtract(imathGlobals *globals, std::string name, VarBase *p1, VarBase *p2, double range=-1, int nmax=18)
VarShift(imathGlobals *globals, std::string name, VarBase *p1, int shift)
VarAdd(imathGlobals *globals, std::string name, VarBase *p1, VarBase *p2, double range=-1, int nmax=18)
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
void initLUT(double offset)
VarParam(imathGlobals *globals, std::string name, std::string units, double fval, double K)
void local_calculate() override
virtual void local_calculate()
bool local_passes() const
~VarShift() override=default
void set_fval(double fval)
std::map< std::string, int > Kmap() const
void local_calculate() override
void local_calculate() override
~VarSubtract() override=default
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
~VarShiftround() override=default
Abs< T >::type abs(const T &t)
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
VarAdjustK(imathGlobals *globals, std::string name, VarBase *p1, double Knew, double epsilon=1e-5, bool do_assert=false, int nbits=-1)
VarNounits(imathGlobals *globals, std::string name, VarBase *p1, int ps=17)
void local_calculate() override
static std::string itos(int i)
void adjust(double Knew, double epsilon=1e-5, bool do_assert=false, int nbits=-1)
std::vector< DeviationSensor2D * > vd
void set_parent_flag(VarFlag *parent_flag, const bool call_add_cut)
void local_calculate() override
virtual void print(std::ofstream &fs, HLS, int l1=0, int l2=0, int l3=0)
void local_calculate() override
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
virtual void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0)
static struct trklet::VarBase::HLS hls
void add_latency(unsigned int l)
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
~VarDSPPostadd() override=default
void add_cut(VarBase *cut, const bool call_set_parent_flag=true)
VarDSPPostadd(imathGlobals *globals, std::string name, VarBase *p1, VarBase *p2, VarBase *p3, double range=-1, int nmax=18)
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
void print_truncation(std::string &t, const std::string &o1, const int ps, Verilog) const
VarAdjustKR(imathGlobals *globals, std::string name, VarBase *p1, double Knew, double epsilon=1e-5, bool do_assert=false, int nbits=-1)
static std::string pipe_delay_wire(VarBase *v, std::string name_delayed, int nbits, int delay)
std::vector< VarBase * > cuts_
static std::string pipe_delay(VarBase *v, int nbits, int delay)
std::map< std::string, int > Kmap_
static void design_print(const std::vector< VarBase *> &v, std::ofstream &fs, Verilog)
VarCut(imathGlobals *globals, double lower_cut, double upper_cut)
~VarCut() override=default
void local_calculate() override
~VarAdjustK() override=default
~VarNeg() override=default
VarTimesC(imathGlobals *globals, std::string name, VarBase *p1, double cF, int ps=17)
TString units(TString variable, Char_t axis)
VarCut(imathGlobals *globals, VarBase *cut_var, double lower_cut, double upper_cut)
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
VarMult(imathGlobals *globals, std::string name, VarBase *p1, VarBase *p2, double range=-1, int nmax=18)
~VarAdjustKR() override=default
VarNeg(imathGlobals *globals, std::string name, VarBase *p1)
~VarDef() override=default
VarParam(imathGlobals *globals, std::string name, double fval, int nbits)
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
void writeLUT(std::ofstream &fs) const
std::vector< unsigned short int > LUT
The Signals That Services Can Subscribe To This is based on ActivityRegistry h
Helper function to determine trigger accepts.
~VarNounits() override=default
bool calculate(int debug_level=0)
void print(std::ofstream &fs, Verilog, int l1=0, int l2=0, int l3=0) override
int bitShift(int num, int bits)
void print_cuts(std::map< const VarBase *, std::set< std::string > > &cut_strings, const int step, Verilog, const std::map< const VarBase *, std::set< std::string > > *const previous_cut_strings=nullptr) const
void local_calculate() override