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L1GlobalTriggerFDL.cc
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1 
16 // this class header
18 
19 // system include files
20 #include <iostream>
21 
22 // user include files
26 
29 
32 
35 
37 
40 
41 // forward declarations
42 
43 // constructor
45  : // logical switches
46  m_firstEv(true),
47  m_firstEvLumiSegment(true),
48  m_firstEvRun(true),
49  m_isDebugEnabled(edm::isDebugEnabled()) {
50  // create empty FDL word
51  m_gtFdlWord = new L1GtFdlWord();
52 
53  // can not reserve memory here for prescale counters - no access to EventSetup
54 }
55 
56 // destructor
58  reset();
59  delete m_gtFdlWord;
60 }
61 
62 // Operations
63 
64 // run FDL
66  const std::vector<int> &prescaleFactorsAlgoTrig,
67  const std::vector<int> &prescaleFactorsTechTrig,
68  const std::vector<unsigned int> &triggerMaskAlgoTrig,
69  const std::vector<unsigned int> &triggerMaskTechTrig,
70  const std::vector<unsigned int> &triggerMaskVetoAlgoTrig,
71  const std::vector<unsigned int> &triggerMaskVetoTechTrig,
72  const std::vector<L1GtBoard> &boardMaps,
73  const int totalBxInEvent,
74  const int iBxInEvent,
75  const unsigned int numberPhysTriggers,
76  const unsigned int numberTechnicalTriggers,
77  const unsigned int numberDaqPartitions,
78  const L1GlobalTriggerGTL *ptrGTL,
79  const L1GlobalTriggerPSB *ptrPSB,
80  const int pfAlgoSetIndex,
81  const int pfTechSetIndex,
82  const bool algorithmTriggersUnprescaled,
83  const bool algorithmTriggersUnmasked,
84  const bool technicalTriggersUnprescaled,
85  const bool technicalTriggersUnmasked,
86  const bool technicalTriggersVetoUnmasked) {
87  // FIXME get rid of bitset in GTL in order to use only EventSetup
88  const unsigned int numberPhysTriggersSet = L1GlobalTriggerReadoutSetup::NumberPhysTriggers;
89 
90  // get gtlDecisionWord from GTL
91  std::bitset<numberPhysTriggersSet> gtlDecisionWord = ptrGTL->getAlgorithmOR();
92 
93  // convert decision word from std::bitset to std::vector<bool>
94  DecisionWord algoDecisionWord(numberPhysTriggers);
95 
96  for (unsigned int iBit = 0; iBit < numberPhysTriggers; ++iBit) {
97  bool bitValue = gtlDecisionWord.test(iBit);
98  algoDecisionWord[iBit] = bitValue;
99  }
100 
101  // prescale counters are reset at the beginning of the luminosity segment
102 
103  if (m_firstEv) {
104  // prescale counters: numberPhysTriggers counters per bunch cross
105  m_prescaleCounterAlgoTrig.reserve(numberPhysTriggers * totalBxInEvent);
106 
107  for (int iBxInEvent = 0; iBxInEvent <= totalBxInEvent; ++iBxInEvent) {
108  m_prescaleCounterAlgoTrig.push_back(prescaleFactorsAlgoTrig);
109  }
110 
111  // prescale counters: numberTechnicalTriggers counters per bunch cross
112  m_prescaleCounterTechTrig.reserve(numberTechnicalTriggers * totalBxInEvent);
113 
114  for (int iBxInEvent = 0; iBxInEvent <= totalBxInEvent; ++iBxInEvent) {
115  m_prescaleCounterTechTrig.push_back(prescaleFactorsTechTrig);
116  }
117 
118  m_firstEv = false;
119  }
120 
121  // TODO FIXME find the beginning of the luminosity segment
122  if (m_firstEvLumiSegment) {
124  for (int iBxInEvent = 0; iBxInEvent <= totalBxInEvent; ++iBxInEvent) {
125  m_prescaleCounterAlgoTrig.push_back(prescaleFactorsAlgoTrig);
126  }
127 
129  for (int iBxInEvent = 0; iBxInEvent <= totalBxInEvent; ++iBxInEvent) {
130  m_prescaleCounterTechTrig.push_back(prescaleFactorsTechTrig);
131  }
132 
133  m_firstEvLumiSegment = false;
134  }
135 
136  // prescale the algorithm, if necessary
137 
138  // iBxInEvent is ... -2 -1 0 1 2 ... while counters are 0 1 2 3 4 ...
139  int inBxInEvent = totalBxInEvent / 2 + iBxInEvent;
140 
141  for (unsigned int iBit = 0; iBit < numberPhysTriggers; ++iBit) {
142  if ((!algorithmTriggersUnprescaled) && (prescaleFactorsAlgoTrig.at(iBit) != 1)) {
143  bool bitValue = algoDecisionWord.at(iBit);
144  if (bitValue) {
145  (m_prescaleCounterAlgoTrig.at(inBxInEvent).at(iBit))--;
146  if (m_prescaleCounterAlgoTrig.at(inBxInEvent).at(iBit) == 0) {
147  // bit already true in algoDecisionWord, just reset counter
148  m_prescaleCounterAlgoTrig.at(inBxInEvent).at(iBit) = prescaleFactorsAlgoTrig.at(iBit);
149 
150  // LogTrace("L1GlobalTrigger")
151  //<< "\nPrescaled algorithm: " << iBit << ". Reset counter to "
152  //<< prescaleFactorsAlgoTrig.at(iBit) << "\n"
153  //<< std::endl;
154 
155  } else {
156  // change bit to false
157  algoDecisionWord[iBit] = false;
158  ;
159 
160  // LogTrace("L1GlobalTrigger")
161  //<< "\nPrescaled algorithm: " << iBit << ". Result set to false"
162  //<< std::endl;
163  }
164  }
165  }
166  }
167 
168  // algo decision word written in the FDL readout before the trigger mask
169  // in order to allow multiple DAQ partitions
170 
171  //
172  // technical triggers
173  //
174 
175  std::vector<bool> techDecisionWord = *(ptrPSB->getGtTechnicalTriggers());
176 
177  // prescale the technical trigger, if necessary
178 
179  for (unsigned int iBit = 0; iBit < numberTechnicalTriggers; ++iBit) {
180  if ((!technicalTriggersUnprescaled) && (prescaleFactorsTechTrig.at(iBit) != 1)) {
181  bool bitValue = techDecisionWord.at(iBit);
182  if (bitValue) {
183  (m_prescaleCounterTechTrig.at(inBxInEvent).at(iBit))--;
184  if (m_prescaleCounterTechTrig.at(inBxInEvent).at(iBit) == 0) {
185  // bit already true in techDecisionWord, just reset counter
186  m_prescaleCounterTechTrig.at(inBxInEvent).at(iBit) = prescaleFactorsTechTrig.at(iBit);
187 
188  // LogTrace("L1GlobalTrigger")
189  //<< "\nPrescaled algorithm: " << iBit << ". Reset counter to "
190  //<< prescaleFactorsTechTrig.at(iBit) << "\n"
191  //<< std::endl;
192 
193  } else {
194  // change bit to false
195  techDecisionWord[iBit] = false;
196 
197  // LogTrace("L1GlobalTrigger")
198  //<< "\nPrescaled technical trigger: " << iBit << ". Result set to
199  // false"
200  //<< std::endl;
201  }
202  }
203  }
204  }
205 
206  // technical trigger decision word written in the FDL readout before the
207  // trigger mask in order to allow multiple DAQ partitions
208 
209  //
210  // compute the final decision word per DAQ partition
211  //
212 
213  uint16_t finalOrValue = 0;
214 
215  for (unsigned int iDaq = 0; iDaq < numberDaqPartitions; ++iDaq) {
216  bool daqPartitionFinalOR = false;
217 
218  // starts with technical trigger veto mask to minimize computation
219  // no algorithm trigger veto mask is implemented up to now in hardware,
220  // therefore do not implement it here
221  bool vetoTechTrig = false;
222 
223  // vetoTechTrig can change only when using trigger veto masks
224  if (!technicalTriggersVetoUnmasked) {
225  for (unsigned int iBit = 0; iBit < numberTechnicalTriggers; ++iBit) {
226  int triggerMaskVetoTechTrigBit = triggerMaskVetoTechTrig[iBit] & (1 << iDaq);
227  // LogTrace("L1GlobalTrigger")
228  //<< "\nTechnical trigger bit: " << iBit
229  //<< " mask = " << triggerMaskVetoTechTrigBit
230  //<< " DAQ partition " << iDaq
231  //<< std::endl;
232 
233  if (triggerMaskVetoTechTrigBit && techDecisionWord[iBit]) {
234  daqPartitionFinalOR = false;
235  vetoTechTrig = true;
236 
237  // LogTrace("L1GlobalTrigger")
238  //<< "\nVeto mask technical trigger: " << iBit
239  // << ". FinalOR for DAQ partition " << iDaq << " set to false"
240  //<< std::endl;
241 
242  break;
243  }
244  }
245  }
246 
247  // apply algorithm and technical trigger masks only if no veto from
248  // technical trigger
249  if (!vetoTechTrig) {
250  // algorithm trigger mask
251  bool algoFinalOr = false;
252 
253  for (unsigned int iBit = 0; iBit < numberPhysTriggers; ++iBit) {
254  bool iBitDecision = false;
255 
256  int triggerMaskAlgoTrigBit = -1;
257 
258  if (algorithmTriggersUnmasked) {
259  triggerMaskAlgoTrigBit = 0;
260  } else {
261  triggerMaskAlgoTrigBit = triggerMaskAlgoTrig[iBit] & (1 << iDaq);
262  }
263  // LogTrace("L1GlobalTrigger")
264  //<< "\nAlgorithm trigger bit: " << iBit
265  //<< " mask = " << triggerMaskAlgoTrigBit
266  //<< " DAQ partition " << iDaq
267  //<< std::endl;
268 
269  if (triggerMaskAlgoTrigBit) {
270  iBitDecision = false;
271 
272  // LogTrace("L1GlobalTrigger")
273  //<< "\nMasked algorithm trigger: " << iBit << ". Result set to false"
274  //<< std::endl;
275  } else {
276  iBitDecision = algoDecisionWord[iBit];
277  }
278 
279  algoFinalOr = algoFinalOr || iBitDecision;
280  }
281 
282  // set the technical trigger mask: block the corresponding algorithm if
283  // bit value is 1
284 
285  bool techFinalOr = false;
286 
287  for (unsigned int iBit = 0; iBit < numberTechnicalTriggers; ++iBit) {
288  bool iBitDecision = false;
289 
290  int triggerMaskTechTrigBit = -1;
291 
292  if (technicalTriggersUnmasked) {
293  triggerMaskTechTrigBit = 0;
294  } else {
295  triggerMaskTechTrigBit = triggerMaskTechTrig[iBit] & (1 << iDaq);
296  }
297  // LogTrace("L1GlobalTrigger")
298  //<< "\nTechnical trigger bit: " << iBit
299  //<< " mask = " << triggerMaskTechTrigBit
300  //<< std::endl;
301 
302  if (triggerMaskTechTrigBit) {
303  iBitDecision = false;
304 
305  // LogTrace("L1GlobalTrigger")
306  //<< "\nMasked technical trigger: " << iBit << ". Result set to false"
307  //<< std::endl;
308  } else {
309  iBitDecision = techDecisionWord[iBit];
310  }
311 
312  techFinalOr = techFinalOr || iBitDecision;
313  }
314 
315  daqPartitionFinalOR = algoFinalOr || techFinalOr;
316 
317  } else {
318  daqPartitionFinalOR = false; // vetoTechTrig
319  }
320 
321  // push it in finalOrValue
322  uint16_t daqPartitionFinalORValue = static_cast<uint16_t>(daqPartitionFinalOR);
323 
324  finalOrValue = finalOrValue | (daqPartitionFinalORValue << iDaq);
325  }
326 
327  // fill everything we know in the L1GtFdlWord
328 
329  typedef std::vector<L1GtBoard>::const_iterator CItBoardMaps;
330  for (CItBoardMaps itBoard = boardMaps.begin(); itBoard != boardMaps.end(); ++itBoard) {
331  if ((itBoard->gtBoardType() == FDL)) {
332  m_gtFdlWord->setBoardId(itBoard->gtBoardId());
333 
334  // BxInEvent
335  m_gtFdlWord->setBxInEvent(iBxInEvent);
336 
337  // bunch crossing
338 
339  // fill in emulator the same bunch crossing (12 bits - hardwired number of
340  // bits...) and the same local bunch crossing for all boards
341  int bxCross = iEvent.bunchCrossing();
342  uint16_t bxCrossHw = 0;
343  if ((bxCross & 0xFFF) == bxCross) {
344  bxCrossHw = static_cast<uint16_t>(bxCross);
345  } else {
346  bxCrossHw = 0; // Bx number too large, set to 0!
347  if (m_verbosity) {
348  LogDebug("L1GlobalTrigger") << "\nBunch cross number [hex] = " << std::hex << bxCross
349  << "\n larger than 12 bits. Set to 0! \n"
350  << std::dec << std::endl;
351  }
352  }
353 
354  m_gtFdlWord->setBxNr(bxCrossHw);
355 
356  // set event number since last L1 reset generated in FDL
357  m_gtFdlWord->setEventNr(static_cast<uint32_t>(iEvent.id().event()));
358 
359  // technical trigger decision word
360  m_gtFdlWord->setGtTechnicalTriggerWord(techDecisionWord);
361 
362  // algorithm trigger decision word
363  m_gtFdlWord->setGtDecisionWord(algoDecisionWord);
364 
365  // index of prescale factor set - technical triggers and algo
366  m_gtFdlWord->setGtPrescaleFactorIndexTech(static_cast<uint16_t>(pfTechSetIndex));
367  m_gtFdlWord->setGtPrescaleFactorIndexAlgo(static_cast<uint16_t>(pfAlgoSetIndex));
368 
369  // NoAlgo bit FIXME
370 
371  // finalOR
372  m_gtFdlWord->setFinalOR(finalOrValue);
373 
374  // orbit number
375  m_gtFdlWord->setOrbitNr(static_cast<uint32_t>(iEvent.orbitNumber()));
376 
377  // luminosity segment number
378  m_gtFdlWord->setLumiSegmentNr(static_cast<uint16_t>(iEvent.luminosityBlock()));
379 
380  // local bunch crossing - set identical with absolute BxNr
381  m_gtFdlWord->setLocalBxNr(bxCrossHw);
382  }
383  }
384 }
385 
386 // fill the FDL block in the L1 GT DAQ record for iBxInEvent
387 void L1GlobalTriggerFDL::fillDaqFdlBlock(const int iBxInEvent,
388  const uint16_t &activeBoardsGtDaq,
389  const int recordLength0,
390  const int recordLength1,
391  const unsigned int altNrBxBoardDaq,
392  const std::vector<L1GtBoard> &boardMaps,
393  L1GlobalTriggerReadoutRecord *gtDaqReadoutRecord) {
394  typedef std::vector<L1GtBoard>::const_iterator CItBoardMaps;
395  for (CItBoardMaps itBoard = boardMaps.begin(); itBoard != boardMaps.end(); ++itBoard) {
396  int iPosition = itBoard->gtPositionDaqRecord();
397  if (iPosition > 0) {
398  int iActiveBit = itBoard->gtBitDaqActiveBoards();
399  bool activeBoard = false;
400  bool writeBoard = false;
401 
402  int recLength = -1;
403 
404  if (iActiveBit >= 0) {
405  activeBoard = activeBoardsGtDaq & (1 << iActiveBit);
406 
407  int altNrBxBoard = (altNrBxBoardDaq & (1 << iActiveBit)) >> iActiveBit;
408 
409  if (altNrBxBoard == 1) {
410  recLength = recordLength1;
411  } else {
412  recLength = recordLength0;
413  }
414 
415  int lowBxInEvent = (recLength + 1) / 2 - recLength;
416  int uppBxInEvent = (recLength + 1) / 2 - 1;
417 
418  if ((iBxInEvent >= lowBxInEvent) && (iBxInEvent <= uppBxInEvent)) {
419  writeBoard = true;
420  }
421  }
422 
423  if (activeBoard && writeBoard && (itBoard->gtBoardType() == FDL)) {
424  gtDaqReadoutRecord->setGtFdlWord(*m_gtFdlWord);
425  }
426  }
427  }
428 }
429 
430 // fill the FDL block in the L1 GT EVM record for iBxInEvent
431 void L1GlobalTriggerFDL::fillEvmFdlBlock(const int iBxInEvent,
432  const uint16_t &activeBoardsGtEvm,
433  const int recordLength0,
434  const int recordLength1,
435  const unsigned int altNrBxBoardEvm,
436  const std::vector<L1GtBoard> &boardMaps,
437  L1GlobalTriggerEvmReadoutRecord *gtEvmReadoutRecord) {
438  typedef std::vector<L1GtBoard>::const_iterator CItBoardMaps;
439  for (CItBoardMaps itBoard = boardMaps.begin(); itBoard != boardMaps.end(); ++itBoard) {
440  int iPosition = itBoard->gtPositionEvmRecord();
441  if (iPosition > 0) {
442  int iActiveBit = itBoard->gtBitEvmActiveBoards();
443  bool activeBoard = false;
444 
445  if (iActiveBit >= 0) {
446  activeBoard = activeBoardsGtEvm & (1 << iActiveBit);
447  }
448 
449  if (activeBoard && (itBoard->gtBoardType() == FDL)) {
450  gtEvmReadoutRecord->setGtFdlWord(*m_gtFdlWord);
451  }
452  }
453  }
454 }
455 
456 // clear FDL
458  m_gtFdlWord->reset();
459 
460  // do NOT reset the prescale counters
461 }
bool isDebugEnabled()
void setBoardId(const cms_uint16_t &boardIdValue)
set BoardId from a BoardId value
Definition: L1GtFdlWord.h:66
void setFinalOR(const cms_uint16_t &finalORValue)
Definition: L1GtFdlWord.h:223
L1GtFdlWord * m_gtFdlWord
void setEventNr(const cms_uint32_t &eventNrValue)
Definition: L1GtFdlWord.h:102
void setGtDecisionWord(const DecisionWord &gtDecisionWordValue)
Definition: L1GtFdlWord.h:130
void setLocalBxNr(const cms_uint16_t &localBxNrValue)
Definition: L1GtFdlWord.h:261
void setGtFdlWord(const L1GtFdlWord &, int bxInEventValue)
int iEvent
Definition: GenABIO.cc:224
void setGtTechnicalTriggerWord(const TechnicalTriggerWord &gtTechnicalTriggerWordValue)
Definition: L1GtFdlWord.h:114
void setLumiSegmentNr(const cms_uint16_t &lumiSegmentNrValue)
Definition: L1GtFdlWord.h:249
std::vector< std::vector< int > > m_prescaleCounterAlgoTrig
prescale counters: NumberPhysTriggers counters per bunch cross in event
std::vector< bool > DecisionWord
typedefs
int m_verbosity
verbosity level
void fillDaqFdlBlock(const int iBxInEvent, const uint16_t &activeBoardsGtDaq, const int recordLength0, const int recordLength1, const unsigned int altNrBxBoardDaq, const std::vector< L1GtBoard > &boardMaps, L1GlobalTriggerReadoutRecord *gtDaqReadoutRecord)
fill the FDL block in the L1 GT DAQ record for iBxInEvent
void reset()
reset the content of a L1GtFdlWord
Definition: L1GtFdlWord.cc:565
void fillEvmFdlBlock(const int iBxInEvent, const uint16_t &activeBoardsGtEvm, const int recordLength0, const int recordLength1, const unsigned int altNrBxBoardEvm, const std::vector< L1GtBoard > &boardMaps, L1GlobalTriggerEvmReadoutRecord *gtEvmReadoutRecord)
fill the FDL block in the L1 GT EVM record for iBxInEvent
static const unsigned int NumberPhysTriggers
L1GlobalTriggerFDL()
constructor
void setGtPrescaleFactorIndexAlgo(const cms_uint16_t &gtPrescaleFactorIndexAlgoValue)
Definition: L1GtFdlWord.h:197
void setGtPrescaleFactorIndexTech(const cms_uint16_t &gtPrescaleFactorIndexTechValue)
Definition: L1GtFdlWord.h:184
const std::vector< bool > * getGtTechnicalTriggers() const
pointer to technical trigger bits
void reset()
clear FDL
void setGtFdlWord(const L1GtFdlWord &, int bxInEvent)
const std::bitset< L1GlobalTriggerReadoutSetup::NumberPhysTriggers > & getAlgorithmOR() const
return algorithm OR decision
virtual ~L1GlobalTriggerFDL()
destructor
HLT enums.
void run(edm::Event &iEvent, const std::vector< int > &prescaleFactorsAlgoTrig, const std::vector< int > &prescaleFactorsTechTrig, const std::vector< unsigned int > &triggerMaskAlgoTrig, const std::vector< unsigned int > &triggerMaskTechTrig, const std::vector< unsigned int > &triggerMaskVetoAlgoTrig, const std::vector< unsigned int > &triggerMaskVetoTechTrig, const std::vector< L1GtBoard > &boardMaps, const int totalBxInEvent, const int iBxInEvent, const unsigned int numberPhysTriggers, const unsigned int numberTechnicalTriggers, const unsigned int numberDaqPartitions, const L1GlobalTriggerGTL *ptrGTL, const L1GlobalTriggerPSB *ptrPSB, const int pfAlgoSetIndex, const int pfTechSetIndex, const bool algorithmTriggersUnprescaled, const bool algorithmTriggersUnmasked, const bool technicalTriggersUnprescaled, const bool technicalTriggersUnmasked, const bool technicalTriggersVetoUnmasked)
run the FDL
void setOrbitNr(const cms_uint32_t &orbitNrValue)
Definition: L1GtFdlWord.h:237
void setBxInEvent(const int bxInEventValue)
Definition: L1GtFdlWord.h:78
std::vector< std::vector< int > > m_prescaleCounterTechTrig
prescale counters: technical trigger counters per bunch cross in event
void setBxNr(const cms_uint16_t &bxNrValue)
Definition: L1GtFdlWord.h:90
#define LogDebug(id)