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CSCConstants Class Reference

#include <CSCConstants.h>

Public Types

enum  CFEB_Info {
  MAX_CFEBS_RUN1 = 5, NUM_CFEBS_ME1A_GANGED = 1, NUM_CFEBS_ME1A_UNGANGED = 3, NUM_CFEBS_ME1B = 4,
  NUM_CFEBS_ME11_GANGED = NUM_CFEBS_ME1A_GANGED + NUM_CFEBS_ME1B, NUM_CFEBS_ME11_UNGANGED = NUM_CFEBS_ME1A_UNGANGED + NUM_CFEBS_ME1B, MAX_CFEBS_RUN2 = NUM_CFEBS_ME11_UNGANGED, NUM_CFEBS_ME12 = 5,
  NUM_CFEBS_ME13 = 4, NUM_CFEBS_ME21 = 5, NUM_CFEBS_ME22 = 5, NUM_CFEBS_ME31 = 5,
  NUM_CFEBS_ME32 = 5, NUM_CFEBS_ME41 = 5, NUM_CFEBS_ME42 = 5
}
 
enum  DDU_Info { NUM_DDUS = 5 }
 
enum  Digis_Info { MAX_DIGIS_PER_ALCT = 10, MAX_DIGIS_PER_CLCT = 8 }
 
enum  FPGA_Latency { CLCT_EMUL_TIME_OFFSET = 3, ALCT_EMUL_TIME_OFFSET = 6 }
 
enum  Layer_Info { NUM_LAYERS = 6, KEY_CLCT_LAYER = 3, KEY_ALCT_LAYER = 3 }
 
enum  LCT_stubs {
  MAX_CLCT_TBINS = 16, MAX_ALCT_TBINS = 16, MAX_LCT_TBINS = 16, MAX_MATCH_WINDOW_SIZE = 7,
  MAX_CLCTS_PER_PROCESSOR = 2, MAX_CLCTS_READOUT = 2, MAX_ALCTS_PER_PROCESSOR = 2, MAX_ALCTS_READOUT = 2,
  MAX_LCTS_PER_CSC = 2, MAX_LCTS_PER_MPC = 18, MAX_CSCS_PER_EMTF_SP_NO_OVERLAP = 45, LCT_CENTRAL_BX = 8,
  ALCT_CENTRAL_BX = 3, CLCT_CENTRAL_BX = 7, ALCT_CLCT_OFFSET = 1
}
 
enum  Pattern_Info {
  NUM_ALCT_PATTERNS = 3, ALCT_PATTERN_WIDTH = 5, ALCT_ACCELERATOR_PATTERN = 0, ALCT_COLLISIONA_PATTERN = 1,
  ALCT_COLLISIONB_PATTERN = 2, NUM_CLCT_PATTERNS = 11, NUM_CLCT_PATTERNS_RUN3 = 5, CLCT_PATTERN_WIDTH = 11,
  MAX_WIRES_IN_PATTERN = 14, NUM_COMPARATOR_CODES = 4096
}
 
enum  Strip_Info {
  NUM_DISTRIPS_PER_CFEB = 8, NUM_STRIPS_PER_CFEB = 2 * NUM_DISTRIPS_PER_CFEB, NUM_HALF_STRIPS_PER_CFEB = 2 * NUM_STRIPS_PER_CFEB, MAX_NUM_STRIPS_RUN1 = MAX_CFEBS_RUN1 * NUM_STRIPS_PER_CFEB,
  MAX_NUM_STRIPS_RUN2 = MAX_CFEBS_RUN2 * NUM_STRIPS_PER_CFEB, MAX_NUM_HALF_STRIPS_RUN1 = MAX_CFEBS_RUN1 * NUM_HALF_STRIPS_PER_CFEB, MAX_NUM_HALF_STRIPS_RUN2 = MAX_CFEBS_RUN2 * NUM_HALF_STRIPS_PER_CFEB, MAX_NUM_HALF_STRIPS_RUN1_TRIGGER = 1 + MAX_NUM_HALF_STRIPS_RUN1,
  MAX_NUM_HALF_STRIPS_RUN2_TRIGGER = 1 + MAX_NUM_HALF_STRIPS_RUN2, NUM_STRIPS_ME1A_GANGED = NUM_CFEBS_ME1A_GANGED * NUM_STRIPS_PER_CFEB, NUM_STRIPS_ME1A_UNGANGED = NUM_CFEBS_ME1A_UNGANGED * NUM_STRIPS_PER_CFEB, NUM_STRIPS_ME1B = NUM_CFEBS_ME1B * NUM_STRIPS_PER_CFEB,
  NUM_HALF_STRIPS_ME1A_GANGED = NUM_CFEBS_ME1A_GANGED * NUM_HALF_STRIPS_PER_CFEB, NUM_HALF_STRIPS_ME1A_UNGANGED = NUM_CFEBS_ME1A_UNGANGED * NUM_HALF_STRIPS_PER_CFEB, NUM_HALF_STRIPS_ME1B = NUM_CFEBS_ME1B * NUM_HALF_STRIPS_PER_CFEB, NUM_HALF_STRIPS_ME11_GANGED = NUM_CFEBS_ME11_GANGED * NUM_HALF_STRIPS_PER_CFEB,
  NUM_HALF_STRIPS_ME11_UNGANGED = NUM_CFEBS_ME11_UNGANGED * NUM_HALF_STRIPS_PER_CFEB, MAX_HALF_STRIP_ME1A_GANGED = NUM_HALF_STRIPS_ME1A_GANGED - 1, MAX_HALF_STRIP_ME1A_UNGANGED = NUM_HALF_STRIPS_ME1A_UNGANGED - 1, MAX_HALF_STRIP_ME1B = NUM_HALF_STRIPS_ME1B - 1,
  NUM_HALF_STRIPS_ME12 = NUM_CFEBS_ME12 * NUM_HALF_STRIPS_PER_CFEB, NUM_HALF_STRIPS_ME13 = NUM_CFEBS_ME13 * NUM_HALF_STRIPS_PER_CFEB, NUM_HALF_STRIPS_ME21 = NUM_CFEBS_ME21 * NUM_HALF_STRIPS_PER_CFEB, NUM_HALF_STRIPS_ME22 = NUM_CFEBS_ME22 * NUM_HALF_STRIPS_PER_CFEB,
  NUM_HALF_STRIPS_ME31 = NUM_CFEBS_ME31 * NUM_HALF_STRIPS_PER_CFEB, NUM_HALF_STRIPS_ME32 = NUM_CFEBS_ME32 * NUM_HALF_STRIPS_PER_CFEB, NUM_HALF_STRIPS_ME41 = NUM_CFEBS_ME41 * NUM_HALF_STRIPS_PER_CFEB, NUM_HALF_STRIPS_ME42 = NUM_CFEBS_ME42 * NUM_HALF_STRIPS_PER_CFEB,
  INVALID_HALF_STRIP = 65535
}
 
enum  WG_Info {
  NUM_WIREGROUPS_ME11 = 48, NUM_WIREGROUPS_ME12 = 64, NUM_WIREGROUPS_ME13 = 32, NUM_WIREGROUPS_ME21 = 112,
  NUM_WIREGROUPS_ME22 = 64, NUM_WIREGROUPS_ME31 = 96, NUM_WIREGROUPS_ME32 = 64, NUM_WIREGROUPS_ME41 = 96,
  NUM_WIREGROUPS_ME42 = 64, MAX_NUM_WIREGROUPS = 119, INVALID_WIREGROUP = 65535
}
 

Detailed Description

Static interface to basic chamber constants.

Definition at line 10 of file CSCConstants.h.

Member Enumeration Documentation

◆ CFEB_Info

enum CSCConstants::CFEB_Info
Enumerator
MAX_CFEBS_RUN1 
NUM_CFEBS_ME1A_GANGED 
NUM_CFEBS_ME1A_UNGANGED 
NUM_CFEBS_ME1B 
NUM_CFEBS_ME11_GANGED 
NUM_CFEBS_ME11_UNGANGED 
MAX_CFEBS_RUN2 
NUM_CFEBS_ME12 
NUM_CFEBS_ME13 
NUM_CFEBS_ME21 
NUM_CFEBS_ME22 
NUM_CFEBS_ME31 
NUM_CFEBS_ME32 
NUM_CFEBS_ME41 
NUM_CFEBS_ME42 

Definition at line 14 of file CSCConstants.h.

14  {
15  // Run-1: Maximum number of cathode front-end boards
16  MAX_CFEBS_RUN1 = 5,
17  // ME1/1 cases
18  NUM_CFEBS_ME1A_GANGED = 1,
19  NUM_CFEBS_ME1A_UNGANGED = 3,
20  NUM_CFEBS_ME1B = 4,
21  NUM_CFEBS_ME11_GANGED = NUM_CFEBS_ME1A_GANGED + NUM_CFEBS_ME1B, // 5
22  NUM_CFEBS_ME11_UNGANGED = NUM_CFEBS_ME1A_UNGANGED + NUM_CFEBS_ME1B, // 7
23  // Run-2: Maximum number of cathode front-end boards
24  MAX_CFEBS_RUN2 = NUM_CFEBS_ME11_UNGANGED, // 7
25  // CFEBS for the rest of the system
26  NUM_CFEBS_ME12 = 5,
27  NUM_CFEBS_ME13 = 4,
28  NUM_CFEBS_ME21 = 5,
29  NUM_CFEBS_ME22 = 5,
30  NUM_CFEBS_ME31 = 5,
31  NUM_CFEBS_ME32 = 5,
32  NUM_CFEBS_ME41 = 5,
33  NUM_CFEBS_ME42 = 5
34  };

◆ DDU_Info

enum CSCConstants::DDU_Info
Enumerator
NUM_DDUS 

Definition at line 12 of file CSCConstants.h.

12 { NUM_DDUS = 5 };

◆ Digis_Info

enum CSCConstants::Digis_Info
Enumerator
MAX_DIGIS_PER_ALCT 
MAX_DIGIS_PER_CLCT 

Definition at line 122 of file CSCConstants.h.

122 { MAX_DIGIS_PER_ALCT = 10, MAX_DIGIS_PER_CLCT = 8 };

◆ FPGA_Latency

enum CSCConstants::FPGA_Latency
Enumerator
CLCT_EMUL_TIME_OFFSET 
ALCT_EMUL_TIME_OFFSET 

Definition at line 36 of file CSCConstants.h.

36 { CLCT_EMUL_TIME_OFFSET = 3, ALCT_EMUL_TIME_OFFSET = 6 };

◆ Layer_Info

enum CSCConstants::Layer_Info
Enumerator
NUM_LAYERS 
KEY_CLCT_LAYER 
KEY_ALCT_LAYER 

Definition at line 103 of file CSCConstants.h.

103 { NUM_LAYERS = 6, KEY_CLCT_LAYER = 3, KEY_ALCT_LAYER = 3 };

◆ LCT_stubs

enum CSCConstants::LCT_stubs
Enumerator
MAX_CLCT_TBINS 
MAX_ALCT_TBINS 
MAX_LCT_TBINS 
MAX_MATCH_WINDOW_SIZE 
MAX_CLCTS_PER_PROCESSOR 
MAX_CLCTS_READOUT 
MAX_ALCTS_PER_PROCESSOR 
MAX_ALCTS_READOUT 
MAX_LCTS_PER_CSC 
MAX_LCTS_PER_MPC 
MAX_CSCS_PER_EMTF_SP_NO_OVERLAP 
LCT_CENTRAL_BX 
ALCT_CENTRAL_BX 
CLCT_CENTRAL_BX 
ALCT_CLCT_OFFSET 

Definition at line 124 of file CSCConstants.h.

124  {
125  // CSC local trigger considers 4-bit BX window (16 numbers) in the readout
126  MAX_CLCT_TBINS = 16,
127  MAX_ALCT_TBINS = 16,
128  MAX_LCT_TBINS = 16,
129  // Maximum allowed matching window size
130  MAX_MATCH_WINDOW_SIZE = 7,
131  // Each CLCT processor can send up to 2 CLCTs to TMB per BX
132  MAX_CLCTS_PER_PROCESSOR = 2,
133  MAX_CLCTS_READOUT = 2,
134  // Each ALCT processor can send up to 2 ALCTs to TMB per BX
135  MAX_ALCTS_PER_PROCESSOR = 2,
136  MAX_ALCTS_READOUT = 2,
137  // Each CSC can send up to 2 LCTs to the MPC per BX
138  MAX_LCTS_PER_CSC = 2,
139  // An MPC receives up to 18 LCTs from 9 CSCs in the trigger sector
140  MAX_LCTS_PER_MPC = 18,
141  /*
142  An EMTF sector processor receives LCTs from 5 MPCS
143  or 45 chambers when not considering overlapping EMTF SPs
144  18 CSCs in ME1; 9 x 3 CSCs in ME2,3,4
145  */
146  MAX_CSCS_PER_EMTF_SP_NO_OVERLAP = 45,
147  // Reference BX for LCTs in simulation and firmware
148  LCT_CENTRAL_BX = 8,
149  /*
150  Reference BX for ALCTs in firmware. In the ALCT simulation,
151  and in the motherboard simulation the ALCT central BX is 8.
152  However, ALCT BX is shifted before they are inserted into the EDM
153  ROOT file to have a central BX of 3 and be consistent with the firmware.
154  */
155  ALCT_CENTRAL_BX = 3,
156  /*
157  Reference BX for CLCTs in firmware. In the CLCT simulation, the central
158  CLCT BX is 7. In the motherboard simulation they are shifted to 8 (in order
159  to matched with ALCTs). But in the EDM ROOT file the CLCT central BX is 7
160  to be consistent with the firmware.
161  */
162  CLCT_CENTRAL_BX = 7,
163  // Offset between the ALCT and CLCT central BX in simulation
164  ALCT_CLCT_OFFSET = 1
165  };

◆ Pattern_Info

enum CSCConstants::Pattern_Info
Enumerator
NUM_ALCT_PATTERNS 
ALCT_PATTERN_WIDTH 
ALCT_ACCELERATOR_PATTERN 
ALCT_COLLISIONA_PATTERN 
ALCT_COLLISIONB_PATTERN 
NUM_CLCT_PATTERNS 
NUM_CLCT_PATTERNS_RUN3 
CLCT_PATTERN_WIDTH 
MAX_WIRES_IN_PATTERN 
NUM_COMPARATOR_CODES 

Definition at line 106 of file CSCConstants.h.

106  {
107  NUM_ALCT_PATTERNS = 3,
108  ALCT_PATTERN_WIDTH = 5,
109  ALCT_ACCELERATOR_PATTERN = 0,
110  ALCT_COLLISIONA_PATTERN = 1,
111  ALCT_COLLISIONB_PATTERN = 2,
112  // Run-1 and Run-2 CSC trigger patterns
113  NUM_CLCT_PATTERNS = 11,
114  // Run-3 CSC trigger patterns
115  NUM_CLCT_PATTERNS_RUN3 = 5,
116  CLCT_PATTERN_WIDTH = 11,
117  // Max number of wires participating in a pattern
118  MAX_WIRES_IN_PATTERN = 14,
119  NUM_COMPARATOR_CODES = 4096
120  };

◆ Strip_Info

enum CSCConstants::Strip_Info
Enumerator
NUM_DISTRIPS_PER_CFEB 
NUM_STRIPS_PER_CFEB 
NUM_HALF_STRIPS_PER_CFEB 
MAX_NUM_STRIPS_RUN1 
MAX_NUM_STRIPS_RUN2 
MAX_NUM_HALF_STRIPS_RUN1 
MAX_NUM_HALF_STRIPS_RUN2 
MAX_NUM_HALF_STRIPS_RUN1_TRIGGER 
MAX_NUM_HALF_STRIPS_RUN2_TRIGGER 
NUM_STRIPS_ME1A_GANGED 
NUM_STRIPS_ME1A_UNGANGED 
NUM_STRIPS_ME1B 
NUM_HALF_STRIPS_ME1A_GANGED 
NUM_HALF_STRIPS_ME1A_UNGANGED 
NUM_HALF_STRIPS_ME1B 
NUM_HALF_STRIPS_ME11_GANGED 
NUM_HALF_STRIPS_ME11_UNGANGED 
MAX_HALF_STRIP_ME1A_GANGED 
MAX_HALF_STRIP_ME1A_UNGANGED 
MAX_HALF_STRIP_ME1B 
NUM_HALF_STRIPS_ME12 
NUM_HALF_STRIPS_ME13 
NUM_HALF_STRIPS_ME21 
NUM_HALF_STRIPS_ME22 
NUM_HALF_STRIPS_ME31 
NUM_HALF_STRIPS_ME32 
NUM_HALF_STRIPS_ME41 
NUM_HALF_STRIPS_ME42 
INVALID_HALF_STRIP 

Definition at line 56 of file CSCConstants.h.

56  {
57  // Each CFEB reads out 8 distrips...
58  NUM_DISTRIPS_PER_CFEB = 8,
59  //...16 strips...
60  NUM_STRIPS_PER_CFEB = 2 * NUM_DISTRIPS_PER_CFEB,
61  //...32 half-strips.
62  NUM_HALF_STRIPS_PER_CFEB = 2 * NUM_STRIPS_PER_CFEB,
63  // There are exactly 80 or 112 strips...
64  MAX_NUM_STRIPS_RUN1 = MAX_CFEBS_RUN1 * NUM_STRIPS_PER_CFEB, // 80
65  MAX_NUM_STRIPS_RUN2 = MAX_CFEBS_RUN2 * NUM_STRIPS_PER_CFEB, // 112
66  //...and 160 or 224 half-strips for 5 or 7 CFEBs...
67  MAX_NUM_HALF_STRIPS_RUN1 = MAX_CFEBS_RUN1 * NUM_HALF_STRIPS_PER_CFEB, // 160
68  MAX_NUM_HALF_STRIPS_RUN2 = MAX_CFEBS_RUN2 * NUM_HALF_STRIPS_PER_CFEB, // 224
69  // ...but depending on the chamber, there may or may not be strip staggering.
70  /* CMS-MUO-16-001: "[..] alternate layers in a CSC are staggered by half a strip width, except
71  in the ME1/1 chambers where the strips are narrower and the effect is small" */
72  // _TRIGGER is added at the end, because these constants are only used in the trigger
73  MAX_NUM_HALF_STRIPS_RUN1_TRIGGER = 1 + MAX_NUM_HALF_STRIPS_RUN1, // 161
74  MAX_NUM_HALF_STRIPS_RUN2_TRIGGER = 1 + MAX_NUM_HALF_STRIPS_RUN2, // 225
75  // Number of strips in ME11 (special case)
76  NUM_STRIPS_ME1A_GANGED = NUM_CFEBS_ME1A_GANGED * NUM_STRIPS_PER_CFEB, // 16
77  NUM_STRIPS_ME1A_UNGANGED = NUM_CFEBS_ME1A_UNGANGED * NUM_STRIPS_PER_CFEB, // 48
78  NUM_STRIPS_ME1B = NUM_CFEBS_ME1B * NUM_STRIPS_PER_CFEB, // 64
79  // Number of half-strips in ME11 (special case)
80  NUM_HALF_STRIPS_ME1A_GANGED = NUM_CFEBS_ME1A_GANGED * NUM_HALF_STRIPS_PER_CFEB, // 32
81  NUM_HALF_STRIPS_ME1A_UNGANGED = NUM_CFEBS_ME1A_UNGANGED * NUM_HALF_STRIPS_PER_CFEB, // 96
82  NUM_HALF_STRIPS_ME1B = NUM_CFEBS_ME1B * NUM_HALF_STRIPS_PER_CFEB, // 128
83  NUM_HALF_STRIPS_ME11_GANGED = NUM_CFEBS_ME11_GANGED * NUM_HALF_STRIPS_PER_CFEB, // 160
84  NUM_HALF_STRIPS_ME11_UNGANGED = NUM_CFEBS_ME11_UNGANGED * NUM_HALF_STRIPS_PER_CFEB, // 224
85  // max halfstrip number in ME1/1 chambers
86  MAX_HALF_STRIP_ME1A_GANGED = NUM_HALF_STRIPS_ME1A_GANGED - 1, // 31
87  MAX_HALF_STRIP_ME1A_UNGANGED = NUM_HALF_STRIPS_ME1A_UNGANGED - 1, // 95
88  MAX_HALF_STRIP_ME1B = NUM_HALF_STRIPS_ME1B - 1, // 127
89  // half-strips for the rest of the system
90  NUM_HALF_STRIPS_ME12 = NUM_CFEBS_ME12 * NUM_HALF_STRIPS_PER_CFEB, // 160
91  NUM_HALF_STRIPS_ME13 = NUM_CFEBS_ME13 * NUM_HALF_STRIPS_PER_CFEB, // 128
92  NUM_HALF_STRIPS_ME21 = NUM_CFEBS_ME21 * NUM_HALF_STRIPS_PER_CFEB, // 160
93  NUM_HALF_STRIPS_ME22 = NUM_CFEBS_ME22 * NUM_HALF_STRIPS_PER_CFEB, // 160
94  NUM_HALF_STRIPS_ME31 = NUM_CFEBS_ME31 * NUM_HALF_STRIPS_PER_CFEB, // 160
95  NUM_HALF_STRIPS_ME32 = NUM_CFEBS_ME32 * NUM_HALF_STRIPS_PER_CFEB, // 160
96  NUM_HALF_STRIPS_ME41 = NUM_CFEBS_ME41 * NUM_HALF_STRIPS_PER_CFEB, // 160
97  NUM_HALF_STRIPS_ME42 = NUM_CFEBS_ME42 * NUM_HALF_STRIPS_PER_CFEB, // 160
98  // useful for the comparator code algorithm
99  INVALID_HALF_STRIP = 65535
100  };

◆ WG_Info

enum CSCConstants::WG_Info
Enumerator
NUM_WIREGROUPS_ME11 
NUM_WIREGROUPS_ME12 
NUM_WIREGROUPS_ME13 
NUM_WIREGROUPS_ME21 
NUM_WIREGROUPS_ME22 
NUM_WIREGROUPS_ME31 
NUM_WIREGROUPS_ME32 
NUM_WIREGROUPS_ME41 
NUM_WIREGROUPS_ME42 
MAX_NUM_WIREGROUPS 
INVALID_WIREGROUP 

Definition at line 39 of file CSCConstants.h.

39  {
40  NUM_WIREGROUPS_ME11 = 48,
41  NUM_WIREGROUPS_ME12 = 64,
42  NUM_WIREGROUPS_ME13 = 32,
43  NUM_WIREGROUPS_ME21 = 112,
44  NUM_WIREGROUPS_ME22 = 64,
45  NUM_WIREGROUPS_ME31 = 96,
46  NUM_WIREGROUPS_ME32 = 64,
47  NUM_WIREGROUPS_ME41 = 96,
48  NUM_WIREGROUPS_ME42 = 64,
49  // this number should really be 112, but has always been 119 since the
50  // CSC trigger was developed in 2006. Probably it would not hurt to change it to 112
51  MAX_NUM_WIREGROUPS = 119,
52  INVALID_WIREGROUP = 65535
53  };
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