27 static std::atomic<bool> config_dumped{
false};
86 thresholds_ = shower.getParameter<std::vector<unsigned>>(
"showerThresholds");
121 static std::atomic<bool> config_dumped{
false};
136 if (!config_dumped) {
138 config_dumped =
true;
148 static const unsigned int max_fifo_tbins = 1 << 5;
149 static const unsigned int max_fifo_pretrig = 1 << 5;
150 static const unsigned int max_drift_delay = 1 << 2;
151 static const unsigned int max_nplanes_hit_pretrig = 1 << 3;
152 static const unsigned int max_nplanes_hit_pattern = 1 << 3;
153 static const unsigned int max_nplanes_hit_accel_pretrig = 1 << 3;
154 static const unsigned int max_nplanes_hit_accel_pattern = 1 << 3;
155 static const unsigned int max_trig_mode = 1 << 2;
156 static const unsigned int max_accel_mode = 1 << 2;
168 max_nplanes_hit_accel_pretrig,
170 "nplanes_hit_accel_pretrig");
172 max_nplanes_hit_accel_pattern,
174 "nplanes_hit_accel_pattern");
202 static std::atomic<bool> config_dumped{
false};
205 config_dumped =
true;
218 <<
"+++ CSC geometry looks garbled; no emulation possible +++\n";
225 <<
" is not defined in current geometry! +++\n" 226 <<
"+++ CSC geometry looks garbled; no emulation possible +++\n";
235 <<
" numWireGroups = " <<
numWireGroups <<
"; ALCT emulation skipped! +++";
236 std::vector<CSCALCTDigi> emptyV;
251 const unsigned int min_layers =
256 unsigned int layersHit = 0;
259 if (!wireGroupTimes[i_layer][i_wire].
empty()) {
265 if (layersHit >= min_layers)
286 std::map<int, std::map<int, CSCALCTDigi::WireContainer>> hits_in_patterns;
287 hits_in_patterns.clear();
293 if (!chamber_empty) {
297 if (
unsigned(i_wire) >= max_wire)
300 unsigned int start_bx = 0;
302 while (start_bx < stop_bx) {
308 int ghost_cleared[2] = {0, 0};
330 int valid = (ghost_cleared[0] == 0) ? 1 : 0;
338 LogTrace(
"CSCAnodeLCTProcessor") <<
"Add one ALCT to list " <<
lct_list.back();
359 LogTrace(
"CSCAnodeLCTProcessor") <<
"Add one ALCT to list " <<
lct_list.back();
393 bool hasDigis =
false;
397 digiV[i_layer].clear();
411 LogTrace(
"CSCAnodeLCTProcessor") <<
"found " <<
digiV[i_layer].size() <<
" wire digi(s) in layer " << i_layer
414 for (
const auto& wd :
digiV[i_layer]) {
415 LogTrace(
"CSCAnodeLCTProcessor") <<
" " << wd;
427 digiV[
id.layer() - 1].push_back(*digiIt);
437 for (
const auto& wd :
digiV[i_layer]) {
438 int i_wire = wd.getWireGroup() - 1;
439 std::vector<int> bx_times = wd.getTimeBinsOn();
445 <<
"+++ Found wire digi with wrong wire number = " << i_wire <<
" (max wires = " <<
numWireGroups 446 <<
"); skipping it... +++\n";
456 int last_time = -999;
458 wire[i_layer][i_wire].push_back(0);
459 wire[i_layer][i_wire].push_back(6);
461 for (
unsigned int i = 0;
i < bx_times.size();
i++) {
463 if (
i > 0 && bx_times[
i] == (bx_times[
i - 1] + 1))
468 <<
"Digi on layer " << i_layer <<
" wire " << i_wire <<
" at time " << bx_times[
i];
473 if (last_time < 0 || ((bx_times[
i] - last_time) >= 6)) {
474 wire[i_layer][i_wire].push_back(bx_times[
i]);
475 last_time = bx_times[
i];
479 LogTrace(
"CSCAnodeLCTProcessor") <<
"+++ Skipping wire digi: wire = " << i_wire <<
" layer = " << i_layer
480 <<
", bx = " << bx_times[
i] <<
" +++";
490 bool chamber_empty =
true;
491 int i_wire, i_layer, digi_num;
508 for (
int j = 0;
j < 3;
j++)
515 if (!wire[i_layer][i_wire].
empty()) {
516 std::vector<int> bx_times = wire[i_layer][i_wire];
517 for (
unsigned int i = 0;
i < bx_times.size();
i++) {
519 if (bx_times[
i] < 0 || bx_times[
i] +
hit_persist >= bits_in_pulse) {
522 <<
"+++ BX time of wire digi (wire = " << i_wire <<
" layer = " << i_layer <<
") bx = " << bx_times[
i]
523 <<
" is not within the range (0-" << bits_in_pulse
524 <<
"] allowed for pulse extension. Skip this digi! +++\n";
530 chamber_empty =
false;
537 LogTrace(
"CSCAnodeLCTProcessor") <<
"Wire digi: layer " << i_layer <<
" digi #" << ++digi_num
538 <<
" wire group " << i_wire <<
" time " << bx_times[
i];
540 std::ostringstream strstrm;
541 for (
int i = 1;
i <= 32;
i++) {
544 LogTrace(
"CSCAnodeLCTProcessor") <<
" Pulse: " << strstrm.str();
552 if (
infoV > 1 && !chamber_empty) {
556 return chamber_empty;
560 int nPreTriggers = 0;
562 unsigned int layers_hit;
567 const unsigned int nplanes_hit_pretrig_acc =
577 for (
unsigned int bx_time = start_bx; bx_time < stop_bx; bx_time++) {
581 hit_layer[i_layer] =
false;
594 if (!hit_layer[i_layer]) {
595 hit_layer[i_layer] =
true;
601 if (layers_hit >= pretrig_thresh[i_pattern]) {
604 LogTrace(
"CSCAnodeLCTProcessor") <<
"Pretrigger was satisfied for wire: " << key_wire
605 <<
" pattern: " << i_pattern <<
" bx_time: " << bx_time;
627 const int key_wire,
std::map<
int, std::map<int, CSCALCTDigi::WireContainer>>& hits_in_patterns) {
630 unsigned int temp_quality;
631 int this_wire, delta_wire;
634 const unsigned int nplanes_hit_pattern_acc =
638 const std::string ptn_label[] = {
"Accelerator",
"CollisionA",
"CollisionB"};
645 hit_layer[i_layer] =
false;
649 hits_single_pattern.clear();
651 for (
auto&
p : hits_single_pattern) {
655 double num_pattern_hits = 0., times_sum = 0.;
656 std::multiset<int> mset_for_median;
657 mset_for_median.clear();
664 this_wire = delta_wire + key_wire;
670 hits_single_pattern[i_layer][i_wire] = this_wire;
674 if (!hit_layer[i_layer]) {
677 hit_layer[i_layer] =
true;
680 <<
"bx_time: " <<
first_bx[key_wire] <<
" pattern: " << i_pattern <<
" keywire: " << key_wire
681 <<
" layer: " << i_layer <<
" quality: " << temp_quality;
685 if (
abs(delta_wire) < 2) {
689 for (
unsigned int dbx = 0; dbx <
hit_persist; dbx++) {
695 times_sum += (double)first_bx_layer;
696 num_pattern_hits += 1.;
697 mset_for_median.insert(first_bx_layer);
699 LogTrace(
"CSCAnodeLCTProcessor") <<
" 1st bx in layer: " << first_bx_layer <<
" sum bx: " << times_sum
700 <<
" #pat. hits: " << num_pattern_hits;
709 const int sz = mset_for_median.size();
711 std::multiset<int>::iterator im = mset_for_median.begin();
713 std::advance(im, sz / 2 - 1);
716 else if ((sz % 2) == 1)
721 #if defined(EDM_ML_DEBUG) 723 auto lt =
LogTrace(
"CSCAnodeLCTProcessor")
725 for (im = mset_for_median.begin(); im != mset_for_median.end(); im++) {
733 if (temp_quality >= pattern_thresh[i_pattern]) {
735 hits_in_patterns[key_wire][i_pattern] = hits_single_pattern;
752 LogTrace(
"CSCAnodeLCTProcessor") <<
"Pattern found; keywire: " << key_wire <<
" type: " << ptn_label[i_pattern]
753 <<
" quality: " << temp_quality <<
"\n";
759 LogTrace(
"CSCAnodeLCTProcessor") <<
"Collision Pattern A is chosen" 762 LogTrace(
"CSCAnodeLCTProcessor") <<
"Collision Pattern B is chosen" 772 for (
int i_pattern = 0; i_pattern < 2; i_pattern++) {
773 ghost_cleared[i_pattern] = 0;
778 int qual_this =
quality[key_wire][i_pattern];
787 if (not(
p.getKeyWG() == key_wire - 1 and 1 -
p.getAccelerator() == i_pattern))
790 bool ghost_cleared_prev =
false;
791 int qual_prev =
p.getQuality();
792 int first_bx_prev =
p.getBX();
795 <<
"ghost concellation logic " 797 << key_wire <<
" quality " << qual_this <<
" bx " <<
first_bx[key_wire] <<
" previous key_wire " 798 << key_wire - 1 <<
" quality " << qual_prev <<
" bx " <<
first_bx[key_wire - 1];
809 if (qual_prev >= qual_this)
810 ghost_cleared[i_pattern] = 1;
811 else if (qual_prev < qual_this)
812 ghost_cleared_prev =
true;
815 ghost_cleared[i_pattern] = 1;
818 ghost_cleared_prev =
true;
821 if (ghost_cleared[i_pattern] == 1) {
825 <<
" pattern ghost cancelled on key_wire " << key_wire <<
" q=" << qual_this <<
" by wire " 826 << key_wire - 1 <<
" q=" << qual_prev;
830 if (ghost_cleared_prev) {
834 <<
" pattern ghost cancelled on key_wire " << key_wire - 1 <<
" q=" << qual_prev <<
" by wire " 835 << key_wire <<
" q=" << qual_this;
850 int n_alct_all = 0, n_alct = 0;
855 for (
const auto&
p : fourBest) {
861 <<
"C:" <<
theChamber <<
" all " << n_alct_all <<
" found " << n_alct;
866 for (
const auto&
p : fourBest) {
867 const int bx =
p.getBX();
872 <<
"; skipping it... +++\n";
921 LogTrace(
"CSCAnodeLCTProcessor") << all_alcts.size() <<
" ALCTs at the input of best-track selector: ";
922 for (
const auto&
p : all_alcts) {
931 for (
const auto&
p : all_alcts) {
943 int accel =
p.getAccelerator();
944 int qual =
p.getQuality();
945 int wire =
p.getKeyWG();
952 if (!vA || qual > qA || (qual == qA && wire > wA)) {
955 if (!vB || qual > qB || (qual == qB && wire < wB)) {
961 for (
int accel = 0; accel <= 1; accel++) {
965 LogTrace(
"CSCAnodeLCTProcessor") <<
"tA: " << tA[
bx][accel];
966 LogTrace(
"CSCAnodeLCTProcessor") <<
"tB: " << tB[
bx][accel];
968 bestALCTs[
bx][accel] = tA[
bx][accel];
971 if (tA[
bx][accel] != tB[
bx][accel] && tA[
bx][accel].getQuality() == tB[
bx][accel].getQuality()) {
972 secondALCTs[
bx][accel] = tB[
bx][accel];
978 for (
const auto&
p : all_alcts) {
979 if (
p.isValid() &&
p.getAccelerator() == accel &&
p.getBX() ==
bx &&
982 p.getKeyWG() >= secondALCTs[
bx][accel].
getKeyWG()) {
983 secondALCTs[
bx][accel] =
p;
992 std::vector<CSCALCTDigi> fourBest;
996 fourBest.push_back(bestALCTs[
bx][
i]);
1001 fourBest.push_back(secondALCTs[
bx][
i]);
1007 LogTrace(
"CSCAnodeLCTProcessor") << fourBest.size() <<
" ALCTs selected: ";
1008 for (
const auto&
p : fourBest) {
1017 bool returnValue =
false;
1035 if (qual1 > qual2) {
1067 LogTrace(
"CSCAnodeLCTProcessor") <<
"trigMode(): collision track " << key_wire <<
" disabled" 1076 LogTrace(
"CSCAnodeLCTProcessor") <<
"trigMode(): accelerator track " << key_wire <<
" disabled" 1086 LogTrace(
"CSCAnodeLCTProcessor") <<
"trigMode(): collision track " << key_wire <<
" disabled" 1094 int promotionBit = 1 << 2;
1100 if (
quality[key_wire][0] > 0) {
1103 LogTrace(
"CSCAnodeLCTProcessor") <<
"alctMode(): accelerator track " << key_wire <<
" ignored" 1112 LogTrace(
"CSCAnodeLCTProcessor") <<
"alctMode(): collision track " << key_wire <<
" promoted" 1121 LogTrace(
"CSCAnodeLCTProcessor") <<
"alctMode(): accelerator track " << key_wire <<
" promoted" 1130 LogTrace(
"CSCAnodeLCTProcessor") <<
"alctMode(): collision track " << key_wire <<
" ignored" 1139 std::ostringstream strm;
1141 strm <<
"++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n";
1142 strm <<
"+ ALCT configuration parameters: +\n";
1143 strm <<
"++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n";
1144 strm <<
" fifo_tbins [total number of time bins in DAQ readout] = " <<
fifo_tbins <<
"\n";
1145 strm <<
" fifo_pretrig [start time of anode raw hits in DAQ readout] = " <<
fifo_pretrig <<
"\n";
1146 strm <<
" drift_delay [drift delay after pre-trigger, in 25 ns bins] = " <<
drift_delay <<
"\n";
1147 strm <<
" nplanes_hit_pretrig [min. number of layers hit for pre-trigger] = " <<
nplanes_hit_pretrig <<
"\n";
1148 strm <<
" nplanes_hit_pattern [min. number of layers hit for trigger] = " <<
nplanes_hit_pattern <<
"\n";
1149 strm <<
" nplanes_hit_accel_pretrig [min. number of layers hit for accel." 1151 strm <<
" nplanes_hit_accel_pattern [min. number of layers hit for accel." 1153 strm <<
" trig_mode [enabling/disabling collision/accelerator tracks] = " <<
trig_mode <<
"\n";
1154 strm <<
" accel_mode [preference to collision/accelerator tracks] = " <<
accel_mode <<
"\n";
1155 strm <<
" l1a_window_width [L1Accept window width, in 25 ns bins] = " <<
l1a_window_width <<
"\n";
1156 strm <<
"++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n";
1157 LogDebug(
"CSCAnodeLCTProcessor") << strm.str();
1165 std::ostringstream strstrm;
1167 if (i_wire % 10 == 0) {
1169 strstrm << i_wire / 10;
1171 strstrm << (i_wire - 100) / 10;
1177 strstrm << i_wire % 10;
1182 if (!wire[i_layer][i_wire].
empty()) {
1183 std::vector<int> bx_times = wire[i_layer][i_wire];
1184 strstrm << std::hex << bx_times[0] <<
std::dec;
1190 LogTrace(
"CSCAnodeLCTProcessor") << strstrm.str();
1196 std::vector<CSCALCTDigi> tmpV;
1202 static std::atomic<int> late_tbins{
early_tbins + lct_bins};
1204 static std::atomic<int> ifois{0};
1208 <<
"+++ fifo_pretrig = " <<
fifo_pretrig <<
"; in-time ALCTs are not getting read-out!!! +++" 1215 <<
"+++ Allowed range of time bins, [0-" << late_tbins <<
"] exceeds max allowed, " 1217 <<
"+++ Set late_tbins to max allowed +++\n";
1225 const std::vector<CSCALCTDigi>& all_alcts =
getALCTs();
1226 for (
const auto&
p : all_alcts) {
1234 LogDebug(
"CSCAnodeLCTProcessor") <<
" Do not report ALCT on keywire " <<
p.getKeyWG() <<
": found at bx " <<
bx 1235 <<
", whereas the earliest allowed bx is " <<
early_tbins + 1;
1240 if (
bx > late_tbins) {
1242 LogDebug(
"CSCAnodeLCTProcessor") <<
" Do not report ALCT on keywire " <<
p.getKeyWG() <<
": found at bx " <<
bx 1243 <<
", whereas the latest allowed bx is " << late_tbins;
1256 for (
auto&
p : tmpV) {
1262 for (
const auto& alct : tmpV) {
1271 std::vector<CSCALCTDigi> tmpV;
1303 std::vector<CSCShowerDigi> showerOut;
1308 minBXdiff = bx_diff;
1325 std::ostringstream strstrm_header;
1326 LogTrace(
"CSCAnodeLCTProcessor") <<
"\n" 1327 <<
"Pattern: " << i_pattern <<
" Key wire: " << key_wire;
1328 for (
int i = 1;
i <= 32;
i++) {
1329 strstrm_header << ((32 -
i) % 10);
1331 LogTrace(
"CSCAnodeLCTProcessor") << strstrm_header.str();
1336 std::ostringstream strstrm_pulse;
1339 for (
int i = 1;
i <= 32;
i++) {
1342 LogTrace(
"CSCAnodeLCTProcessor") << strstrm_pulse.str() <<
" on layer " << i_layer <<
" wire " << this_wire;
1347 LogTrace(
"CSCAnodeLCTProcessor") <<
"-------------------------------------------";
1353 if (temp_quality > 3)
1354 Q = temp_quality - 3;
1362 for (
auto&
p : wireHits) {
1384 bool atLeastOneWGHit =
false;
1385 for (
const auto& wd :
digiV[i_layer]) {
1386 std::vector<int> bx_times = wd.getTimeBinsOn();
1388 if (
std::find(bx_times.begin(), bx_times.end(),
bx) != bx_times.end()) {
1389 hitsInTime[
bx] += 1;
1390 atLeastOneWGHit =
true;
1394 if (atLeastOneWGHit) {
1395 layersWithHits[
bx].insert(i_layer);
1405 std::vector<unsigned> station_thresholds = {
1412 unsigned this_hitsInTime = 0;
1413 for (
unsigned mbx = minbx; mbx <= maxbx; mbx++) {
1414 this_hitsInTime += hitsInTime[mbx];
1417 unsigned this_inTimeHMT = 0;
1422 if (!station_thresholds.empty()) {
1423 for (
int i = station_thresholds.size() - 1;
i >= 0;
i--) {
1424 if (this_hitsInTime >= station_thresholds[
i]) {
1425 this_inTimeHMT =
i + 1;
1433 this_inTimeHMT,
false,
theTrigChamber,
bx, CSCShowerDigi::ShowerType::kALCTShower, this_hitsInTime, 0);
bool isValid() const
check ALCT validity (1 - valid ALCT)
void setHits(const WireContainer &hits)
CSCShowerDigi anode_showers_[CSCConstants::MAX_ALCT_TBINS]
T getParameter(std::string const &) const
const CSCLayer * layer(CSCDetId id) const
Return the layer corresponding to the given id.
static const int alct_keywire_offset_[2][CSCConstants::ALCT_PATTERN_WIDTH]
int ghost_cancellation_bx_depth
uint16_t getBX() const
return BX - five low bits of BXN counter tagged by the ALCT
void showPatterns(const int key_wire)
bool isOneShotHighAtBX(const unsigned layer, const unsigned channel, const unsigned bx) const
unsigned int alctAccelMode() const
std::unique_ptr< LCTQualityControl > qualityControl_
void checkConfigParameters()
const bool isValid(const Frame &aFrame, const FrameQuality &aQuality, const uint16_t aExpectedPos)
unsigned int alctFifoTbins() const
static const unsigned int def_drift_delay
static const unsigned int def_fifo_tbins
void encodeHighMultiplicityBits()
bool getDigis(const CSCWireDigiCollection *wiredc)
const CSCChamber * cscChamber_
void dumpConfigParams() const
void checkConfigParameters(unsigned int &var, const unsigned int var_max, const unsigned int var_def, const std::string &var_str)
bool pulseExtension(const std::vector< int > wire[CSCConstants::NUM_LAYERS][CSCConstants::MAX_NUM_WIREGROUPS])
unsigned int nplanes_hit_pattern
int first_bx_corrected[CSCConstants::MAX_NUM_WIREGROUPS]
ParameterSet const & getParameterSet(std::string const &) const
std::vector< CSCALCTPreTriggerDigi > thePreTriggerDigis
void clear()
clear this ALCT
Log< level::Error, false > LogError
void find(edm::Handle< EcalRecHitCollection > &hits, DetId thisDet, std::vector< EcalRecHitCollection::const_iterator > &hit, bool debug=false)
unsigned short iChamberType() const
void setConfigParameters(const CSCDBL1TPParameters *conf)
void trigMode(const int key_wire)
unsigned int alctTrigMode() const
uint16_t getQuality() const
return quality of a pattern
const CSCLayerGeometry * geometry() const
static const unsigned int def_accel_mode
std::vector< CSCALCTDigi > lct_list
static const unsigned int def_nplanes_hit_accel_pretrig
const unsigned theTrigChamber
static const unsigned int def_fifo_pretrig
unsigned int alctNplanesHitPattern() const
std::vector< CSCShowerDigi > readoutShower() const
int numberOfWireGroups() const
The Signals That Services Can Subscribe To This is based on ActivityRegistry and is current per Services can connect to the signals distributed by the ActivityRegistry in order to monitor the activity of the application Each possible callback has some defined which we here list in angle e< void, edm::EventID const &, edm::Timestamp const & > We also list in braces which AR_WATCH_USING_METHOD_ is used for those or
uint16_t getKeyWG() const
return key wire group
void accelMode(const int key_wire)
Abs< T >::type abs(const T &t)
unsigned int alctNplanesHitPretrig() const
unsigned int l1a_window_width
unsigned int alctL1aWindowWidth() const
unsigned int alctNplanesHitAccelPretrig() const
static const unsigned int def_nplanes_hit_pattern
bool oneShotAtBX(const unsigned layer, const unsigned channel, const unsigned bx) const
static const LCTPatterns alct_pattern_r1_
bool preTrigger(const int key_wire, const int start_bx)
CSCALCTDigi secondALCT[CSCConstants::MAX_ALCT_TBINS]
static const unsigned int def_l1a_window_width
uint16_t getFullBX() const
return 12-bit full BX.
CSCPatternBank::LCTPatterns alct_pattern_
bool ghost_cancellation_side_quality
CSCALCTDigi getSecondALCT(int bx) const
unsigned int alctDriftDelay() const
static const unsigned int def_trig_mode
std::vector< std::vector< uint16_t > > WireContainer
bool patternDetection(const int key_wire, std::map< int, std::map< int, CSCALCTDigi::WireContainer > > &hits_in_patterns)
std::vector< CSCShowerDigi > getAllShower() const
unsigned int alctNplanesHitAccelPattern() const
static const unsigned int def_nplanes_hit_accel_pattern
bool isBetterALCT(const CSCALCTDigi &lhsALCT, const CSCALCTDigi &rhsALCT) const
void setDefaultConfigParameters()
std::pair< const_iterator, const_iterator > Range
uint16_t getAccelerator() const
const unsigned theStation
std::vector< DigiType >::const_iterator const_iterator
void cleanWireContainer(CSCALCTDigi::WireContainer &wireHits) const
unsigned int alctFifoPretrig() const
std::vector< CSCALCTDigi > bestTrackSelector(const std::vector< CSCALCTDigi > &all_alcts)
void initialize(unsigned numberOfChannels)
CSCALCTDigi getBestALCT(int bx) const
unsigned int fifo_pretrig
CSCALCTDigi bestALCT[CSCConstants::MAX_ALCT_TBINS]
virtual void ghostCancellationLogicOneWire(const int key_wire, int *ghost_cleared)
std::vector< CSCALCTDigi > getALCTs() const
void setWireContainer(CSCALCTDigi &, CSCALCTDigi::WireContainer &wireHits) const
static const LCTPatterns alct_pattern_legacy_
virtual int getTempALCTQuality(int temp_quality) const
edm::ParameterSet alctParams_
unsigned bitsInPulse() const
void clear()
clear this Shower
unsigned minLayersCentralTBin_
void setTrknmb(const uint16_t number)
Set track number (1,2) after sorting ALCTs.
void dumpDigis(const std::vector< int > wire[CSCConstants::NUM_LAYERS][CSCConstants::MAX_NUM_WIREGROUPS]) const
Log< level::Warning, false > LogWarning
edm::ParameterSet showerParams_
int first_bx[CSCConstants::MAX_NUM_WIREGROUPS]
unsigned int nplanes_hit_accel_pattern
int quality[CSCConstants::MAX_NUM_WIREGROUPS][CSCConstants::NUM_ALCT_PATTERNS]
std::vector< CSCALCTDigi > readoutALCTs() const
std::vector< CSCALCTDigi > run(const CSCWireDigiCollection *wiredc)
std::vector< unsigned > thresholds_
void readWireDigis(std::vector< int > wire[CSCConstants::NUM_LAYERS][CSCConstants::MAX_NUM_WIREGROUPS])
unsigned int pretrig_extra_deadtime
std::vector< CSCWireDigi > digiV[CSCConstants::NUM_LAYERS]
void extend(const unsigned layer, const unsigned channel, const unsigned bx, const unsigned hit_persist)
CSCAnodeLCTProcessor(unsigned endcap, unsigned station, unsigned sector, unsigned subsector, unsigned chamber, const edm::ParameterSet &conf)
unsigned int nplanes_hit_pretrig
static const unsigned int def_nplanes_hit_pretrig
const unsigned theSubsector
unsigned int nplanes_hit_accel_pretrig