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CSCCFEBStatusDigi.cc
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1 
8 #include <iostream>
9 #include <cstdint>
10 
12 int CSCCFEBStatusDigi::ShiftSel(int nmb, int nshift, int nsel) const {
13  int tmp = nmb;
14  tmp = tmp >> nshift;
15  return tmp = tmp & nsel;
16 }
18 std::vector<uint16_t> CSCCFEBStatusDigi::getSCAFullCond() const {
19  /* std::vector<int> vec(4,0);
20  vec[0]=ShiftSel(SCAFullCond_,0,15); // 4-bit FIFO1 word count
21  vec[1]=ShiftSel(SCAFullCond_,4,15); // 4-bit Block Number if Error Code=1
22  // (CFEB: SCA Capacitors Full)
23  // 4-bit FIFO3 word count if Error Code=2
24  // (CFEB: FPGA FIFO full)
25  vec[2]=ShiftSel(SCAFullCond_,9,7); // Error Code
26  vec[3]=ShiftSel(SCAFullCond_,12,15); // DDU Code, should be 0xB
27  return vec;*/
28  return bWords_;
29 }
31 std::vector<int> CSCCFEBStatusDigi::getTS_FLAG() const {
32  std::vector<int> vec(contrWords_.size(), 0);
33  int nmb;
34  for (unsigned int i = 0; i < vec.size(); i++) {
35  nmb = contrWords_[i];
36  vec[i] = ShiftSel(nmb, 15, 1);
37  }
38  return vec;
39 }
40 
42 std::vector<int> CSCCFEBStatusDigi::getSCA_FULL() const {
43  std::vector<int> vec(contrWords_.size(), 0);
44  int nmb;
45  for (unsigned int i = 0; i < vec.size(); i++) {
46  nmb = contrWords_[i];
47  vec[i] = ShiftSel(nmb, 14, 1);
48  }
49  return vec;
50 }
51 
53 std::vector<int> CSCCFEBStatusDigi::getLCT_PHASE() const {
54  std::vector<int> vec(contrWords_.size(), 0);
55  int nmb;
56  for (unsigned int i = 0; i < vec.size(); i++) {
57  nmb = contrWords_[i];
58  vec[i] = ShiftSel(nmb, 13, 1);
59  }
60  return vec;
61 }
62 
64 std::vector<int> CSCCFEBStatusDigi::getL1A_PHASE() const {
65  std::vector<int> vec(contrWords_.size(), 0);
66  int nmb;
67  for (unsigned int i = 0; i < vec.size(); i++) {
68  nmb = contrWords_[i];
69  vec[i] = ShiftSel(nmb, 12, 1);
70  }
71  return vec;
72 }
73 
75 std::vector<int> CSCCFEBStatusDigi::getSCA_BLK() const {
76  std::vector<int> vec(contrWords_.size(), 0);
77  int nmb;
78  for (unsigned int i = 0; i < vec.size(); i++) {
79  nmb = contrWords_[i];
80  vec[i] = ShiftSel(nmb, 8, 15);
81  }
82  return vec;
83 }
84 
86 std::vector<int> CSCCFEBStatusDigi::getTRIG_TIME() const {
87  std::vector<int> vec(contrWords_.size(), 0);
88  int nmb;
89  for (unsigned int i = 0; i < vec.size(); i++) {
90  nmb = contrWords_[i];
91  vec[i] = ShiftSel(nmb, 0, 255);
92  }
93  return vec;
94 }
95 
98  edm::LogVerbatim("CSCDigi") << "CSC CFEB # : " << getCFEBNmb();
99 
100  std::ostringstream ost;
101  ost << " SCAFullCond: ";
102  if (!getSCAFullCond().empty()) {
103  for (size_t i = 0; i < 4; ++i) {
104  ost << " " << (getSCAFullCond())[i];
105  }
106  } else {
107  ost << " "
108  << "BWORD is not valid";
109  }
110  edm::LogVerbatim("CSCDigi") << ost.str();
111 
112  ost.clear();
113  ost << " CRC: ";
114  for (size_t i = 0; i < getCRC().size(); ++i) {
115  ost << " " << (getCRC())[i];
116  }
117  edm::LogVerbatim("CSCDigi") << ost.str();
118 
119  ost.clear();
120  ost << " TS_FLAG: ";
121  for (size_t i = 0; i < getTS_FLAG().size(); ++i) {
122  ost << " " << (getTS_FLAG())[i];
123  }
124  edm::LogVerbatim("CSCDigi") << ost.str();
125 
126  ost.clear();
127  ost << " SCA_FULL: ";
128  for (size_t i = 0; i < getSCA_FULL().size(); ++i) {
129  ost << " " << (getSCA_FULL())[i];
130  }
131  edm::LogVerbatim("CSCDigi") << ost.str();
132 
133  ost.clear();
134  ost << " LCT_PHASE: ";
135  for (size_t i = 0; i < getLCT_PHASE().size(); ++i) {
136  ost << " " << (getLCT_PHASE())[i];
137  }
138  edm::LogVerbatim("CSCDigi") << ost.str();
139 
140  ost.clear();
141  ost << " L1A_PHASE: ";
142  for (size_t i = 0; i < getL1A_PHASE().size(); ++i) {
143  ost << " " << (getL1A_PHASE())[i];
144  }
145  edm::LogVerbatim("CSCDigi") << ost.str();
146 
147  ost.clear();
148  ost << " SCA_BLK: ";
149  for (size_t i = 0; i < getSCA_BLK().size(); ++i) {
150  ost << " " << (getSCA_BLK())[i];
151  }
152  edm::LogVerbatim("CSCDigi") << ost.str();
153 
154  ost.clear();
155  ost << " TRIG_TIME: ";
156  for (size_t i = 0; i < getTRIG_TIME().size(); ++i) {
157  ost << " " << (getTRIG_TIME())[i];
158  }
159  edm::LogVerbatim("CSCDigi") << ost.str();
160 }
161 
162 std::ostream& operator<<(std::ostream& o, const CSCCFEBStatusDigi& digi) {
163  o << " " << digi.getCFEBNmb() << "\n";
164  for (size_t i = 0; i < 4; ++i) {
165  o << " " << (digi.getSCAFullCond())[i];
166  }
167  o << "\n";
168  for (size_t i = 0; i < digi.getCRC().size(); ++i) {
169  o << " " << (digi.getCRC())[i];
170  }
171  o << "\n";
172  for (size_t i = 0; i < digi.getTS_FLAG().size(); ++i) {
173  o << " " << (digi.getTS_FLAG())[i];
174  }
175  o << "\n";
176  for (size_t i = 0; i < digi.getSCA_FULL().size(); ++i) {
177  o << " " << (digi.getSCA_FULL())[i];
178  }
179  o << "\n";
180  for (size_t i = 0; i < digi.getLCT_PHASE().size(); ++i) {
181  o << " " << (digi.getLCT_PHASE())[i];
182  }
183  o << "\n";
184  for (size_t i = 0; i < digi.getL1A_PHASE().size(); ++i) {
185  o << " " << (digi.getL1A_PHASE())[i];
186  }
187  o << "\n";
188  for (size_t i = 0; i < digi.getSCA_BLK().size(); ++i) {
189  o << " " << (digi.getSCA_BLK())[i];
190  }
191  o << "\n";
192  for (size_t i = 0; i < digi.getTRIG_TIME().size(); ++i) {
193  o << " " << (digi.getTRIG_TIME())[i];
194  }
195  o << "\n";
196 
197  return o;
198 }
Log< level::Info, true > LogVerbatim
std::vector< int > getTS_FLAG() const
Get TS_FLAG bit from SCA Controller data per each time slice.
std::vector< int > getSCA_BLK() const
Get SCA_BLK 4 bit word from SCA Controller data per each time slice.
std::ostream & operator<<(std::ostream &out, const ALILine &li)
Definition: ALILine.cc:167
std::vector< int > getL1A_PHASE() const
Get L1A_PHASE bit from SCA Controller data per each time slice.
std::vector< int > getLCT_PHASE() const
Get LCT_PHASE bit from SCA Controller data per each time slice.
int getCFEBNmb() const
Get the CFEB number.
std::vector< uint16_t > getSCAFullCond() const
Get SCA Full Condition.
std::vector< int > getSCA_FULL() const
Get SCA_FULL bit from SCA Controller data per each time slice.
std::vector< uint16_t > getCRC() const
Get CRC per each time sample.
int ShiftSel(int nmb, int nshift, int nsel) const
Shift and select.
std::vector< int > getTRIG_TIME() const
Get TRIG_TIME 8 bit word from SCA Controller data per each time slice.
std::vector< uint16_t > contrWords_
std::vector< uint16_t > bWords_
tmp
align.sh
Definition: createJobs.py:716
void print() const
Print content of digi.