15 unsigned int wdPerBX = 6;
16 unsigned int initialBlkID = 33;
17 unsigned int intermBlkID = 39;
18 unsigned int finalBlkID = 45;
21 unsigned int uGTBoard = block.
amc().getAMCNumber() - 1;
27 int firstBX = -(
ceil((
double)nBX / 2.) - 1);
30 lastBX =
ceil((
double)nBX / 2.);
32 lastBX =
ceil((
double)nBX / 2.) - 1;
36 res_->setBXRange(firstBX, lastBX);
38 LogDebug(
"L1T") <<
"nBX = " << nBX <<
" first BX = " << firstBX <<
" lastBX = " << lastBX << endl;
42 for (
int bx = firstBX;
bx <= lastBX;
bx++) {
44 if (block.
header().
getID() == initialBlkID && uGTBoard == 0) {
45 LogDebug(
"L1T") <<
"Creating GT Algorithm Block for BX =" <<
bx << std::endl;
47 res_->push_back(
bx, talg);
57 int algOffset = (block.
header().
getID() - initialBlkID + 1) / 2;
58 algOffset = (algOffset % 3) * 192;
60 for (
unsigned int wd = 0; wd < wdPerBX; wd++) {
61 uint32_t raw_data = block.
payload()[wd + numBX * wdPerBX];
62 LogDebug(
"L1T") <<
"BX " <<
bx <<
" payload word " << wd <<
" 0x" << hex << raw_data <<
" offset=" <<
dec
63 << algOffset << std::endl;
69 for (
unsigned int bt = 0; bt < 32; bt++) {
70 int val = ((raw_data >> bt) & 0x1);
71 unsigned int algBit = bt + wd * 32 + algOffset;
74 LogDebug(
"L1T") <<
"Found valid alg bit (" << algBit <<
") on bit (" << bt <<
") word (" << wd
75 <<
") algOffset (" << algOffset <<
") block ID (" << block.
header().
getID() <<
")"
76 <<
" Board# " << uGTBoard << std::endl;
79 }
else if (block.
header().
getID() < intermBlkID + 5) {
84 }
else if (val == 1) {
85 LogDebug(
"L1T") <<
"Found invalid alg bit (" << algBit <<
") out of range on bit (" << bt <<
") word ("
86 << wd <<
") algOffset (" << algOffset <<
") block ID (" << block.
header().
getID() <<
")"
91 }
else if (block.
header().
getID() == initialBlkID + 4 && (wd == 4 || wd == 5)) {
99 }
else if (block.
header().
getID() == finalBlkID + 4 && wd == 4) {
101 if ((raw_data & 0x100) >> 8)
103 if ((raw_data & 0x1) >> 0)
105 LogDebug(
"L1T") <<
" Packing the FinalOR " << wd <<
" 0x" << hex << raw_data << endl;
106 }
else if (block.
header().
getID() == finalBlkID + 4 && wd == 5) {
109 LogDebug(
"L1T") <<
" Packing the Prescale Column " << wd <<
" 0x" << hex << raw_data << endl;
121 res_->set(
bx, 0, alg);
constexpr int32_t ceil(float num)
void setL1MenuUUID(int uuid)
set simple members
const std::vector< uint32_t > & payload() const
void setFinalORPreVeto(bool fOR)
void setAlgoDecisionInitial(unsigned int bit, bool val)
Set decision bits.
BlockHeader header() const
static const unsigned int numBX
const bool getFinalORVeto() const
const bool getFinalORPreVeto() const
void setAlgoDecisionInterm(unsigned int bit, bool val)
void setFinalOR(bool fOR)
void setFinalORVeto(bool fOR)
void setL1FirmwareUUID(int fuuid)
#define DEFINE_L1T_UNPACKER(type)
static constexpr unsigned int maxPhysicsTriggers
void setPreScColumn(int psC)
void amc(const amc::Header &h)
bool unpack(const Block &block, UnpackerCollections *coll) override
void setAlgoDecisionFinal(unsigned int bit, bool val)