13 using namespace sistrip;
29 <<
" Constructing object...";
43 <<
" Constructing object..." << endl;
53 <<
" Destructing object...";
59 <<
" NULL pointer to SiStripConfigDb interface!"
60 <<
" Cannot configure...";
74 ss <<
"[CommissioningHistosUsingDb::" << __func__ <<
"]"
75 <<
" Terse print out of FED cabling:" << std::endl;
80 std::stringstream sss;
81 sss <<
"[CommissioningHistosUsingDb::" << __func__ <<
"]"
82 <<
" Summary of FED cabling:" << std::endl;
102 <<
" NULL pointer to SiStripConfigDb interface!"
103 <<
" Aborting upload...";
110 for (; ip != jp; ++ip) {
112 <<
" Starting from partition " << ip->first <<
" with versions:\n"
113 <<
std::dec <<
" Conn: " << ip->second.cabVersion().first <<
"."
114 << ip->second.cabVersion().second <<
"\n"
115 <<
" FED: " << ip->second.fedVersion().first <<
"."
116 << ip->second.fedVersion().second <<
"\n"
117 <<
" FEC: " << ip->second.fecVersion().first <<
"."
118 << ip->second.fecVersion().second <<
"\n"
119 <<
" Mask: " << ip->second.maskVersion().first <<
"."
120 << ip->second.maskVersion().second;
127 <<
" Created analysis descriptions for " << anals.size() <<
" devices";
133 <<
" Uploading major version of analysis descriptions to DB"
134 <<
" (will be used for physics)...";
137 <<
" Uploading minor version of analysis descriptions to DB"
138 <<
" (will not be used for physics)...";
144 <<
" Upload of analysis descriptions to DB finished!";
147 <<
" TEST! No analysis descriptions will be uploaded to DB...";
153 for (; ip != jp; ++ip) {
155 tkStateVector states = df->getCurrentStates();
156 tkStateVector::const_iterator istate = states.begin();
157 tkStateVector::const_iterator jstate = states.end();
158 while (istate != jstate) {
159 if (*istate && ip->first == (*istate)->getPartitionName()) {
165 if (istate != states.end()) {
167 <<
" Created new version for partition " << ip->first <<
". Current state:\n"
168 <<
std::dec <<
" Conn: " << (*istate)->getConnectionVersionMajorId() <<
"."
169 << (*istate)->getConnectionVersionMinorId() <<
"\n"
170 <<
" FED: " << (*istate)->getFedVersionMajorId() <<
"."
171 << (*istate)->getFedVersionMinorId() <<
"\n"
172 <<
" FEC: " << (*istate)->getFecVersionMajorId() <<
"."
173 << (*istate)->getFecVersionMinorId() <<
"\n"
174 <<
" Mask: " << (*istate)->getMaskVersionMajorId() <<
"."
175 << (*istate)->getMaskVersionMinorId();
187 <<
" NULL pointer to SiStripFedCabling object!";
191 Analyses::iterator ianal =
data().begin();
192 Analyses::iterator janal =
data().end();
193 for (; ianal != janal; ++ianal) {
198 <<
" NULL pointer to CommissioningAnalysis object!";
213 std::stringstream
ss;
214 ss <<
"[CommissioningHistosUsingDb::" << __func__ <<
"]"
215 <<
" Cannot set DCU and DetId values in commissioning analysis object!" << std::endl
216 <<
" Incompatible FED key retrieved from cabling!" << std::endl
217 <<
" FED key from analysis object : " << fed_key.
path() << std::endl
218 <<
" FED key from cabling object : " << fed.
path() << std::endl
219 <<
" FED id/ch from analysis object: " << fed_key.
fedId() <<
"/" << fed_key.
fedChannel() << std::endl
220 <<
" FED id/ch from cabling object : " << conn.
fedId() <<
"/" << conn.
fedCh();
223 }
else if (fec_key.
path() != fec.path()) {
224 std::stringstream
ss;
225 ss <<
"[CommissioningHistosUsingDb::" << __func__ <<
"]"
226 <<
" Cannot set DCU and DetId values in commissioning analysis object!" << std::endl
227 <<
" Incompatible FEC key retrieved from cabling!" << std::endl
228 <<
" FEC key from analysis object : " << fec_key.
path() << std::endl
229 <<
" FEC key from cabling object : " << fec.path();
243 <<
" Creating AnalysisDescriptions...";
247 Analyses::iterator ianal =
data().begin();
248 Analyses::iterator janal =
data().end();
249 for (; ianal != janal; ++ianal) {
262 <<
" NULL pointer to SiStripConfigDb interface!";
268 for (; ii !=
jj; ++
ii) {
275 SiStripConfigDb::DeviceDescriptionsV::const_iterator idcu = dcus.begin();
276 SiStripConfigDb::DeviceDescriptionsV::const_iterator jdcu = dcus.end();
277 for (; idcu != jdcu; ++idcu) {
279 dcuDescription* dcu =
dynamic_cast<dcuDescription*
>(*idcu);
283 if (dcu->getDcuType() !=
"FEH") {
290 if (dcu->getDcuHardId() == 16448250)
294 SiStripConfigDb::DcuDetIdsV::const_iterator idet = dets.end();
296 if (idet == dets.begin()) {
301 TkDcuInfo* det = idet->second;
312 info.
dcuId_ = det->getDcuHardId();
313 info.
detId_ = det->getDetId();
314 info.
pairs_ = det->getApvNumber() / 2;
325 std::stringstream
ss;
326 ss <<
"[CommissioningHistosUsingDb::" << __func__ <<
"]"
327 <<
" List of modules for " <<
detInfo_.size()
328 <<
" partitions, with their DCUids, DetIds, and nApvPairs: " << std::endl;
329 std::map<std::string, DetInfos>::const_iterator ii =
detInfo_.begin();
330 std::map<std::string, DetInfos>::const_iterator jj =
detInfo_.end();
331 for (; ii !=
jj; ++
ii) {
332 ss <<
" Partition \"" << ii->first <<
"\" has " << ii->second.size() <<
" modules:" << std::endl;
333 DetInfos::const_iterator iii = ii->second.begin();
334 DetInfos::const_iterator jjj = ii->second.end();
335 for (; iii != jjj; ++iii) {
338 <<
"/" << key.
ccuChan() <<
", " << std::hex <<
" DCUid= " << std::setw(8) << std::setfill(
'0')
339 << iii->second.dcuId_ <<
" DetId= " << std::setw(8) << std::setfill(
'0') << iii->second.detId_ <<
std::dec
340 <<
" nPairs= " << iii->second.pairs_ << std::endl;
353 return std::make_pair(
"",
DetInfo());
355 std::map<std::string, DetInfos>::const_iterator
ii =
detInfo_.begin();
356 std::map<std::string, DetInfos>::const_iterator
jj =
detInfo_.end();
357 for (; ii !=
jj; ++
ii) {
358 DetInfos::const_iterator iii = ii->second.find(tmp.
key());
359 if (iii != ii->second.end()) {
360 return std::make_pair(ii->first, iii->second);
363 return std::make_pair(
"",
DetInfo());
370 std::pair<std::string, DetInfo>
info =
detInfo(key);
372 if (key.
channel() == 2 && info.second.pairs_ == 2) {
378 std::stringstream
ss;
379 ss <<
"[CommissioningHistosUsingDb::" << __func__ <<
"]"
380 <<
" Cannot find module (crate/FEC/ring/CCU/module): " << tmp.
fecCrate() <<
"/" << tmp.
fecSlot() <<
"/"
const uint16_t & fecSlot() const
Log< level::Info, true > LogVerbatim
const uint16_t & fecCrate() const
DcuDetIds::range DcuDetIdsRange
const uint32_t & fedKey() const
Analyses & data(bool getMaskedData=false)
std::map< std::string, DetInfos > detInfo_
const uint16_t & fecRing() const
FedChannelConnection fedConnection(uint16_t fed_id, uint16_t fed_ch) const
A container class for generic run and event-related info, information required by the commissioning a...
const uint16_t & fedCh() const
bool deviceIsPresent(const SiStripFecKey &)
DeviceFactory *const deviceFactory(std::string method_name="") const
virtual void addDcuDetIds()
static const uint32_t invalid32_
void uploadAnalysisDescriptions(bool calibration_for_physics=false, std::string partition="")
SiStripDetInfo::DetInfo DetInfo
void terse(std::stringstream &) const
void addAnalysisDescriptions(std::string partition, AnalysisDescriptionsV &)
static const char mlDqmClient_[]
const uint16_t & fecSlot() const
uint16_t lldChannel() const
Log< level::Error, false > LogError
void configure(const edm::ParameterSet &, const edm::EventSetup &) override
const uint16_t & fedId() const
const uint32_t & key() const
Utility class that identifies a position within the strip tracker control structure, down to the level of an APV25.
bool getData(T &iHolder) const
const_iterator_range partitions() const
static DcuDetIdsV::const_iterator findDcuDetId(DcuDetIdsV::const_iterator begin, DcuDetIdsV::const_iterator end, uint32_t dcu_id)
const uint16_t & fecRing() const
const uint32_t & detId() const
static void buildFecCabling(SiStripConfigDb *const, SiStripFecCabling &, const sistrip::CablingSource &)
Class containning control, module, detector and connection information, at the level of a FED channel...
DeviceDescriptions::range DeviceDescriptionsRange
const uint32_t & dcuId() const
edm::ESGetToken< TrackerTopology, TrackerTopologyRcd > tTopoToken_
void clearAnalysisDescriptions(std::string partition="")
An interface class to the DeviceFactory.
const uint16_t & ccuChan() const
tuple key
prepare the HTCondor submission files and eventually submit them
const uint32_t & fecKey() const
const std::string & path() const
DeviceAddress deviceAddress(const deviceDescription &)
~CommissioningHistosUsingDb() override
uint16_t fedChannel() const
const uint16_t & ccuAddr() const
const uint32_t & dcuId() const
const uint16_t & fecCrate() const
SiStripFedCabling * cabling_
static void getFedCabling(const SiStripFecCabling &in, SiStripFedCabling &out)
bool isInvalid() const override
bool isValid() const override
std::pair< std::string, DetInfo > detInfo(const SiStripFecKey &)
const uint16_t & feUnit() const
const SiStripDbParams & dbParams() const
const uint16_t & channel() const
virtual void create(SiStripConfigDb::AnalysisDescriptionsV &, Analysis)
sistrip::RunType runType_
virtual void createAnalyses(SiStripConfigDb::AnalysisDescriptionsV &)
const uint16_t & ccuAddr() const
CommissioningHistosUsingDb()
Contains cabling info at the device level, including DetId, APV pair numbers, hardware addresses...
void summary(std::stringstream &ss, const TrackerTopology *trackerTopo) const
LEFT FOR COMPATIBILITY. SHOULD BE REPLACED BY PRINTSUMMARY.
std::vector< AnalysisDescription * > AnalysisDescriptionsV
const uint16_t & feChan() const
const uint32_t & detId() const
const uint16_t & ccuChan() const
const uint16_t & fedId() const
SiStripConfigDb *const db() const
Abstract base for derived classes that provide analysis of commissioning histograms.
DeviceDescriptionsRange getDeviceDescriptions(std::string partition="")
Log< level::Warning, false > LogWarning
DcuDetIdsRange getDcuDetIds(std::string partition="")
virtual void uploadConfigurations()
static void buildFecCablingFromDevices(SiStripConfigDb *const, SiStripFecCabling &)