L1Trigger
Phase2L1ParticleFlow
src
firmware
pfalgo_common.h
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#ifndef L1Trigger_Phase2L1ParticleFlow_FIRMWARE_PFALGO_COMMON_H
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#define L1Trigger_Phase2L1ParticleFlow_FIRMWARE_PFALGO_COMMON_H
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#include "
data.h
"
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inline
int
dr2_int
(
etaphi_t
eta1
,
etaphi_t
phi1,
etaphi_t
eta2
,
etaphi_t
phi2) {
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ap_int<etaphi_t::width + 1> deta = (
eta1
-
eta2
);
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ap_int<etaphi_t::width + 1> dphi = (phi1 - phi2);
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return
deta * deta + dphi * dphi;
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}
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#ifndef CMSSW_GIT_HASH
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#define PFALGO_DR2MAX_TK_MU 2101
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#endif
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#endif
HLT_FULL_cff.eta2
eta2
Definition:
HLT_FULL_cff.py:9551
etaphi_t
ap_int< 10 > etaphi_t
Definition:
data.h:7
HLT_FULL_cff.eta1
eta1
Definition:
HLT_FULL_cff.py:9550
dr2_int
int dr2_int(etaphi_t eta1, etaphi_t phi1, etaphi_t eta2, etaphi_t phi2)
Definition:
pfalgo_common.h:6
data.h
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