14 <<
"+++ Upgrade CSCUpgradeCathodeLCTProcessor constructed while runPhase2_ is not set! +++\n";
35 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
36 <<
"....................PreTrigger, Phase2 version with localized dead time zone...........................";
40 bool pre_trig =
false;
43 for (
unsigned int bx_time = start_bx; bx_time <
fifo_tbins; bx_time++) {
49 std::map<int, std::map<int, CSCCLCTDigi::ComparatorContainer> > hits_in_patterns;
50 hits_in_patterns.clear();
56 if (
nhits[hstrip] > 0) {
57 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
58 <<
" bx = " << std::setw(2) << bx_time <<
" --->"
59 <<
" halfstrip = " << std::setw(3) << hstrip <<
" best pid = " << std::setw(2) <<
best_pid[hstrip]
60 <<
" nhits = " <<
nhits[hstrip];
77 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
78 <<
" halfstrip " << std::setw(3) << hstrip <<
" in dead zone and is pretriggerred";
100 LogTrace(
"CSCUpgradeCathodeLCTProcessor") <<
"no pretrigger, returning \n";
113 std::vector<CSCCLCTDigi> lctList;
138 while (start_bx < stop_bx) {
153 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
154 <<
"..... pretrigger at bx = " << first_bx <<
"; waiting drift delay .....";
160 std::map<int, std::map<int, CSCCLCTDigi::ComparatorContainer> > hits_in_patterns;
161 hits_in_patterns.clear();
169 if (
nhits[hstrip] > 0) {
170 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
171 <<
" bx = " << std::setw(2) << latch_bx <<
" --->"
172 <<
" halfstrip = " << std::setw(3) << hstrip <<
" best pid = " << std::setw(2) <<
best_pid[hstrip]
173 <<
" nhits = " <<
nhits[hstrip];
183 best_halfstrip[ilct] = -1;
184 best_quality[ilct] = 0;
213 if (
quality[hstrip] > best_quality[0] && pretrig_zone[hstrip] && !
busyMap_[hstrip][first_bx]) {
214 best_halfstrip[0] = hstrip;
215 best_quality[0] =
quality[hstrip];
217 const int best_hs(best_halfstrip[0]);
218 const int best_pat(
best_pid[best_hs]);
222 tempBestCLCT =
constructCLCT(first_bx, best_hs, hits_in_patterns[best_hs][best_pat]);
229 if (best_halfstrip[0] >= 0) {
242 if (
quality[hstrip] > best_quality[1] && pretrig_zone[hstrip] && !
busyMap_[hstrip][first_bx]) {
243 best_halfstrip[1] = hstrip;
244 best_quality[1] =
quality[hstrip];
246 const int best_hs(best_halfstrip[1]);
247 const int best_pat(
best_pid[best_hs]);
251 tempSecondCLCT =
constructCLCT(first_bx, best_hs, hits_in_patterns[best_hs][best_pat]);
257 lctList.push_back(tempBestCLCT);
259 if (tempSecondCLCT.
isValid()) {
260 lctList.push_back(tempSecondCLCT);
266 start_bx = first_bx + 1;
275 pretrig_zone[hstrip] =
false;
289 for (
int hs = min_hs; hs <= max_hs; hs++)
290 pretrig_zone[hs] =
true;
292 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
293 <<
" marked pretrigger halfstrip zone [" << min_hs <<
"," << max_hs <<
"]";
312 for (
int hs = min_hstrip; hs <= max_hstrip; hs++)
315 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
316 <<
" marked zone around pretriggerred halfstrip " << hstrip <<
" as dead zone for pretriggering at bx"
317 <<
bx + 1 <<
" halfstrip: [" << min_hstrip <<
"," << max_hstrip <<
"]";