15 <<
"+++ Upgrade CSCUpgradeCathodeLCTProcessor constructed while runPhase2_ is not set! +++\n";
31 <<
"+++ Upgrade CSCUpgradeCathodeLCTProcessor constructed while runPhase2_ is not set! +++\n";
45 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
46 <<
"....................PreTrigger, Phase2 version with localized dead time zone...........................";
50 bool pre_trig =
false;
54 for (
unsigned int bx_time = start_bx; bx_time <
fifo_tbins; bx_time++) {
60 std::map<int, std::map<int, CSCCLCTDigi::ComparatorContainer> > hits_in_patterns;
61 hits_in_patterns.clear();
67 if (
nhits[hstrip] > 0) {
68 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
69 <<
" bx = " << std::setw(2) << bx_time <<
" --->"
70 <<
" halfstrip = " << std::setw(3) << hstrip <<
" best pid = " << std::setw(2) <<
best_pid[hstrip]
71 <<
" nhits = " <<
nhits[hstrip];
87 1,
nhits[hstrip],
best_pid[hstrip], 1,
bend, halfstrip, cfeb, bx_time, nPreTriggers, 0));
93 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
94 <<
" halfstrip " << std::setw(3) << hstrip <<
" in dead zone and is pretriggerred";
104 int min_hstrip = hstrip - delta_hs;
105 int max_hstrip = hstrip + delta_hs;
110 for (
int hs = min_hstrip; hs <= max_hstrip; hs++)
111 busyMap[hs][bx_time + 1] =
true;
113 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
114 <<
" marked zone around pretriggerred halfstrip " << hstrip <<
" as dead zone for pretriggering at bx"
115 << bx_time + 1 <<
" halfstrip: [" << min_hstrip <<
"," << max_hstrip <<
"]";
131 LogTrace(
"CSCUpgradeCathodeLCTProcessor") <<
"no pretrigger, returning \n";
144 std::vector<CSCCLCTDigi> lctList;
161 std::vector<CSCCLCTDigi> lctListBX;
175 while (start_bx < stop_bx) {
186 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
187 <<
"..... pretrigger at bx = " << first_bx <<
"; waiting drift delay .....";
192 std::map<int, std::map<int, CSCCLCTDigi::ComparatorContainer> > hits_in_patterns;
193 hits_in_patterns.clear();
199 if (
nhits[hstrip] > 0) {
200 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
201 <<
" bx = " << std::setw(2) << latch_bx <<
" --->"
202 <<
" halfstrip = " << std::setw(3) << hstrip <<
" best pid = " << std::setw(2) <<
best_pid[hstrip]
203 <<
" nhits = " <<
nhits[hstrip];
216 best_halfstrip[ilct] = -1;
217 best_quality[ilct] = 0;
228 pretrig_zone[hstrip] =
false;
237 for (
int hs = min_hs; hs <= max_hs; hs++)
238 pretrig_zone[hs] =
true;
240 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
241 <<
" marked pretrigger halfstrip zone [" << min_hs <<
"," << max_hs <<
"]";
251 if (
quality[hstrip] > best_quality[0] && pretrig_zone[hstrip] && !
busyMap[hstrip][first_bx])
254 best_halfstrip[0] = hstrip;
255 best_quality[0] =
quality[hstrip];
257 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
258 <<
" 1st CLCT: halfstrip = " << std::setw(3) << hstrip <<
" quality = " << std::setw(3)
259 <<
quality[hstrip] <<
" best halfstrip = " << std::setw(3) << best_halfstrip[0]
260 <<
" best quality = " << std::setw(3) << best_quality[0];
267 if (best_halfstrip[0] >= 0) {
272 if (
quality[hstrip] > best_quality[1] && pretrig_zone[hstrip] && !
busyMap[hstrip][first_bx])
275 best_halfstrip[1] = hstrip;
276 best_quality[1] =
quality[hstrip];
278 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
279 <<
" 2nd CLCT: halfstrip = " << std::setw(3) << hstrip <<
" quality = " << std::setw(3)
280 <<
quality[hstrip] <<
" best halfstrip = " << std::setw(3) << best_halfstrip[1]
281 <<
" best quality = " << std::setw(3) << best_quality[1];
289 int best_hs = best_halfstrip[ilct];
307 int halfstrip_in_cfeb = keystrip_data[ilct][
CLCT_STRIP] -
319 LogTrace(
"CSCCathodeLCTProcessor") <<
" Final selection: ilct " << ilct <<
" " << thisLCT << std::endl;
324 const auto& compHits = hits_in_patterns[best_hs][keystrip_data[ilct][
CLCT_PATTERN]];
338 lctList.push_back(thisLCT);
339 lctListBX.push_back(thisLCT);
347 start_bx = first_bx + 1;