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DTTSCand.cc
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1 //-------------------------------------------------
2 //
3 // Class: DTTSCand.cpp
4 //
5 // Description: A Trigger Server Candidate
6 //
7 //
8 // Author List:
9 // C. Grandi
10 // Modifications:
11 // S. Marcellini, D. Bonacorsi
12 // 04/01/2007 : C. Battilana local config update
13 //
14 //--------------------------------------------------
15 
16 //-----------------------
17 // This Class's Header --
18 //-----------------------
20 
21 //-------------------------------
22 // Collaborating Class Headers --
23 //-------------------------------
25 
26 //---------------
27 // C++ Headers --
28 //---------------
29 #include <iostream>
30 
31 //----------------
32 
33 // Constructors --
34 //----------------
35 
36 DTTSCand::DTTSCand(DTTSS *tss, const DTTracoTrigData *tctrig, int ifs, int pos)
37  : _tss(tss), _tctrig(tctrig), _tcPos(pos), _isCarry(0) {
38  _dataword.one(); // reset dataword to 0x1ff
39 
40  // SM sector collector Set bit 14 instead of 8, for 1st/2nd track to allow
41  // extra space
42  // if(ifs==1)_dataword.unset(8); // set bit 8 (0=first, 1=second tracks)
43  if (ifs == 1)
44  _dataword.unset(14); // set bit 14 (0=first, 1=second tracks)
45 }
46 
48  : _tss(tscand._tss), _tctrig(tscand._tctrig), _tcPos(tscand._tcPos), _isCarry(tscand._isCarry) {}
49 
51 
52 //--------------
53 // Destructor --
54 //--------------
56 
57 //--------------
58 // Operations --
59 //--------------
60 
62  if (this != &tscand) {
63  _tss = tscand._tss;
64  _tctrig = tscand._tctrig;
65  _tcPos = tscand._tcPos;
66  _isCarry = tscand._isCarry;
67  }
68  return *this;
69 }
70 
72  _tctrig = nullptr;
73  _dataword.one();
74 
75  _isCarry = 0;
76 }
77 
79  // first/second track already set. Set other 3 bits
80  int itk = _dataword.element(14); // first tracks 0, second tracks 1
81 
82  clearBits();
83  if (_tctrig->pvK() > 32 || _tctrig->pvK() < 0) { // Check K within 5 bits range
84  std::cout << "DTTSCand::setBitsTss() pvK outside valid range: " << _tctrig->pvK();
85  std::cout << " deltaPsiR set to 31" << std::endl;
86  } else {
87  // assign preview in dataword (common to any other assignment)
88  _dataword.assign(0, 5, _tctrig->pvK());
89  // _dataword.assign(0,5,0);
90 
91  int posH = -1;
92  int posI = -1;
93  int posC = -1;
94  switch (config()->TssMasking(itk)) {
95  case 123: // H/L, In/Out, Corr/NotC
96  posH = 7;
97  posI = 6;
98  posC = 5;
99  break;
100  case 132: // H/L, Corr/NotC, In/Out
101  posH = 7;
102  posI = 5;
103  posC = 6;
104  break;
105  case 213: // In/Out, H/L, Corr/NotC
106  posH = 6;
107  posI = 7;
108  posC = 5;
109  break;
110  case 231: // In/Out, Corr/NotC, H/L
111  posH = 5;
112  posI = 7;
113  posC = 6;
114  break;
115  case 312: // Corr/NotC, H/L, In/Out
116  posH = 6;
117  posI = 5;
118  posC = 7;
119  break;
120  case 321: // Corr/NotC, In/Out, H/L
121  posH = 5;
122  posI = 6;
123  posC = 7;
124  break;
125  default:
126  std::cout << "DTTSCand::DTTSCand(): masking not correct: ";
127  std::cout << config()->TssMasking(itk);
128  std::cout << " All bits set to 1" << std::endl;
129  }
130  // Masking:
131  bool enaH = config()->TssHtrigEna(itk);
132  bool enaI = config()->TssInOutEna(itk);
133  bool enaC = config()->TssCorrEna(itk);
134  if (isCarry()) {
135  // Special setting for carry
136  enaH = config()->TssHtrigEnaCarry();
137  enaI = config()->TssInOutEnaCarry();
138  enaC = config()->TssCorrEnaCarry();
139  }
140  // Bits set to 0 give higher priority:
141  if (isHtrig() && enaH && posH > 0)
142  _dataword.unset(posH);
143  if (isInner() && enaI && posI > 0)
144  _dataword.unset(posI);
145  if (isCorr() && enaC && posC > 0)
146  _dataword.unset(posC);
147  }
148 }
149 
151  // first/second track already set. Set other 4 bits (1 for null, 3 for a2, a1,
152  // a0)
153  clearBitsBkmod();
154  // std::cout << " clearbits in TSM bk mode " << _dataword.print() <<
155  // std::endl;
156 
157  int a2 = 6;
158  int a1 = 5;
159  int a0 = 4;
160  //
161  // std::cout << " _tctrig->qdec(): " << _tctrig->qdec() << std::endl;
162  if (_tctrig->qdec() == 6) {
163  _dataword.unset(a2);
164  _dataword.unset(a1);
165  _dataword.unset(a0);
166  } // 1-000
167  if (_tctrig->qdec() == 5) {
168  _dataword.unset(a2);
169  _dataword.unset(a1);
170  } // 1-001
171  if (_tctrig->qdec() == 4) {
172  _dataword.unset(a2);
173  _dataword.unset(a0);
174  } // 1-010
175  if (_tctrig->qdec() == 3) {
176  _dataword.unset(a1);
177  } // 1-101
178  if (_tctrig->qdec() == 2) {
179  _dataword.unset(a1);
180  _dataword.unset(a0);
181  } // 1-100
182 
183  if (_tctrig->qdec() == 0) {
184  _dataword.unset(a0);
185  } // 1-110
186 
187  // std::cout << " set Bits TSM back up " << _dataword.print() << std::endl;
188 }
189 
191  // first/second track already set. Set other 3 bits
192  int itk = _dataword.element(14); // first tracks 0, second tracks 1
193 
194  clearBits();
195 
196  if (_tctrig->pvK() > 31 || _tctrig->pvK() < 0) { // Check K within 5 bits range
197  std::cout << "DTTSCand::setBitsTsm pvK outside valid range: " << _tctrig->pvK();
198  std::cout << " deltaPsiR set to 31" << std::endl;
199  } else {
200  // SM double TSM
201  // assign preview in dataword (common to any other assignment)
202  _dataword.assign(0, 5, _tctrig->pvK());
203  // _dataword.assign(0,5,0);
204  //
205 
206  int posH = -1;
207  int posI = -1;
208  int posC = -1;
209  switch (config()->TsmMasking(itk)) {
210  case 123: // H/L, In/Out, Corr/NotC
211  posH = 7;
212  posI = 6;
213  posC = 5;
214  break;
215  case 132: // H/L, Corr/NotC, In/Out
216  posH = 7;
217  posI = 5;
218  posC = 6;
219  break;
220  case 213: // In/Out, H/L, Corr/NotC
221  posH = 6;
222  posI = 7;
223  posC = 5;
224  break;
225  case 231: // In/Out, Corr/NotC, H/L
226  posH = 5;
227  posI = 7;
228  posC = 6;
229  break;
230  case 312: // Corr/NotC, H/L, In/Out
231  posH = 6;
232  posI = 5;
233  posC = 7;
234  break;
235  case 321: // Corr/NotC, In/Out, H/L
236  posH = 5;
237  posI = 6;
238  posC = 7;
239  break;
240  default:
241  std::cout << "DTTSCand::DTTSCand(): masking not correct: ";
242  std::cout << config()->TssMasking(itk);
243  std::cout << " All bits set to 1" << std::endl;
244 
245  // Masking:
246  bool enaH = config()->TsmHtrigEna(itk);
247  bool enaI = config()->TsmInOutEna(itk);
248  bool enaC = config()->TsmCorrEna(itk);
249  if (isCarry()) {
250  // Special setting for carry
251  enaH = config()->TsmHtrigEnaCarry();
252  enaI = config()->TsmInOutEnaCarry();
253  enaC = config()->TsmCorrEnaCarry();
254  }
255  // Bits set to 0 give higher priority:
256  if (isHtrig() && enaH && posH > 0)
257  _dataword.unset(posH);
258  if (isInner() && enaI && posI > 0)
259  _dataword.unset(posI);
260  if (isCorr() && enaC && posC > 0)
261  _dataword.unset(posC);
262  }
263  }
264 }
265 void DTTSCand::print() const {
266  std::cout << " First=" << isFirst();
267  std::cout << " HTRIG=" << isHtrig();
268  std::cout << " Inner=" << isInner();
269  std::cout << " Corr=" << isCorr();
270  std::cout << " Kpv=" << tracoTr()->pvK();
271  std::cout << " dataword=";
272  _dataword.print();
273  std::cout << std::endl;
274 }
DTConfigTSPhi::TsmMasking
int TsmMasking(int i) const
Order of quality bits in TSM for sort1/2.
Definition: DTConfigTSPhi.h:84
DTConfigTSPhi::TssMasking
int TssMasking(int i) const
Order of quality bits in TSS for sort1/2.
Definition: DTConfigTSPhi.h:63
DTTSCand::_tctrig
const DTTracoTrigData * _tctrig
Definition: DTTSCand.h:149
DTTSCand
Definition: DTTSCand.h:35
DTConfigTSPhi::TsmCorrEna
bool TsmCorrEna(int i) const
Enable Correlation checking in TSM for sort1/2.
Definition: DTConfigTSPhi.h:99
BitArray::assign
void assign(const int p, const int n, const int val)
Definition: BitArray.h:233
gather_cfg.cout
cout
Definition: gather_cfg.py:144
pos
Definition: PixelAliasList.h:18
DTTSCand::~DTTSCand
~DTTSCand()
Destructor.
Definition: DTTSCand.cc:55
DTTSCand::isCarry
int isCarry() const
Return the carry bit.
Definition: DTTSCand.h:110
DTConfigTSPhi.h
DTConfigTSPhi::TsmInOutEna
bool TsmInOutEna(int i) const
Enable Inner SL checking in TSM for sort1/2.
Definition: DTConfigTSPhi.h:93
DTTSCand::isInner
int isInner() const
Return Inner/Outer bit.
Definition: DTTSCand.h:104
DTTSCand::config
const DTConfigTSPhi * config() const
Configuration set.
Definition: DTTSCand.h:81
DTTSS
Definition: DTTSS.h:36
BitArray::print
std::ostream & print(std::ostream &o=std::cout) const
Definition: BitArray.h:340
testProducerWithPsetDescEmpty_cfi.a2
a2
Definition: testProducerWithPsetDescEmpty_cfi.py:35
DTTSCand::_tcPos
int _tcPos
Definition: DTTSCand.h:154
DTConfigTSPhi::TssCorrEna
bool TssCorrEna(int i) const
Enable Correlation checking in TSS for sort1/2.
Definition: DTConfigTSPhi.h:78
DTTSCand::clear
void clear()
Clear the trigger.
Definition: DTTSCand.cc:71
DTTracoTrigData::pvK
int pvK() const
Return the preview K.
Definition: DTTracoTrigData.h:189
DTConfigTSPhi::TsmHtrigEnaCarry
bool TsmHtrigEnaCarry() const
Enable Htrig checking in TSM for carry.
Definition: DTConfigTSPhi.h:90
DTTSCand::isCorr
int isCorr() const
Return correlation bit.
Definition: DTTSCand.h:107
DTTSCand::setBitsBkmod
void setBitsBkmod()
Set the bits for TSM back-up mode.
Definition: DTTSCand.cc:150
BitArray::element
int element(const int pos) const
Definition: BitArray.h:206
DTConfigTSPhi::TsmHtrigEna
bool TsmHtrigEna(int i) const
Enable Htrig checking in TSM for sort1/2.
Definition: DTConfigTSPhi.h:87
BitArray::one
void one()
Definition: BitArray.h:217
DTConfigTSPhi::TsmInOutEnaCarry
bool TsmInOutEnaCarry() const
Enable Inner SL checking in TSM for carry.
Definition: DTConfigTSPhi.h:96
DTTSCand::DTTSCand
DTTSCand()
Constructor.
Definition: DTTSCand.cc:50
DTTSCand::_dataword
BitArray< 15 > _dataword
Definition: DTTSCand.h:150
DTConfigTSPhi::TssHtrigEnaCarry
bool TssHtrigEnaCarry() const
Enable Htrig checking in TSS for carry.
Definition: DTConfigTSPhi.h:69
DTConfigTSPhi::TssCorrEnaCarry
bool TssCorrEnaCarry() const
Enable Correlation checking in TSS for carry.
Definition: DTConfigTSPhi.h:81
DTTSCand::clearBitsBkmod
void clearBitsBkmod()
Clear (set to 1) all the bits (back-up mode)
Definition: DTTSCand.h:75
DTTSCand::setBitsTsm
void setBitsTsm()
Set the quality bits for DTTSM analysis.
Definition: DTTSCand.cc:190
DTTracoTrigData::qdec
int qdec() const
Return the trigger code in new format.
Definition: DTTracoTrigData.cc:41
DTConfigTSPhi::TssInOutEna
bool TssInOutEna(int i) const
Enable Inner SL checking in TSS for sort1/2.
Definition: DTConfigTSPhi.h:72
DTTSCand::operator=
DTTSCand & operator=(const DTTSCand &tscand)
Assignment operator.
Definition: DTTSCand.cc:61
DTTSCand::print
void print() const
Print the trigger.
Definition: DTTSCand.cc:265
DTTSCand::setBitsTss
void setBitsTss()
Set the quality bits for DTTSS analysis.
Definition: DTTSCand.cc:78
DTTSCand::tracoTr
const DTTracoTrigData * tracoTr() const
Return associated TRACO trigger.
Definition: DTTSCand.h:84
DTTSCand::clearBits
void clearBits()
Clear (set to 1) the quality bits (but first/second track bit)
Definition: DTTSCand.h:72
DTTSCand::_tss
DTTSS * _tss
Definition: DTTSCand.h:148
DTTSCand.h
BitArray::unset
void unset(const int i)
Definition: BitArray.h:225
DTConfigTSPhi::TssInOutEnaCarry
bool TssInOutEnaCarry() const
Enable Inner SL checking in TSS for carry.
Definition: DTConfigTSPhi.h:75
DTTracoTrigData
Definition: DTTracoTrigData.h:37
DTTSCand::isHtrig
int isHtrig() const
Return HTRIG/LTRIG bit.
Definition: DTTSCand.h:102
a0
static constexpr float a0
Definition: L1EGammaCrystalsEmulatorProducer.cc:81
DTConfigTSPhi::TssHtrigEna
bool TssHtrigEna(int i) const
Enable Htrig checking in TSS for sort1/2.
Definition: DTConfigTSPhi.h:66
DTConfigTSPhi::TsmCorrEnaCarry
bool TsmCorrEnaCarry() const
Enable Correlation checking in TSM for carry.
Definition: DTConfigTSPhi.h:102
DTTSCand::isFirst
int isFirst() const
Return the first/second track bit.
Definition: DTTSCand.h:99
DTTSCand::_isCarry
int _isCarry
Definition: DTTSCand.h:156