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37 : _tss(tss), _tctrig(tctrig), _tcPos(
pos), _isCarry(0) {
48 : _tss(tscand._tss), _tctrig(tscand._tctrig), _tcPos(tscand._tcPos), _isCarry(tscand._isCarry) {}
62 if (
this != &tscand) {
85 std::cout <<
" deltaPsiR set to 31" << std::endl;
126 std::cout <<
"DTTSCand::DTTSCand(): masking not correct: ";
128 std::cout <<
" All bits set to 1" << std::endl;
141 if (
isHtrig() && enaH && posH > 0)
143 if (
isInner() && enaI && posI > 0)
145 if (
isCorr() && enaC && posC > 0)
198 std::cout <<
" deltaPsiR set to 31" << std::endl;
241 std::cout <<
"DTTSCand::DTTSCand(): masking not correct: ";
243 std::cout <<
" All bits set to 1" << std::endl;
256 if (
isHtrig() && enaH && posH > 0)
258 if (
isInner() && enaI && posI > 0)
260 if (
isCorr() && enaC && posC > 0)
int TsmMasking(int i) const
Order of quality bits in TSM for sort1/2.
int TssMasking(int i) const
Order of quality bits in TSS for sort1/2.
const DTTracoTrigData * _tctrig
bool TsmCorrEna(int i) const
Enable Correlation checking in TSM for sort1/2.
void assign(const int p, const int n, const int val)
int isCarry() const
Return the carry bit.
bool TsmInOutEna(int i) const
Enable Inner SL checking in TSM for sort1/2.
int isInner() const
Return Inner/Outer bit.
const DTConfigTSPhi * config() const
Configuration set.
std::ostream & print(std::ostream &o=std::cout) const
bool TssCorrEna(int i) const
Enable Correlation checking in TSS for sort1/2.
void clear()
Clear the trigger.
int pvK() const
Return the preview K.
bool TsmHtrigEnaCarry() const
Enable Htrig checking in TSM for carry.
int isCorr() const
Return correlation bit.
void setBitsBkmod()
Set the bits for TSM back-up mode.
int element(const int pos) const
bool TsmHtrigEna(int i) const
Enable Htrig checking in TSM for sort1/2.
bool TsmInOutEnaCarry() const
Enable Inner SL checking in TSM for carry.
bool TssHtrigEnaCarry() const
Enable Htrig checking in TSS for carry.
bool TssCorrEnaCarry() const
Enable Correlation checking in TSS for carry.
void clearBitsBkmod()
Clear (set to 1) all the bits (back-up mode)
void setBitsTsm()
Set the quality bits for DTTSM analysis.
int qdec() const
Return the trigger code in new format.
bool TssInOutEna(int i) const
Enable Inner SL checking in TSS for sort1/2.
DTTSCand & operator=(const DTTSCand &tscand)
Assignment operator.
void print() const
Print the trigger.
void setBitsTss()
Set the quality bits for DTTSS analysis.
const DTTracoTrigData * tracoTr() const
Return associated TRACO trigger.
void clearBits()
Clear (set to 1) the quality bits (but first/second track bit)
bool TssInOutEnaCarry() const
Enable Inner SL checking in TSS for carry.
int isHtrig() const
Return HTRIG/LTRIG bit.
static constexpr float a0
bool TssHtrigEna(int i) const
Enable Htrig checking in TSS for sort1/2.
bool TsmCorrEnaCarry() const
Enable Correlation checking in TSM for carry.
int isFirst() const
Return the first/second track bit.