FedTimingHistograms Class Reference

#include <FedTimingHistograms.h>

Inheritance diagram for FedTimingHistograms:

Public Types
typedef SummaryHistogramFactory< FedTimingAnalysis >	Factory
Public Types inherited from CommissioningHistograms
typedef std::map< uint32_t, CommissioningAnalysis * >	Analyses
typedef Analyses::iterator	Analysis
typedef dqm::harvesting::DQMStore	DQMStore
typedef SummaryPlotFactory< CommissioningAnalysis * >	Factory
typedef std::map< uint32_t, uint32_t >	FedToFecMap
typedef std::vector< Histo * >	Histos
typedef std::map< uint32_t, Histos >	HistosMap
typedef dqm::harvesting::MonitorElement	MonitorElement

Public Member Functions
void	createSummaryHisto (const sistrip::Monitorable &, const sistrip::Presentation &, const std::string &top_level_dir, const sistrip::Granularity &) override
	FedTimingHistograms (const edm::ParameterSet &pset, DQMStore *)
void	histoAnalysis (bool debug) override
	~FedTimingHistograms () override
Public Member Functions inherited from CommissioningHistograms
	CommissioningHistograms ()
	CommissioningHistograms (const edm::ParameterSet &pset, DQMStore *const, const sistrip::RunType &)
virtual void	configure (const edm::ParameterSet &, const edm::EventSetup &)
void	createCollations (const std::vector< std::string > &)
void	extractHistograms (const std::vector< std::string > &)
virtual void	printAnalyses ()
virtual void	printSummary ()
void	remove (std::string pattern="")
void	save (std::string &filename, uint32_t run_number=0, std::string partitionName="")
virtual	~CommissioningHistograms ()

Protected Attributes
std::map< uint32_t, FedTimingAnalysis >	data_
uint32_t	deviceWithMaxDelay_
uint32_t	deviceWithMinDelay_
std::unique_ptr< Factory >	factory_
float	maxDelay_
float	minDelay_
const float	optimumSamplingPoint_
Protected Attributes inherited from CommissioningHistograms
std::unique_ptr< Factory >	factory_

Additional Inherited Members
Static Public Member Functions inherited from CommissioningHistograms
static void	copyCustomInformation (DQMStore *const, const std::vector< std::string > &)
static uint32_t	runNumber (DQMStore *const, const std::vector< std::string > &)
static sistrip::RunType	runType (DQMStore *const, const std::vector< std::string > &)
Protected Member Functions inherited from CommissioningHistograms
DQMStore *const	bei () const
void	clearHistosMap ()
Analyses &	data (bool getMaskedData=false)
Factory *const	factory ()
TH1 *	histogram (const sistrip::Monitorable &, const sistrip::Presentation &, const sistrip::View &, const std::string &directory, const uint32_t &xbins, const float &xlow=1. *sistrip::invalid_, const float &xhigh=1. *sistrip::invalid_)
const HistosMap &	histos () const
const FedToFecMap &	mapping () const
void	printHistosMap ()
const edm::ParameterSet &	pset () const
const sistrip::RunType &	task () const

Detailed Description

Definition at line 8 of file FedTimingHistograms.h.

Member Typedef Documentation

Factory

typedef SummaryHistogramFactory<FedTimingAnalysis> FedTimingHistograms::Factory

Definition at line 13 of file FedTimingHistograms.h.

Constructor & Destructor Documentation

FedTimingHistograms()

FedTimingHistograms::FedTimingHistograms	(	const edm::ParameterSet &	pset,
		DQMStore *	bei
	)

Definition at line 14 of file FedTimingHistograms.cc.

    : CommissioningHistograms(pset.getParameter<edm::ParameterSet>("FedTimingParameters"), bei, sistrip::FED_TIMING),
      factory_(new Factory),
      optimumSamplingPoint_(15.),
      minDelay_(sistrip::invalid_),
      maxDelay_(-1. * sistrip::invalid_),
      deviceWithMinDelay_(sistrip::invalid_),
      deviceWithMaxDelay_(sistrip::invalid_) {
  cout << "[" << __PRETTY_FUNCTION__ << "]"
       << " Created object for APV TIMING histograms" << endl;
}

References gather_cfg::cout.

~FedTimingHistograms()

FedTimingHistograms::~FedTimingHistograms ( )

override

Definition at line 28 of file FedTimingHistograms.cc.

{ cout << "[" << __PRETTY_FUNCTION__ << "]" << endl; }

References gather_cfg::cout.

Member Function Documentation

createSummaryHisto()

void FedTimingHistograms::createSummaryHisto ( const sistrip::Monitorable &  histo, const sistrip::Presentation &  type, const std::string &  top_level_dir, const sistrip::Granularity &  gran  )

overridevirtual

Reimplemented from CommissioningHistograms.

Definition at line 130 of file FedTimingHistograms.cc.

                                                                             {
  cout << "[" << __PRETTY_FUNCTION__ << "]" << endl;
 
  // Check view
  sistrip::View view = SiStripEnumsAndStrings::view(directory);
  if (view == sistrip::UNKNOWN_VIEW) {
    return;
  }
 
  // Analyze histograms
  histoAnalysis(false);
 
  // Extract data to be histogrammed
  factory_->init(histo, type, view, directory, gran);
  uint32_t xbins = factory_->extract(data_);
 
  // Create summary histogram (if it doesn't already exist)
  TH1* summary = histogram(histo, type, view, directory, xbins);
 
  // Fill histogram with data
  factory_->fill(*summary);
}

References gather_cfg::cout, data_, createBeamHaloJobs::directory, factory_, timingPdfMaker::histo, histoAnalysis(), CommissioningHistograms::histogram(), edmLumisInFiles::summary, sistrip::UNKNOWN_VIEW, SiStripEnumsAndStrings::view(), and fw3dlego::xbins.

histoAnalysis()

void FedTimingHistograms::histoAnalysis ( bool  debug )

overridevirtual

Reimplemented from CommissioningHistograms.

Definition at line 32 of file FedTimingHistograms.cc.

                                                  {
  // Clear std::map holding analysis objects
  data_.clear();
 
  // Reset minimum / maximum delays
  float time_min = 1. * sistrip::invalid_;
  float time_max = -1. * sistrip::invalid_;
  uint32_t device_min = sistrip::invalid_;
  uint32_t device_max = sistrip::invalid_;
 
  //   // Iterate through std::map containing std::vectors of profile histograms
  //   CollationsMap::const_iterator iter = collations().begin();
  //   for ( ; iter != collations().end(); iter++ ) {
 
  //     // Check std::vector of histos is not empty (should be 2 histos)
  //     if ( iter->second.empty() ) {
  //       cerr << "[" << __PRETTY_FUNCTION__ << "]"
  //       << " Zero collation histograms found!" << endl;
  //       continue;
  //     }
 
  //     // Retrieve pointers to profile histos for this FED channel
  //     std::vector<TH1*> profs;
  //     Collations::const_iterator ihis = iter->second.begin();
  //     for ( ; ihis != iter->second.end(); ihis++ ) {
  // OBSOLETE!!!
  //       TProfile* prof = ExtractTObject<TProfile>().extract( mui()->get( ihis->first ) );
  //       if ( prof ) { profs.push_back(prof); }
  //     }
 
  //     // Perform histo analysis
  //     FedTimingAnalysis anal( iter->first );
  //     FedTimingAlgorithm algo( &anal );
  //     algo.analysis( profs );
  //     data_[iter->first] = anal;
 
  //     // Check tick height is valid
  //     if ( anal.height() < 100. ) {
  //       cerr << "[" << __PRETTY_FUNCTION__ << "]"
  //       << " Tick mark height too small: " << anal.height() << endl;
  //       continue;
  //     }
 
  //     // Check time of rising edge
  //     if ( anal.time() > sistrip::maximum_ ) { continue; }
 
  //     // Find maximum time
  //     if ( anal.time() > time_max ) {
  //       time_max = anal.time();
  //       device_max = iter->first;
  //     }
 
  //     // Find minimum time
  //     if ( anal.time() < time_min ) {
  //       time_min = anal.time();
  //       device_min = iter->first;
  //     }
 
  //   }
 
  //   cout << "[" << __PRETTY_FUNCTION__ << "]"
  //        << " Analyzed histograms for "
  //        << collations().size()
  //        << " FED channels" << endl;
 
  // Adjust maximum (and minimum) delay(s) to find optimum sampling point(s)
  if (time_max > sistrip::maximum_ || time_max < -1. * sistrip::maximum_) {
    cerr << "[" << __PRETTY_FUNCTION__ << "]"
         << " Unable to set maximum time! Found unexpected value: " << time_max << endl;
    return;
  }
 
  SiStripFecKey max(device_max);
  cout << " Device (FEC/slot/ring/CCU/module/channel) " << max.fecCrate() << "/" << max.fecSlot() << "/"
       << max.fecRing() << "/" << max.ccuAddr() << "/" << max.ccuChan() << "/"
       << " has maximum delay (rising edge) [ns]:" << time_max << endl;
 
  SiStripFecKey min(device_min);
  cout << " Device (FEC/slot/ring/CCU/module/channel): " << min.fecCrate() << "/" << min.fecSlot() << "/"
       << min.fecRing() << "/" << min.ccuAddr() << "/" << min.ccuChan() << "/"
       << " has minimum delay (rising edge) [ns]:" << time_min << endl;
 
  // Set maximum time for all analysis objects
  std::map<uint32_t, FedTimingAnalysis>::iterator ianal = data_.begin();
  for (; ianal != data_.end(); ianal++) {
    ianal->second.max(time_max);
    static uint16_t cntr = 0;
    if (debug) {
      std::stringstream ss;
      ianal->second.print(ss);
      cout << ss.str() << endl;
      cntr++;
    }
  }
}

References EcnaPython_AdcPeg12_S1_10_R170298_1_0_150_Dee0::cerr, gather_cfg::cout, data_, debug, sistrip::invalid_, SiStripPI::max, sistrip::maximum_, min(), and contentValuesCheck::ss.

Referenced by createSummaryHisto().

Member Data Documentation

data_

std::map<uint32_t, FedTimingAnalysis> FedTimingHistograms::data_

protected

Definition at line 25 of file FedTimingHistograms.h.

Referenced by createSummaryHisto(), and histoAnalysis().

deviceWithMaxDelay_

uint32_t FedTimingHistograms::deviceWithMaxDelay_

protected

Definition at line 33 of file FedTimingHistograms.h.

deviceWithMinDelay_

uint32_t FedTimingHistograms::deviceWithMinDelay_

protected

Definition at line 32 of file FedTimingHistograms.h.

factory_

std::unique_ptr<Factory> FedTimingHistograms::factory_

protected

Definition at line 27 of file FedTimingHistograms.h.

Referenced by createSummaryHisto().

maxDelay_

float FedTimingHistograms::maxDelay_

protected

Definition at line 31 of file FedTimingHistograms.h.

minDelay_

float FedTimingHistograms::minDelay_

protected

Definition at line 30 of file FedTimingHistograms.h.

optimumSamplingPoint_

const float FedTimingHistograms::optimumSamplingPoint_

protected

Definition at line 29 of file FedTimingHistograms.h.