20 findingRecord<SiStripFedCablingRcd>();
22 edm::LogVerbatim(
"FedCabling") <<
"[SiStripFedCablingFakeESSource::" << __func__ <<
"]"
23 <<
" Constructing object...";
29 edm::LogVerbatim(
"FedCabling") <<
"[SiStripFedCablingFakeESSource::" << __func__ <<
"]"
30 <<
" Destructing object...";
36 edm::LogVerbatim(
"FedCabling") <<
"[SiStripFedCablingFakeESSource::" << __func__ <<
"]"
37 <<
" Building \"fake\" FED cabling map"
38 <<
" from real DetIds and FedIds (read from ascii file)";
44 typedef std::vector<uint32_t> Dets;
48 typedef std::vector<uint16_t> Feds;
55 Dets::const_iterator idet = dets.begin();
56 Dets::const_iterator jdet = dets.end();
57 for (; idet != jdet; ++idet) {
59 for (uint16_t ipair = 0; ipair < npairs; ++ipair) {
61 if (npairs == 2 && ipair == 0) {
63 }
else if (npairs == 2 && ipair == 1) {
65 }
else if (npairs == 3 && ipair == 0) {
67 }
else if (npairs == 3 && ipair == 1) {
69 }
else if (npairs == 3 && ipair == 2) {
72 edm::LogWarning(
"FedCabling") <<
"[SiStripFedCablingFakeESSource::" << __func__ <<
"]"
73 <<
" Inconsistent values for nPairs (" << npairs <<
") and ipair (" << ipair
94 bool insufficient =
false;
95 Feds::const_iterator ifed =
feds.begin();
97 for (std::vector<SiStripFecCrate>::const_iterator icrate = fec_cabling->
crates().begin();
98 icrate != fec_cabling->
crates().end();
100 for (std::vector<SiStripFec>::const_iterator ifec = icrate->fecs().begin(); ifec != icrate->fecs().end(); ifec++) {
101 for (std::vector<SiStripRing>::const_iterator iring = ifec->rings().begin(); iring != ifec->rings().end();
103 for (std::vector<SiStripCcu>::const_iterator iccu = iring->ccus().begin(); iccu != iring->ccus().end();
105 for (std::vector<SiStripModule>::const_iterator imod = iccu->modules().begin(); imod != iccu->modules().end();
107 if (populateAllFeds) {
108 for (uint16_t ipair = 0; ipair < imod->nApvPairs(); ipair++) {
109 if (ifed ==
feds.end()) {
118 std::pair<uint16_t, uint16_t>
addr = imod->activeApvPair(imod->lldChannel(ipair));
123 const_cast<SiStripModule&>(*imod).fedCh(
addr.first, fed_channel);
131 if (96 - fed_ch < imod->nApvPairs()) {
135 for (uint16_t ipair = 0; ipair < imod->nApvPairs(); ipair++) {
136 std::pair<uint16_t, uint16_t>
addr = imod->activeApvPair((*imod).lldChannel(ipair));
141 const_cast<SiStripModule&>(*imod).fedCh(
addr.first, fed_channel);
153 <<
" Insufficient FED channels to cable entire system!";
157 std::stringstream
ss;
158 ss <<
"[SiStripFedCablingFakeESSource::" << __func__ <<
"]"
159 <<
" First count devices of FEC cabling " << std::endl;
164 std::vector<FedChannelConnection> conns;