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FastFedCablingHistosUsingDb Class Reference

#include <FastFedCablingHistosUsingDb.h>

Inheritance diagram for FastFedCablingHistosUsingDb:
CommissioningHistosUsingDb FastFedCablingHistograms CommissioningHistograms CommissioningHistograms

Public Member Functions

void addDcuDetIds () override
 
 FastFedCablingHistosUsingDb (const edm::ParameterSet &pset, DQMStore *, SiStripConfigDb *const)
 
void uploadConfigurations () override
 
 ~FastFedCablingHistosUsingDb () override
 
- Public Member Functions inherited from CommissioningHistosUsingDb
 CommissioningHistosUsingDb (SiStripConfigDb *const, sistrip::RunType=sistrip::UNDEFINED_RUN_TYPE)
 
void configure (const edm::ParameterSet &, const edm::EventSetup &) override
 
bool doUploadAnal () const
 
void doUploadAnal (bool)
 
bool doUploadConf () const
 
void doUploadConf (bool)
 
void uploadToConfigDb ()
 
 ~CommissioningHistosUsingDb () override
 
- Public Member Functions inherited from CommissioningHistograms
 CommissioningHistograms ()
 
 CommissioningHistograms (const edm::ParameterSet &pset, DQMStore *const, const sistrip::RunType &)
 
void createCollations (const std::vector< std::string > &)
 
virtual void createSummaryHisto (const sistrip::Monitorable &, const sistrip::Presentation &, const std::string &top_level_dir, const sistrip::Granularity &)
 
void extractHistograms (const std::vector< std::string > &)
 
void remove (std::string pattern="")
 
void save (std::string &filename, uint32_t run_number=0, std::string partitionName="")
 
virtual ~CommissioningHistograms ()
 
- Public Member Functions inherited from FastFedCablingHistograms
 FastFedCablingHistograms (const edm::ParameterSet &pset, DQMStore *)
 
void histoAnalysis (bool debug) override
 
void printAnalyses () override
 
void printSummary () override
 
 ~FastFedCablingHistograms () override
 

Private Member Functions

void connections (SiStripConfigDb::DeviceDescriptionsRange, SiStripConfigDb::DcuDetIdsRange)
 
void create (SiStripConfigDb::AnalysisDescriptionsV &, Analysis) override
 
void update (SiStripConfigDb::FedConnectionsV &, SiStripConfigDb::FedDescriptionsRange, SiStripConfigDb::DeviceDescriptionsRange, SiStripConfigDb::DcuDetIdsRange)
 
void update (SiStripConfigDb::FedDescriptionsRange)
 

Additional Inherited Members

- Public Types inherited from CommissioningHistograms
typedef std::map< uint32_t, CommissioningAnalysis * > Analyses
 
typedef Analyses::iterator Analysis
 
typedef dqm::harvesting::DQMStore DQMStore
 
typedef SummaryPlotFactory< CommissioningAnalysis * > Factory
 
typedef std::map< uint32_t, uint32_t > FedToFecMap
 
typedef std::vector< Histo * > Histos
 
typedef std::map< uint32_t, HistosHistosMap
 
typedef dqm::harvesting::MonitorElement MonitorElement
 
- Static Public Member Functions inherited from CommissioningHistograms
static void copyCustomInformation (DQMStore *const, const std::vector< std::string > &)
 
static uint32_t runNumber (DQMStore *const, const std::vector< std::string > &)
 
static sistrip::RunType runType (DQMStore *const, const std::vector< std::string > &)
 
- Protected Member Functions inherited from CommissioningHistosUsingDb
void buildDetInfo ()
 
SiStripFedCabling *const cabling () const
 
virtual void createAnalyses (SiStripConfigDb::AnalysisDescriptionsV &)
 
SiStripConfigDb *const db () const
 
std::pair< std::string, DetInfodetInfo (const SiStripFecKey &)
 
bool deviceIsPresent (const SiStripFecKey &)
 
void uploadAnalyses ()
 
- Protected Member Functions inherited from CommissioningHistograms
DQMStore *const bei () const
 
void clearHistosMap ()
 
Analysesdata (bool getMaskedData=false)
 
Factory *const factory ()
 
TH1 * histogram (const sistrip::Monitorable &, const sistrip::Presentation &, const sistrip::View &, const std::string &directory, const uint32_t &xbins, const float &xlow=1. *sistrip::invalid_, const float &xhigh=1. *sistrip::invalid_)
 
const HistosMaphistos () const
 
const FedToFecMapmapping () const
 
void printHistosMap ()
 
const edm::ParameterSetpset () const
 
const sistrip::RunTypetask () const
 
- Protected Attributes inherited from CommissioningHistograms
std::unique_ptr< Factoryfactory_
 

Detailed Description

Definition at line 8 of file FastFedCablingHistosUsingDb.h.

Constructor & Destructor Documentation

◆ FastFedCablingHistosUsingDb()

FastFedCablingHistosUsingDb::FastFedCablingHistosUsingDb ( const edm::ParameterSet pset,
DQMStore bei,
SiStripConfigDb * const  db 
)

Definition at line 13 of file FastFedCablingHistosUsingDb.cc.

17  pset.getParameter<edm::ParameterSet>("FastFedCablingParameters"), bei, sistrip::FAST_CABLING),
19  FastFedCablingHistograms(pset.getParameter<edm::ParameterSet>("FastFedCablingParameters"), bei) {
20  LogTrace(mlDqmClient_) << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
21  << " Constructing object...";
22 }

References LogTrace, and sistrip::mlDqmClient_.

◆ ~FastFedCablingHistosUsingDb()

FastFedCablingHistosUsingDb::~FastFedCablingHistosUsingDb ( )
override

Definition at line 26 of file FastFedCablingHistosUsingDb.cc.

26  {
27  LogTrace(mlDqmClient_) << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
28  << " Destructing object...";
29 }

References LogTrace, and sistrip::mlDqmClient_.

Member Function Documentation

◆ addDcuDetIds()

void FastFedCablingHistosUsingDb::addDcuDetIds ( )
overridevirtual

Reimplemented from CommissioningHistosUsingDb.

Definition at line 273 of file FastFedCablingHistosUsingDb.cc.

273  {
274  if (!cabling()) {
275  edm::LogError(mlDqmClient_) << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
276  << " NULL pointer to SiStripFedCabling object!";
277  return;
278  }
279 
280  // retrieve descriptions for dcu id and det id
283 
284  if (dcus.empty()) {
285  edm::LogError(mlCabling_) << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
286  << " No DCU descriptions found!";
287  return;
288  }
289 
290  if (detids.empty()) {
291  edm::LogWarning(mlCabling_) << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
292  << " DCU-DetId map is empty!";
293  }
294 
295  Analyses::iterator ianal = data().begin();
296  Analyses::iterator janal = data().end();
297  for (; ianal != janal; ++ianal) {
298  // check if analysis is valid (ie, dcu id and lld channel have been identified)
299  if (!ianal->second->isValid()) {
300  continue;
301  }
302 
303  // retrieve analysis object
304  FastFedCablingAnalysis* anal = dynamic_cast<FastFedCablingAnalysis*>(ianal->second);
305 
306  if (!anal) {
307  edm::LogError(mlDqmClient_) << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
308  << " NULL pointer to FastFedCablingAnalysis object!";
309  return;
310  }
311 
312  // find dcu that matches analysis result
313  bool found = false;
314  SiStripConfigDb::DeviceDescriptionsV::const_iterator idcu = dcus.begin();
315  SiStripConfigDb::DeviceDescriptionsV::const_iterator jdcu = dcus.end();
316  while (!found && idcu != jdcu) {
317  dcuDescription* dcu = dynamic_cast<dcuDescription*>(*idcu);
318  if (dcu) {
319  if (dcu->getDcuType() == "FEH") {
320  if (dcu->getDcuHardId() == anal->dcuHardId()) {
321  found = true;
322  anal->dcuId(dcu->getDcuHardId());
324  uint32_t fec_key =
325  SiStripFecKey(addr.fecCrate_, addr.fecSlot_, addr.fecRing_, addr.ccuAddr_, addr.ccuChan_, anal->lldCh())
326  .key();
327  anal->fecKey(fec_key);
328  SiStripConfigDb::DcuDetIdsV::const_iterator idet = detids.end();
329  idet = SiStripConfigDb::findDcuDetId(detids.begin(), detids.end(), dcu->getDcuHardId());
330  if (idet != detids.end()) {
331  anal->detId(idet->second->getDetId());
332  }
333  }
334  }
335  }
336  idcu++;
337  }
338  }
339 }

References generateTowerEtThresholdLUT::addr, conversion_template_cfg::anal, CommissioningHistosUsingDb::cabling(), CommissioningHistograms::data(), CommissioningHistosUsingDb::db(), SiStripConfigDb::deviceAddress(), SiStripConfigDb::findDcuDetId(), newFWLiteAna::found, SiStripConfigDb::getDcuDetIds(), SiStripConfigDb::getDeviceDescriptions(), crabWrapper::key, sistrip::mlCabling_, and sistrip::mlDqmClient_.

◆ connections()

void FastFedCablingHistosUsingDb::connections ( SiStripConfigDb::DeviceDescriptionsRange  dcus,
SiStripConfigDb::DcuDetIdsRange  detids 
)
private

Definition at line 401 of file FastFedCablingHistosUsingDb.cc.

402  {
403  // strings
404  std::vector<std::string> valid;
405  std::vector<std::string> dirty;
406  std::vector<std::string> trimdac;
407  std::vector<std::string> missing;
408  std::vector<std::string> devices;
409  uint32_t missing_pairs = 0;
410 
411  // iterate through analyses
412  std::vector<uint32_t> found_dcus;
413  Analyses::iterator ianal = data().begin();
414  Analyses::iterator janal = data().end();
415  for (; ianal != janal; ++ianal) {
416  // extract fast fed cabling object
417  FastFedCablingAnalysis* anal = dynamic_cast<FastFedCablingAnalysis*>(ianal->second);
418  if (!anal) {
419  continue;
420  }
421 
422  // construct strings for various categories of connections
423  std::stringstream ss;
424  SiStripFedKey(anal->fedKey()).terse(ss);
425  ss << " ";
426  SiStripFecKey(anal->fecKey()).terse(ss);
427  ss << " ";
428  ss << "DcuId= " << std::hex << std::setw(8) << std::setfill('0') << anal->dcuId() << std::dec << " ";
429  ss << "DetId= " << std::hex << std::setw(8) << std::setfill('0') << anal->detId() << std::dec;
430  if (anal->isValid() && !(anal->isDirty()) && !(anal->badTrimDac())) {
431  valid.push_back(ss.str());
432  }
433  if (anal->isDirty()) {
434  dirty.push_back(ss.str());
435  }
436  if (anal->badTrimDac()) {
437  trimdac.push_back(ss.str());
438  }
439 
440  // record "found" dcus
441  found_dcus.push_back(anal->dcuHardId());
442  }
443 
444  // iterate through dcu devices
445  SiStripConfigDb::DeviceDescriptionsV::const_iterator idcu = dcus.begin();
446  SiStripConfigDb::DeviceDescriptionsV::const_iterator jdcu = dcus.end();
447  for (; idcu != jdcu; ++idcu) {
448  // extract dcu description
449  dcuDescription* dcu = dynamic_cast<dcuDescription*>(*idcu);
450  if (!dcu) {
451  continue;
452  }
453  if (dcu->getDcuType() != "FEH") {
454  continue;
455  }
456  SiStripConfigDb::DeviceAddress dcu_addr = db()->deviceAddress(*dcu);
457 
458  // continue if dcu has been "found"
459  std::vector<uint32_t>::const_iterator iter = find(found_dcus.begin(), found_dcus.end(), dcu->getDcuHardId());
460  if (iter != found_dcus.end()) {
461  continue;
462  }
463 
464  // find detid for "missing" dcu
465  SiStripConfigDb::DcuDetIdsV::const_iterator idet = detids.end();
466  idet = SiStripConfigDb::findDcuDetId(detids.begin(), detids.end(), dcu->getDcuHardId());
467  if (idet == detids.end()) {
468  continue;
469  }
470  if (idet->second) {
471  continue;
472  }
473 
474  // retrieve number of apv pairs
475  uint16_t npairs = idet->second->getApvNumber() / 2;
476 
477  // retrieve apvs for given dcu
478  vector<bool> addrs;
479  addrs.resize(6, false);
481  SiStripConfigDb::DeviceDescriptionsV::const_iterator iapv = apvs.begin();
482  SiStripConfigDb::DeviceDescriptionsV::const_iterator japv = apvs.end();
483  for (; iapv != japv; ++iapv) {
484  apvDescription* apv = dynamic_cast<apvDescription*>(*iapv);
485  if (!apv) {
486  continue;
487  }
488  SiStripConfigDb::DeviceAddress apv_addr = db()->deviceAddress(*apv);
489  if (apv_addr.fecCrate_ == dcu_addr.fecCrate_ && apv_addr.fecSlot_ == dcu_addr.fecSlot_ &&
490  apv_addr.fecRing_ == dcu_addr.fecRing_ && apv_addr.ccuAddr_ == dcu_addr.ccuAddr_ &&
491  apv_addr.ccuChan_ == dcu_addr.ccuChan_) {
492  uint16_t pos = apv_addr.i2cAddr_ - 32;
493  if (pos < 6) {
494  addrs[pos] = true;
495  }
496  }
497  }
498 
499  // construct strings for missing fibres
500  uint16_t pairs = 0;
501  if (addrs[0] || addrs[1]) {
502  pairs++;
503  std::stringstream ss;
504  SiStripFecKey(dcu_addr.fecCrate_, dcu_addr.fecSlot_, dcu_addr.fecRing_, dcu_addr.ccuAddr_, dcu_addr.ccuChan_, 1)
505  .terse(ss);
506  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
507  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
508  missing.push_back(ss.str());
509  }
510  if (addrs[2] || addrs[3]) {
511  pairs++;
512  std::stringstream ss;
513  SiStripFecKey(dcu_addr.fecCrate_, dcu_addr.fecSlot_, dcu_addr.fecRing_, dcu_addr.ccuAddr_, dcu_addr.ccuChan_, 2)
514  .terse(ss);
515  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
516  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
517  missing.push_back(ss.str());
518  }
519  if (addrs[4] || addrs[5]) {
520  pairs++;
521  std::stringstream ss;
522  SiStripFecKey(dcu_addr.fecCrate_, dcu_addr.fecSlot_, dcu_addr.fecRing_, dcu_addr.ccuAddr_, dcu_addr.ccuChan_, 3)
523  .terse(ss);
524  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
525  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
526  missing.push_back(ss.str());
527  }
528 
529  if (pairs != npairs) {
530  missing_pairs = npairs - pairs;
531 
532  if (!addrs[0]) {
533  std::stringstream ss;
535  dcu_addr.fecCrate_, dcu_addr.fecSlot_, dcu_addr.fecRing_, dcu_addr.ccuAddr_, dcu_addr.ccuChan_, 1, 32)
536  .terse(ss);
537  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
538  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
539  devices.push_back(ss.str());
540  }
541 
542  if (!addrs[1]) {
543  std::stringstream ss;
545  dcu_addr.fecCrate_, dcu_addr.fecSlot_, dcu_addr.fecRing_, dcu_addr.ccuAddr_, dcu_addr.ccuChan_, 1, 33)
546  .terse(ss);
547  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
548  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
549  devices.push_back(ss.str());
550  }
551 
552  if (!addrs[2] && npairs == 3) {
553  std::stringstream ss;
555  dcu_addr.fecCrate_, dcu_addr.fecSlot_, dcu_addr.fecRing_, dcu_addr.ccuAddr_, dcu_addr.ccuChan_, 2, 34)
556  .terse(ss);
557  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
558  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
559  devices.push_back(ss.str());
560  }
561 
562  if (!addrs[3] && npairs == 3) {
563  std::stringstream ss;
565  dcu_addr.fecCrate_, dcu_addr.fecSlot_, dcu_addr.fecRing_, dcu_addr.ccuAddr_, dcu_addr.ccuChan_, 2, 35)
566  .terse(ss);
567  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
568  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
569  devices.push_back(ss.str());
570  }
571 
572  if (!addrs[4]) {
573  std::stringstream ss;
575  dcu_addr.fecCrate_, dcu_addr.fecSlot_, dcu_addr.fecRing_, dcu_addr.ccuAddr_, dcu_addr.ccuChan_, 3, 36)
576  .terse(ss);
577  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
578  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
579  devices.push_back(ss.str());
580  }
581 
582  if (!addrs[5]) {
583  std::stringstream ss;
585  dcu_addr.fecCrate_, dcu_addr.fecSlot_, dcu_addr.fecRing_, dcu_addr.ccuAddr_, dcu_addr.ccuChan_, 3, 37)
586  .terse(ss);
587  ss << " DcuId=" << std::hex << std::setw(8) << std::setfill('0') << dcu->getDcuHardId() << std::dec;
588  ss << " DetId=" << std::hex << std::setw(8) << std::setfill('0') << idet->first << std::dec;
589  devices.push_back(ss.str());
590  }
591  }
592  }
593 
594  // summary
595  {
596  std::stringstream ss;
597  ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
598  << " Summary of connections: " << std::endl
599  << " \"Good\" connections : " << valid.size() << std::endl
600  << " \"Dirty\" connections : " << dirty.size() << std::endl
601  << " \"Bad\" TrimDAQ settings : " << trimdac.size() << std::endl
602  << " (\"Missing\" connections : " << missing.size() << ")" << std::endl
603  << " (\"Missing\" APV pairs : " << missing_pairs << ")" << std::endl
604  << " (\"Missing\" APVs : " << devices.size() << ")" << std::endl;
605  edm::LogVerbatim(mlCabling_) << ss.str();
606  }
607 
608  // good connections
609  if (!valid.empty()) {
610  std::stringstream ss;
611  ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
612  << " List of \"good\" connections: " << std::endl;
613  std::vector<std::string>::const_iterator istr = valid.begin();
614  std::vector<std::string>::const_iterator jstr = valid.end();
615  for (; istr != jstr; ++istr) {
616  ss << *istr << std::endl;
617  }
618  LogTrace(mlCabling_) << ss.str();
619  }
620 
621  // dirty connections
622  if (!dirty.empty()) {
623  std::stringstream ss;
624  ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
625  << " List of \"dirty\" connections: " << std::endl;
626  std::vector<std::string>::const_iterator istr = dirty.begin();
627  std::vector<std::string>::const_iterator jstr = dirty.end();
628  for (; istr != jstr; ++istr) {
629  ss << *istr << std::endl;
630  }
631  edm::LogWarning(mlCabling_) << ss.str();
632  }
633 
634  // TrimDAC connections
635  if (!trimdac.empty()) {
636  std::stringstream ss;
637  ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
638  << " List of \"bad\" TrimDAC settings: " << std::endl;
639  std::vector<std::string>::const_iterator istr = trimdac.begin();
640  std::vector<std::string>::const_iterator jstr = trimdac.end();
641  for (; istr != jstr; ++istr) {
642  ss << *istr << std::endl;
643  }
644  edm::LogWarning(mlCabling_) << ss.str();
645  }
646 
647  // missing connections
648  if (!missing.empty()) {
649  std::stringstream ss;
650  ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
651  << " List of \"missing\" connections: " << std::endl;
652  std::vector<std::string>::const_iterator istr = missing.begin();
653  std::vector<std::string>::const_iterator jstr = missing.end();
654  for (; istr != jstr; ++istr) {
655  ss << *istr << std::endl;
656  }
657  edm::LogError(mlCabling_) << ss.str();
658  }
659 
660  // missing devices
661  if (!devices.empty()) {
662  std::stringstream ss;
663  ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
664  << " List of \"missing\" APVs: " << std::endl;
665  std::vector<std::string>::const_iterator istr = devices.begin();
666  std::vector<std::string>::const_iterator jstr = devices.end();
667  for (; istr != jstr; ++istr) {
668  ss << *istr << std::endl;
669  }
670  edm::LogError(mlCabling_) << ss.str();
671  }
672 }

References conversion_template_cfg::anal, SiStripConfigDb::DeviceAddress::ccuAddr_, SiStripConfigDb::DeviceAddress::ccuChan_, CommissioningHistograms::data(), CommissioningHistosUsingDb::db(), TauDecayModes::dec, SiStripConfigDb::deviceAddress(), SiStripConfigDb::DeviceAddress::fecCrate_, SiStripConfigDb::DeviceAddress::fecRing_, SiStripConfigDb::DeviceAddress::fecSlot_, spr::find(), SiStripConfigDb::findDcuDetId(), SiStripConfigDb::getDeviceDescriptions(), SiStripConfigDb::DeviceAddress::i2cAddr_, LogTrace, combine::missing, sistrip::mlCabling_, contentValuesCheck::ss, SiStripFecKey::terse(), and RunInfoPI::valid.

Referenced by uploadConfigurations().

◆ create()

void FastFedCablingHistosUsingDb::create ( SiStripConfigDb::AnalysisDescriptionsV desc,
Analysis  analysis 
)
overrideprivatevirtual

Reimplemented from CommissioningHistosUsingDb.

Definition at line 343 of file FastFedCablingHistosUsingDb.cc.

343  {
344  FastFedCablingAnalysis* anal = dynamic_cast<FastFedCablingAnalysis*>(analysis->second);
345  if (!anal) {
346  return;
347  }
348 
349  if (!anal->isValid() || anal->dcuId() == sistrip::invalid32_) {
350  return;
351  } //@@ only store valid descriptions!
352 
353  SiStripFecKey fec_key(anal->fecKey());
354  SiStripFedKey fed_key(anal->fedKey());
355 
356  for (uint16_t iapv = 0; iapv < 2; ++iapv) {
357  // Create description
358  FastFedCablingAnalysisDescription* tmp;
359  tmp = new FastFedCablingAnalysisDescription(anal->highLevel(),
360  anal->highRms(),
361  anal->lowLevel(),
362  anal->lowRms(),
363  anal->max(),
364  anal->min(),
365  anal->dcuId(),
366  anal->lldCh(),
367  anal->isDirty(),
370  fec_key.fecCrate(),
371  fec_key.fecSlot(),
372  fec_key.fecRing(),
373  fec_key.ccuAddr(),
374  fec_key.ccuChan(),
375  SiStripFecKey::i2cAddr(fec_key.lldChan(), !iapv),
376  db()->dbParams().partitions().begin()->second.partitionName(),
377  db()->dbParams().partitions().begin()->second.runNumber(),
378  anal->isValid(),
379  "",
380  fed_key.fedId(),
381  fed_key.feUnit(),
382  fed_key.feChan(),
383  fed_key.fedApv());
384 
385  // Add comments
386  typedef std::vector<std::string> Strings;
387  Strings errors = anal->getErrorCodes();
388  Strings::const_iterator istr = errors.begin();
389  Strings::const_iterator jstr = errors.end();
390  for (; istr != jstr; ++istr) {
391  tmp->addComments(*istr);
392  }
393 
394  // Store description
395  desc.push_back(tmp);
396  }
397 }

References conversion_template_cfg::anal, CommissioningHistosUsingDb::db(), SiStripConfigDb::dbParams(), submitPVResolutionJobs::desc, FastFedCablingAnalysis::dirtyThreshold_, SiStripFecKey::i2cAddr(), sistrip::invalid32_, SiStripDbParams::partitions(), FastFedCablingAnalysis::threshold_, and createJobs::tmp.

◆ update() [1/2]

void FastFedCablingHistosUsingDb::update ( SiStripConfigDb::FedConnectionsV conns,
SiStripConfigDb::FedDescriptionsRange  feds,
SiStripConfigDb::DeviceDescriptionsRange  dcus,
SiStripConfigDb::DcuDetIdsRange  detids 
)
private

Definition at line 91 of file FastFedCablingHistosUsingDb.cc.

94  {
95  // Update FED-FEC mapping in base class, based on analysis results
96  Analyses::iterator ianal = data().begin();
97  Analyses::iterator janal = data().end();
98  for (; ianal != janal; ++ianal) {
99  FastFedCablingAnalysis* anal = dynamic_cast<FastFedCablingAnalysis*>(ianal->second);
100  if (!anal) {
101  edm::LogError(mlDqmClient_) << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
102  << " NULL pointer to analysis object!";
103  continue;
104  }
105 
106  if (!anal->isValid() || anal->dcuId() == sistrip::invalid32_) {
107  continue;
108  }
109 
110  SiStripFecKey fec_key(anal->fecKey());
111  SiStripFedKey fed_key(anal->fedKey());
112 
113  ConnectionDescription* conn = new ConnectionDescription();
114  conn->setFedId(fed_key.fedId());
115  conn->setFedChannel(fed_key.fedChannel());
116  conn->setFecHardwareId(""); //@@
117  conn->setFecCrateId(fec_key.fecCrate());
118  conn->setFecSlot(fec_key.fecSlot());
119  conn->setRingSlot(fec_key.fecRing());
120  conn->setCcuAddress(fec_key.ccuAddr());
121  conn->setI2cChannel(fec_key.ccuChan());
122  conn->setApvAddress(SiStripFecKey::i2cAddr(anal->lldCh(), true));
123  conn->setDcuHardId(anal->dcuHardId());
124 
125  // Retrieve FED crate and slot numbers
126  bool found = false;
127  SiStripConfigDb::FedDescriptionsV::const_iterator ifed = feds.begin();
128  while (ifed != feds.end() && !found) {
129  if (*ifed) {
130  uint16_t fed_id = static_cast<uint16_t>((*ifed)->getFedId());
131  if (fed_key.fedId() == fed_id) {
132  conn->setFedCrateId(static_cast<uint16_t>((*ifed)->getCrateNumber()));
133  conn->setFedSlot(static_cast<uint16_t>((*ifed)->getSlotNumber()));
134  found = true;
135  }
136  } else {
137  edm::LogError(mlDqmClient_) << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
138  << " NULL pointer to Fed9UDescription object!";
139  continue;
140  }
141  ++ifed;
142  }
143  if (!found) {
144  edm::LogError(mlDqmClient_) << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
145  << " Could not find FED id " << fed_key.fedId() << " in vector of FED descriptions!"
146  << " Unable to set FED crate and slot for this FED!";
147  }
148 
149  conns.push_back(conn);
150  }
151 
152  if (false) {
153  SiStripConfigDb::FedConnectionsV::iterator ifed = conns.begin();
154  for (; ifed != conns.end(); ifed++) {
155  (*ifed)->display();
156  }
157  }
158 }

References conversion_template_cfg::anal, SiStripCommissioningClient_cfg::conn, CommissioningHistograms::data(), l1tstage2emulator_dqm_sourceclient-live_cfg::feds, newFWLiteAna::found, SiStripFecKey::i2cAddr(), sistrip::invalid32_, and sistrip::mlDqmClient_.

Referenced by progressbar.ProgressBar::__next__(), MatrixUtil.Matrix::__setitem__(), MatrixUtil.Steps::__setitem__(), dqm-mbProfile.Profile::finish(), progressbar.ProgressBar::finish(), MatrixUtil.Steps::overwrite(), and uploadConfigurations().

◆ update() [2/2]

void FastFedCablingHistosUsingDb::update ( SiStripConfigDb::FedDescriptionsRange  feds)
private

Definition at line 162 of file FastFedCablingHistosUsingDb.cc.

162  {
163  // Iterate through feds and disable all channels
164  SiStripConfigDb::FedDescriptionsV::const_iterator ifed = feds.begin();
165  SiStripConfigDb::FedDescriptionsV::const_iterator jfed = feds.end();
166  try {
167  for (; ifed != jfed; ++ifed) {
168  for (uint16_t ichan = 0; ichan < sistrip::FEDCH_PER_FED; ichan++) {
169  Fed9U::Fed9UAddress addr(ichan);
170  Fed9U::Fed9UAddress addr0(ichan, static_cast<Fed9U::u8>(0));
171  Fed9U::Fed9UAddress addr1(ichan, static_cast<Fed9U::u8>(1));
172  (*ifed)->setFedFeUnitDisable(addr, true);
173  (*ifed)->setApvDisable(addr0, true);
174  (*ifed)->setApvDisable(addr1, true);
175  }
176  }
177  } catch (ICUtils::ICException& e) {
178  edm::LogWarning(mlDqmClient_) << e.what();
179  }
180 
181  // Counters for number of connected / enabled channels
182  uint16_t connected = 0;
183  std::map<uint16_t, std::vector<uint16_t> > enabled;
184 
185  // Iterate through feds and enable connected channels
186  for (ifed = feds.begin(); ifed != feds.end(); ifed++) {
187  for (uint16_t ichan = 0; ichan < sistrip::FEDCH_PER_FED; ichan++) {
188  // Retrieve FEC key from FED-FEC map
189  SiStripFedKey fed(
190  static_cast<uint16_t>((*ifed)->getFedId()), SiStripFedKey::feUnit(ichan), SiStripFedKey::feChan(ichan));
191  uint32_t fed_key = fed.key();
192 
193  // Retrieve analysis for given FED id and channel
194  Analyses::const_iterator iter = data().find(fed_key);
195  if (iter == data().end()) {
196  continue;
197  }
198 
199  if (!iter->second->isValid()) {
200  continue;
201  }
202 
203  FastFedCablingAnalysis* anal = dynamic_cast<FastFedCablingAnalysis*>(iter->second);
204  if (!anal) {
205  edm::LogError(mlDqmClient_) << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
206  << " NULL pointer to OptoScanAnalysis object!";
207  continue;
208  }
209 
210  // Retrieve FED id and channel
211  SiStripFedKey key(anal->fedKey());
212  uint16_t fed_id = key.fedId();
213  uint16_t fed_ch = key.fedChannel();
214 
215  // Enable front-end unit and channel
216  Fed9U::Fed9UAddress addr(fed_ch);
217  Fed9U::Fed9UAddress addr0(fed_ch, static_cast<Fed9U::u8>(0));
218  Fed9U::Fed9UAddress addr1(fed_ch, static_cast<Fed9U::u8>(1));
219  (*ifed)->setFedFeUnitDisable(addr, false);
220  (*ifed)->setApvDisable(addr0, false);
221  (*ifed)->setApvDisable(addr1, false);
222  connected++;
223  enabled[fed_id].push_back(fed_ch);
224  }
225  }
226 
227  // Some debug
228  std::stringstream sss;
229  if (!feds.empty()) {
230  sss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
231  << " Enabled a total of " << connected << " FED channels and disabled " << feds.size() * 96 - connected
232  << " FED channels (" << 100 * connected / (feds.size() * 96) << "% of total)";
233  edm::LogVerbatim(mlDqmClient_) << sss.str();
234  } else {
235  sss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
236  << " Found no FEDs! (and therefore no connected channels)";
237  edm::LogWarning(mlDqmClient_) << sss.str();
238  }
239 
240  // Some debug
241  std::stringstream ss;
242  ss << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
243  << " Dump of enabled FED channels:" << std::endl;
244  std::map<uint16_t, std::vector<uint16_t> >::const_iterator fed = enabled.begin();
245  for (; fed != enabled.end(); fed++) {
246  ss << " Enabled " << fed->second.size() << " channels for FED id " << std::setw(3) << fed->first << ": ";
247  if (!fed->second.empty()) {
248  uint16_t first = fed->second.front();
249  uint16_t last = fed->second.front();
250  std::vector<uint16_t>::const_iterator chan = fed->second.begin();
251  for (; chan != fed->second.end(); chan++) {
252  if (chan != fed->second.begin()) {
253  if (*chan != last + 1) {
254  ss << std::setw(2) << first << "->" << std::setw(2) << last << ", ";
255  if (chan != fed->second.end()) {
256  first = *(chan + 1);
257  }
258  }
259  }
260  last = *chan;
261  }
262  if (first != last) {
263  ss << std::setw(2) << first << "->" << std::setw(2) << last;
264  }
265  ss << std::endl;
266  }
267  }
268  LogTrace(mlDqmClient_) << ss.str();
269 }

References generateTowerEtThresholdLUT::addr, conversion_template_cfg::anal, officialStyle::chan, CommissioningHistograms::data(), MillePedeFileConverter_cfg::e, pixel_dqm_sourceclient-live_cfg::enabled, mps_fire::end, SiStripFedKey::feChan(), sistrip::FEDCH_PER_FED, l1tstage2emulator_dqm_sourceclient-live_cfg::feds, SiStripFedKey::feUnit(), dqmdumpme::first, crabWrapper::key, SiStripKey::key(), dqmdumpme::last, LogTrace, sistrip::mlDqmClient_, and contentValuesCheck::ss.

Referenced by progressbar.ProgressBar::__next__(), MatrixUtil.Matrix::__setitem__(), MatrixUtil.Steps::__setitem__(), dqm-mbProfile.Profile::finish(), progressbar.ProgressBar::finish(), and MatrixUtil.Steps::overwrite().

◆ uploadConfigurations()

void FastFedCablingHistosUsingDb::uploadConfigurations ( )
overridevirtual

Reimplemented from CommissioningHistosUsingDb.

Definition at line 33 of file FastFedCablingHistosUsingDb.cc.

33  {
34  LogTrace(mlDqmClient_) << "[FastFedCablingHistosUsingDb::" << __func__ << "]";
35 
36  if (!db()) {
37  edm::LogError(mlDqmClient_) << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
38  << " NULL pointer to SiStripConfigDb interface!"
39  << " Aborting upload...";
40  return;
41  }
42 
43  SiStripDbParams::SiStripPartitions::const_iterator ip = db()->dbParams().partitions().begin();
44  SiStripDbParams::SiStripPartitions::const_iterator jp = db()->dbParams().partitions().end();
45  for (; ip != jp; ++ip) {
46  // Retrieve descriptions
48  SiStripConfigDb::FedDescriptionsRange feds = db()->getFedDescriptions(ip->second.partitionName());
49  SiStripConfigDb::DeviceDescriptionsRange dcus = db()->getDeviceDescriptions(DCU, ip->second.partitionName());
50  SiStripConfigDb::DcuDetIdsRange detids = db()->getDcuDetIds(ip->second.partitionName());
51 
52  // Update FED connection descriptions
54  update(conns, feds, dcus, detids);
55 
56  if (doUploadConf()) {
57  edm::LogVerbatim(mlDqmClient_) << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
58  << " Uploading FED connections for partition \"" << ip->second.partitionName()
59  << "\" to DB...";
60  db()->clearFedConnections(ip->second.partitionName());
61  db()->addFedConnections(ip->second.partitionName(), conns);
62  db()->uploadFedConnections(ip->second.partitionName());
63  edm::LogVerbatim(mlDqmClient_) << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
64  << " Completed database upload of " << conns.size() << " ConnectionDescriptions!";
65  } else {
66  edm::LogWarning(mlDqmClient_) << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
67  << " TEST only! No FED connections will be uploaded to DB...";
68  }
69 
70  // Update FED descriptions with enabled/disabled channels
71  update(feds);
72  if (doUploadConf()) {
73  edm::LogVerbatim(mlDqmClient_) << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
74  << " Uploading FED descriptions to DB...";
75  db()->uploadFedDescriptions(ip->second.partitionName());
76  edm::LogVerbatim(mlDqmClient_) << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
77  << " Completed database upload of " << feds.size()
78  << " Fed9UDescriptions (with connected channels enabled)!";
79  } else {
80  edm::LogWarning(mlDqmClient_) << "[FastFedCablingHistosUsingDb::" << __func__ << "]"
81  << " TEST only! No FED descriptions will be uploaded to DB...";
82  }
83 
84  // Some debug on good / dirty / missing connections
85  connections(dcus, detids);
86  }
87 }

References SiStripConfigDb::addFedConnections(), SiStripConfigDb::clearFedConnections(), connections(), CommissioningHistosUsingDb::db(), SiStripConfigDb::dbParams(), CommissioningHistosUsingDb::doUploadConf(), l1tstage2emulator_dqm_sourceclient-live_cfg::feds, SiStripConfigDb::getDcuDetIds(), SiStripConfigDb::getDeviceDescriptions(), SiStripConfigDb::getFedDescriptions(), LogTrace, sistrip::mlDqmClient_, SiStripDbParams::partitions(), update(), SiStripConfigDb::uploadFedConnections(), and SiStripConfigDb::uploadFedDescriptions().

SiStripConfigDb::getDeviceDescriptions
DeviceDescriptionsRange getDeviceDescriptions(std::string partition="")
Definition: DeviceDescriptions.cc:11
l1tstage2emulator_dqm_sourceclient-live_cfg.feds
feds
Definition: l1tstage2emulator_dqm_sourceclient-live_cfg.py:153
sistrip::FAST_CABLING
Definition: ConstantsForRunType.h:89
SiStripConfigDb::DeviceDescriptionsRange
DeviceDescriptions::range DeviceDescriptionsRange
Definition: SiStripConfigDb.h:110
sistrip::invalid32_
static const uint32_t invalid32_
Definition: Constants.h:15
SiStripConfigDb::DcuDetIdsRange
DcuDetIds::range DcuDetIdsRange
Definition: SiStripConfigDb.h:127
CommissioningHistograms::pset
const edm::ParameterSet & pset() const
Definition: CommissioningHistograms.h:163
CommissioningHistograms::bei
DQMStore *const bei() const
Definition: CommissioningHistograms.h:159
SiStripConfigDb::dbParams
const SiStripDbParams & dbParams() const
Definition: SiStripConfigDb.h:421
SiStripConfigDb::addFedConnections
void addFedConnections(std::string partition, FedConnectionsV &)
Definition: FedConnections.cc:127
SiStripKey::key
const uint32_t & key() const
Definition: SiStripKey.h:120
SiStripConfigDb::deviceAddress
DeviceAddress deviceAddress(const deviceDescription &)
Definition: DeviceDescriptions.cc:503
SiStripConfigDb::getFedDescriptions
FedDescriptionsRange getFedDescriptions(std::string partition="")
Definition: FedDescriptions.cc:12
SiStripConfigDb::uploadFedDescriptions
void uploadFedDescriptions(std::string partition="")
Definition: FedDescriptions.cc:197
pos
Definition: PixelAliasList.h:18
CommissioningHistosUsingDb::cabling
SiStripFedCabling *const cabling() const
Definition: CommissioningHistosUsingDb.h:94
SiStripCommissioningClient_cfg.conn
conn
Definition: SiStripCommissioningClient_cfg.py:5
FastFedCablingAnalysis
Histogram-based analysis for connection loop.
Definition: FastFedCablingAnalysis.h:16
SiStripFedKey
A container class for generic run and event-related info, information required by the commissioning a...
Definition: SiStripFedKey.h:56
CommissioningHistograms::data
Analyses & data(bool getMaskedData=false)
Definition: CommissioningHistograms.cc:718
spr::find
void find(edm::Handle< EcalRecHitCollection > &hits, DetId thisDet, std::vector< EcalRecHitCollection::const_iterator > &hit, bool debug=false)
Definition: FindCaloHit.cc:19
createJobs.tmp
tmp
align.sh
Definition: createJobs.py:716
newFWLiteAna.found
found
Definition: newFWLiteAna.py:118
Strings
std::vector< std::string > Strings
Definition: MsgTools.h:18
dqmdumpme.first
first
Definition: dqmdumpme.py:55
edm::LogWarning
Log< level::Warning, false > LogWarning
Definition: MessageLogger.h:122
sistrip::mlDqmClient_
static const char mlDqmClient_[]
Definition: ConstantsForLogger.h:19
SiStripConfigDb::findDcuDetId
static DcuDetIdsV::const_iterator findDcuDetId(DcuDetIdsV::const_iterator begin, DcuDetIdsV::const_iterator end, uint32_t dcu_id)
Definition: DcuDetIds.cc:412
CommissioningHistograms::CommissioningHistograms
CommissioningHistograms()
Definition: CommissioningHistograms.cc:60
contentValuesCheck.ss
ss
Definition: contentValuesCheck.py:33
SiStripConfigDb::clearFedConnections
void clearFedConnections(std::string partition="")
Definition: FedConnections.cc:269
CommissioningHistosUsingDb::CommissioningHistosUsingDb
CommissioningHistosUsingDb()
Definition: CommissioningHistosUsingDb.cc:34
SiStripConfigDb::FedDescriptionsRange
FedDescriptions::range FedDescriptionsRange
Definition: SiStripConfigDb.h:116
dqmdumpme.last
last
Definition: dqmdumpme.py:56
generateTowerEtThresholdLUT.addr
addr
Definition: generateTowerEtThresholdLUT.py:57
FastFedCablingAnalysis::threshold_
static const float threshold_
Definition: FastFedCablingAnalysis.h:83
errors
Definition: errors.py:1
SiStripFecKey::terse
void terse(std::stringstream &ss) const override
Definition: SiStripFecKey.cc:709
FastFedCablingHistosUsingDb::update
void update(SiStripConfigDb::FedConnectionsV &, SiStripConfigDb::FedDescriptionsRange, SiStripConfigDb::DeviceDescriptionsRange, SiStripConfigDb::DcuDetIdsRange)
Definition: FastFedCablingHistosUsingDb.cc:91
mps_fire.end
end
Definition: mps_fire.py:242
FastFedCablingHistosUsingDb::connections
void connections(SiStripConfigDb::DeviceDescriptionsRange, SiStripConfigDb::DcuDetIdsRange)
Definition: FastFedCablingHistosUsingDb.cc:401
SiStripConfigDb::DeviceAddress::fecSlot_
uint16_t fecSlot_
Definition: SiStripConfigDb.h:146
SiStripConfigDb::uploadFedConnections
void uploadFedConnections(std::string partition="")
Definition: FedConnections.cc:196
SiStripFecKey
Utility class that identifies a position within the strip tracker control structure,...
Definition: SiStripFecKey.h:45
sistrip::mlCabling_
static const char mlCabling_[]
Definition: ConstantsForLogger.h:14
edm::ParameterSet
Definition: ParameterSet.h:47
SiStripConfigDb::FedConnectionsV
std::vector< FedConnection * > FedConnectionsV
Definition: SiStripConfigDb.h:104
SiStripConfigDb::DeviceAddress::fecCrate_
uint16_t fecCrate_
Definition: SiStripConfigDb.h:145
SiStripDbParams::partitions
const_iterator_range partitions() const
Definition: SiStripDbParams.h:178
SiStripFedKey::feUnit
const uint16_t & feUnit() const
Definition: SiStripFedKey.h:189
CommissioningHistosUsingDb::doUploadConf
bool doUploadConf() const
Definition: CommissioningHistosUsingDb.h:91
edm::LogError
Log< level::Error, false > LogError
Definition: MessageLogger.h:123
SiStripConfigDb::DeviceAddress::i2cAddr_
uint16_t i2cAddr_
Definition: SiStripConfigDb.h:151
submitPVResolutionJobs.desc
string desc
Definition: submitPVResolutionJobs.py:251
SiStripFecKey::i2cAddr
const uint16_t & i2cAddr() const
Definition: SiStripFecKey.h:204
FastFedCablingHistograms::FastFedCablingHistograms
FastFedCablingHistograms(const edm::ParameterSet &pset, DQMStore *)
Definition: FastFedCablingHistograms.cc:20
edm::LogVerbatim
Log< level::Info, true > LogVerbatim
Definition: MessageLogger.h:128
officialStyle.chan
chan
lumi = TPaveText(lowX+0.38, lowY+0.061, lowX+0.45, lowY+0.161, "NDC") lumi.SetBorderSize( 0 ) lumi....
Definition: officialStyle.py:106
FastFedCablingAnalysis::dirtyThreshold_
static const float dirtyThreshold_
Definition: FastFedCablingAnalysis.h:86
edm::ParameterSet::getParameter
T getParameter(std::string const &) const
Definition: ParameterSet.h:303
SiStripConfigDb::DeviceAddress::fecRing_
uint16_t fecRing_
Definition: SiStripConfigDb.h:147
sistrip::FEDCH_PER_FED
static const uint16_t FEDCH_PER_FED
Definition: ConstantsForHardwareSystems.h:30
CommissioningHistosUsingDb::db
SiStripConfigDb *const db() const
Definition: CommissioningHistosUsingDb.h:93
SiStripConfigDb::DeviceAddress
Definition: SiStripConfigDb.h:141
RunInfoPI::valid
Definition: RunInfoPayloadInspectoHelper.h:16
SiStripConfigDb::DeviceAddress::ccuAddr_
uint16_t ccuAddr_
Definition: SiStripConfigDb.h:148
LogTrace
#define LogTrace(id)
Definition: MessageLogger.h:224
combine.missing
missing
Definition: combine.py:5
conversion_template_cfg.anal
anal
Definition: conversion_template_cfg.py:16
SiStripConfigDb::getDcuDetIds
DcuDetIdsRange getDcuDetIds(std::string partition="")
Definition: DcuDetIds.cc:10
crabWrapper.key
key
Definition: crabWrapper.py:19
TauDecayModes.dec
dec
Definition: TauDecayModes.py:143
SiStripConfigDb::DeviceAddress::ccuChan_
uint16_t ccuChan_
Definition: SiStripConfigDb.h:149
SiStripFedKey::feChan
const uint16_t & feChan() const
Definition: SiStripFedKey.h:190
MillePedeFileConverter_cfg.e
e
Definition: MillePedeFileConverter_cfg.py:37
pixel_dqm_sourceclient-live_cfg.enabled
enabled
Definition: pixel_dqm_sourceclient-live_cfg.py:136