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L1GtHwValidation Class Reference

#include <L1GtHwValidation.h>

Inheritance diagram for L1GtHwValidation:
DQMEDAnalyzer edm::stream::EDProducer< edm::GlobalCache< DQMEDAnalyzerGlobalCache >, edm::EndRunProducer, edm::EndLuminosityBlockProducer, edm::Accumulator >

Public Member Functions

 L1GtHwValidation (const edm::ParameterSet &)
 
 ~L1GtHwValidation () override
 
- Public Member Functions inherited from DQMEDAnalyzer
void accumulate (edm::Event const &event, edm::EventSetup const &setup) final
 
void beginLuminosityBlock (edm::LuminosityBlock const &lumi, edm::EventSetup const &setup) final
 
void beginRun (edm::Run const &run, edm::EventSetup const &setup) final
 
void beginStream (edm::StreamID id) final
 
virtual void dqmBeginRun (edm::Run const &, edm::EventSetup const &)
 
 DQMEDAnalyzer ()
 
void endLuminosityBlock (edm::LuminosityBlock const &lumi, edm::EventSetup const &setup) final
 
void endRun (edm::Run const &run, edm::EventSetup const &setup) final
 
virtual bool getCanSaveByLumi ()
 
- Public Member Functions inherited from edm::stream::EDProducer< edm::GlobalCache< DQMEDAnalyzerGlobalCache >, edm::EndRunProducer, edm::EndLuminosityBlockProducer, edm::Accumulator >
 EDProducer ()=default
 
bool hasAbilityToProduceInBeginLumis () const final
 
bool hasAbilityToProduceInBeginProcessBlocks () const final
 
bool hasAbilityToProduceInBeginRuns () const final
 
bool hasAbilityToProduceInEndLumis () const final
 
bool hasAbilityToProduceInEndProcessBlocks () const final
 
bool hasAbilityToProduceInEndRuns () const final
 

Protected Member Functions

void bookHistograms (DQMStore::IBooker &ibooker, const edm::Run &, const edm::EventSetup &) override
 
- Protected Member Functions inherited from DQMEDAnalyzer
uint64_t meId () const
 

Private Member Functions

void analyze (const edm::Event &, const edm::EventSetup &) override
 
virtual void compareDaqRecord (const edm::Event &, const edm::EventSetup &)
 L1 GT DAQ record comparison. More...
 
virtual void compareEvmRecord (const edm::Event &, const edm::EventSetup &)
 L1 GT EVM record comparison. More...
 
virtual void compareFDL (const edm::Event &, const edm::EventSetup &, const L1GtFdlWord &, const L1GtFdlWord &, const int)
 compare the FDL board More...
 
virtual void compareGt_Gct (const edm::Event &, const edm::EventSetup &)
 
virtual void compareGTFE (const edm::Event &, const edm::EventSetup &, const L1GtfeWord &, const L1GtfeWord &, const int)
 compare the GTFE board More...
 
virtual void comparePSB (const edm::Event &, const edm::EventSetup &, const L1GtPsbWord &, const L1GtPsbWord &)
 compare the PSB board More...
 
virtual void compareTCS (const edm::Event &, const edm::EventSetup &, const L1TcsWord &, const L1TcsWord &)
 compare the TCS board More...
 
bool excludedAlgo (const int &) const
 exclusion status for algorithm with bit i More...
 
void excludedAlgoList ()
 exclude from comparison some bits with known disagreement - bit list More...
 
bool matchCondCategory (const L1GtConditionCategory &, const L1GtConditionCategory &)
 book all histograms for the module More...
 
bool matchCondL1GtObject (const std::vector< L1GtObject > &, const L1GtObject &)
 
bool matchCondType (const L1GtConditionType &, const L1GtConditionType &)
 

Private Attributes

bool m_agree
 internal members More...
 
bool m_dataOnly
 
bool m_dataOnlyMask
 
std::string m_dirName
 directory name for L1Extra plots More...
 
bool m_emulOnly
 
bool m_emulOnlyMask
 
std::vector< int > m_excludeAlgoTrigByBit
 exclude algorithm triggers from comparison data - emulator by algorithm bit number More...
 
std::vector< std::string > m_excludeAlgoTrigByName
 exclude algorithm triggers from comparison data - emulator by algorithm name More...
 
std::vector< edm::ParameterSet > m_excludeCondCategTypeObject
 
std::vector< int > m_excludedAlgoList
 
MonitorElement * m_excludedAlgorithmsAgreement
 
std::vector< L1GtConditionCategory > m_excludedCondCategory
 excluded condition categories More...
 
std::vector< L1GtConditionType > m_excludedCondType
 excluded condition types More...
 
std::vector< L1GtObject > m_excludedL1GtObject
 excluded L1 GT objects More...
 
MonitorElement * m_fdlDataAlgoDecision [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlDataAlgoDecision_Err [NumberOfGtRecords]
 
MonitorElement * m_fdlDataAlgoDecision_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlDataAlgoDecisionMask [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlDataAlgoDecisionMask_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlDataAlgoDecisionPrescaled [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlDataAlgoDecisionPrescaled_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlDataAlgoDecisionPrescaledMask_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlDataAlgoDecisionUnprescaled [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlDataAlgoDecisionUnprescaled_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlDataAlgoDecisionUnprescaledMask_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlDataEmul [TotalBxInEvent][NumberOfGtRecords]
 FDL (0 for DAQ, 1 for EVM record) More...
 
MonitorElement * m_fdlDataEmul_Err [NumberOfGtRecords]
 
MonitorElement * m_fdlDataEmulAlgoDecision [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlDataEmulAlgoDecision_Err [NumberOfGtRecords]
 
MonitorElement * m_fdlDataEmulAlgoDecisionMask [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlDataEmulAlgoDecisionPrescaled [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlDataEmulAlgoDecisionUnprescaled [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlDataEmulAlgoDecisionUnprescaledAllowed [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlDataEmulTechDecision [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlDataEmulTechDecision_Err [NumberOfGtRecords]
 
MonitorElement * m_fdlDataEmulTechDecisionMask [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlDataTechDecision [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlDataTechDecision_Err [NumberOfGtRecords]
 
MonitorElement * m_fdlDataTechDecisionMask [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlEmulAlgoDecision [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlEmulAlgoDecision_Err [NumberOfGtRecords]
 
MonitorElement * m_fdlEmulAlgoDecision_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlEmulAlgoDecisionMask [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlEmulAlgoDecisionMask_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlEmulAlgoDecisionPrescaled [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlEmulAlgoDecisionPrescaled_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlEmulAlgoDecisionPrescaledMask_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlEmulAlgoDecisionUnprescaled [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlEmulAlgoDecisionUnprescaled_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlEmulAlgoDecisionUnprescaledMask_NoMatch [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlEmulTechDecision [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_fdlEmulTechDecision_Err [NumberOfGtRecords]
 
MonitorElement * m_fdlEmulTechDecisionMask [TotalBxInEvent][NumberOfGtRecords]
 
MonitorElement * m_gtErrorFlag
 PSB. More...
 
MonitorElement * m_gtfeDataEmul [NumberOfGtRecords]
 histograms More...
 
edm::InputTag m_l1GctDataInputTag
 input tag for the L1 GCT hardware record More...
 
edm::InputTag m_l1GtDataDaqInputTag
 input tag for the L1 GT hardware DAQ record More...
 
edm::EDGetTokenT< L1GlobalTriggerReadoutRecord > m_l1GtDataDaqInputToken_
 
edm::InputTag m_l1GtDataEvmInputTag
 input tag for the L1 GT hardware EVM record More...
 
edm::EDGetTokenT< L1GlobalTriggerEvmReadoutRecord > m_l1GtDataEvmInputToken_
 
edm::InputTag m_l1GtEmulDaqInputTag
 input tag for the L1 GT emulator DAQ record More...
 
edm::EDGetTokenT< L1GlobalTriggerReadoutRecord > m_l1GtEmulDaqInputToken_
 
edm::InputTag m_l1GtEmulEvmInputTag
 input tag for the L1 GT emulator EVM record More...
 
edm::EDGetTokenT< L1GlobalTriggerEvmReadoutRecord > m_l1GtEmulEvmInputToken_
 
const L1GtTriggerMenu * m_l1GtMenu
 trigger menu More...
 
unsigned long long m_l1GtMenuCacheID
 
const L1GtPrescaleFactors * m_l1GtPfAlgo
 prescale factors More...
 
unsigned long long m_l1GtPfAlgoCacheID
 
const L1GtPrescaleFactors * m_l1GtPfTech
 
unsigned long long m_l1GtPfTechCacheID
 
const L1GtTriggerMask * m_l1GtTmAlgo
 trigger masks More...
 
unsigned long long m_l1GtTmAlgoCacheID
 
const L1GtTriggerMask * m_l1GtTmTech
 
unsigned long long m_l1GtTmTechCacheID
 
std::ostringstream m_myCoutStream
 
int m_nrDataEventError
 counters More...
 
int m_nrEmulEventError
 
int m_nrEvJob
 
int m_nrEvRun
 
const std::vector< std::vector< int > > * m_prescaleFactorsAlgoTrig
 
const std::vector< std::vector< int > > * m_prescaleFactorsTechTrig
 
std::vector< unsigned int > m_triggerMaskAlgoTrig
 
std::vector< unsigned int > m_triggerMaskTechTrig
 

Static Private Attributes

static const int NumberOfGtRecords = 2
 
static const int TotalBxInEvent = 5
 

Additional Inherited Members

- Public Types inherited from DQMEDAnalyzer
typedef dqm::reco::DQMStore DQMStore
 
typedef dqm::reco::MonitorElement MonitorElement
 
- Public Types inherited from edm::stream::EDProducer< edm::GlobalCache< DQMEDAnalyzerGlobalCache >, edm::EndRunProducer, edm::EndLuminosityBlockProducer, edm::Accumulator >
typedef CacheContexts< T... > CacheTypes
 
typedef CacheTypes::GlobalCache GlobalCache
 
typedef AbilityChecker< T... > HasAbility
 
typedef CacheTypes::LuminosityBlockCache LuminosityBlockCache
 
typedef LuminosityBlockContextT< LuminosityBlockCache, RunCache, GlobalCache > LuminosityBlockContext
 
typedef CacheTypes::LuminosityBlockSummaryCache LuminosityBlockSummaryCache
 
typedef CacheTypes::RunCache RunCache
 
typedef RunContextT< RunCache, GlobalCache > RunContext
 
typedef CacheTypes::RunSummaryCache RunSummaryCache
 
- Static Public Member Functions inherited from DQMEDAnalyzer
static void globalEndJob (DQMEDAnalyzerGlobalCache const *)
 
static void globalEndLuminosityBlockProduce (edm::LuminosityBlock &lumi, edm::EventSetup const &setup, LuminosityBlockContext const *context)
 
static void globalEndRunProduce (edm::Run &run, edm::EventSetup const &setup, RunContext const *context)
 
static std::unique_ptr< DQMEDAnalyzerGlobalCache > initializeGlobalCache (edm::ParameterSet const &)
 
- Protected Attributes inherited from DQMEDAnalyzer
edm::EDPutTokenT< DQMToken > lumiToken_
 
edm::EDPutTokenT< DQMToken > runToken_
 
unsigned int streamId_
 

Detailed Description

Description: compare hardware records with emulator records for L1 GT records.

Implementation: Get the L1 GT records from data and from emulator.
Compare every board between data and emulator.

Author
: Vasile Mihai Ghete - HEPHY Vienna

$Date$

Description: compare hardware records with emulator records for L1 GT records.

Implementation: Get the L1 GT records from data and from emulator.
Compare every board between data and emulator.

Author
: Vasile Mihai Ghete - HEPHY Vienna

Definition at line 55 of file L1GtHwValidation.h.

Constructor & Destructor Documentation

◆ L1GtHwValidation()

L1GtHwValidation::L1GtHwValidation ( const edm::ParameterSet &  paramSet)
explicit

Definition at line 52 of file L1GtHwValidation.cc.

53  : //
54  // input tag for the L1 GT hardware DAQ record
55  m_l1GtDataDaqInputTag(paramSet.getParameter<edm::InputTag>("L1GtDataDaqInputTag")),
56  // input tag for the L1 GT hardware EVM record
57  m_l1GtDataEvmInputTag(paramSet.getParameter<edm::InputTag>("L1GtDataEvmInputTag")),
58  // input tag for the L1 GT emulator DAQ record
59  m_l1GtEmulDaqInputTag(paramSet.getParameter<edm::InputTag>("L1GtEmulDaqInputTag")),
60  // input tag for the L1 GT emulator EVM record
61  m_l1GtEmulEvmInputTag(paramSet.getParameter<edm::InputTag>("L1GtEmulEvmInputTag")),
62  // input tag for the L1 GCT hardware record
63  m_l1GctDataInputTag(paramSet.getParameter<edm::InputTag>("L1GctDataInputTag")),
64  //
65  m_dirName(paramSet.getUntrackedParameter("DirName", std::string("L1TEMU/GTexpert"))),
66  //
67  m_excludeCondCategTypeObject(
68  paramSet.getParameter<std::vector<edm::ParameterSet> >("ExcludeCondCategTypeObject")),
69  //
70  m_excludeAlgoTrigByName(paramSet.getParameter<std::vector<std::string> >("ExcludeAlgoTrigByName")),
71  //
72  m_excludeAlgoTrigByBit(paramSet.getParameter<std::vector<int> >("ExcludeAlgoTrigByBit")),
73  //
74  // initialize counters
75  m_nrDataEventError(0),
76  m_nrEmulEventError(0),
77  // cache
78  m_l1GtMenuCacheID(0ULL),
79  m_l1GtPfAlgoCacheID(0ULL),
80  m_l1GtPfTechCacheID(0ULL),
81  m_l1GtTmAlgoCacheID(0ULL),
82  m_l1GtTmTechCacheID(0ULL),
83  //
84  m_agree(true),
85  m_dataOnly(false),
86  m_emulOnly(false),
87  m_dataOnlyMask(false),
88  m_emulOnlyMask(false),
89  //
90  m_nrEvJob(0),
91  m_nrEvRun(0) {
92  for (std::vector<edm::ParameterSet>::const_iterator itExclud = m_excludeCondCategTypeObject.begin();
93  itExclud != m_excludeCondCategTypeObject.end();
94  ++itExclud) {
95  if (!(itExclud->getParameter<std::string>("ExcludedCondCategory")).empty()) {
96  m_excludedCondCategory.push_back(
97  l1GtConditionCategoryStringToEnum(itExclud->getParameter<std::string>("ExcludedCondCategory")));
98 
99  } else {
100  m_excludedCondCategory.push_back(CondNull);
101  }
102 
103  if (!(itExclud->getParameter<std::string>("ExcludedCondType")).empty()) {
104  m_excludedCondType.push_back(
105  l1GtConditionTypeStringToEnum(itExclud->getParameter<std::string>("ExcludedCondType")));
106 
107  } else {
108  m_excludedCondType.push_back(TypeNull);
109  }
110 
111  if (!(itExclud->getParameter<std::string>("ExcludedL1GtObject")).empty()) {
112  m_excludedL1GtObject.push_back(l1GtObjectStringToEnum(itExclud->getParameter<std::string>("ExcludedL1GtObject")));
113 
114  } else {
115  m_excludedL1GtObject.push_back(ObjNull);
116  }
117  }
118 
119  LogDebug("L1GtHwValidation") << "\nInput tag for the L1 GT DAQ hardware record: " << m_l1GtDataDaqInputTag
120  << "\nInput tag for the L1 GT EVM hardware record: " << m_l1GtDataEvmInputTag
121  << "\nInput tag for the L1 GT DAQ emulator records: " << m_l1GtEmulDaqInputTag
122  << "\nInput tag for the L1 GT EVM emulator records: " << m_l1GtEmulEvmInputTag
123  << "\nInput tag for the L1 GCT hardware record: " << m_l1GctDataInputTag
124  << std::endl;
125 
126  // FIXME print in debug mode ExcludeCondCategTypeObject, ExcludeAlgoTrigByName, etc
127 
128  //set Token(-s)
129  m_l1GtDataDaqInputToken_ =
130  consumes<L1GlobalTriggerReadoutRecord>(paramSet.getParameter<edm::InputTag>("L1GtDataDaqInputTag"));
131  m_l1GtEmulDaqInputToken_ =
132  consumes<L1GlobalTriggerReadoutRecord>(paramSet.getParameter<edm::InputTag>("L1GtEmulDaqInputTag"));
133  m_l1GtDataEvmInputToken_ =
134  consumes<L1GlobalTriggerEvmReadoutRecord>(paramSet.getParameter<edm::InputTag>("L1GtDataEvmInputTag"));
135  m_l1GtEmulEvmInputToken_ =
136  consumes<L1GlobalTriggerEvmReadoutRecord>(paramSet.getParameter<edm::InputTag>("L1GtEmulEvmInputTag"));
137 }

References CondNull, edm::ParameterSet::getParameter(), l1GtConditionCategoryStringToEnum(), l1GtConditionTypeStringToEnum(), l1GtObjectStringToEnum(), LogDebug, m_excludeCondCategTypeObject, m_excludedCondCategory, m_excludedCondType, m_excludedL1GtObject, m_l1GctDataInputTag, m_l1GtDataDaqInputTag, m_l1GtDataDaqInputToken_, m_l1GtDataEvmInputTag, m_l1GtDataEvmInputToken_, m_l1GtEmulDaqInputTag, m_l1GtEmulDaqInputToken_, m_l1GtEmulEvmInputTag, m_l1GtEmulEvmInputToken_, ObjNull, AlCaHLTBitMon_QueryRunRegistry::string, and TypeNull.

◆ ~L1GtHwValidation()

L1GtHwValidation::~L1GtHwValidation ( )
override

Definition at line 140 of file L1GtHwValidation.cc.

140  {
141  // empty
142 }

Member Function Documentation

◆ analyze()

void L1GtHwValidation::analyze ( const edm::Event &  iEvent,
const edm::EventSetup &  evSetup 
)
overrideprivatevirtual

Reimplemented from DQMEDAnalyzer.

Definition at line 2039 of file L1GtHwValidation.cc.

2039  {
2040  ++m_nrEvJob;
2041  ++m_nrEvRun;
2042 
2043  // L1 GT DAQ record comparison
2044  compareDaqRecord(iEvent, evSetup);
2045 
2046  // L1 GT EVM record comparison
2047  compareEvmRecord(iEvent, evSetup);
2048 
2049  // GCT collections from L1 GT PSB versus unpacked GCT
2050  compareGt_Gct(iEvent, evSetup);
2051 }

References compareDaqRecord(), compareEvmRecord(), compareGt_Gct(), iEvent, m_nrEvJob, and m_nrEvRun.

◆ bookHistograms()

void L1GtHwValidation::bookHistograms ( DQMStore::IBooker &  ibooker,
const edm::Run &  iRun,
const edm::EventSetup &  evSetup 
)
overrideprotectedvirtual

Implements DQMEDAnalyzer.

Definition at line 146 of file L1GtHwValidation.cc.

148  {
149  ibooker.setCurrentFolder(m_dirName);
150 
151  // histograms
152 
153  const unsigned int numberTechTriggers = L1GlobalTriggerReadoutSetup::NumberTechnicalTriggers;
154 
155  const unsigned int numberAlgoTriggers = L1GlobalTriggerReadoutSetup::NumberPhysTriggers;
156 
157  for (int iRec = 0; iRec < NumberOfGtRecords; ++iRec) {
158  std::string recString;
159  if (iRec == 0) {
160  recString = "Daq_";
161  ibooker.setCurrentFolder(m_dirName + "/DAQ/");
162 
163  } else {
164  recString = "Evm_";
165  ibooker.setCurrentFolder(m_dirName + "/EVM/");
166  }
167 
168  std::string hName;
169  const char* histName;
170 
171  hName = recString + "gtfeDataEmul";
172  histName = hName.c_str();
173 
174  // GTFE histograms
175  m_gtfeDataEmul[iRec] = ibooker.book1D(histName, "GTFE data vs emul mismatch", 8, 0., 7.);
176  m_gtfeDataEmul[iRec]->setBinLabel(1, "BoardId", 1);
177  m_gtfeDataEmul[iRec]->setBinLabel(2, "RecordLength1", 1);
178  m_gtfeDataEmul[iRec]->setBinLabel(3, "RecordLength0", 1);
179  m_gtfeDataEmul[iRec]->setBinLabel(4, "BxNr", 1);
180  m_gtfeDataEmul[iRec]->setBinLabel(5, "SetupVersion", 1);
181  m_gtfeDataEmul[iRec]->setBinLabel(6, "DaqActiveBoards", 1);
182  m_gtfeDataEmul[iRec]->setBinLabel(7, "AltNrBxBoard", 1);
183  m_gtfeDataEmul[iRec]->setBinLabel(8, "TotalTriggerNr", 1);
184 
185  // FDL histograms
186 
187  for (int iHist = 0; iHist < TotalBxInEvent; ++iHist) {
188  // convert [0, TotalBxInEvent] to [-X, +X] and add to histogram name
189  int iIndex = iHist - ((TotalBxInEvent + 1) / 2 - 1);
190  int hIndex = (iIndex + 16) % 16;
191 
192  std::stringstream ss;
193  std::string str;
194  ss << std::uppercase << std::hex << hIndex;
195  ss >> str;
196 
197  if (iRec == 0) {
198  ibooker.setCurrentFolder(m_dirName + "/DAQ/BxInEvent_" + str);
199 
200  } else {
201  ibooker.setCurrentFolder(m_dirName + "/EVM/BxInEvent_" + str);
202  }
203 
204  hName = recString + "FdlDataEmul_" + str;
205  histName = hName.c_str();
206 
207  std::string hTitle = "FDL data vs emul mismatch for BxInEvent = " + str;
208  const char* histTitle = hTitle.c_str();
209 
210  //
211 
212  m_fdlDataEmul[iHist][iRec] = ibooker.book1D(histName, histTitle, 13, 0., 13.);
213  m_fdlDataEmul[iHist][iRec]->setBinLabel(1, "BoardId", 1);
214  m_fdlDataEmul[iHist][iRec]->setBinLabel(2, "BxInEvent", 1);
215  m_fdlDataEmul[iHist][iRec]->setBinLabel(3, "BxNr", 1);
216  m_fdlDataEmul[iHist][iRec]->setBinLabel(4, "EventNr", 1);
217  m_fdlDataEmul[iHist][iRec]->setBinLabel(5, "TechTrigger", 1);
218  m_fdlDataEmul[iHist][iRec]->setBinLabel(6, "TechTriggerMask", 1);
219  m_fdlDataEmul[iHist][iRec]->setBinLabel(7, "AlgoTrigger", 1);
220  m_fdlDataEmul[iHist][iRec]->setBinLabel(8, "AlgoTriggerMask", 1);
221  m_fdlDataEmul[iHist][iRec]->setBinLabel(9, "AlgoExtend", 1);
222  m_fdlDataEmul[iHist][iRec]->setBinLabel(10, "NoAlgo", 1);
223  m_fdlDataEmul[iHist][iRec]->setBinLabel(11, "FinalORAllParts", 1);
224  m_fdlDataEmul[iHist][iRec]->setBinLabel(12, "FinalORPhysPart", 1);
225  m_fdlDataEmul[iHist][iRec]->setBinLabel(13, "LocalBxNr", 1);
226 
227  // algorithm decision
228  // data
229  hName = recString + "Data_AlgoDecision_" + str;
230  histName = hName.c_str();
231 
232  hTitle = "Data: algorithm decision word for BxInEvent = " + str;
233  histTitle = hTitle.c_str();
234 
235  m_fdlDataAlgoDecision[iHist][iRec] =
236  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
237 
238  // emul
239  hName = recString + "Emul_AlgoDecision_" + str;
240  histName = hName.c_str();
241 
242  hTitle = "Emul: algorithm decision word for BxInEvent = " + str;
243  histTitle = hTitle.c_str();
244 
245  m_fdlEmulAlgoDecision[iHist][iRec] =
246  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
247 
248  // algorithm decision for prescaled algorithms
249  // data
250  hName = recString + "Data_AlgoDecision_Prescaled_" + str;
251  histName = hName.c_str();
252 
253  hTitle = "Data: prescaled algorithms: algorithm decision for BxInEvent = " + str;
254  histTitle = hTitle.c_str();
255 
256  m_fdlDataAlgoDecisionPrescaled[iHist][iRec] =
257  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
258 
259  // emul
260  hName = recString + "Emul_AlgoDecision_Prescaled_" + str;
261  histName = hName.c_str();
262 
263  hTitle = "Emul: prescaled algorithms: algorithm decision for BxInEvent = " + str;
264  histTitle = hTitle.c_str();
265 
266  m_fdlEmulAlgoDecisionPrescaled[iHist][iRec] =
267  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
268 
269  // algorithm decision for unprescaled algorithms
270  // data
271  hName = recString + "Data_AlgoDecision_Unprescaled_" + str;
272  histName = hName.c_str();
273 
274  hTitle = "Data: unprescaled algorithms: algorithm decision for BxInEvent = " + str;
275  histTitle = hTitle.c_str();
276 
277  m_fdlDataAlgoDecisionUnprescaled[iHist][iRec] =
278  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
279 
280  // emul
281  hName = recString + "Emul_AlgoDecision_Unprescaled_" + str;
282  histName = hName.c_str();
283 
284  hTitle = "Emul: unprescaled algorithms: algorithm decision for BxInEvent = " + str;
285  histTitle = hTitle.c_str();
286 
287  m_fdlEmulAlgoDecisionUnprescaled[iHist][iRec] =
288  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
289 
290  // algorithm decision after masking (partition physics)
291  // data
292  hName = recString + "Data_AlgoDecisionAfterMask_" + str;
293  histName = hName.c_str();
294 
295  hTitle = "Data, physics partition: algorithm decision word after mask for BxInEvent = " + str;
296  histTitle = hTitle.c_str();
297 
298  m_fdlDataAlgoDecisionMask[iHist][iRec] =
299  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
300 
301  // emul
302  hName = recString + "Emul_AlgoDecisionAfterMask_" + str;
303  histName = hName.c_str();
304 
305  hTitle = "Emul, physics partition: algorithm decision word after mask for BxInEvent = " + str;
306  histTitle = hTitle.c_str();
307 
308  m_fdlEmulAlgoDecisionMask[iHist][iRec] =
309  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
310 
311  //
312  hName = recString + "DataEmul_AlgoDecision_" + str;
313  histName = hName.c_str();
314 
315  hTitle = "Data vs emul: non-matching algorithm decision word for BxInEvent = " + str;
316  histTitle = hTitle.c_str();
317 
318  m_fdlDataEmulAlgoDecision[iHist][iRec] =
319  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
320 
321  //
322  hName = recString + "DataEmul_AlgoDecision_Prescaled_" + str;
323  histName = hName.c_str();
324 
325  hTitle = "Data vs emul: prescaled algorithms with non-matching decision for BxInEvent = " + str;
326  histTitle = hTitle.c_str();
327 
328  m_fdlDataEmulAlgoDecisionPrescaled[iHist][iRec] =
329  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
330 
331  //
332  hName = recString + "DataEmul_AlgoDecision_Unprescaled_" + str;
333  histName = hName.c_str();
334 
335  hTitle = "Data vs emul: unprescaled algorithms with non-matching decision for BxInEvent = " + str;
336  histTitle = hTitle.c_str();
337 
338  m_fdlDataEmulAlgoDecisionUnprescaled[iHist][iRec] =
339  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
340 
341  //
342  hName = recString + "DataEmul_AlgoDecision_Unprescaled_Allowed_" + str;
343  histName = hName.c_str();
344 
345  hTitle = "Data vs emul: unprescaled algorithms not excluded with non-matching decision for BxInEvent = " + str;
346  histTitle = hTitle.c_str();
347 
348  m_fdlDataEmulAlgoDecisionUnprescaledAllowed[iHist][iRec] =
349  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
350 
351  //
352  hName = recString + "Data_AlgoDecision_NoMatch_" + str;
353  histName = hName.c_str();
354 
355  hTitle = "Data: algorithm decision for non-matching cases for BxInEvent = " + str;
356  histTitle = hTitle.c_str();
357 
358  m_fdlDataAlgoDecision_NoMatch[iHist][iRec] =
359  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
360 
361  //
362  hName = recString + "Emul_AlgoDecision_NoMatch_" + str;
363  histName = hName.c_str();
364 
365  hTitle = "Emul: algorithm decision for non-matching cases for BxInEvent = " + str;
366  histTitle = hTitle.c_str();
367 
368  m_fdlEmulAlgoDecision_NoMatch[iHist][iRec] =
369  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
370 
371  // prescaled algorithms
372  hName = recString + "Data_AlgoDecision_Prescaled_NoMatch_" + str;
373  histName = hName.c_str();
374 
375  hTitle = "Data: prescaled algorithms: non-matching algorithm decision for BxInEvent = " + str;
376  histTitle = hTitle.c_str();
377 
378  m_fdlDataAlgoDecisionPrescaled_NoMatch[iHist][iRec] =
379  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
380 
381  //
382  hName = recString + "Emul_AlgoDecision_Prescaled_NoMatch_" + str;
383  histName = hName.c_str();
384 
385  hTitle = "Emul: prescaled algorithms: non-matching algorithm decision for BxInEvent = " + str;
386  histTitle = hTitle.c_str();
387 
388  m_fdlEmulAlgoDecisionPrescaled_NoMatch[iHist][iRec] =
389  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
390 
391  // unprescaled algorithms - non-matching
392  hName = recString + "Data_AlgoDecision_Unprescaled_NoMatch_" + str;
393  histName = hName.c_str();
394 
395  hTitle = "Data: unprescaled algorithms: non-matching algorithm decision for BxInEvent = " + str;
396  histTitle = hTitle.c_str();
397 
398  m_fdlDataAlgoDecisionUnprescaled_NoMatch[iHist][iRec] =
399  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
400 
401  //
402  hName = recString + "Emul_AlgoDecision_Unprescaled_NoMatch_" + str;
403  histName = hName.c_str();
404 
405  hTitle = "Emul: unprescaled algorithms: non-matching algorithm decision for BxInEvent = " + str;
406  histTitle = hTitle.c_str();
407 
408  m_fdlEmulAlgoDecisionUnprescaled_NoMatch[iHist][iRec] =
409  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
410 
411  //
412  hName = recString + "Data_AlgoDecisionMask_NoMatch_" + str;
413  histName = hName.c_str();
414 
415  hTitle = "Data: algorithm decision for non-matching cases after mask for BxInEvent = " + str;
416  histTitle = hTitle.c_str();
417 
418  m_fdlDataAlgoDecisionMask_NoMatch[iHist][iRec] =
419  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
420 
421  //
422  hName = recString + "Emul_AlgoDecisionMask_NoMatch_" + str;
423  histName = hName.c_str();
424 
425  hTitle = "Emul: algorithm decision for non-matching cases after mask for BxInEvent = " + str;
426  histTitle = hTitle.c_str();
427 
428  m_fdlEmulAlgoDecisionMask_NoMatch[iHist][iRec] =
429  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
430 
431  // prescaled algorithms
432  hName = recString + "Data_AlgoDecisionMask_Prescaled_NoMatch_" + str;
433  histName = hName.c_str();
434 
435  hTitle = "Data: prescaled algorithms: non-matching algorithm decision after mask for BxInEvent = " + str;
436  histTitle = hTitle.c_str();
437 
438  m_fdlDataAlgoDecisionPrescaledMask_NoMatch[iHist][iRec] =
439  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
440 
441  //
442  hName = recString + "Emul_AlgoDecision_PrescaledMask_NoMatch_" + str;
443  histName = hName.c_str();
444 
445  hTitle = "Emul: prescaled algorithms: non-matching algorithm decision after mask for BxInEvent = " + str;
446  histTitle = hTitle.c_str();
447 
448  m_fdlEmulAlgoDecisionPrescaledMask_NoMatch[iHist][iRec] =
449  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
450 
451  // unprescaled algorithms - non-matching
452  hName = recString + "Data_AlgoDecision_UnprescaledMask_NoMatch_" + str;
453  histName = hName.c_str();
454 
455  hTitle = "Data: unprescaled algorithms: non-matching algorithm decision after mask for BxInEvent = " + str;
456  histTitle = hTitle.c_str();
457 
458  m_fdlDataAlgoDecisionUnprescaledMask_NoMatch[iHist][iRec] =
459  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
460 
461  //
462  hName = recString + "Emul_AlgoDecision_UnprescaledMask_NoMatch_" + str;
463  histName = hName.c_str();
464 
465  hTitle = "Emul: unprescaled algorithms: non-matching algorithm decision after mask for BxInEvent = " + str;
466  histTitle = hTitle.c_str();
467 
468  m_fdlEmulAlgoDecisionUnprescaledMask_NoMatch[iHist][iRec] =
469  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
470 
471  //
472  hName = recString + "DataEmul_AlgoDecisionAfterMask_" + str;
473  histName = hName.c_str();
474 
475  hTitle =
476  "Data vs emul, physics partition: non-matching algorithm decision word after mask for BxInEvent = " + str;
477  histTitle = hTitle.c_str();
478 
479  m_fdlDataEmulAlgoDecisionMask[iHist][iRec] =
480  ibooker.book1D(histName, histTitle, numberAlgoTriggers, 0., numberAlgoTriggers);
481 
482  // technical trigger decision
483  // data
484  hName = recString + "Data_TechDecision_" + str;
485  histName = hName.c_str();
486 
487  hTitle = "Data technical trigger decision word for BxInEvent = " + str;
488  histTitle = hTitle.c_str();
489 
490  m_fdlDataTechDecision[iHist][iRec] =
491  ibooker.book1D(histName, histTitle, numberTechTriggers, 0., numberTechTriggers);
492 
493  // emul
494  hName = recString + "Emul_TechDecision_" + str;
495  histName = hName.c_str();
496 
497  hTitle = "Emul: technical trigger decision word for BxInEvent = " + str;
498  histTitle = hTitle.c_str();
499 
500  m_fdlEmulTechDecision[iHist][iRec] =
501  ibooker.book1D(histName, histTitle, numberTechTriggers, 0., numberTechTriggers);
502 
503  // technical trigger decision after masking (partition physics)
504  hName = recString + "Data_TechDecisionAfterMask_" + str;
505  histName = hName.c_str();
506 
507  hTitle = "Data technical trigger decision word after mask for BxInEvent = " + str;
508  histTitle = hTitle.c_str();
509 
510  m_fdlDataTechDecisionMask[iHist][iRec] =
511  ibooker.book1D(histName, histTitle, numberTechTriggers, 0., numberTechTriggers);
512 
513  //
514  hName = recString + "Emul_TechDecisionAfterMask_" + str;
515  histName = hName.c_str();
516 
517  hTitle = "Emul: technical trigger decision word after mask for BxInEvent = " + str;
518  histTitle = hTitle.c_str();
519 
520  m_fdlEmulTechDecisionMask[iHist][iRec] =
521  ibooker.book1D(histName, histTitle, numberTechTriggers, 0., numberTechTriggers);
522 
523  //
524  hName = recString + "DataEmul_TechDecision_" + str;
525  histName = hName.c_str();
526 
527  hTitle = "Data vs emul: non-matching technical trigger decision word for BxInEvent = " + str;
528  histTitle = hTitle.c_str();
529 
530  m_fdlDataEmulTechDecision[iHist][iRec] =
531  ibooker.book1D(histName, histTitle, numberTechTriggers, 0., numberTechTriggers);
532 
533  hName = recString + "DataEmul_TechDecisionAfterMask_" + str;
534  histName = hName.c_str();
535 
536  hTitle = "Data vs emul: non-matching technical trigger decision word after mask for BxInEvent = " + str;
537  histTitle = hTitle.c_str();
538 
539  m_fdlDataEmulTechDecisionMask[iHist][iRec] =
540  ibooker.book1D(histName, histTitle, numberTechTriggers, 0., numberTechTriggers);
541  }
542 
543  if (iRec == 0) {
544  ibooker.setCurrentFolder(m_dirName + "/DAQ/");
545 
546  } else {
547  ibooker.setCurrentFolder(m_dirName + "/EVM/");
548  }
549 
550  hName = recString + "FdlDataEmul_Err";
551  histName = hName.c_str();
552 
553  m_fdlDataEmul_Err[iRec] =
554  ibooker.book1D(histName, "FDL data vs emul mismatch for non-matching BxInEvent in FDL payload", 13, 0., 13.);
555  m_fdlDataEmul_Err[iRec]->setBinLabel(1, "BoardId", 1);
556  m_fdlDataEmul_Err[iRec]->setBinLabel(2, "BxInEvent", 1);
557  m_fdlDataEmul_Err[iRec]->setBinLabel(3, "BxNr", 1);
558  m_fdlDataEmul_Err[iRec]->setBinLabel(4, "EventNr", 1);
559  m_fdlDataEmul_Err[iRec]->setBinLabel(5, "TechTrigger", 1);
560  m_fdlDataEmul_Err[iRec]->setBinLabel(6, "TechTriggerMask", 1);
561  m_fdlDataEmul_Err[iRec]->setBinLabel(7, "AlgoTrigger", 1);
562  m_fdlDataEmul_Err[iRec]->setBinLabel(8, "AlgoTriggerMask", 1);
563  m_fdlDataEmul_Err[iRec]->setBinLabel(9, "AlgoExtend", 1);
564  m_fdlDataEmul_Err[iRec]->setBinLabel(10, "NoAlgo", 1);
565  m_fdlDataEmul_Err[iRec]->setBinLabel(11, "FinalORAllParts", 1);
566  m_fdlDataEmul_Err[iRec]->setBinLabel(12, "FinalORPhysPart", 1);
567  m_fdlDataEmul_Err[iRec]->setBinLabel(13, "LocalBxNr", 1);
568 
569  hName = recString + "FdlDataAlgoDecision_Err";
570  histName = hName.c_str();
571 
572  m_fdlDataAlgoDecision_Err[iRec] = ibooker.book1D(histName,
573  "Data: algorithm trigger decision word, non-matching BxInEvent",
574  numberAlgoTriggers,
575  0.,
576  numberAlgoTriggers);
577 
578  //
579  hName = recString + "Emul_AlgoDecision_Err";
580  histName = hName.c_str();
581 
582  m_fdlEmulAlgoDecision_Err[iRec] = ibooker.book1D(histName,
583  "Emul: algorithm trigger decision word, non-matching BxInEvent",
584  numberAlgoTriggers,
585  0.,
586  numberAlgoTriggers);
587 
588  hName = recString + "DataEmul_AlgoDecision_Err";
589  histName = hName.c_str();
590 
591  m_fdlDataEmulAlgoDecision_Err[iRec] =
592  ibooker.book1D(histName,
593  "Data vs emul: algorithm trigger decision word, non-matching BxInEvent",
594  numberAlgoTriggers,
595  0.,
596  numberAlgoTriggers);
597 
598  //
599  hName = recString + "Data_TechDecision_Err";
600  histName = hName.c_str();
601 
602  m_fdlDataTechDecision_Err[iRec] = ibooker.book1D(histName,
603  "Data: technical trigger decision word, non-matching BxInEvent",
604  numberTechTriggers,
605  0.,
606  numberTechTriggers);
607 
608  hName = recString + "Emul_TechDecision_Err";
609  histName = hName.c_str();
610 
611  m_fdlEmulTechDecision_Err[iRec] = ibooker.book1D(histName,
612  "Emul: technical trigger decision word, non-matching BxInEvent",
613  numberTechTriggers,
614  0.,
615  numberTechTriggers);
616 
617  hName = recString + "DataEmul_TechDecision_Err";
618  histName = hName.c_str();
619 
620  m_fdlDataEmulTechDecision_Err[iRec] =
621  ibooker.book1D(histName,
622  "Data vs emul: technical trigger decision word, non-matching BxInEvent",
623  numberTechTriggers,
624  0.,
625  numberTechTriggers);
626  }
627 
628  ibooker.setCurrentFolder(m_dirName);
629 
630  //
631  m_excludedAlgorithmsAgreement = ibooker.book1D("ExcludedAlgorithmsFromAgreement",
632  "Algorithms excluded from data versus emulator agreement flag",
633  numberAlgoTriggers,
634  0.,
635  numberAlgoTriggers);
636 
637  //
638 
639  m_gtErrorFlag = ibooker.book1D("GTErrorFlag", "L1 GT error flag for data versus emulator comparison", 5, 0., 5);
640 
641  m_gtErrorFlag->setBinLabel(1, "Agree", 1);
642  m_gtErrorFlag->setBinLabel(2, "", 1);
643  m_gtErrorFlag->setBinLabel(3, "", 1);
644  m_gtErrorFlag->setBinLabel(4, "Data only", 1);
645  m_gtErrorFlag->setBinLabel(5, "Emul only", 1);
646 
647  m_nrEvRun = 0;
648 
649  // get / update the trigger menu from the EventSetup
650  // local cache & check on cacheIdentifier
651 
652  unsigned long long l1GtMenuCacheID = evSetup.get<L1GtTriggerMenuRcd>().cacheIdentifier();
653 
654  if (m_l1GtMenuCacheID != l1GtMenuCacheID) {
655  edm::ESHandle<L1GtTriggerMenu> l1GtMenu;
656  evSetup.get<L1GtTriggerMenuRcd>().get(l1GtMenu);
657  m_l1GtMenu = l1GtMenu.product();
658 
659  // compute the list of algorithms excluded from the computing of the agreement flag
660  m_excludedAlgoList.clear();
661  excludedAlgoList();
662 
663  m_l1GtMenuCacheID = l1GtMenuCacheID;
664  }
665 
666  // FIXME when the menu changes, make a copy of histograms, and clear the old one
667  // otherwise the labels are wrong
668 
669  LogDebug("L1GtHwValidation") << "\nUsing L1 menu: \n " << m_l1GtMenu->gtTriggerMenuImplementation() << "\n"
670  << std::endl;
671 
672  const AlgorithmMap& algorithmMap = m_l1GtMenu->gtAlgorithmMap();
673 
674  for (CItAlgo itAlgo = algorithmMap.begin(); itAlgo != algorithmMap.end(); itAlgo++) {
675  const int algBitNumber = (itAlgo->second).algoBitNumber();
676 
677  std::stringstream ss;
678  std::string algBitString;
679  ss << std::uppercase << algBitNumber;
680  ss >> algBitString;
681 
682  const std::string& aName = algBitString + " " + itAlgo->first;
683  const char* algName = aName.c_str();
684 
685  for (int iRec = 0; iRec < NumberOfGtRecords; ++iRec) {
686  for (int iBxInEvent = 0; iBxInEvent < TotalBxInEvent; ++iBxInEvent) {
687  // convert [0, TotalBxInEvent] to [-X, +X]
688  int iIndex = iBxInEvent - ((TotalBxInEvent + 1) / 2 - 1);
689  int hIndex = (iIndex + 16) % 16;
690 
691  std::stringstream ss;
692  std::string str;
693  ss << std::uppercase << std::hex << hIndex;
694  ss >> str;
695 
696  if (iRec == 0) {
697  //if (m_dbe) {
698  ibooker.setCurrentFolder(m_dirName + "/DAQ/BxInEvent_" + str);
699  //}
700 
701  } else {
702  //if (m_dbe) {
703  ibooker.setCurrentFolder(m_dirName + "/EVM/BxInEvent_" + str);
704  //}
705  }
706 
707  m_fdlDataAlgoDecision[iBxInEvent][iRec]->setBinLabel(algBitNumber + 1, algName, 1);
708  m_fdlDataAlgoDecisionPrescaled[iBxInEvent][iRec]->setBinLabel(algBitNumber + 1, algName, 1);
709  m_fdlDataAlgoDecisionUnprescaled[iBxInEvent][iRec]->setBinLabel(algBitNumber + 1, algName, 1);
710  m_fdlDataAlgoDecisionMask[iBxInEvent][iRec]->setBinLabel(algBitNumber + 1, algName, 1);
711  m_fdlDataAlgoDecision_NoMatch[iBxInEvent][iRec]->setBinLabel(algBitNumber + 1, algName, 1);
712 
713  m_fdlEmulAlgoDecision[iBxInEvent][iRec]->setBinLabel(algBitNumber + 1, algName, 1);
714  m_fdlEmulAlgoDecisionPrescaled[iBxInEvent][iRec]->setBinLabel(algBitNumber + 1, algName, 1);
715  m_fdlEmulAlgoDecisionUnprescaled[iBxInEvent][iRec]->setBinLabel(algBitNumber + 1, algName, 1);
716  m_fdlEmulAlgoDecisionMask[iBxInEvent][iRec]->setBinLabel(algBitNumber + 1, algName, 1);
717  m_fdlEmulAlgoDecision_NoMatch[iBxInEvent][iRec]->setBinLabel(algBitNumber + 1, algName, 1);
718 
719  m_fdlDataEmulAlgoDecision[iBxInEvent][iRec]->setBinLabel(algBitNumber + 1, algName, 1);
720  m_fdlDataEmulAlgoDecisionPrescaled[iBxInEvent][iRec]->setBinLabel(algBitNumber + 1, algName, 1);
721  m_fdlDataEmulAlgoDecisionUnprescaled[iBxInEvent][iRec]->setBinLabel(algBitNumber + 1, algName, 1);
722  m_fdlDataEmulAlgoDecisionUnprescaledAllowed[iBxInEvent][iRec]->setBinLabel(algBitNumber + 1, algName, 1);
723  m_fdlDataEmulAlgoDecisionMask[iBxInEvent][iRec]->setBinLabel(algBitNumber + 1, algName, 1);
724  }
725 
726  if (iRec == 0) {
727  ibooker.setCurrentFolder(m_dirName + "/DAQ/");
728 
729  } else {
730  ibooker.setCurrentFolder(m_dirName + "/EVM/");
731  }
732 
733  m_fdlDataAlgoDecision_Err[iRec]->setBinLabel(algBitNumber + 1, algName, 1);
734 
735  m_fdlEmulAlgoDecision_Err[iRec]->setBinLabel(algBitNumber + 1, algName, 1);
736 
737  m_fdlDataEmulAlgoDecision_Err[iRec]->setBinLabel(algBitNumber + 1, algName, 1);
738  }
739 
740  //
741  for (std::vector<int>::const_iterator itAlgo = m_excludedAlgoList.begin(); itAlgo != m_excludedAlgoList.end();
742  ++itAlgo) {
743  if (algBitNumber == *itAlgo) {
744  m_excludedAlgorithmsAgreement->setBinLabel(algBitNumber + 1, algName, 1);
745  }
746  }
747  }
748 
749  // get / update the prescale factors from the EventSetup
750  // local cache & check on cacheIdentifier
751 
752  unsigned long long l1GtPfAlgoCacheID = evSetup.get<L1GtPrescaleFactorsAlgoTrigRcd>().cacheIdentifier();
753 
754  if (m_l1GtPfAlgoCacheID != l1GtPfAlgoCacheID) {
755  edm::ESHandle<L1GtPrescaleFactors> l1GtPfAlgo;
756  evSetup.get<L1GtPrescaleFactorsAlgoTrigRcd>().get(l1GtPfAlgo);
757  m_l1GtPfAlgo = l1GtPfAlgo.product();
758 
759  m_prescaleFactorsAlgoTrig = &(m_l1GtPfAlgo->gtPrescaleFactors());
760 
761  m_l1GtPfAlgoCacheID = l1GtPfAlgoCacheID;
762  }
763 
764  unsigned long long l1GtPfTechCacheID = evSetup.get<L1GtPrescaleFactorsTechTrigRcd>().cacheIdentifier();
765 
766  if (m_l1GtPfTechCacheID != l1GtPfTechCacheID) {
767  edm::ESHandle<L1GtPrescaleFactors> l1GtPfTech;
768  evSetup.get<L1GtPrescaleFactorsTechTrigRcd>().get(l1GtPfTech);
769  m_l1GtPfTech = l1GtPfTech.product();
770 
771  m_prescaleFactorsTechTrig = &(m_l1GtPfTech->gtPrescaleFactors());
772 
773  m_l1GtPfTechCacheID = l1GtPfTechCacheID;
774  }
775 
776  // get / update the trigger mask from the EventSetup
777  // local cache & check on cacheIdentifier
778 
779  unsigned long long l1GtTmAlgoCacheID = evSetup.get<L1GtTriggerMaskAlgoTrigRcd>().cacheIdentifier();
780 
781  if (m_l1GtTmAlgoCacheID != l1GtTmAlgoCacheID) {
782  edm::ESHandle<L1GtTriggerMask> l1GtTmAlgo;
783  evSetup.get<L1GtTriggerMaskAlgoTrigRcd>().get(l1GtTmAlgo);
784  m_l1GtTmAlgo = l1GtTmAlgo.product();
785 
786  m_triggerMaskAlgoTrig = m_l1GtTmAlgo->gtTriggerMask();
787 
788  m_l1GtTmAlgoCacheID = l1GtTmAlgoCacheID;
789  }
790 
791  unsigned long long l1GtTmTechCacheID = evSetup.get<L1GtTriggerMaskTechTrigRcd>().cacheIdentifier();
792 
793  if (m_l1GtTmTechCacheID != l1GtTmTechCacheID) {
794  edm::ESHandle<L1GtTriggerMask> l1GtTmTech;
795  evSetup.get<L1GtTriggerMaskTechTrigRcd>().get(l1GtTmTech);
796  m_l1GtTmTech = l1GtTmTech.product();
797 
798  m_triggerMaskTechTrig = m_l1GtTmTech->gtTriggerMask();
799 
800  m_l1GtTmTechCacheID = l1GtTmTechCacheID;
801  }
802 }

References dqm::implementation::IBooker::book1D(), excludedAlgoList(), edm::EventSetup::get(), get, L1GtTriggerMenu::gtAlgorithmMap(), L1GtPrescaleFactors::gtPrescaleFactors(), L1GtTriggerMask::gtTriggerMask(), L1GtTriggerMenu::gtTriggerMenuImplementation(), B2GTnPMonitor_cfi::histTitle, LogDebug, m_dirName, m_excludedAlgoList, m_excludedAlgorithmsAgreement, m_fdlDataAlgoDecision, m_fdlDataAlgoDecision_Err, m_fdlDataAlgoDecision_NoMatch, m_fdlDataAlgoDecisionMask, m_fdlDataAlgoDecisionMask_NoMatch, m_fdlDataAlgoDecisionPrescaled, m_fdlDataAlgoDecisionPrescaled_NoMatch, m_fdlDataAlgoDecisionPrescaledMask_NoMatch, m_fdlDataAlgoDecisionUnprescaled, m_fdlDataAlgoDecisionUnprescaled_NoMatch, m_fdlDataAlgoDecisionUnprescaledMask_NoMatch, m_fdlDataEmul, m_fdlDataEmul_Err, m_fdlDataEmulAlgoDecision, m_fdlDataEmulAlgoDecision_Err, m_fdlDataEmulAlgoDecisionMask, m_fdlDataEmulAlgoDecisionPrescaled, m_fdlDataEmulAlgoDecisionUnprescaled, m_fdlDataEmulAlgoDecisionUnprescaledAllowed, m_fdlDataEmulTechDecision, m_fdlDataEmulTechDecision_Err, m_fdlDataEmulTechDecisionMask, m_fdlDataTechDecision, m_fdlDataTechDecision_Err, m_fdlDataTechDecisionMask, m_fdlEmulAlgoDecision, m_fdlEmulAlgoDecision_Err, m_fdlEmulAlgoDecision_NoMatch, m_fdlEmulAlgoDecisionMask, m_fdlEmulAlgoDecisionMask_NoMatch, m_fdlEmulAlgoDecisionPrescaled, m_fdlEmulAlgoDecisionPrescaled_NoMatch, m_fdlEmulAlgoDecisionPrescaledMask_NoMatch, m_fdlEmulAlgoDecisionUnprescaled, m_fdlEmulAlgoDecisionUnprescaled_NoMatch, m_fdlEmulAlgoDecisionUnprescaledMask_NoMatch, m_fdlEmulTechDecision, m_fdlEmulTechDecision_Err, m_fdlEmulTechDecisionMask, m_gtErrorFlag, m_gtfeDataEmul, m_l1GtMenu, m_l1GtMenuCacheID, m_l1GtPfAlgo, m_l1GtPfAlgoCacheID, m_l1GtPfTech, m_l1GtPfTechCacheID, m_l1GtTmAlgo, m_l1GtTmAlgoCacheID, m_l1GtTmTech, m_l1GtTmTechCacheID, m_nrEvRun, m_prescaleFactorsAlgoTrig, m_prescaleFactorsTechTrig, m_triggerMaskAlgoTrig, m_triggerMaskTechTrig, NumberOfGtRecords, L1GlobalTriggerReadoutSetup::NumberPhysTriggers, L1GlobalTriggerReadoutSetup::NumberTechnicalTriggers, edm::ESHandle< T >::product(), dqm::impl::MonitorElement::setBinLabel(), dqm::implementation::NavigatorBase::setCurrentFolder(), contentValuesCheck::ss, str, AlCaHLTBitMon_QueryRunRegistry::string, and TotalBxInEvent.

◆ compareDaqRecord()

void L1GtHwValidation::compareDaqRecord ( const edm::Event &  iEvent,
const edm::EventSetup &  evSetup 
)
privatevirtual

L1 GT DAQ record comparison.

Definition at line 1803 of file L1GtHwValidation.cc.

1803  {
1804  // formal index for DAQ record
1805  int iRec = 0;
1806 
1807  // reset the flags - they are used for DAQ recor only
1808  m_agree = true;
1809  m_dataOnly = false;
1810  m_emulOnly = false;
1811  m_dataOnlyMask = false;
1812  m_emulOnlyMask = false;
1813 
1814  // get the L1 GT hardware DAQ record L1GlobalTriggerReadoutRecord
1815  edm::Handle<L1GlobalTriggerReadoutRecord> gtReadoutRecordData;
1816  iEvent.getByToken(m_l1GtDataDaqInputToken_, gtReadoutRecordData);
1817 
1818  bool validData = false;
1819 
1820  if (!gtReadoutRecordData.isValid()) {
1821  m_nrDataEventError++;
1822  } else {
1823  validData = true;
1824  }
1825 
1826  // get the L1 GT emulator DAQ record L1GlobalTriggerReadoutRecord
1827  edm::Handle<L1GlobalTriggerReadoutRecord> gtReadoutRecordEmul;
1828  iEvent.getByToken(m_l1GtEmulDaqInputToken_, gtReadoutRecordEmul);
1829 
1830  bool validEmul = false;
1831 
1832  if (!gtReadoutRecordEmul.isValid()) {
1833  m_nrEmulEventError++;
1834  } else {
1835  validEmul = true;
1836  }
1837 
1838  if ((!validData) || (!validEmul)) {
1839  edm::LogWarning("L1GtHwValidation") << "\n No valid product found: DAQ L1GlobalTriggerReadoutRecord"
1840  << "\n Data validity [1 = true; 0 = false]: " << validData
1841  << "\n Emulator validity: [1 = true; 0 = false]: " << validEmul
1842  << "\n DAQ histograms will not be filled.\n"
1843  << std::endl;
1844 
1845  return;
1846  }
1847 
1848  // compare GTFE
1849  const L1GtfeWord& gtfeBlockData = gtReadoutRecordData->gtfeWord();
1850  const L1GtfeWord& gtfeBlockEmul = gtReadoutRecordEmul->gtfeWord();
1851 
1852  compareGTFE(iEvent, evSetup, gtfeBlockData, gtfeBlockEmul, iRec);
1853 
1854  // FDL comparison
1855  const std::vector<L1GtFdlWord>& gtFdlVectorData = gtReadoutRecordData->gtFdlVector();
1856  const std::vector<L1GtFdlWord>& gtFdlVectorEmul = gtReadoutRecordEmul->gtFdlVector();
1857 
1858  int gtFdlVectorDataSize = gtFdlVectorData.size();
1859  int gtFdlVectorEmulSize = gtFdlVectorEmul.size();
1860 
1861  if (gtFdlVectorDataSize == gtFdlVectorEmulSize) {
1862  m_myCoutStream << "\nData and emulated FDL vector size: identical.\n";
1863  m_myCoutStream << " Size: " << gtFdlVectorDataSize << std::endl;
1864 
1865  for (int iFdl = 0; iFdl < gtFdlVectorDataSize; ++iFdl) {
1866  const L1GtFdlWord& fdlBlockData = gtFdlVectorData[iFdl];
1867  const L1GtFdlWord& fdlBlockEmul = gtFdlVectorEmul[iFdl];
1868 
1869  compareFDL(iEvent, evSetup, fdlBlockData, fdlBlockEmul, iRec);
1870  }
1871  } else {
1872  m_myCoutStream << "\nData and emulated FDL vector size: different.\n";
1873  m_myCoutStream << " Data: size = " << gtFdlVectorDataSize << std::endl;
1874  m_myCoutStream << " Emul: size = " << gtFdlVectorEmulSize << std::endl;
1875  }
1876 
1877  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1878 
1879  m_myCoutStream.str("");
1880  m_myCoutStream.clear();
1881 
1882  // PSB comparison
1883  const std::vector<L1GtPsbWord>& gtPsbVectorData = gtReadoutRecordData->gtPsbVector();
1884  const std::vector<L1GtPsbWord>& gtPsbVectorEmul = gtReadoutRecordEmul->gtPsbVector();
1885 
1886  int gtPsbVectorDataSize = gtPsbVectorData.size();
1887  int gtPsbVectorEmulSize = gtPsbVectorEmul.size();
1888 
1889  if (gtPsbVectorDataSize == gtPsbVectorEmulSize) {
1890  m_myCoutStream << "\nData and emulated PSB vector size: identical.\n";
1891  m_myCoutStream << " Size: " << gtPsbVectorDataSize << std::endl;
1892  } else {
1893  m_myCoutStream << "\nData and emulated PSB vector size: different.\n";
1894  m_myCoutStream << " Data: size = " << gtPsbVectorDataSize << std::endl;
1895  m_myCoutStream << " Emul: size = " << gtPsbVectorEmulSize << std::endl;
1896  }
1897 
1898  // the order of PSB block in the gtPsbVector is different in emulator and in data
1899  // in emulator: all active PSB in one BxInEvent, ordered L1A-1, L1A, L1A+1
1900  // in unpacker: every PSB in all BxInEvent
1901  for (int iPsb = 0; iPsb < gtPsbVectorDataSize; ++iPsb) {
1902  const L1GtPsbWord& psbBlockData = gtPsbVectorData[iPsb];
1903  const uint16_t boardIdData = psbBlockData.boardId();
1904  const int bxInEventData = psbBlockData.bxInEvent();
1905 
1906  // search the corresponding PSB in the emulated record using the
1907  // BoardId and the BxInEvent
1908 
1909  bool foundPSB = false;
1910 
1911  for (int iPsbF = 0; iPsbF < gtPsbVectorEmulSize; ++iPsbF) {
1912  const L1GtPsbWord& psbBlockEmul = gtPsbVectorEmul[iPsbF];
1913  const uint16_t boardIdEmul = psbBlockEmul.boardId();
1914  const int bxInEventEmul = psbBlockEmul.bxInEvent();
1915 
1916  if ((boardIdEmul == boardIdData) && (bxInEventData == bxInEventEmul)) {
1917  foundPSB = true;
1918 
1919  // compare the boards
1920  comparePSB(iEvent, evSetup, psbBlockData, psbBlockEmul);
1921  }
1922  }
1923 
1924  if (!foundPSB) {
1925  m_myCoutStream << "\nNo emulated PSB with boardId() = " << std::hex << "0x" << std::setw(4) << std::setfill('0')
1926  << boardIdData << std::setfill(' ') << std::dec << " and BxInEvent = " << bxInEventData
1927  << " was found";
1928  }
1929  }
1930 
1931  edm::LogInfo("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1932 
1933  m_myCoutStream.str("");
1934  m_myCoutStream.clear();
1935 
1936  // fill the m_gtErrorFlag histogram (only for L1 GT DAQ record)
1937 
1938  if (m_agree) {
1939  m_gtErrorFlag->Fill(0.0001);
1940  }
1941 
1942  if (m_dataOnly || m_dataOnlyMask) {
1943  m_gtErrorFlag->Fill(3.0001);
1944  }
1945 
1946  if (m_emulOnly || m_emulOnlyMask) {
1947  m_gtErrorFlag->Fill(4.0001);
1948  }
1949 }

References L1GtPsbWord::boardId(), L1GtPsbWord::bxInEvent(), compareFDL(), compareGTFE(), comparePSB(), TauDecayModes::dec, dqm::impl::MonitorElement::Fill(), L1GlobalTriggerReadoutRecord::gtFdlVector(), L1GlobalTriggerReadoutRecord::gtfeWord(), L1GlobalTriggerReadoutRecord::gtPsbVector(), iEvent, edm::HandleBase::isValid(), LogDebug, m_agree, m_dataOnly, m_dataOnlyMask, m_emulOnly, m_emulOnlyMask, m_gtErrorFlag, m_l1GtDataDaqInputToken_, m_l1GtEmulDaqInputToken_, m_myCoutStream, m_nrDataEventError, and m_nrEmulEventError.

Referenced by analyze().

◆ compareEvmRecord()

void L1GtHwValidation::compareEvmRecord ( const edm::Event &  iEvent,
const edm::EventSetup &  evSetup 
)
privatevirtual

L1 GT EVM record comparison.

Definition at line 1952 of file L1GtHwValidation.cc.

1952  {
1953  // formal index for EVM record
1954  int iRec = 1;
1955 
1956  // get the L1 GT hardware EVM record L1GlobalTriggerEvmReadoutRecord
1957  edm::Handle<L1GlobalTriggerEvmReadoutRecord> gtReadoutRecordData;
1958  iEvent.getByToken(m_l1GtDataEvmInputToken_, gtReadoutRecordData);
1959 
1960  bool validData = false;
1961 
1962  if (!gtReadoutRecordData.isValid()) {
1963  m_nrDataEventError++;
1964  } else {
1965  validData = true;
1966  }
1967 
1968  // get the L1 GT emulator EVM record L1GlobalTriggerEvmReadoutRecord
1969  edm::Handle<L1GlobalTriggerEvmReadoutRecord> gtReadoutRecordEmul;
1970  iEvent.getByToken(m_l1GtEmulEvmInputToken_, gtReadoutRecordEmul);
1971 
1972  bool validEmul = false;
1973 
1974  if (!gtReadoutRecordEmul.isValid()) {
1975  m_nrEmulEventError++;
1976  } else {
1977  validEmul = true;
1978  }
1979 
1980  if ((!validData) || (!validEmul)) {
1981  edm::LogWarning("L1GtHwValidation") << "\n No valid product found: EVM L1GlobalTriggerEvmReadoutRecord"
1982  << "\n Data validity [1 = true; 0 = false]: " << validData
1983  << "\n Emulator validity: [1 = true; 0 = false]: " << validEmul
1984  << "\n EVM histograms will not be filled.\n"
1985  << std::endl;
1986 
1987  return;
1988  }
1989 
1990  // compare GTFE
1991  const L1GtfeWord& gtfeBlockData = gtReadoutRecordData->gtfeWord();
1992  const L1GtfeWord& gtfeBlockEmul = gtReadoutRecordEmul->gtfeWord();
1993 
1994  compareGTFE(iEvent, evSetup, gtfeBlockData, gtfeBlockEmul, iRec);
1995 
1996  // FDL comparison
1997  const std::vector<L1GtFdlWord>& gtFdlVectorData = gtReadoutRecordData->gtFdlVector();
1998  const std::vector<L1GtFdlWord>& gtFdlVectorEmul = gtReadoutRecordEmul->gtFdlVector();
1999 
2000  int gtFdlVectorDataSize = gtFdlVectorData.size();
2001  int gtFdlVectorEmulSize = gtFdlVectorEmul.size();
2002 
2003  if (gtFdlVectorDataSize == gtFdlVectorEmulSize) {
2004  m_myCoutStream << "\nData and emulated FDL vector size: identical.\n";
2005  m_myCoutStream << " Size: " << gtFdlVectorDataSize << std::endl;
2006 
2007  for (int iFdl = 0; iFdl < gtFdlVectorDataSize; ++iFdl) {
2008  const L1GtFdlWord& fdlBlockData = gtFdlVectorData[iFdl];
2009  const L1GtFdlWord& fdlBlockEmul = gtFdlVectorEmul[iFdl];
2010 
2011  compareFDL(iEvent, evSetup, fdlBlockData, fdlBlockEmul, iRec);
2012  }
2013  } else {
2014  m_myCoutStream << "\nData and emulated FDL vector size: different.\n";
2015  m_myCoutStream << " Data: size = " << gtFdlVectorDataSize << std::endl;
2016  m_myCoutStream << " Emul: size = " << gtFdlVectorEmulSize << std::endl;
2017  }
2018 
2019  // FIXME compare TCS
2020 
2021  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
2022 
2023  m_myCoutStream.str("");
2024  m_myCoutStream.clear();
2025 
2026  edm::LogInfo("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
2027 
2028  m_myCoutStream.str("");
2029  m_myCoutStream.clear();
2030 }

References compareFDL(), compareGTFE(), L1GlobalTriggerEvmReadoutRecord::gtFdlVector(), L1GlobalTriggerEvmReadoutRecord::gtfeWord(), iEvent, edm::HandleBase::isValid(), LogDebug, m_l1GtDataEvmInputToken_, m_l1GtEmulEvmInputToken_, m_myCoutStream, m_nrDataEventError, and m_nrEmulEventError.

Referenced by analyze().

◆ compareFDL()

void L1GtHwValidation::compareFDL ( const edm::Event &  iEvent,
const edm::EventSetup &  evSetup,
const L1GtFdlWord &  fdlBlockData,
const L1GtFdlWord &  fdlBlockEmul,
const int  iRec 
)
privatevirtual

compare the FDL board

Definition at line 979 of file L1GtHwValidation.cc.

983  {
984  // index of physics partition
985  int PhysicsPartition = 0;
986 
987  //
988  std::string recString;
989 
990  if (fdlBlockData == fdlBlockEmul) {
991  m_myCoutStream << "\n" << recString << " Data and emulated FDL blocks: identical.\n";
992  fdlBlockData.print(m_myCoutStream);
993 
994  } else {
995  m_myCoutStream << "\n" << recString << " Data and emulated FDL blocks: different.\n";
996 
997  m_myCoutStream << "\nData: FDL block\n";
998  fdlBlockData.print(m_myCoutStream);
999 
1000  m_myCoutStream << "\nEmul: FDL block\n";
1001  fdlBlockEmul.print(m_myCoutStream);
1002  }
1003 
1004  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1005 
1006  m_myCoutStream.str("");
1007  m_myCoutStream.clear();
1008 
1009  // get bunch cross in the GT event record -
1010  // move it first as histograms are BxInEvent dependent
1011  const int bxInEventData = fdlBlockData.bxInEvent();
1012  const int bxInEventEmul = fdlBlockEmul.bxInEvent();
1013 
1014  bool matchBxInEvent = false;
1015 
1016  if (bxInEventData == bxInEventEmul) {
1017  m_myCoutStream << "\n" << recString << " Data and emulated FDL bxInEvent identical.";
1018  m_myCoutStream << "\n bxInEvent() = " << bxInEventData;
1019  m_myCoutStream << "\n";
1020  matchBxInEvent = true;
1021 
1022  } else {
1023  m_myCoutStream << "\n" << recString << " Data and emulated FDL bxInEvent different.";
1024  m_myCoutStream << "\n Data: bxInEvent() = " << bxInEventData;
1025  m_myCoutStream << "\n Emul: bxInEvent() = " << bxInEventEmul;
1026  m_myCoutStream << "\n";
1027 
1028  m_fdlDataEmul_Err[iRec]->Fill(1);
1029 
1030  if (iRec == 0) {
1031  m_agree = false;
1032 
1033  m_myCoutStream << "\nDisagreement data versus emulator: "
1034  << "\n Data and emulated FDL bxInEvent different \n";
1035  }
1036  }
1037 
1038  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1039  m_myCoutStream.str("");
1040  m_myCoutStream.clear();
1041 
1042  // symmetrize
1043  bool validBxInEvent = false;
1044  int histIndex = bxInEventData + (TotalBxInEvent + 1) / 2 - 1;
1045  LogDebug("L1GtHwValidation") << "\n Convert bxInEvent = " << bxInEventData << " to histIndex = " << histIndex
1046  << std::endl;
1047  if ((histIndex <= TotalBxInEvent) && (histIndex >= 0)) {
1048  validBxInEvent = true;
1049  }
1050 
1051  // loop over algorithms and increase the corresponding counters
1052 
1053  // get BoardId value
1054  const uint16_t boardIdData = fdlBlockData.boardId();
1055  const uint16_t boardIdEmul = fdlBlockEmul.boardId();
1056 
1057  if (boardIdData == boardIdEmul) {
1058  m_myCoutStream << "\n" << recString << " Data and emulated FDL boardId identical.";
1059  m_myCoutStream << "\n boardId() = " << std::hex << "0x" << std::setw(4) << std::setfill('0') << boardIdData
1060  << std::setfill(' ') << std::dec;
1061  m_myCoutStream << "\n";
1062 
1063  } else {
1064  m_myCoutStream << "\n" << recString << " Data and emulated FDL boardId different.";
1065  m_myCoutStream << "\n Data: boardId() = " << std::hex << "0x" << std::setw(4) << std::setfill('0') << boardIdData
1066  << std::setfill(' ') << std::dec;
1067  m_myCoutStream << "\n Emul: boardId() = " << std::hex << "0x" << std::setw(4) << std::setfill('0') << boardIdEmul
1068  << std::setfill(' ') << std::dec;
1069  m_myCoutStream << "\n";
1070 
1071  if (matchBxInEvent && validBxInEvent) {
1072  m_fdlDataEmul[histIndex][iRec]->Fill(0);
1073  } else {
1074  m_fdlDataEmul_Err[iRec]->Fill(0);
1075  }
1076  }
1077 
1078  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1079  m_myCoutStream.str("");
1080  m_myCoutStream.clear();
1081 
1082  // get BxNr - bunch cross number of the actual bx
1083  const uint16_t bxNrData = fdlBlockData.bxNr();
1084  const uint16_t bxNrEmul = fdlBlockEmul.bxNr();
1085 
1086  if (bxNrData == bxNrEmul) {
1087  m_myCoutStream << "\n" << recString << " Data and emulated FDL bxNr identical.";
1088  m_myCoutStream << "\n bxNr() = " << bxNrData;
1089  m_myCoutStream << "\n";
1090 
1091  } else {
1092  m_myCoutStream << "\n" << recString << " Data and emulated FDL bxNr different.";
1093  m_myCoutStream << "\n Data: bxNr() = " << bxNrData;
1094  m_myCoutStream << "\n Emul: bxNr() = " << bxNrEmul;
1095  m_myCoutStream << "\n";
1096 
1097  if (matchBxInEvent && validBxInEvent) {
1098  m_fdlDataEmul[histIndex][iRec]->Fill(2);
1099  } else {
1100  m_fdlDataEmul_Err[iRec]->Fill(2);
1101  }
1102  }
1103 
1104  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1105  m_myCoutStream.str("");
1106  m_myCoutStream.clear();
1107 
1108  // get event number since last L1 reset generated in FDL
1109  const uint32_t eventNrData = fdlBlockData.eventNr();
1110  const uint32_t eventNrEmul = fdlBlockEmul.eventNr();
1111 
1112  if (eventNrData == eventNrEmul) {
1113  m_myCoutStream << "\n" << recString << " Data and emulated FDL eventNr identical.";
1114  m_myCoutStream << "\n eventNr() = " << eventNrData;
1115  m_myCoutStream << "\n";
1116 
1117  } else {
1118  m_myCoutStream << "\n" << recString << " Data and emulated FDL eventNr different.";
1119  m_myCoutStream << "\n Data: eventNr() = " << eventNrData;
1120  m_myCoutStream << "\n Emul: eventNr() = " << eventNrEmul;
1121  m_myCoutStream << "\n";
1122 
1123  if (matchBxInEvent && validBxInEvent) {
1124  m_fdlDataEmul[histIndex][iRec]->Fill(3);
1125  } else {
1126  m_fdlDataEmul_Err[iRec]->Fill(3);
1127  }
1128  }
1129 
1130  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1131  m_myCoutStream.str("");
1132  m_myCoutStream.clear();
1133 
1134  // get technical trigger bits
1135  const TechnicalTriggerWord& gtTechnicalTriggerWordData = fdlBlockData.gtTechnicalTriggerWord();
1136  const TechnicalTriggerWord& gtTechnicalTriggerWordEmul = fdlBlockEmul.gtTechnicalTriggerWord();
1137 
1138  int nTechBits = gtTechnicalTriggerWordData.size();
1139 
1140  TechnicalTriggerWord gtTechnicalTriggerWordDataMask(nTechBits);
1141  TechnicalTriggerWord gtTechnicalTriggerWordEmulMask(nTechBits);
1142 
1143  unsigned int bitValue = 0;
1144 
1145  if (matchBxInEvent && validBxInEvent) {
1146  for (int iBit = 0; iBit < nTechBits; ++iBit) {
1147  unsigned int triggerMask = (m_triggerMaskTechTrig.at(iBit)) & (1 << PhysicsPartition);
1148 
1149  if (gtTechnicalTriggerWordData[iBit]) {
1150  m_fdlDataTechDecision[histIndex][iRec]->Fill(iBit);
1151 
1152  bitValue = (triggerMask) ? 0 : 1;
1153  gtTechnicalTriggerWordDataMask[iBit] = bitValue;
1154  if (bitValue) {
1155  m_fdlDataTechDecisionMask[histIndex][iRec]->Fill(iBit);
1156  }
1157  }
1158 
1159  if (gtTechnicalTriggerWordEmul.at(iBit)) {
1160  m_fdlEmulTechDecision[histIndex][iRec]->Fill(iBit);
1161 
1162  bitValue = (triggerMask) ? 0 : 1;
1163  gtTechnicalTriggerWordEmulMask[iBit] = bitValue;
1164  if (bitValue) {
1165  m_fdlEmulTechDecisionMask[histIndex][iRec]->Fill(iBit);
1166  }
1167  }
1168  }
1169  } else {
1170  for (int iBit = 0; iBit < nTechBits; ++iBit) {
1171  if (gtTechnicalTriggerWordData[iBit]) {
1172  m_fdlDataTechDecision_Err[iRec]->Fill(iBit);
1173  }
1174 
1175  if (gtTechnicalTriggerWordEmul.at(iBit)) {
1176  m_fdlEmulTechDecision_Err[iRec]->Fill(iBit);
1177  }
1178  }
1179  }
1180 
1181  if (gtTechnicalTriggerWordData == gtTechnicalTriggerWordEmul) {
1182  m_myCoutStream << "\n" << recString << " Data and emulated FDL gtTechnicalTriggerWord identical.\n";
1183  fdlBlockData.printGtTechnicalTriggerWord(m_myCoutStream);
1184  m_myCoutStream << "\n";
1185 
1186  } else {
1187  m_myCoutStream << "\n" << recString << " Data and emulated FDL gtTechnicalTriggerWord different.";
1188  m_myCoutStream << "\n Data: ";
1189  fdlBlockData.printGtTechnicalTriggerWord(m_myCoutStream);
1190  m_myCoutStream << "\n Emul: ";
1191  fdlBlockEmul.printGtTechnicalTriggerWord(m_myCoutStream);
1192  m_myCoutStream << "\n";
1193 
1194  if (matchBxInEvent && validBxInEvent) {
1195  m_fdlDataEmul[histIndex][iRec]->Fill(4);
1196  } else {
1197  m_fdlDataEmul_Err[iRec]->Fill(4);
1198  }
1199 
1200  if (matchBxInEvent && validBxInEvent) {
1201  for (int iBit = 0; iBit < nTechBits; ++iBit) {
1202  if (gtTechnicalTriggerWordData[iBit] != gtTechnicalTriggerWordEmul.at(iBit)) {
1203  m_fdlDataEmulTechDecision[histIndex][iRec]->Fill(iBit);
1204  }
1205  }
1206  } else {
1207  for (int iBit = 0; iBit < nTechBits; ++iBit) {
1208  if (gtTechnicalTriggerWordData[iBit] != gtTechnicalTriggerWordEmul.at(iBit)) {
1209  m_fdlDataEmulTechDecision_Err[iRec]->Fill(iBit);
1210  }
1211  }
1212  }
1213  }
1214 
1215  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1216  m_myCoutStream.str("");
1217  m_myCoutStream.clear();
1218 
1219  if (gtTechnicalTriggerWordDataMask == gtTechnicalTriggerWordEmulMask) {
1220  m_myCoutStream << "\n" << recString << " Data and emulated FDL gtTechnicalTriggerWord after mask identical.\n";
1221  m_myCoutStream << "\n";
1222 
1223  } else {
1224  m_myCoutStream << "\n" << recString << " Data and emulated FDL gtTechnicalTriggerWord after mask different.";
1225  m_myCoutStream << "\n Data: ";
1226  m_myCoutStream << "\n Emul: ";
1227  m_myCoutStream << "\n";
1228 
1229  if (matchBxInEvent && validBxInEvent) {
1230  m_fdlDataEmul[histIndex][iRec]->Fill(5);
1231  } else {
1232  m_fdlDataEmul_Err[iRec]->Fill(5);
1233  }
1234 
1235  if (matchBxInEvent && validBxInEvent) {
1236  for (int iBit = 0; iBit < nTechBits; ++iBit) {
1237  if (gtTechnicalTriggerWordData[iBit] != gtTechnicalTriggerWordEmul.at(iBit)) {
1238  m_fdlDataEmulTechDecisionMask[histIndex][iRec]->Fill(iBit);
1239  }
1240  }
1241  }
1242  }
1243 
1244  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1245  m_myCoutStream.str("");
1246  m_myCoutStream.clear();
1247 
1248  // get algorithms bits (decision word)
1249  const DecisionWord& gtDecisionWordData = fdlBlockData.gtDecisionWord();
1250  const DecisionWord& gtDecisionWordEmul = fdlBlockEmul.gtDecisionWord();
1251 
1252  int nAlgoBits = gtDecisionWordData.size();
1253 
1254  DecisionWord gtDecisionWordDataMask(nAlgoBits);
1255  DecisionWord gtDecisionWordEmulMask(nAlgoBits);
1256 
1257  // get the index of the prescale factor set from data
1258  int iPfSet = fdlBlockData.gtPrescaleFactorIndexAlgo();
1259 
1260  // check that the prescale factor is not out of range for the prescale factor
1261  // record retrieved from event setup
1262  size_t pfSetsSize = (*m_prescaleFactorsAlgoTrig).size();
1263 
1264  if (iPfSet < 0) {
1265  LogDebug("L1GtHwValidation") << "\nError: index of prescale factor set retrieved from the data \n"
1266  << "less than zero."
1267  << "\n Value of index retrieved from data = " << iPfSet << std::endl;
1268 
1269  // FIXME add a histogram to be used for a quality test
1270 
1271  return;
1272 
1273  } else if (iPfSet >= (static_cast<int>(pfSetsSize))) {
1274  LogDebug("L1GtHwValidation") << "\nError: index of prescale factor set retrieved from the data \n"
1275  << "greater than the size of the vector of prescale factor sets."
1276  << "\n Value of index retrieved from data = " << iPfSet
1277  << "\n Vector size = " << pfSetsSize << std::endl;
1278 
1279  // FIXME add a histogram to be used for a quality test
1280 
1281  return;
1282  }
1283 
1284  const std::vector<int>& prescaleFactorsAlgoTrig = (*m_prescaleFactorsAlgoTrig).at(iPfSet);
1285 
1286  if (matchBxInEvent && validBxInEvent) {
1287  for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
1288  unsigned int triggerMask = (m_triggerMaskAlgoTrig.at(iBit)) & (1 << PhysicsPartition);
1289 
1290  int prescaleFactor = prescaleFactorsAlgoTrig.at(iBit);
1291 
1292  LogTrace("L1GtHwValidation") << "Bit " << iBit << ": prescale factor = " << prescaleFactor
1293  << " trigger mask = " << triggerMask << std::endl;
1294 
1295  if (gtDecisionWordData[iBit]) {
1296  m_fdlDataAlgoDecision[histIndex][iRec]->Fill(iBit);
1297 
1298  if (prescaleFactor == 1) {
1299  m_fdlDataAlgoDecisionUnprescaled[histIndex][iRec]->Fill(iBit);
1300  } else {
1301  m_fdlDataAlgoDecisionPrescaled[histIndex][iRec]->Fill(iBit);
1302  }
1303 
1304  bitValue = (triggerMask) ? 0 : 1;
1305  gtDecisionWordDataMask[iBit] = bitValue;
1306  if (bitValue) {
1307  m_fdlDataAlgoDecisionMask[histIndex][iRec]->Fill(iBit);
1308  }
1309  }
1310 
1311  if (gtDecisionWordEmul.at(iBit)) {
1312  m_fdlEmulAlgoDecision[histIndex][iRec]->Fill(iBit);
1313 
1314  bitValue = (triggerMask) ? 0 : 1;
1315  gtDecisionWordEmulMask[iBit] = bitValue;
1316  if (bitValue) {
1317  m_fdlEmulAlgoDecisionMask[histIndex][iRec]->Fill(iBit);
1318  }
1319  }
1320  }
1321  } else {
1322  for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
1323  if (gtDecisionWordData[iBit]) {
1324  m_fdlDataAlgoDecision_Err[iRec]->Fill(iBit);
1325  }
1326  }
1327 
1328  for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
1329  if (gtDecisionWordEmul.at(iBit)) {
1330  m_fdlEmulAlgoDecision_Err[iRec]->Fill(iBit);
1331  }
1332  }
1333 
1334  if (iRec == 0) {
1335  m_agree = false;
1336 
1337  m_myCoutStream << "\nDisagreement data versus emulator: "
1338  << "\n matchBxInEvent && validBxInEvent false \n";
1339  }
1340  }
1341 
1342  if (gtDecisionWordData == gtDecisionWordEmul) {
1343  m_myCoutStream << "\n" << recString << " Data and emulated FDL gtDecisionWord identical.";
1344  fdlBlockData.printGtDecisionWord(m_myCoutStream);
1345  m_myCoutStream << "\n";
1346 
1347  } else {
1348  m_myCoutStream << "\n" << recString << " Data and emulated FDL gtDecisionWord different.";
1349  m_myCoutStream << "\n Data: ";
1350  fdlBlockData.printGtDecisionWord(m_myCoutStream);
1351  m_myCoutStream << "\n Emul: ";
1352  fdlBlockEmul.printGtDecisionWord(m_myCoutStream);
1353  m_myCoutStream << "\n";
1354 
1355  if (matchBxInEvent && validBxInEvent) {
1356  m_fdlDataEmul[histIndex][iRec]->Fill(6);
1357  } else {
1358  m_fdlDataEmul_Err[iRec]->Fill(6);
1359  }
1360 
1361  if (matchBxInEvent && validBxInEvent) {
1362  for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
1363  int prescaleFactor = prescaleFactorsAlgoTrig.at(iBit);
1364 
1365  if (gtDecisionWordData[iBit] != gtDecisionWordEmul.at(iBit)) {
1366  m_fdlDataEmulAlgoDecision[histIndex][iRec]->Fill(iBit);
1367 
1368  // for excluded algorithms, fill mismatch for BxInEvent = 0 and DAQ record only
1369  if (excludedAlgo(iBit) && (bxInEventData == 0) && (iRec == 0)) {
1370  m_excludedAlgorithmsAgreement->Fill(iBit);
1371  }
1372 
1373  if (prescaleFactor == 1) {
1374  m_fdlDataEmulAlgoDecisionUnprescaled[histIndex][iRec]->Fill(iBit);
1375 
1376  // fill a histogram for allowed algorithm triggers only
1377  if (!excludedAlgo(iBit)) {
1378  m_fdlDataEmulAlgoDecisionUnprescaledAllowed[histIndex][iRec]->Fill(iBit);
1379  }
1380 
1381  } else {
1382  m_fdlDataEmulAlgoDecisionPrescaled[histIndex][iRec]->Fill(iBit);
1383  }
1384 
1385  if (gtDecisionWordData[iBit]) {
1386  m_fdlDataAlgoDecision_NoMatch[histIndex][iRec]->Fill(iBit);
1387 
1388  if (prescaleFactor == 1) {
1389  m_fdlDataAlgoDecisionUnprescaled_NoMatch[histIndex][iRec]->Fill(iBit);
1390 
1391  // compare for agreement only unprescaled algorithms and algorithms which
1392  // are not excluded from comparison
1393  if ((!excludedAlgo(iBit)) && (bxInEventData == 0) && (iRec == 0)) {
1394  m_agree = false;
1395  m_dataOnly = true;
1396 
1397  m_myCoutStream << "\nDisagreement data versus emulator: "
1398  << "result before mask for algorithm with bit number " << iBit
1399  << "\n Data: true, emulator: false \n";
1400  }
1401 
1402  } else {
1403  m_fdlDataAlgoDecisionPrescaled_NoMatch[histIndex][iRec]->Fill(iBit);
1404  }
1405 
1406  } else {
1407  m_fdlEmulAlgoDecision_NoMatch[histIndex][iRec]->Fill(iBit);
1408 
1409  if (prescaleFactor == 1) {
1410  m_fdlEmulAlgoDecisionUnprescaled_NoMatch[histIndex][iRec]->Fill(iBit);
1411 
1412  // compare for agreement only unprescaled algorithms and algorithms which
1413  // are not excluded from comparison
1414  if ((!excludedAlgo(iBit)) && (bxInEventData == 0) && (iRec == 0)) {
1415  m_agree = false;
1416  m_emulOnly = true;
1417 
1418  m_myCoutStream << "\nDisagreement data versus emulator: "
1419  << "result before mask for algorithm with bit number " << iBit
1420  << "\n Data: false, emulator: true \n";
1421  }
1422 
1423  } else {
1424  m_fdlEmulAlgoDecisionPrescaled_NoMatch[histIndex][iRec]->Fill(iBit);
1425  }
1426  }
1427  }
1428  }
1429  } else {
1430  for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
1431  if (gtDecisionWordData[iBit] != gtDecisionWordEmul.at(iBit)) {
1432  m_fdlDataEmulAlgoDecision_Err[iRec]->Fill(iBit);
1433  }
1434  }
1435 
1436  if (iRec == 0) {
1437  m_agree = false;
1438 
1439  m_myCoutStream << "\nDisagreement data versus emulator: "
1440  << "\n matchBxInEvent && validBxInEvent false \n";
1441  }
1442  }
1443  }
1444 
1445  if (gtDecisionWordDataMask == gtDecisionWordEmulMask) {
1446  m_myCoutStream << "\n" << recString << " Data and emulated FDL gtDecisionWord after mask identical.";
1447  m_myCoutStream << "\n";
1448 
1449  } else {
1450  m_myCoutStream << "\n" << recString << " Data and emulated FDL gtDecisionWord after mask different.";
1451  m_myCoutStream << "\n Data: ";
1452  m_myCoutStream << "\n Emul: ";
1453  m_myCoutStream << "\n";
1454 
1455  if (matchBxInEvent && validBxInEvent) {
1456  m_fdlDataEmul[histIndex][iRec]->Fill(7);
1457  } else {
1458  m_fdlDataEmul_Err[iRec]->Fill(7);
1459  }
1460 
1461  if (matchBxInEvent && validBxInEvent) {
1462  for (int iBit = 0; iBit < nAlgoBits; ++iBit) {
1463  if (gtDecisionWordDataMask[iBit] != gtDecisionWordEmulMask.at(iBit)) {
1464  m_fdlDataEmulAlgoDecisionMask[histIndex][iRec]->Fill(iBit);
1465 
1466  int prescaleFactor = prescaleFactorsAlgoTrig.at(iBit);
1467 
1468  if (gtDecisionWordDataMask[iBit]) {
1469  m_fdlDataAlgoDecisionMask_NoMatch[histIndex][iRec]->Fill(iBit);
1470 
1471  if (prescaleFactor == 1) {
1472  m_fdlDataAlgoDecisionUnprescaledMask_NoMatch[histIndex][iRec]->Fill(iBit);
1473 
1474  // compare for agreement only unprescaled algorithms and algorithms which
1475  // are not excluded from comparison
1476  if ((!excludedAlgo(iBit)) && (bxInEventData == 0) && (iRec == 0)) {
1477  m_agree = false;
1478  m_dataOnlyMask = true;
1479 
1480  m_myCoutStream << "\nDisagreement data versus emulator: "
1481  << "result after mask for algorithm with bit number " << iBit
1482  << " different in data versus emulator "
1483  << "\n Data: true, emulator: false \n";
1484  }
1485 
1486  } else {
1487  m_fdlDataAlgoDecisionPrescaledMask_NoMatch[histIndex][iRec]->Fill(iBit);
1488  }
1489 
1490  } else {
1491  m_fdlEmulAlgoDecisionMask_NoMatch[histIndex][iRec]->Fill(iBit);
1492 
1493  if (prescaleFactor == 1) {
1494  m_fdlEmulAlgoDecisionUnprescaledMask_NoMatch[histIndex][iRec]->Fill(iBit);
1495 
1496  // compare for agreement only unprescaled algorithms and algorithms which
1497  // are not excluded from comparison
1498  if ((!excludedAlgo(iBit)) && (bxInEventData == 0) && (iRec == 0)) {
1499  m_agree = false;
1500  m_emulOnlyMask = true;
1501 
1502  m_myCoutStream << "\nDisagreement data versus emulator: "
1503  << "result after mask for algorithm with bit number " << iBit
1504  << " different in data versus emulator "
1505  << "\n Data: false, emulator: true \n";
1506  }
1507 
1508  } else {
1509  m_fdlEmulAlgoDecisionPrescaledMask_NoMatch[histIndex][iRec]->Fill(iBit);
1510  }
1511  }
1512  }
1513  }
1514  }
1515  }
1516 
1517  // get extended algorithms bits (extended decision word)
1518  const DecisionWordExtended& gtDecisionWordExtendedData = fdlBlockData.gtDecisionWordExtended();
1519  const DecisionWordExtended& gtDecisionWordExtendedEmul = fdlBlockEmul.gtDecisionWordExtended();
1520 
1521  if (gtDecisionWordExtendedData == gtDecisionWordExtendedEmul) {
1522  m_myCoutStream << "\n" << recString << " Data and emulated FDL gtDecisionWordExtended identical.\n";
1523  fdlBlockData.printGtDecisionWordExtended(m_myCoutStream);
1524  m_myCoutStream << "\n";
1525 
1526  } else {
1527  m_myCoutStream << "\n" << recString << " Data and emulated FDL gtDecisionWordExtended different.\n";
1528  m_myCoutStream << "\n Data: ";
1529  fdlBlockData.printGtDecisionWordExtended(m_myCoutStream);
1530  m_myCoutStream << "\n Emul: ";
1531  fdlBlockEmul.printGtDecisionWordExtended(m_myCoutStream);
1532  m_myCoutStream << "\n";
1533 
1534  if (matchBxInEvent && validBxInEvent) {
1535  m_fdlDataEmul[histIndex][iRec]->Fill(8);
1536  } else {
1537  m_fdlDataEmul_Err[iRec]->Fill(8);
1538  }
1539  }
1540 
1541  // get NoAlgo
1542  const uint16_t noAlgoData = fdlBlockData.noAlgo();
1543  const uint16_t noAlgoEmul = fdlBlockEmul.noAlgo();
1544 
1545  if (noAlgoData == noAlgoEmul) {
1546  m_myCoutStream << "\n" << recString << " Data and emulated FDL noAlgo identical.";
1547  m_myCoutStream << "\n noAlgo() = " << noAlgoData;
1548  m_myCoutStream << "\n";
1549 
1550  } else {
1551  m_myCoutStream << "\n" << recString << " Data and emulated FDL noAlgo different.";
1552  m_myCoutStream << "\n Data: noAlgo() = " << noAlgoData;
1553  m_myCoutStream << "\n Emul: noAlgo() = " << noAlgoEmul;
1554  m_myCoutStream << "\n";
1555 
1556  if (matchBxInEvent && validBxInEvent) {
1557  m_fdlDataEmul[histIndex][iRec]->Fill(9);
1558  } else {
1559  m_fdlDataEmul_Err[iRec]->Fill(9);
1560  }
1561  }
1562 
1563  // get "Final OR" bits
1564  const uint16_t finalORData = fdlBlockData.finalOR();
1565  const uint16_t finalOREmul = fdlBlockEmul.finalOR();
1566 
1567  if (finalORData == finalOREmul) {
1568  m_myCoutStream << "\n" << recString << " Data and emulated FDL finalOR identical.";
1569  m_myCoutStream << "\n finalOR() = " << std::hex << "0x" << std::setw(2) << std::setfill('0') << finalORData
1570  << std::setfill(' ') << std::dec;
1571  m_myCoutStream << "\n";
1572 
1573  } else {
1574  m_myCoutStream << "\n" << recString << " Data and emulated FDL finalOR different.";
1575  m_myCoutStream << "\n Data: finalOR() = " << std::hex << "0x" << std::setw(2) << std::setfill('0') << finalORData
1576  << std::setfill(' ') << std::dec;
1577  m_myCoutStream << "\n Emul: finalOR() = " << std::hex << "0x" << std::setw(2) << std::setfill('0') << finalOREmul
1578  << std::setfill(' ') << std::dec;
1579  m_myCoutStream << "\n";
1580 
1581  if (matchBxInEvent && validBxInEvent) {
1582  m_fdlDataEmul[histIndex][iRec]->Fill(10);
1583  } else {
1584  m_fdlDataEmul_Err[iRec]->Fill(10);
1585  }
1586  }
1587 
1588  // get "Final OR" for physics partition
1589  const int finalORPhysData = finalORData & (1 << PhysicsPartition);
1590  const int finalORPhysEmul = finalOREmul & (1 << PhysicsPartition);
1591 
1592  if (finalORPhysData == finalORPhysEmul) {
1593  m_myCoutStream << "\n" << recString << " Data and emulated FDL finalOR for the physics partition identical.";
1594  m_myCoutStream << "\n finalOR() = " << finalORPhysData;
1595  m_myCoutStream << "\n";
1596 
1597  } else {
1598  m_myCoutStream << "\n" << recString << " Data and emulated FDL finalOR for the physics partition different.";
1599  m_myCoutStream << "\n Data: finalOR() = " << finalORPhysData;
1600  m_myCoutStream << "\n Emul: finalOR() = " << finalORPhysEmul;
1601  m_myCoutStream << "\n";
1602 
1603  if (matchBxInEvent && validBxInEvent) {
1604  m_fdlDataEmul[histIndex][iRec]->Fill(11);
1605  } else {
1606  m_fdlDataEmul_Err[iRec]->Fill(11);
1607  }
1608  }
1609 
1610  // get local bunch cross number of the actual bx
1611  const uint16_t localBxNrData = fdlBlockData.localBxNr();
1612  const uint16_t localBxNrEmul = fdlBlockEmul.localBxNr();
1613 
1614  if (localBxNrData == localBxNrEmul) {
1615  m_myCoutStream << "\n" << recString << " Data and emulated FDL localBxNr identical.";
1616  m_myCoutStream << "\n localBxNr() = " << localBxNrData;
1617  m_myCoutStream << "\n";
1618 
1619  } else {
1620  m_myCoutStream << "\n" << recString << " Data and emulated FDL localBxNr different.";
1621  m_myCoutStream << "\n Data: localBxNr() = " << localBxNrData;
1622  m_myCoutStream << "\n Emul: localBxNr() = " << localBxNrEmul;
1623  m_myCoutStream << "\n";
1624 
1625  if (matchBxInEvent && validBxInEvent) {
1626  m_fdlDataEmul[histIndex][iRec]->Fill(12);
1627  } else {
1628  m_fdlDataEmul_Err[iRec]->Fill(12);
1629  }
1630  }
1631 
1632  edm::LogInfo("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1633  m_myCoutStream.str("");
1634  m_myCoutStream.clear();
1635 }

References L1GtFdlWord::boardId(), L1GtFdlWord::bxInEvent(), L1GtFdlWord::bxNr(), TauDecayModes::dec, L1GtFdlWord::eventNr(), excludedAlgo(), dqm::impl::MonitorElement::Fill(), L1GtFdlWord::finalOR(), L1GtFdlWord::gtDecisionWord(), L1GtFdlWord::gtDecisionWordExtended(), L1GtFdlWord::gtPrescaleFactorIndexAlgo(), L1GtFdlWord::gtTechnicalTriggerWord(), L1GtFdlWord::localBxNr(), LogDebug, LogTrace, m_agree, m_dataOnly, m_dataOnlyMask, m_emulOnly, m_emulOnlyMask, m_excludedAlgorithmsAgreement, m_fdlDataAlgoDecision, m_fdlDataAlgoDecision_Err, m_fdlDataAlgoDecision_NoMatch, m_fdlDataAlgoDecisionMask, m_fdlDataAlgoDecisionMask_NoMatch, m_fdlDataAlgoDecisionPrescaled, m_fdlDataAlgoDecisionPrescaled_NoMatch, m_fdlDataAlgoDecisionPrescaledMask_NoMatch, m_fdlDataAlgoDecisionUnprescaled, m_fdlDataAlgoDecisionUnprescaled_NoMatch, m_fdlDataAlgoDecisionUnprescaledMask_NoMatch, m_fdlDataEmul, m_fdlDataEmul_Err, m_fdlDataEmulAlgoDecision, m_fdlDataEmulAlgoDecision_Err, m_fdlDataEmulAlgoDecisionMask, m_fdlDataEmulAlgoDecisionPrescaled, m_fdlDataEmulAlgoDecisionUnprescaled, m_fdlDataEmulAlgoDecisionUnprescaledAllowed, m_fdlDataEmulTechDecision, m_fdlDataEmulTechDecision_Err, m_fdlDataEmulTechDecisionMask, m_fdlDataTechDecision, m_fdlDataTechDecision_Err, m_fdlDataTechDecisionMask, m_fdlEmulAlgoDecision, m_fdlEmulAlgoDecision_Err, m_fdlEmulAlgoDecision_NoMatch, m_fdlEmulAlgoDecisionMask, m_fdlEmulAlgoDecisionMask_NoMatch, m_fdlEmulAlgoDecisionPrescaled_NoMatch, m_fdlEmulAlgoDecisionPrescaledMask_NoMatch, m_fdlEmulAlgoDecisionUnprescaled_NoMatch, m_fdlEmulAlgoDecisionUnprescaledMask_NoMatch, m_fdlEmulTechDecision, m_fdlEmulTechDecision_Err, m_fdlEmulTechDecisionMask, m_myCoutStream, m_triggerMaskAlgoTrig, m_triggerMaskTechTrig, L1GtFdlWord::noAlgo(), Skims_PDWG_cff::prescaleFactor, L1GtFdlWord::print(), L1GtFdlWord::printGtDecisionWord(), L1GtFdlWord::printGtDecisionWordExtended(), L1GtFdlWord::printGtTechnicalTriggerWord(), AlCaHLTBitMon_QueryRunRegistry::string, and TotalBxInEvent.

Referenced by compareDaqRecord(), and compareEvmRecord().

◆ compareGt_Gct()

void L1GtHwValidation::compareGt_Gct ( const edm::Event &  iEvent,
const edm::EventSetup &   
)
privatevirtual

compare the GCT collections obtained from L1 GT PSB with the input GCT collections

Definition at line 2034 of file L1GtHwValidation.cc.

2034  {
2035  // FIXME
2036 }

Referenced by analyze().

◆ compareGTFE()

void L1GtHwValidation::compareGTFE ( const edm::Event &  iEvent,
const edm::EventSetup &  evSetup,
const L1GtfeWord &  gtfeBlockData,
const L1GtfeWord &  gtfeBlockEmul,
const int  iRec 
)
privatevirtual

compare the GTFE board

get record length for alternative 1

get record length for alternative 0

get bunch cross number as counted in the GTFE board

get setup version

get boards contributing to EVM respectively DAQ record

alternative for number of BX per board correlated with active boards bit value is 0: take alternative 0 bit value is 1: take alternative 1

get total number of L1A sent since start of run

Definition at line 805 of file L1GtHwValidation.cc.

809  {
810  std::string recString;
811  if (gtfeBlockData == gtfeBlockEmul) {
812  m_myCoutStream << "\n" << recString << " Data and emulated GTFE blocks: identical.\n";
813  gtfeBlockData.print(m_myCoutStream);
814  } else {
815  m_myCoutStream << "\n" << recString << " Data and emulated GTFE blocks: different.\n";
816 
817  m_myCoutStream << "\nData: GTFE block\n";
818  gtfeBlockData.print(m_myCoutStream);
819 
820  m_myCoutStream << "\nEmul: GTFE block\n";
821  gtfeBlockEmul.print(m_myCoutStream);
822  }
823 
824  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
825 
826  m_myCoutStream.str("");
827  m_myCoutStream.clear();
828 
829  // get BoardId value
830  const uint16_t boardIdData = gtfeBlockData.boardId();
831  const uint16_t boardIdEmul = gtfeBlockEmul.boardId();
832 
833  if (boardIdData == boardIdEmul) {
834  m_myCoutStream << "\n" << recString << " Data and emulated GTFE boardId identical.";
835  m_myCoutStream << "\n boardId() = " << std::hex << "0x" << std::setw(4) << std::setfill('0') << boardIdData
836  << std::setfill(' ') << std::dec;
837  m_myCoutStream << "\n";
838 
839  } else {
840  m_myCoutStream << "\n" << recString << " Data and emulated GTFE boardId different.";
841  m_myCoutStream << "\n Data: boardId() = " << std::hex << "0x" << std::setw(4) << std::setfill('0') << boardIdData
842  << std::setfill(' ') << std::dec;
843  m_myCoutStream << "\n Emul: boardId() = " << std::hex << "0x" << std::setw(4) << std::setfill('0') << boardIdEmul
844  << std::setfill(' ') << std::dec;
845  m_myCoutStream << "\n";
846  m_gtfeDataEmul[iRec]->Fill(0);
847  }
848 
850  const uint16_t recordLength1Data = gtfeBlockData.recordLength1();
851  const uint16_t recordLength1Emul = gtfeBlockEmul.recordLength1();
852 
853  if (recordLength1Data == recordLength1Emul) {
854  m_myCoutStream << "\n" << recString << " Data and emulated GTFE recordLength for alternative 1 identical.";
855  m_myCoutStream << "\n recordLength1() = " << recordLength1Data;
856  m_myCoutStream << "\n";
857 
858  } else {
859  m_myCoutStream << "\n" << recString << " Data and emulated GTFE recordLength for alternative 1 different.";
860  m_myCoutStream << "\n Data: recordLength1() = " << recordLength1Data;
861  m_myCoutStream << "\n Emul: recordLength1() = " << recordLength1Emul;
862  m_myCoutStream << "\n";
863  m_gtfeDataEmul[iRec]->Fill(1);
864  }
865 
867  const uint16_t recordLengthData = gtfeBlockData.recordLength();
868  const uint16_t recordLengthEmul = gtfeBlockEmul.recordLength();
869 
870  if (recordLengthData == recordLengthEmul) {
871  m_myCoutStream << "\n" << recString << " Data and emulated GTFE recordLength for alternative 0 identical.";
872  m_myCoutStream << "\n recordLength() = " << recordLengthData;
873  m_myCoutStream << "\n";
874 
875  } else {
876  m_myCoutStream << "\n" << recString << " Data and emulated GTFE recordLength for alternative 1 different.";
877  m_myCoutStream << "\n Data: recordLength() = " << recordLengthData;
878  m_myCoutStream << "\n Emul: recordLength() = " << recordLengthEmul;
879  m_myCoutStream << "\n";
880  m_gtfeDataEmul[iRec]->Fill(2);
881  }
882 
884  const uint16_t bxNrData = gtfeBlockData.bxNr();
885  const uint16_t bxNrEmul = gtfeBlockEmul.bxNr();
886 
887  if (bxNrData == bxNrEmul) {
888  m_myCoutStream << "\n" << recString << " Data and emulated GTFE bxNr identical.";
889  m_myCoutStream << "\n bxNr() = " << bxNrData;
890  m_myCoutStream << "\n";
891 
892  } else {
893  m_myCoutStream << "\n" << recString << " Data and emulated GTFE bxNr different.";
894  m_myCoutStream << "\n Data: bxNr() = " << bxNrData;
895  m_myCoutStream << "\n Emul: bxNr() = " << bxNrEmul;
896  m_myCoutStream << "\n";
897  m_gtfeDataEmul[iRec]->Fill(3);
898  }
899 
901  const uint32_t setupVersionData = gtfeBlockData.setupVersion();
902  const uint32_t setupVersionEmul = gtfeBlockEmul.setupVersion();
903 
904  if (setupVersionData == setupVersionEmul) {
905  m_myCoutStream << "\n" << recString << " Data and emulated GTFE setupVersion identical.";
906  m_myCoutStream << "\n setupVersion() = " << setupVersionData;
907  m_myCoutStream << "\n";
908 
909  } else {
910  m_myCoutStream << "\n" << recString << " Data and emulated GTFE setupVersion different.";
911  m_myCoutStream << "\n Data: setupVersion() = " << setupVersionData;
912  m_myCoutStream << "\n Emul: setupVersion() = " << setupVersionEmul;
913  m_myCoutStream << "\n";
914  m_gtfeDataEmul[iRec]->Fill(4);
915  }
916 
918  const uint16_t activeBoardsData = gtfeBlockData.activeBoards();
919  const uint16_t activeBoardsEmul = gtfeBlockEmul.activeBoards();
920 
921  if (activeBoardsData == activeBoardsEmul) {
922  m_myCoutStream << "\n" << recString << " Data and emulated GTFE activeBoards identical.";
923  m_myCoutStream << "\n activeBoards() = " << std::hex << "0x" << std::setw(4) << std::setfill('0')
924  << activeBoardsData << std::setfill(' ') << std::dec;
925  m_myCoutStream << "\n";
926 
927  } else {
928  m_myCoutStream << "\n" << recString << " Data and emulated GTFE activeBoards different.";
929  m_myCoutStream << "\n Data: activeBoards() = " << std::hex << "0x" << std::setw(4) << std::setfill('0')
930  << activeBoardsData << std::setfill(' ') << std::dec;
931  m_myCoutStream << "\n Emul: activeBoards() = " << std::hex << "0x" << std::setw(4) << std::setfill('0')
932  << activeBoardsEmul << std::setfill(' ') << std::dec;
933  m_myCoutStream << "\n";
934  m_gtfeDataEmul[iRec]->Fill(5);
935  }
940  const uint16_t altNrBxBoardData = gtfeBlockData.altNrBxBoard();
941  const uint16_t altNrBxBoardEmul = gtfeBlockEmul.altNrBxBoard();
942 
943  if (altNrBxBoardData == altNrBxBoardEmul) {
944  m_myCoutStream << "\n" << recString << " Data and emulated GTFE altNrBxBoard identical.";
945  m_myCoutStream << "\n altNrBxBoard() = " << altNrBxBoardData;
946  m_myCoutStream << "\n";
947 
948  } else {
949  m_myCoutStream << "\n" << recString << " Data and emulated GTFE altNrBxBoard different.";
950  m_myCoutStream << "\n Data: altNrBxBoard() = " << altNrBxBoardData;
951  m_myCoutStream << "\n Emul: altNrBxBoard() = " << altNrBxBoardEmul;
952  m_myCoutStream << "\n";
953  m_gtfeDataEmul[iRec]->Fill(6);
954  }
955 
957  const uint32_t totalTriggerNrData = gtfeBlockData.totalTriggerNr();
958  const uint32_t totalTriggerNrEmul = gtfeBlockEmul.totalTriggerNr();
959 
960  if (totalTriggerNrData == totalTriggerNrEmul) {
961  m_myCoutStream << "\n" << recString << " Data and emulated GTFE totalTriggerNr identical.";
962  m_myCoutStream << "\n totalTriggerNr() = " << totalTriggerNrData;
963  m_myCoutStream << "\n";
964 
965  } else {
966  m_myCoutStream << "\n" << recString << " Data and emulated GTFE totalTriggerNr different.";
967  m_myCoutStream << "\n Data: totalTriggerNr() = " << totalTriggerNrData;
968  m_myCoutStream << "\n Emul: totalTriggerNr() = " << totalTriggerNrEmul;
969  m_myCoutStream << "\n";
970  m_gtfeDataEmul[iRec]->Fill(7);
971  }
972 
973  edm::LogInfo("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
974  m_myCoutStream.str("");
975  m_myCoutStream.clear();
976 }

References L1GtfeWord::activeBoards(), L1GtfeWord::altNrBxBoard(), L1GtfeWord::boardId(), L1GtfeWord::bxNr(), TauDecayModes::dec, dqm::impl::MonitorElement::Fill(), LogDebug, m_gtfeDataEmul, m_myCoutStream, L1GtfeWord::print(), L1GtfeWord::recordLength(), L1GtfeWord::recordLength1(), L1GtfeWord::setupVersion(), AlCaHLTBitMon_QueryRunRegistry::string, and L1GtfeWord::totalTriggerNr().

Referenced by compareDaqRecord(), and compareEvmRecord().

◆ comparePSB()

void L1GtHwValidation::comparePSB ( const edm::Event &  iEvent,
const edm::EventSetup &  evSetup,
const L1GtPsbWord &  psbBlockData,
const L1GtPsbWord &  psbBlockEmul 
)
privatevirtual

compare the PSB board

get/set A_DATA_CH_IA

get/set B_DATA_CH_IB

Definition at line 1638 of file L1GtHwValidation.cc.

1641  {
1642  if (psbBlockData == psbBlockEmul) {
1643  m_myCoutStream << "\nData and emulated PSB blocks: identical.\n";
1644  psbBlockData.print(m_myCoutStream);
1645 
1646  } else {
1647  m_myCoutStream << "\nData and emulated PSB blocks: different.\n";
1648 
1649  m_myCoutStream << "\nData: PSB block\n";
1650  psbBlockData.print(m_myCoutStream);
1651 
1652  m_myCoutStream << "\nEmul: PSB block\n";
1653  psbBlockEmul.print(m_myCoutStream);
1654  }
1655 
1656  LogDebug("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1657 
1658  m_myCoutStream.str("");
1659  m_myCoutStream.clear();
1660 
1661  // get BoardId value
1662  const uint16_t boardIdData = psbBlockData.boardId();
1663  const uint16_t boardIdEmul = psbBlockEmul.boardId();
1664 
1665  if (boardIdData == boardIdEmul) {
1666  m_myCoutStream << "\nData and emulated PSB boardId identical.";
1667  m_myCoutStream << "\n boardId() = " << std::hex << "0x" << std::setw(4) << std::setfill('0') << boardIdData
1668  << std::setfill(' ') << std::dec;
1669  m_myCoutStream << "\n";
1670 
1671  } else {
1672  m_myCoutStream << "\nData and emulated PSB boardId different.";
1673  m_myCoutStream << "\n Data: boardId() = " << std::hex << "0x" << std::setw(4) << std::setfill('0') << boardIdData
1674  << std::setfill(' ') << std::dec;
1675  m_myCoutStream << "\n Emul: boardId() = " << std::hex << "0x" << std::setw(4) << std::setfill('0') << boardIdEmul
1676  << std::setfill(' ') << std::dec;
1677  m_myCoutStream << "\n";
1678  }
1679 
1680  // get bunch cross in the GT event record
1681  const int bxInEventData = psbBlockData.bxInEvent();
1682  const int bxInEventEmul = psbBlockEmul.bxInEvent();
1683 
1684  if (bxInEventData == bxInEventEmul) {
1685  m_myCoutStream << "\nData and emulated PSB bxInEvent identical.";
1686  m_myCoutStream << "\n bxInEvent() = " << bxInEventData;
1687  m_myCoutStream << "\n";
1688 
1689  } else {
1690  m_myCoutStream << "\nData and emulated PSB bxInEvent different.";
1691  m_myCoutStream << "\n Data: bxInEvent() = " << bxInEventData;
1692  m_myCoutStream << "\n Emul: bxInEvent() = " << bxInEventEmul;
1693  m_myCoutStream << "\n";
1694  }
1695 
1696  // get BxNr - bunch cross number of the actual bx
1697  const uint16_t bxNrData = psbBlockData.bxNr();
1698  const uint16_t bxNrEmul = psbBlockEmul.bxNr();
1699 
1700  if (bxNrData == bxNrEmul) {
1701  m_myCoutStream << "\nData and emulated PSB bxNr identical.";
1702  m_myCoutStream << "\n bxNr() = " << bxNrData;
1703  m_myCoutStream << "\n";
1704 
1705  } else {
1706  m_myCoutStream << "\nData and emulated PSB bxNr different.";
1707  m_myCoutStream << "\n Data: bxNr() = " << bxNrData;
1708  m_myCoutStream << "\n Emul: bxNr() = " << bxNrEmul;
1709  m_myCoutStream << "\n";
1710  }
1711 
1712  // get event number since last L1 reset generated in FDL
1713  const uint32_t eventNrData = psbBlockData.eventNr();
1714  const uint32_t eventNrEmul = psbBlockEmul.eventNr();
1715 
1716  if (eventNrData == eventNrEmul) {
1717  m_myCoutStream << "\nData and emulated PSB eventNr identical.";
1718  m_myCoutStream << "\n eventNr() = " << eventNrData;
1719  m_myCoutStream << "\n";
1720 
1721  } else {
1722  m_myCoutStream << "\nData and emulated PSB eventNr different.";
1723  m_myCoutStream << "\n Data: eventNr() = " << eventNrData;
1724  m_myCoutStream << "\n Emul: eventNr() = " << eventNrEmul;
1725  m_myCoutStream << "\n";
1726  }
1727 
1729  uint16_t valData;
1730  uint16_t valEmul;
1731 
1732  for (int iA = 0; iA < psbBlockData.NumberAData; ++iA) {
1733  valData = psbBlockData.aData(iA);
1734  valEmul = psbBlockEmul.aData(iA);
1735 
1736  if (valData == valEmul) {
1737  m_myCoutStream << "\nData and emulated PSB aData(" << iA << ") identical.";
1738  m_myCoutStream << "\n aData(iA) = " << std::hex << "0x" << std::setw(4) << std::setfill('0') << valData
1739  << std::setfill(' ') << std::dec;
1740  m_myCoutStream << "\n";
1741 
1742  } else {
1743  m_myCoutStream << "\nData and emulated PSB aData(" << iA << ") different.";
1744  m_myCoutStream << "\n Data: aData(iA) = " << std::hex << "0x" << std::setw(4) << std::setfill('0') << valData
1745  << std::setfill(' ') << std::dec;
1746  m_myCoutStream << "\n Emul: aData(iA) = " << std::hex << "0x" << std::setw(4) << std::setfill('0') << valEmul
1747  << std::setfill(' ') << std::dec;
1748  m_myCoutStream << "\n";
1749  }
1750  }
1751 
1753  for (int iB = 0; iB < psbBlockData.NumberBData; ++iB) {
1754  valData = psbBlockData.bData(iB);
1755  valEmul = psbBlockEmul.bData(iB);
1756 
1757  if (valData == valEmul) {
1758  m_myCoutStream << "\nData and emulated PSB bData(" << iB << ") identical.";
1759  m_myCoutStream << "\n bData(iA) = " << std::hex << "0x" << std::setw(4) << std::setfill('0') << valData
1760  << std::setfill(' ') << std::dec;
1761  m_myCoutStream << "\n";
1762 
1763  } else {
1764  m_myCoutStream << "\nData and emulated PSB bData(" << iB << ") different.";
1765  m_myCoutStream << "\n Data: bData(iA) = " << std::hex << "0x" << std::setw(4) << std::setfill('0') << valData
1766  << std::setfill(' ') << std::dec;
1767  m_myCoutStream << "\n Emul: bData(iA) = " << std::hex << "0x" << std::setw(4) << std::setfill('0') << valEmul
1768  << std::setfill(' ') << std::dec;
1769  m_myCoutStream << "\n";
1770  }
1771  }
1772 
1773  // get local bunch cross number of the actual bx
1774  const uint16_t localBxNrData = psbBlockData.localBxNr();
1775  const uint16_t localBxNrEmul = psbBlockEmul.localBxNr();
1776 
1777  if (localBxNrData == localBxNrEmul) {
1778  m_myCoutStream << "\nData and emulated PSB localBxNr identical.";
1779  m_myCoutStream << "\n localBxNr() = " << localBxNrData;
1780  m_myCoutStream << "\n";
1781 
1782  } else {
1783  m_myCoutStream << "\nData and emulated PSB localBxNr different.";
1784  m_myCoutStream << "\n Data: localBxNr() = " << localBxNrData;
1785  m_myCoutStream << "\n Emul: localBxNr() = " << localBxNrEmul;
1786  m_myCoutStream << "\n";
1787  }
1788 
1789  edm::LogInfo("L1GtHwValidation") << m_myCoutStream.str() << std::endl;
1790  m_myCoutStream.str("");
1791  m_myCoutStream.clear();
1792 }

References L1GtPsbWord::aData(), L1GtPsbWord::bData(), L1GtPsbWord::boardId(), L1GtPsbWord::bxInEvent(), L1GtPsbWord::bxNr(), TauDecayModes::dec, L1GtPsbWord::eventNr(), L1GtPsbWord::localBxNr(), LogDebug, m_myCoutStream, L1GtPsbWord::NumberAData, L1GtPsbWord::NumberBData, and L1GtPsbWord::print().

Referenced by compareDaqRecord().

◆ compareTCS()

void L1GtHwValidation::compareTCS ( const edm::Event &  iEvent,
const edm::EventSetup &  evSetup,
const L1TcsWord &  ,
const L1TcsWord &   
)
privatevirtual

compare the TCS board

Definition at line 1795 of file L1GtHwValidation.cc.

1798  {
1799  // empty
1800 }

◆ excludedAlgo()

bool L1GtHwValidation::excludedAlgo ( const int &  iBit) const
private

exclusion status for algorithm with bit i

Definition at line 2221 of file L1GtHwValidation.cc.

2221  {
2222  for (std::vector<int>::const_iterator itAlgo = m_excludedAlgoList.begin(); itAlgo != m_excludedAlgoList.end();
2223  ++itAlgo) {
2224  if (iBit == *itAlgo) {
2225  return true;
2226  }
2227  }
2228 
2229  return false;
2230 }

References m_excludedAlgoList.

Referenced by compareFDL().

◆ excludedAlgoList()

void L1GtHwValidation::excludedAlgoList ( )
private

exclude from comparison some bits with known disagreement - bit list

Definition at line 2101 of file L1GtHwValidation.cc.

2101  {
2102  const AlgorithmMap& algorithmMap = m_l1GtMenu->gtAlgorithmMap();
2103 
2104  for (CItAlgo itAlgo = algorithmMap.begin(); itAlgo != algorithmMap.end(); itAlgo++) {
2105  const std::string& algName = itAlgo->first;
2106  const int algBitNumber = (itAlgo->second).algoBitNumber();
2107  const int chipNr = (itAlgo->second).algoChipNumber();
2108 
2109  const ConditionMap& conditionMap = (m_l1GtMenu->gtConditionMap()).at(chipNr);
2110 
2111  const std::vector<L1GtLogicParser::TokenRPN>& aRpnVector = (itAlgo->second).algoRpnVector();
2112  size_t aRpnVectorSize = aRpnVector.size();
2113 
2114  bool algWithExcludedCondition = false;
2115  bool algWithConditionNotInMap = false;
2116 
2117  // loop over RpnVector and check each conditions against list of excluded conditions
2118  for (size_t opI = 0; opI < aRpnVectorSize; ++opI) {
2119  const std::string& cndName = (aRpnVector[opI]).operand;
2120 
2121  if (!cndName.empty()) {
2122  bool foundCond = false;
2123 
2124  CItCond itCond = conditionMap.find(cndName);
2125  if (itCond != conditionMap.end()) {
2126  const L1GtConditionCategory& cCateg = (itCond->second)->condCategory();
2127  const L1GtConditionType& cType = (itCond->second)->condType();
2128  const std::vector<L1GtObject>& objType = (itCond->second)->objectType();
2129 
2130  // condition index in the m_excludedCondCategory, m_excludedCondType, m_excludedL1GtObject vectors
2131  int iCond = -1;
2132 
2133  for (std::vector<L1GtConditionCategory>::const_iterator itCateg = m_excludedCondCategory.begin();
2134  itCateg != m_excludedCondCategory.end();
2135  ++itCateg) {
2136  iCond++;
2137 
2138  bool matchCondCategoryValue = matchCondCategory(cCateg, (*itCateg));
2139  bool matchCondTypeValue = matchCondType(cType, m_excludedCondType.at(iCond));
2140  bool matchCondL1GtObjectValue = matchCondL1GtObject(objType, m_excludedL1GtObject.at(iCond));
2141 
2142  LogTrace("L1GtHwValidation") << "\n "
2143  << "Algorithm: " << algName << " Condition: " << cndName << "\n "
2144  << "Category: " << l1GtConditionCategoryEnumToString(cCateg)
2145  << "; excluded: " << l1GtConditionCategoryEnumToString((*itCateg)) << "\n "
2146  << "Type: " << l1GtConditionTypeEnumToString(cType) << "; excluded: "
2147  << l1GtConditionTypeEnumToString(m_excludedCondType.at(iCond)) << "\n "
2148  << "Object excluded: "
2149  << l1GtObjectEnumToString(m_excludedL1GtObject.at(iCond)) << std::endl;
2150 
2151  if (matchCondCategoryValue && matchCondTypeValue && matchCondL1GtObjectValue) {
2152  algWithExcludedCondition = true;
2153  }
2154  }
2155 
2156  foundCond = true;
2157  }
2158 
2159  if (!foundCond) {
2160  // it should never be happen, all conditions are in the maps
2161 
2162  algWithConditionNotInMap = true;
2163 
2164  LogTrace("L1GtHwValidation") << "\n Error: condition " << cndName << " not found in condition map!"
2165  << "\n Add algorithm " << algName << " (bit number " << algBitNumber << ") "
2166  << "\n to list of algorithms excluded from comparison"
2167  << "\n data versus emulator." << std::endl;
2168  }
2169  }
2170  }
2171 
2172  if (algWithConditionNotInMap) {
2173  // it should never be happen, all conditions are in the maps
2174 
2175  m_excludedAlgoList.push_back(algBitNumber);
2176 
2177  LogTrace("L1GtHwValidation") << "\n Error: one or more conditions from algorithm " << algName << " (bit number "
2178  << algBitNumber << ") "
2179  << " not found in condition map!"
2180  << "\n Add it to list of algorithms excluded from comparison"
2181  << "\n data versus emulator." << std::endl;
2182  }
2183 
2184  if (algWithExcludedCondition) {
2185  m_excludedAlgoList.push_back(algBitNumber);
2186 
2187  LogTrace("L1GtHwValidation") << "\n Algorithm " << algName << " (bit number " << algBitNumber
2188  << ") contains an excluded condition."
2189  << "\n Add it to list of algorithms excluded from comparison"
2190  << "\n data versus emulator." << std::endl;
2191  }
2192 
2193  // add algorithm triggers from ExcludeAlgoTrigByName
2194  for (std::vector<std::string>::const_iterator itExcl = m_excludeAlgoTrigByName.begin();
2195  itExcl != m_excludeAlgoTrigByName.end();
2196  ++itExcl) {
2197  if ((*itExcl) == algName) {
2198  m_excludedAlgoList.push_back(algBitNumber);
2199 
2200  LogTrace("L1GtHwValidation") << "\n Algorithm " << algName << " (bit number " << algBitNumber
2201  << ")\n added to list of algorithms excluded from comparison"
2202  << " \n data versus emulator by ExcludeAlgoTrigByName." << std::endl;
2203  }
2204  }
2205 
2206  // add algorithm triggers from ExcludeAlgoTrigByBit
2207  for (std::vector<int>::const_iterator itExcl = m_excludeAlgoTrigByBit.begin();
2208  itExcl != m_excludeAlgoTrigByBit.end();
2209  ++itExcl) {
2210  if ((*itExcl) == algBitNumber) {
2211  m_excludedAlgoList.push_back(algBitNumber);
2212 
2213  LogTrace("L1GtHwValidation") << "\n Algorithm " << algName << " (bit number " << algBitNumber
2214  << ")\n added to list of algorithms excluded from comparison"
2215  << " \n data versus emulator by ExcludeAlgoTrigByBit." << std::endl;
2216  }
2217  }
2218  }
2219 }

References L1GtTriggerMenu::gtAlgorithmMap(), L1GtTriggerMenu::gtConditionMap(), l1GtConditionCategoryEnumToString(), l1GtConditionTypeEnumToString(), l1GtObjectEnumToString(), LogTrace, m_excludeAlgoTrigByBit, m_excludeAlgoTrigByName, m_excludedAlgoList, m_excludedCondCategory, m_excludedCondType, m_excludedL1GtObject, m_l1GtMenu, matchCondCategory(), matchCondL1GtObject(), matchCondType(), electrons_cff::objType, and AlCaHLTBitMon_QueryRunRegistry::string.

Referenced by bookHistograms().

◆ matchCondCategory()

bool L1GtHwValidation::matchCondCategory ( const L1GtConditionCategory &  conditionCategory,
const L1GtConditionCategory &  excludedCategory 
)
private

book all histograms for the module

return true if an algorithm has a condition of that category for CondNull, it returns always true

Definition at line 2053 of file L1GtHwValidation.cc.

2054  {
2055  bool matchValue = false;
2056 
2057  if (excludedCategory == CondNull) {
2058  matchValue = true;
2059  } else {
2060  if (conditionCategory == excludedCategory) {
2061  matchValue = true;
2062  }
2063  }
2064 
2065  return matchValue;
2066 }

References CondNull.

Referenced by excludedAlgoList().

◆ matchCondL1GtObject()

bool L1GtHwValidation::matchCondL1GtObject ( const std::vector< L1GtObject > &  condObjects,
const L1GtObject &  excludedObject 
)
private

return true if an algorithm has a condition containing that object for ObjNull, it returns always true

Definition at line 2082 of file L1GtHwValidation.cc.

2083  {
2084  bool matchValue = false;
2085 
2086  if (excludedObject == ObjNull) {
2087  matchValue = true;
2088 
2089  } else {
2090  for (std::vector<L1GtObject>::const_iterator itCondObj = condObjects.begin(); itCondObj != condObjects.end();
2091  ++itCondObj) {
2092  if ((*itCondObj) == excludedObject) {
2093  matchValue = true;
2094  }
2095  }
2096  }
2097 
2098  return matchValue;
2099 }

References ObjNull.

Referenced by excludedAlgoList().

◆ matchCondType()

bool L1GtHwValidation::matchCondType ( const L1GtConditionType &  conditionType,
const L1GtConditionType &  excludedType 
)
private

return true if an algorithm has a condition of that type for TypeNull, it returns always true

Definition at line 2068 of file L1GtHwValidation.cc.

2068  {
2069  bool matchValue = false;
2070 
2071  if (excludedType == TypeNull) {
2072  matchValue = true;
2073  } else {
2074  if (conditionType == excludedType) {
2075  matchValue = true;
2076  }
2077  }
2078 
2079  return matchValue;
2080 }

References writeEcalDQMStatus::conditionType, and TypeNull.

Referenced by excludedAlgoList().

Member Data Documentation

◆ m_agree

bool L1GtHwValidation::m_agree
private

internal members

Definition at line 186 of file L1GtHwValidation.h.

Referenced by compareDaqRecord(), and compareFDL().

◆ m_dataOnly

bool L1GtHwValidation::m_dataOnly
private

Definition at line 187 of file L1GtHwValidation.h.

Referenced by compareDaqRecord(), and compareFDL().

◆ m_dataOnlyMask

bool L1GtHwValidation::m_dataOnlyMask
private

Definition at line 189 of file L1GtHwValidation.h.

Referenced by compareDaqRecord(), and compareFDL().

◆ m_dirName

std::string L1GtHwValidation::m_dirName
private

directory name for L1Extra plots

Definition at line 127 of file L1GtHwValidation.h.

Referenced by bookHistograms().

◆ m_emulOnly

bool L1GtHwValidation::m_emulOnly
private

Definition at line 188 of file L1GtHwValidation.h.

Referenced by compareDaqRecord(), and compareFDL().

◆ m_emulOnlyMask

bool L1GtHwValidation::m_emulOnlyMask
private

Definition at line 190 of file L1GtHwValidation.h.

Referenced by compareDaqRecord(), and compareFDL().

◆ m_excludeAlgoTrigByBit

std::vector<int> L1GtHwValidation::m_excludeAlgoTrigByBit
private

exclude algorithm triggers from comparison data - emulator by algorithm bit number

Definition at line 137 of file L1GtHwValidation.h.

Referenced by excludedAlgoList().

◆ m_excludeAlgoTrigByName

std::vector<std::string> L1GtHwValidation::m_excludeAlgoTrigByName
private

exclude algorithm triggers from comparison data - emulator by algorithm name

Definition at line 134 of file L1GtHwValidation.h.

Referenced by excludedAlgoList().

◆ m_excludeCondCategTypeObject

std::vector<edm::ParameterSet> L1GtHwValidation::m_excludeCondCategTypeObject
private

exclude algorithm triggers from comparison data - emulator by condition category and / or type

Definition at line 131 of file L1GtHwValidation.h.

Referenced by L1GtHwValidation().

◆ m_excludedAlgoList

std::vector<int> L1GtHwValidation::m_excludedAlgoList
private

Definition at line 263 of file L1GtHwValidation.h.

Referenced by bookHistograms(), excludedAlgo(), and excludedAlgoList().

◆ m_excludedAlgorithmsAgreement

MonitorElement* L1GtHwValidation::m_excludedAlgorithmsAgreement
private

Definition at line 250 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_excludedCondCategory

std::vector<L1GtConditionCategory> L1GtHwValidation::m_excludedCondCategory
private

excluded condition categories

Definition at line 141 of file L1GtHwValidation.h.

Referenced by excludedAlgoList(), and L1GtHwValidation().

◆ m_excludedCondType

std::vector<L1GtConditionType> L1GtHwValidation::m_excludedCondType
private

excluded condition types

Definition at line 144 of file L1GtHwValidation.h.

Referenced by excludedAlgoList(), and L1GtHwValidation().

◆ m_excludedL1GtObject

std::vector<L1GtObject> L1GtHwValidation::m_excludedL1GtObject
private

excluded L1 GT objects

Definition at line 147 of file L1GtHwValidation.h.

Referenced by excludedAlgoList(), and L1GtHwValidation().

◆ m_fdlDataAlgoDecision

MonitorElement* L1GtHwValidation::m_fdlDataAlgoDecision[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 204 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataAlgoDecision_Err

MonitorElement* L1GtHwValidation::m_fdlDataAlgoDecision_Err[NumberOfGtRecords]
private

Definition at line 214 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataAlgoDecision_NoMatch

MonitorElement* L1GtHwValidation::m_fdlDataAlgoDecision_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 208 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataAlgoDecisionMask

MonitorElement* L1GtHwValidation::m_fdlDataAlgoDecisionMask[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 207 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataAlgoDecisionMask_NoMatch

MonitorElement* L1GtHwValidation::m_fdlDataAlgoDecisionMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 211 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataAlgoDecisionPrescaled

MonitorElement* L1GtHwValidation::m_fdlDataAlgoDecisionPrescaled[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 205 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataAlgoDecisionPrescaled_NoMatch

MonitorElement* L1GtHwValidation::m_fdlDataAlgoDecisionPrescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 209 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataAlgoDecisionPrescaledMask_NoMatch

MonitorElement* L1GtHwValidation::m_fdlDataAlgoDecisionPrescaledMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 212 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataAlgoDecisionUnprescaled

MonitorElement* L1GtHwValidation::m_fdlDataAlgoDecisionUnprescaled[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 206 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataAlgoDecisionUnprescaled_NoMatch

MonitorElement* L1GtHwValidation::m_fdlDataAlgoDecisionUnprescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 210 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataAlgoDecisionUnprescaledMask_NoMatch

MonitorElement* L1GtHwValidation::m_fdlDataAlgoDecisionUnprescaledMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 213 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataEmul

MonitorElement* L1GtHwValidation::m_fdlDataEmul[TotalBxInEvent][NumberOfGtRecords]
private

FDL (0 for DAQ, 1 for EVM record)

Definition at line 202 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataEmul_Err

MonitorElement* L1GtHwValidation::m_fdlDataEmul_Err[NumberOfGtRecords]
private

Definition at line 235 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataEmulAlgoDecision

MonitorElement* L1GtHwValidation::m_fdlDataEmulAlgoDecision[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 229 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataEmulAlgoDecision_Err

MonitorElement* L1GtHwValidation::m_fdlDataEmulAlgoDecision_Err[NumberOfGtRecords]
private

Definition at line 234 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataEmulAlgoDecisionMask

MonitorElement* L1GtHwValidation::m_fdlDataEmulAlgoDecisionMask[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 233 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataEmulAlgoDecisionPrescaled

MonitorElement* L1GtHwValidation::m_fdlDataEmulAlgoDecisionPrescaled[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 230 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataEmulAlgoDecisionUnprescaled

MonitorElement* L1GtHwValidation::m_fdlDataEmulAlgoDecisionUnprescaled[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 231 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataEmulAlgoDecisionUnprescaledAllowed

MonitorElement* L1GtHwValidation::m_fdlDataEmulAlgoDecisionUnprescaledAllowed[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 232 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataEmulTechDecision

MonitorElement* L1GtHwValidation::m_fdlDataEmulTechDecision[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 246 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataEmulTechDecision_Err

MonitorElement* L1GtHwValidation::m_fdlDataEmulTechDecision_Err[NumberOfGtRecords]
private

Definition at line 248 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataEmulTechDecisionMask

MonitorElement* L1GtHwValidation::m_fdlDataEmulTechDecisionMask[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 247 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataTechDecision

MonitorElement* L1GtHwValidation::m_fdlDataTechDecision[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 238 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataTechDecision_Err

MonitorElement* L1GtHwValidation::m_fdlDataTechDecision_Err[NumberOfGtRecords]
private

Definition at line 240 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlDataTechDecisionMask

MonitorElement* L1GtHwValidation::m_fdlDataTechDecisionMask[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 239 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlEmulAlgoDecision

MonitorElement* L1GtHwValidation::m_fdlEmulAlgoDecision[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 216 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlEmulAlgoDecision_Err

MonitorElement* L1GtHwValidation::m_fdlEmulAlgoDecision_Err[NumberOfGtRecords]
private

Definition at line 226 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlEmulAlgoDecision_NoMatch

MonitorElement* L1GtHwValidation::m_fdlEmulAlgoDecision_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 220 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlEmulAlgoDecisionMask

MonitorElement* L1GtHwValidation::m_fdlEmulAlgoDecisionMask[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 219 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlEmulAlgoDecisionMask_NoMatch

MonitorElement* L1GtHwValidation::m_fdlEmulAlgoDecisionMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 223 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlEmulAlgoDecisionPrescaled

MonitorElement* L1GtHwValidation::m_fdlEmulAlgoDecisionPrescaled[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 217 of file L1GtHwValidation.h.

Referenced by bookHistograms().

◆ m_fdlEmulAlgoDecisionPrescaled_NoMatch

MonitorElement* L1GtHwValidation::m_fdlEmulAlgoDecisionPrescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 221 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlEmulAlgoDecisionPrescaledMask_NoMatch

MonitorElement* L1GtHwValidation::m_fdlEmulAlgoDecisionPrescaledMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 224 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlEmulAlgoDecisionUnprescaled

MonitorElement* L1GtHwValidation::m_fdlEmulAlgoDecisionUnprescaled[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 218 of file L1GtHwValidation.h.

Referenced by bookHistograms().

◆ m_fdlEmulAlgoDecisionUnprescaled_NoMatch

MonitorElement* L1GtHwValidation::m_fdlEmulAlgoDecisionUnprescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 222 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlEmulAlgoDecisionUnprescaledMask_NoMatch

MonitorElement* L1GtHwValidation::m_fdlEmulAlgoDecisionUnprescaledMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 225 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlEmulTechDecision

MonitorElement* L1GtHwValidation::m_fdlEmulTechDecision[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 242 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlEmulTechDecision_Err

MonitorElement* L1GtHwValidation::m_fdlEmulTechDecision_Err[NumberOfGtRecords]
private

Definition at line 244 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_fdlEmulTechDecisionMask

MonitorElement* L1GtHwValidation::m_fdlEmulTechDecisionMask[TotalBxInEvent][NumberOfGtRecords]
private

Definition at line 243 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_gtErrorFlag

MonitorElement* L1GtHwValidation::m_gtErrorFlag
private

PSB.

ErrorFlag a la HardwareValidation

Definition at line 257 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareDaqRecord().

◆ m_gtfeDataEmul

MonitorElement* L1GtHwValidation::m_gtfeDataEmul[NumberOfGtRecords]
private

histograms

GTFE

Definition at line 199 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareGTFE().

◆ m_l1GctDataInputTag

edm::InputTag L1GtHwValidation::m_l1GctDataInputTag
private

input tag for the L1 GCT hardware record

Definition at line 124 of file L1GtHwValidation.h.

Referenced by L1GtHwValidation().

◆ m_l1GtDataDaqInputTag

edm::InputTag L1GtHwValidation::m_l1GtDataDaqInputTag
private

input tag for the L1 GT hardware DAQ record

Definition at line 112 of file L1GtHwValidation.h.

Referenced by L1GtHwValidation().

◆ m_l1GtDataDaqInputToken_

edm::EDGetTokenT<L1GlobalTriggerReadoutRecord> L1GtHwValidation::m_l1GtDataDaqInputToken_
private

Definition at line 266 of file L1GtHwValidation.h.

Referenced by compareDaqRecord(), and L1GtHwValidation().

◆ m_l1GtDataEvmInputTag

edm::InputTag L1GtHwValidation::m_l1GtDataEvmInputTag
private

input tag for the L1 GT hardware EVM record

Definition at line 115 of file L1GtHwValidation.h.

Referenced by L1GtHwValidation().

◆ m_l1GtDataEvmInputToken_

edm::EDGetTokenT<L1GlobalTriggerEvmReadoutRecord> L1GtHwValidation::m_l1GtDataEvmInputToken_
private

Definition at line 268 of file L1GtHwValidation.h.

Referenced by compareEvmRecord(), and L1GtHwValidation().

◆ m_l1GtEmulDaqInputTag

edm::InputTag L1GtHwValidation::m_l1GtEmulDaqInputTag
private

input tag for the L1 GT emulator DAQ record

Definition at line 118 of file L1GtHwValidation.h.

Referenced by L1GtHwValidation().

◆ m_l1GtEmulDaqInputToken_

edm::EDGetTokenT<L1GlobalTriggerReadoutRecord> L1GtHwValidation::m_l1GtEmulDaqInputToken_
private

Definition at line 267 of file L1GtHwValidation.h.

Referenced by compareDaqRecord(), and L1GtHwValidation().

◆ m_l1GtEmulEvmInputTag

edm::InputTag L1GtHwValidation::m_l1GtEmulEvmInputTag
private

input tag for the L1 GT emulator EVM record

Definition at line 121 of file L1GtHwValidation.h.

Referenced by L1GtHwValidation().

◆ m_l1GtEmulEvmInputToken_

edm::EDGetTokenT<L1GlobalTriggerEvmReadoutRecord> L1GtHwValidation::m_l1GtEmulEvmInputToken_
private

Definition at line 269 of file L1GtHwValidation.h.

Referenced by compareEvmRecord(), and L1GtHwValidation().

◆ m_l1GtMenu

const L1GtTriggerMenu* L1GtHwValidation::m_l1GtMenu
private

trigger menu

Definition at line 160 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and excludedAlgoList().

◆ m_l1GtMenuCacheID

unsigned long long L1GtHwValidation::m_l1GtMenuCacheID
private

Definition at line 161 of file L1GtHwValidation.h.

Referenced by bookHistograms().

◆ m_l1GtPfAlgo

const L1GtPrescaleFactors* L1GtHwValidation::m_l1GtPfAlgo
private

prescale factors

Definition at line 164 of file L1GtHwValidation.h.

Referenced by bookHistograms().

◆ m_l1GtPfAlgoCacheID

unsigned long long L1GtHwValidation::m_l1GtPfAlgoCacheID
private

Definition at line 165 of file L1GtHwValidation.h.

Referenced by bookHistograms().

◆ m_l1GtPfTech

const L1GtPrescaleFactors* L1GtHwValidation::m_l1GtPfTech
private

Definition at line 167 of file L1GtHwValidation.h.

Referenced by bookHistograms().

◆ m_l1GtPfTechCacheID

unsigned long long L1GtHwValidation::m_l1GtPfTechCacheID
private

Definition at line 168 of file L1GtHwValidation.h.

Referenced by bookHistograms().

◆ m_l1GtTmAlgo

const L1GtTriggerMask* L1GtHwValidation::m_l1GtTmAlgo
private

trigger masks

Definition at line 174 of file L1GtHwValidation.h.

Referenced by bookHistograms().

◆ m_l1GtTmAlgoCacheID

unsigned long long L1GtHwValidation::m_l1GtTmAlgoCacheID
private

Definition at line 175 of file L1GtHwValidation.h.

Referenced by bookHistograms().

◆ m_l1GtTmTech

const L1GtTriggerMask* L1GtHwValidation::m_l1GtTmTech
private

Definition at line 177 of file L1GtHwValidation.h.

Referenced by bookHistograms().

◆ m_l1GtTmTechCacheID

unsigned long long L1GtHwValidation::m_l1GtTmTechCacheID
private

Definition at line 178 of file L1GtHwValidation.h.

Referenced by bookHistograms().

◆ m_myCoutStream

std::ostringstream L1GtHwValidation::m_myCoutStream
private

an output stream to print into it can then be directed to whatever log level is desired

Definition at line 151 of file L1GtHwValidation.h.

Referenced by compareDaqRecord(), compareEvmRecord(), compareFDL(), compareGTFE(), and comparePSB().

◆ m_nrDataEventError

int L1GtHwValidation::m_nrDataEventError
private

counters

Definition at line 154 of file L1GtHwValidation.h.

Referenced by compareDaqRecord(), and compareEvmRecord().

◆ m_nrEmulEventError

int L1GtHwValidation::m_nrEmulEventError
private

Definition at line 155 of file L1GtHwValidation.h.

Referenced by compareDaqRecord(), and compareEvmRecord().

◆ m_nrEvJob

int L1GtHwValidation::m_nrEvJob
private

Definition at line 260 of file L1GtHwValidation.h.

Referenced by analyze().

◆ m_nrEvRun

int L1GtHwValidation::m_nrEvRun
private

Definition at line 261 of file L1GtHwValidation.h.

Referenced by analyze(), and bookHistograms().

◆ m_prescaleFactorsAlgoTrig

const std::vector<std::vector<int> >* L1GtHwValidation::m_prescaleFactorsAlgoTrig
private

Definition at line 170 of file L1GtHwValidation.h.

Referenced by bookHistograms().

◆ m_prescaleFactorsTechTrig

const std::vector<std::vector<int> >* L1GtHwValidation::m_prescaleFactorsTechTrig
private

Definition at line 171 of file L1GtHwValidation.h.

Referenced by bookHistograms().

◆ m_triggerMaskAlgoTrig

std::vector<unsigned int> L1GtHwValidation::m_triggerMaskAlgoTrig
private

Definition at line 180 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ m_triggerMaskTechTrig

std::vector<unsigned int> L1GtHwValidation::m_triggerMaskTechTrig
private

Definition at line 181 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

◆ NumberOfGtRecords

const int L1GtHwValidation::NumberOfGtRecords = 2
staticprivate

Definition at line 194 of file L1GtHwValidation.h.

Referenced by bookHistograms().

◆ TotalBxInEvent

const int L1GtHwValidation::TotalBxInEvent = 5
staticprivate

Definition at line 193 of file L1GtHwValidation.h.

Referenced by bookHistograms(), and compareFDL().

L1GtHwValidation::m_fdlEmulTechDecisionMask
MonitorElement * m_fdlEmulTechDecisionMask[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:243
L1GtHwValidation::m_agree
bool m_agree
internal members
Definition: L1GtHwValidation.h:186
L1GtHwValidation::m_l1GtTmAlgoCacheID
unsigned long long m_l1GtTmAlgoCacheID
Definition: L1GtHwValidation.h:175
L1GtHwValidation::m_gtfeDataEmul
MonitorElement * m_gtfeDataEmul[NumberOfGtRecords]
histograms
Definition: L1GtHwValidation.h:199
edm::ESHandle::product
T const * product() const
Definition: ESHandle.h:86
L1GtHwValidation::m_l1GtDataDaqInputTag
edm::InputTag m_l1GtDataDaqInputTag
input tag for the L1 GT hardware DAQ record
Definition: L1GtHwValidation.h:112
L1GtfeWord::activeBoards
const cms_uint16_t activeBoards() const
get/set boards contributing to EVM respectively DAQ record
Definition: L1GtfeWord.h:119
L1GtHwValidation::m_fdlDataAlgoDecisionMask_NoMatch
MonitorElement * m_fdlDataAlgoDecisionMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:211
L1GtFdlWord::bxInEvent
const int bxInEvent() const
get/set bunch cross in the GT event record
Definition: L1GtFdlWord.h:76
CItCond
ConditionMap::const_iterator CItCond
iterators through map containing the conditions
Definition: L1GtTriggerMenuFwd.h:34
L1GtHwValidation::m_l1GtMenu
const L1GtTriggerMenu * m_l1GtMenu
trigger menu
Definition: L1GtHwValidation.h:160
L1GtHwValidation::m_fdlDataEmulAlgoDecisionMask
MonitorElement * m_fdlDataEmulAlgoDecisionMask[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:233
ObjNull
Definition: L1GtObject.h:46
L1GtPsbWord::aData
const cms_uint16_t aData(int iA) const
get/set A_DATA_CH_IA
Definition: L1GtPsbWord.cc:181
l1GtConditionCategoryEnumToString
std::string l1GtConditionCategoryEnumToString(const L1GtConditionCategory &)
Definition: L1GtDefinitions.cc:225
L1GtHwValidation::m_fdlDataEmul
MonitorElement * m_fdlDataEmul[TotalBxInEvent][NumberOfGtRecords]
FDL (0 for DAQ, 1 for EVM record)
Definition: L1GtHwValidation.h:202
L1GtHwValidation::compareGt_Gct
virtual void compareGt_Gct(const edm::Event &, const edm::EventSetup &)
Definition: L1GtHwValidation.cc:2034
L1GtHwValidation::m_excludedAlgorithmsAgreement
MonitorElement * m_excludedAlgorithmsAgreement
Definition: L1GtHwValidation.h:250
L1GtFdlWord::gtPrescaleFactorIndexAlgo
const cms_uint16_t gtPrescaleFactorIndexAlgo() const
Definition: L1GtFdlWord.h:195
L1GtHwValidation::m_fdlEmulAlgoDecisionUnprescaledMask_NoMatch
MonitorElement * m_fdlEmulAlgoDecisionUnprescaledMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:225
L1GtHwValidation::m_l1GtEmulDaqInputToken_
edm::EDGetTokenT< L1GlobalTriggerReadoutRecord > m_l1GtEmulDaqInputToken_
Definition: L1GtHwValidation.h:267
l1GtObjectEnumToString
std::string l1GtObjectEnumToString(const L1GtObject &)
Definition: L1GtObject.cc:69
L1GtHwValidation::m_nrDataEventError
int m_nrDataEventError
counters
Definition: L1GtHwValidation.h:154
L1GtHwValidation::m_fdlEmulAlgoDecision_Err
MonitorElement * m_fdlEmulAlgoDecision_Err[NumberOfGtRecords]
Definition: L1GtHwValidation.h:226
L1GtHwValidation::matchCondType
bool matchCondType(const L1GtConditionType &, const L1GtConditionType &)
Definition: L1GtHwValidation.cc:2068
L1GtfeWord::totalTriggerNr
const cms_uint32_t totalTriggerNr() const
get/set total number of L1A sent since start of run
Definition: L1GtfeWord.h:149
L1GlobalTriggerEvmReadoutRecord::gtfeWord
const L1GtfeExtWord gtfeWord() const
get / set GTFE word (record) in the GT readout record
Definition: L1GlobalTriggerEvmReadoutRecord.cc:249
L1GtPrescaleFactors::gtPrescaleFactors
const std::vector< std::vector< int > > & gtPrescaleFactors() const
get the prescale factors by reference
Definition: L1GtPrescaleFactors.h:45
L1GtfeWord::print
virtual void print(std::ostream &myCout) const
pretty print the content of a L1GtfeWord
Definition: L1GtfeWord.cc:253
dqm::implementation::NavigatorBase::setCurrentFolder
virtual void setCurrentFolder(std::string const &fullpath)
Definition: DQMStore.cc:32
L1GtFdlWord::gtDecisionWordExtended
const DecisionWordExtended & gtDecisionWordExtended() const
get/set extended algorithms bits (extended decision word)
Definition: L1GtFdlWord.h:153
L1GtHwValidation::m_nrEvRun
int m_nrEvRun
Definition: L1GtHwValidation.h:261
L1GtFdlWord::noAlgo
const cms_uint16_t noAlgo() const
get/set NoAlgo
Definition: L1GtFdlWord.h:209
L1GtHwValidation::m_fdlDataAlgoDecision_NoMatch
MonitorElement * m_fdlDataAlgoDecision_NoMatch[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:208
L1GtHwValidation::TotalBxInEvent
static const int TotalBxInEvent
Definition: L1GtHwValidation.h:193
L1GtTriggerMenu::gtTriggerMenuImplementation
const std::string & gtTriggerMenuImplementation() const
Definition: L1GtTriggerMenu.h:96
L1GtHwValidation::m_l1GtDataDaqInputToken_
edm::EDGetTokenT< L1GlobalTriggerReadoutRecord > m_l1GtDataDaqInputToken_
Definition: L1GtHwValidation.h:266
L1GtHwValidation::m_fdlDataTechDecisionMask
MonitorElement * m_fdlDataTechDecisionMask[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:239
L1GtHwValidation::m_fdlEmulAlgoDecisionUnprescaled
MonitorElement * m_fdlEmulAlgoDecisionUnprescaled[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:218
L1GtHwValidation::m_fdlEmulTechDecision_Err
MonitorElement * m_fdlEmulTechDecision_Err[NumberOfGtRecords]
Definition: L1GtHwValidation.h:244
L1GtHwValidation::m_fdlEmulAlgoDecision
MonitorElement * m_fdlEmulAlgoDecision[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:216
l1GtConditionCategoryStringToEnum
L1GtConditionCategory l1GtConditionCategoryStringToEnum(const std::string &)
Definition: L1GtDefinitions.cc:207
L1GtHwValidation::m_myCoutStream
std::ostringstream m_myCoutStream
Definition: L1GtHwValidation.h:151
L1GlobalTriggerEvmReadoutRecord::gtFdlVector
const std::vector< L1GtFdlWord > gtFdlVector() const
get the vector of L1GtFdlWord
Definition: L1GlobalTriggerEvmReadoutRecord.h:100
L1GtfeWord::setupVersion
const cms_uint32_t setupVersion() const
get/set setup version
Definition: L1GtfeWord.h:104
L1GtHwValidation::m_prescaleFactorsTechTrig
const std::vector< std::vector< int > > * m_prescaleFactorsTechTrig
Definition: L1GtHwValidation.h:171
edm::ParameterSet::getUntrackedParameter
T getUntrackedParameter(std::string const &, T const &) const
L1GtfeWord
Definition: L1GtfeWord.h:30
edm::LogInfo
Log< level::Info, false > LogInfo
Definition: MessageLogger.h:125
L1GtHwValidation::compareDaqRecord
virtual void compareDaqRecord(const edm::Event &, const edm::EventSetup &)
L1 GT DAQ record comparison.
Definition: L1GtHwValidation.cc:1803
L1GtHwValidation::m_excludeCondCategTypeObject
std::vector< edm::ParameterSet > m_excludeCondCategTypeObject
Definition: L1GtHwValidation.h:131
L1GtPsbWord
Definition: L1GtPsbWord.h:29
edm::Handle
Definition: AssociativeIterator.h:50
L1GtHwValidation::m_fdlEmulAlgoDecisionMask_NoMatch
MonitorElement * m_fdlEmulAlgoDecisionMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:223
L1GtPrescaleFactorsTechTrigRcd
Definition: L1GtPrescaleFactorsTechTrigRcd.h:38
L1GtHwValidation::m_fdlDataEmulAlgoDecision_Err
MonitorElement * m_fdlDataEmulAlgoDecision_Err[NumberOfGtRecords]
Definition: L1GtHwValidation.h:234
edm::LogWarning
Log< level::Warning, false > LogWarning
Definition: MessageLogger.h:122
writeEcalDQMStatus.conditionType
conditionType
Definition: writeEcalDQMStatus.py:52
L1GtPsbWord::bData
const cms_uint16_t bData(int iB) const
get/set B_DATA_CH_IB
Definition: L1GtPsbWord.cc:253
L1GtPsbWord::bxNr
const cms_uint16_t bxNr() const
get/set bunch cross number of the actual bx
Definition: L1GtPsbWord.h:84
L1GtHwValidation::m_fdlDataEmul_Err
MonitorElement * m_fdlDataEmul_Err[NumberOfGtRecords]
Definition: L1GtHwValidation.h:235
L1GtHwValidation::NumberOfGtRecords
static const int NumberOfGtRecords
Definition: L1GtHwValidation.h:194
L1GtHwValidation::m_nrEvJob
int m_nrEvJob
Definition: L1GtHwValidation.h:260
L1GtHwValidation::m_emulOnly
bool m_emulOnly
Definition: L1GtHwValidation.h:188
L1GtHwValidation::m_excludedCondCategory
std::vector< L1GtConditionCategory > m_excludedCondCategory
excluded condition categories
Definition: L1GtHwValidation.h:141
L1GtConditionCategory
L1GtConditionCategory
condition categories
Definition: L1GtDefinitions.h:26
L1GtfeWord::recordLength
const cms_uint16_t recordLength() const
get/set record length for alternative 0
Definition: L1GtfeWord.h:82
contentValuesCheck.ss
ss
Definition: contentValuesCheck.py:33
L1GtHwValidation::m_l1GtPfAlgo
const L1GtPrescaleFactors * m_l1GtPfAlgo
prescale factors
Definition: L1GtHwValidation.h:164
l1GtConditionTypeStringToEnum
L1GtConditionType l1GtConditionTypeStringToEnum(const std::string &)
Definition: L1GtDefinitions.cc:176
l1GtConditionTypeEnumToString
std::string l1GtConditionTypeEnumToString(const L1GtConditionType &)
Definition: L1GtDefinitions.cc:195
CondNull
Definition: L1GtDefinitions.h:27
L1GtHwValidation::m_fdlEmulAlgoDecisionPrescaled
MonitorElement * m_fdlEmulAlgoDecisionPrescaled[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:217
L1GtFdlWord::localBxNr
const cms_uint16_t localBxNr() const
get/set local bunch cross number of the actual bx
Definition: L1GtFdlWord.h:259
L1GtHwValidation::m_l1GctDataInputTag
edm::InputTag m_l1GctDataInputTag
input tag for the L1 GCT hardware record
Definition: L1GtHwValidation.h:124
edm::EventSetup::get
T get() const
Definition: EventSetup.h:80
CItAlgo
AlgorithmMap::const_iterator CItAlgo
iterators through map containing the algorithms
Definition: L1GtTriggerMenuFwd.h:38
L1GtHwValidation::m_triggerMaskAlgoTrig
std::vector< unsigned int > m_triggerMaskAlgoTrig
Definition: L1GtHwValidation.h:180
L1GtFdlWord::eventNr
const cms_uint32_t eventNr() const
get/set event number since last L1 reset generated in FDL
Definition: L1GtFdlWord.h:100
L1GtHwValidation::m_fdlEmulAlgoDecisionPrescaled_NoMatch
MonitorElement * m_fdlEmulAlgoDecisionPrescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:221
L1GtHwValidation::m_l1GtTmTechCacheID
unsigned long long m_l1GtTmTechCacheID
Definition: L1GtHwValidation.h:178
L1GtHwValidation::m_fdlDataEmulTechDecision_Err
MonitorElement * m_fdlDataEmulTechDecision_Err[NumberOfGtRecords]
Definition: L1GtHwValidation.h:248
L1GtTriggerMaskTechTrigRcd
Definition: L1GtTriggerMaskTechTrigRcd.h:39
ConditionMap
std::map< std::string, L1GtCondition * > ConditionMap
map containing the conditions
Definition: L1GtTriggerMenuFwd.h:28
L1GtTriggerMenuRcd
Definition: L1GtTriggerMenuRcd.h:32
dqm::impl::MonitorElement::Fill
void Fill(long long x)
Definition: MonitorElement.h:290
L1GtHwValidation::m_l1GtDataEvmInputTag
edm::InputTag m_l1GtDataEvmInputTag
input tag for the L1 GT hardware EVM record
Definition: L1GtHwValidation.h:115
L1GtFdlWord::boardId
const cms_uint16_t boardId() const
get/set board ID
Definition: L1GtFdlWord.h:63
L1GlobalTriggerReadoutSetup::NumberPhysTriggers
static const unsigned int NumberPhysTriggers
Definition: L1GlobalTriggerReadoutSetup.h:36
AlgorithmMap
std::map< std::string, L1GtAlgorithm > AlgorithmMap
map containing the algorithms
Definition: L1GtTriggerMenuFwd.h:31
L1GtTriggerMaskAlgoTrigRcd
Definition: L1GtTriggerMaskAlgoTrigRcd.h:39
str
#define str(s)
Definition: TestProcessor.cc:51
edm::ESHandle
Definition: DTSurvey.h:22
L1GtPsbWord::bxInEvent
const int bxInEvent() const
get/set bunch cross in the GT event record
Definition: L1GtPsbWord.h:71
L1GtHwValidation::m_fdlDataEmulTechDecisionMask
MonitorElement * m_fdlDataEmulTechDecisionMask[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:247
L1GtPsbWord::print
void print(std::ostream &myCout) const
pretty print
Definition: L1GtPsbWord.cc:348
L1GtHwValidation::m_fdlDataEmulAlgoDecision
MonitorElement * m_fdlDataEmulAlgoDecision[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:229
L1GtHwValidation::m_fdlDataAlgoDecisionPrescaledMask_NoMatch
MonitorElement * m_fdlDataAlgoDecisionPrescaledMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:212
L1GtHwValidation::m_fdlEmulAlgoDecisionUnprescaled_NoMatch
MonitorElement * m_fdlEmulAlgoDecisionUnprescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:222
AlCaHLTBitMon_QueryRunRegistry.string
string
Definition: AlCaHLTBitMon_QueryRunRegistry.py:256
L1GlobalTriggerReadoutRecord::gtPsbVector
const std::vector< L1GtPsbWord > gtPsbVector() const
get the vector of L1GtPsbWord
Definition: L1GlobalTriggerReadoutRecord.h:131
L1GtHwValidation::m_fdlDataTechDecision
MonitorElement * m_fdlDataTechDecision[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:238
L1GtHwValidation::m_gtErrorFlag
MonitorElement * m_gtErrorFlag
PSB.
Definition: L1GtHwValidation.h:257
L1GtConditionType
L1GtConditionType
Definition: L1GtDefinitions.h:4
L1GtHwValidation::m_l1GtPfTechCacheID
unsigned long long m_l1GtPfTechCacheID
Definition: L1GtHwValidation.h:168
L1GtHwValidation::m_l1GtDataEvmInputToken_
edm::EDGetTokenT< L1GlobalTriggerEvmReadoutRecord > m_l1GtDataEvmInputToken_
Definition: L1GtHwValidation.h:268
L1GtPsbWord::eventNr
const cms_uint32_t eventNr() const
get/set event number since last L1 reset generated in PSB
Definition: L1GtPsbWord.h:97
L1GtHwValidation::m_fdlEmulAlgoDecision_NoMatch
MonitorElement * m_fdlEmulAlgoDecision_NoMatch[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:220
L1GtHwValidation::m_dirName
std::string m_dirName
directory name for L1Extra plots
Definition: L1GtHwValidation.h:127
L1GtPsbWord::NumberBData
static const int NumberBData
Definition: L1GtPsbWord.h:32
electrons_cff.objType
objType
Definition: electrons_cff.py:514
LogDebug
#define LogDebug(id)
Definition: MessageLogger.h:223
l1GtObjectStringToEnum
L1GtObject l1GtObjectStringToEnum(const std::string &)
Definition: L1GtObject.cc:24
L1GtHwValidation::m_excludedCondType
std::vector< L1GtConditionType > m_excludedCondType
excluded condition types
Definition: L1GtHwValidation.h:144
L1GtHwValidation::m_fdlDataEmulAlgoDecisionUnprescaled
MonitorElement * m_fdlDataEmulAlgoDecisionUnprescaled[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:231
L1GtHwValidation::m_fdlDataAlgoDecisionMask
MonitorElement * m_fdlDataAlgoDecisionMask[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:207
L1GtHwValidation::comparePSB
virtual void comparePSB(const edm::Event &, const edm::EventSetup &, const L1GtPsbWord &, const L1GtPsbWord &)
compare the PSB board
Definition: L1GtHwValidation.cc:1638
B2GTnPMonitor_cfi.histTitle
histTitle
Definition: B2GTnPMonitor_cfi.py:112
L1GtfeWord::bxNr
const cms_uint16_t bxNr() const
get/set bunch cross number as counted in the GTFE board
Definition: L1GtfeWord.h:93
L1GtTriggerMask::gtTriggerMask
const std::vector< unsigned int > & gtTriggerMask() const
get the trigger mask
Definition: L1GtTriggerMask.h:47
L1GtHwValidation::m_excludedAlgoList
std::vector< int > m_excludedAlgoList
Definition: L1GtHwValidation.h:263
L1GtHwValidation::m_prescaleFactorsAlgoTrig
const std::vector< std::vector< int > > * m_prescaleFactorsAlgoTrig
Definition: L1GtHwValidation.h:170
L1GtFdlWord::printGtDecisionWordExtended
void printGtDecisionWordExtended(std::ostream &myCout) const
Definition: L1GtFdlWord.cc:413
L1GtFdlWord
Definition: L1GtFdlWord.h:29
L1GlobalTriggerReadoutRecord::gtfeWord
const L1GtfeWord gtfeWord() const
get / set GTFE word (record) in the GT readout record
Definition: L1GlobalTriggerReadoutRecord.cc:367
Skims_PDWG_cff.prescaleFactor
prescaleFactor
Definition: Skims_PDWG_cff.py:25
iEvent
int iEvent
Definition: GenABIO.cc:224
L1GtHwValidation::m_l1GtTmTech
const L1GtTriggerMask * m_l1GtTmTech
Definition: L1GtHwValidation.h:177
dqm::impl::MonitorElement::setBinLabel
virtual void setBinLabel(int bin, const std::string &label, int axis=1)
set bin label for x, y or z axis (axis=1, 2, 3 respectively)
Definition: MonitorElement.cc:771
L1GtHwValidation::m_fdlDataAlgoDecision_Err
MonitorElement * m_fdlDataAlgoDecision_Err[NumberOfGtRecords]
Definition: L1GtHwValidation.h:214
L1GtHwValidation::m_fdlDataAlgoDecisionUnprescaledMask_NoMatch
MonitorElement * m_fdlDataAlgoDecisionUnprescaledMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:213
L1GtHwValidation::m_nrEmulEventError
int m_nrEmulEventError
Definition: L1GtHwValidation.h:155
L1GtFdlWord::gtDecisionWord
const DecisionWord & gtDecisionWord() const
get/set/print algorithms bits (decision word)
Definition: L1GtFdlWord.h:128
get
#define get
L1GtfeWord::boardId
const cms_uint16_t boardId() const
get/set board ID
Definition: L1GtfeWord.h:58
L1GtFdlWord::bxNr
const cms_uint16_t bxNr() const
get/set BxNr - bunch cross number of the actual bx
Definition: L1GtFdlWord.h:88
L1GtHwValidation::m_excludeAlgoTrigByBit
std::vector< int > m_excludeAlgoTrigByBit
exclude algorithm triggers from comparison data - emulator by algorithm bit number
Definition: L1GtHwValidation.h:137
L1GtHwValidation::excludedAlgoList
void excludedAlgoList()
exclude from comparison some bits with known disagreement - bit list
Definition: L1GtHwValidation.cc:2101
L1GtTriggerMenu::gtConditionMap
const std::vector< ConditionMap > & gtConditionMap() const
get / set / build the condition maps
Definition: L1GtTriggerMenu.h:80
DecisionWord
std::vector< bool > DecisionWord
typedefs
Definition: L1GlobalTriggerReadoutSetupFwd.h:34
L1GtHwValidation::compareGTFE
virtual void compareGTFE(const edm::Event &, const edm::EventSetup &, const L1GtfeWord &, const L1GtfeWord &, const int)
compare the GTFE board
Definition: L1GtHwValidation.cc:805
L1GtHwValidation::m_fdlDataAlgoDecisionUnprescaled
MonitorElement * m_fdlDataAlgoDecisionUnprescaled[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:206
L1GtHwValidation::matchCondCategory
bool matchCondCategory(const L1GtConditionCategory &, const L1GtConditionCategory &)
book all histograms for the module
Definition: L1GtHwValidation.cc:2053
L1GtHwValidation::m_fdlDataAlgoDecisionUnprescaled_NoMatch
MonitorElement * m_fdlDataAlgoDecisionUnprescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:210
DecisionWordExtended
std::vector< bool > DecisionWordExtended
Definition: L1GlobalTriggerReadoutSetupFwd.h:38
L1GtFdlWord::gtTechnicalTriggerWord
const TechnicalTriggerWord & gtTechnicalTriggerWord() const
get/set technical trigger bits
Definition: L1GtFdlWord.h:112
L1GtHwValidation::m_triggerMaskTechTrig
std::vector< unsigned int > m_triggerMaskTechTrig
Definition: L1GtHwValidation.h:181
L1GtfeWord::recordLength1
const cms_uint16_t recordLength1() const
get/set record length for alternative 1
Definition: L1GtfeWord.h:71
L1GtHwValidation::compareFDL
virtual void compareFDL(const edm::Event &, const edm::EventSetup &, const L1GtFdlWord &, const L1GtFdlWord &, const int)
compare the FDL board
Definition: L1GtHwValidation.cc:979
L1GtHwValidation::m_dataOnly
bool m_dataOnly
Definition: L1GtHwValidation.h:187
L1GtHwValidation::m_emulOnlyMask
bool m_emulOnlyMask
Definition: L1GtHwValidation.h:190
L1GtFdlWord::printGtTechnicalTriggerWord
void printGtTechnicalTriggerWord(std::ostream &myCout) const
Definition: L1GtFdlWord.cc:227
L1GtHwValidation::m_fdlDataEmulAlgoDecisionPrescaled
MonitorElement * m_fdlDataEmulAlgoDecisionPrescaled[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:230
L1GtFdlWord::print
void print(std::ostream &myCout) const
pretty print the content of a L1GtFdlWord
Definition: L1GtFdlWord.cc:595
L1GtHwValidation::m_l1GtEmulDaqInputTag
edm::InputTag m_l1GtEmulDaqInputTag
input tag for the L1 GT emulator DAQ record
Definition: L1GtHwValidation.h:118
L1GtPsbWord::localBxNr
const cms_uint16_t localBxNr() const
get/set local bunch cross number of the actual bx
Definition: L1GtPsbWord.h:134
L1GtHwValidation::m_fdlEmulTechDecision
MonitorElement * m_fdlEmulTechDecision[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:242
edm::ParameterSet::getParameter
T getParameter(std::string const &) const
Definition: ParameterSet.h:303
L1GtHwValidation::m_l1GtPfTech
const L1GtPrescaleFactors * m_l1GtPfTech
Definition: L1GtHwValidation.h:167
L1GtHwValidation::m_fdlDataEmulTechDecision
MonitorElement * m_fdlDataEmulTechDecision[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:246
L1GtHwValidation::m_l1GtEmulEvmInputTag
edm::InputTag m_l1GtEmulEvmInputTag
input tag for the L1 GT emulator EVM record
Definition: L1GtHwValidation.h:121
L1GtHwValidation::m_fdlEmulAlgoDecisionPrescaledMask_NoMatch
MonitorElement * m_fdlEmulAlgoDecisionPrescaledMask_NoMatch[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:224
L1GtHwValidation::excludedAlgo
bool excludedAlgo(const int &) const
exclusion status for algorithm with bit i
Definition: L1GtHwValidation.cc:2221
L1GlobalTriggerReadoutSetup::NumberTechnicalTriggers
static const unsigned int NumberTechnicalTriggers
Definition: L1GlobalTriggerReadoutSetup.h:38
L1GtHwValidation::m_fdlDataAlgoDecision
MonitorElement * m_fdlDataAlgoDecision[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:204
L1GtHwValidation::matchCondL1GtObject
bool matchCondL1GtObject(const std::vector< L1GtObject > &, const L1GtObject &)
Definition: L1GtHwValidation.cc:2082
LogTrace
#define LogTrace(id)
Definition: MessageLogger.h:224
TypeNull
Definition: L1GtDefinitions.h:5
L1GtHwValidation::m_fdlDataAlgoDecisionPrescaled_NoMatch
MonitorElement * m_fdlDataAlgoDecisionPrescaled_NoMatch[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:209
L1GtHwValidation::m_fdlDataEmulAlgoDecisionUnprescaledAllowed
MonitorElement * m_fdlDataEmulAlgoDecisionUnprescaledAllowed[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:232
TechnicalTriggerWord
std::vector< bool > TechnicalTriggerWord
technical trigger bits (64 bits)
Definition: L1GlobalTriggerReadoutSetupFwd.h:41
L1GtPrescaleFactorsAlgoTrigRcd
Definition: L1GtPrescaleFactorsAlgoTrigRcd.h:38
L1GtFdlWord::finalOR
const cms_uint16_t finalOR() const
get/set "Final OR" bits
Definition: L1GtFdlWord.h:221
L1GtHwValidation::m_fdlDataAlgoDecisionPrescaled
MonitorElement * m_fdlDataAlgoDecisionPrescaled[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:205
edm::HandleBase::isValid
bool isValid() const
Definition: HandleBase.h:70
L1GtHwValidation::m_l1GtTmAlgo
const L1GtTriggerMask * m_l1GtTmAlgo
trigger masks
Definition: L1GtHwValidation.h:174
L1GtHwValidation::m_fdlEmulAlgoDecisionMask
MonitorElement * m_fdlEmulAlgoDecisionMask[TotalBxInEvent][NumberOfGtRecords]
Definition: L1GtHwValidation.h:219
L1GtfeWord::altNrBxBoard
const cms_uint16_t altNrBxBoard() const
get/set alternative for number of BX per board
Definition: L1GtfeWord.h:134
L1GtHwValidation::m_l1GtMenuCacheID
unsigned long long m_l1GtMenuCacheID
Definition: L1GtHwValidation.h:161
L1GtPsbWord::NumberAData
static const int NumberAData
Definition: L1GtPsbWord.h:31
TauDecayModes.dec
dec
Definition: TauDecayModes.py:143
edm::InputTag
Definition: InputTag.h:15
L1GtHwValidation::m_fdlDataTechDecision_Err
MonitorElement * m_fdlDataTechDecision_Err[NumberOfGtRecords]
Definition: L1GtHwValidation.h:240
L1GtHwValidation::m_l1GtEmulEvmInputToken_
edm::EDGetTokenT< L1GlobalTriggerEvmReadoutRecord > m_l1GtEmulEvmInputToken_
Definition: L1GtHwValidation.h:269
L1GtPsbWord::boardId
const cms_uint16_t boardId() const
get/set board ID
Definition: L1GtPsbWord.h:58
L1GtHwValidation::compareEvmRecord
virtual void compareEvmRecord(const edm::Event &, const edm::EventSetup &)
L1 GT EVM record comparison.
Definition: L1GtHwValidation.cc:1952
L1GlobalTriggerReadoutRecord::gtFdlVector
const std::vector< L1GtFdlWord > gtFdlVector() const
get the vector of L1GtFdlWord
Definition: L1GlobalTriggerReadoutRecord.h:119
L1GtTriggerMenu::gtAlgorithmMap
const AlgorithmMap & gtAlgorithmMap() const
get / set the algorithm map (by name)
Definition: L1GtTriggerMenu.h:187
dqm::implementation::IBooker::book1D
MonitorElement * book1D(TString const &name, TString const &title, int const nchX, double const lowX, double const highX, FUNC onbooking=NOOP())
Definition: DQMStore.h:98
L1GtHwValidation::m_excludedL1GtObject
std::vector< L1GtObject > m_excludedL1GtObject
excluded L1 GT objects
Definition: L1GtHwValidation.h:147
L1GtFdlWord::printGtDecisionWord
void printGtDecisionWord(std::ostream &myCout) const
Definition: L1GtFdlWord.cc:286
L1GtHwValidation::m_excludeAlgoTrigByName
std::vector< std::string > m_excludeAlgoTrigByName
exclude algorithm triggers from comparison data - emulator by algorithm name
Definition: L1GtHwValidation.h:134
L1GtHwValidation::m_dataOnlyMask
bool m_dataOnlyMask
Definition: L1GtHwValidation.h:189
L1GtHwValidation::m_l1GtPfAlgoCacheID
unsigned long long m_l1GtPfAlgoCacheID
Definition: L1GtHwValidation.h:165
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