15 <<
"+++ Upgrade CSCUpgradeCathodeLCTProcessor constructed while isSLHC_ is not set! +++\n";
32 <<
"+++ Upgrade CSCUpgradeCathodeLCTProcessor constructed while isSLHC_ is not set! +++\n";
46 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
47 <<
"....................PreTrigger, SLHC version with localized dead time zone...........................";
54 bool pre_trig =
false;
58 for (
unsigned int bx_time = start_bx; bx_time <
fifo_tbins; bx_time++) {
64 std::map<int, std::map<int, CSCCLCTDigi::ComparatorContainer> > hits_in_patterns;
65 hits_in_patterns.clear();
71 if (
nhits[hstrip] > 0) {
72 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
73 <<
" bx = " << std::setw(2) << bx_time <<
" --->"
74 <<
" halfstrip = " << std::setw(3) << hstrip <<
" best pid = " << std::setw(2) <<
best_pid[hstrip]
75 <<
" nhits = " <<
nhits[hstrip];
91 1,
nhits[hstrip],
best_pid[hstrip], 1,
bend, halfstrip, cfeb, bx_time, nPreTriggers, 0));
97 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
98 <<
" halfstrip " << std::setw(3) << hstrip <<
" in dead zone and is pretriggerred";
108 int min_hstrip = hstrip - delta_hs;
109 int max_hstrip = hstrip + delta_hs;
114 for (
int hs = min_hstrip; hs <= max_hstrip; hs++)
115 busyMap[hs][bx_time + 1] =
true;
117 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
118 <<
" marked zone around pretriggerred halfstrip " << hstrip <<
" as dead zone for pretriggering at bx"
119 << bx_time + 1 <<
" halfstrip: [" << min_hstrip <<
"," << max_hstrip <<
"]";
135 LogTrace(
"CSCUpgradeCathodeLCTProcessor") <<
"no pretrigger, returning \n";
148 std::vector<CSCCLCTDigi> lctList;
151 const int maxHalfStrips = 2 *
numStrips + 1;
168 std::vector<CSCCLCTDigi> lctListBX;
182 while (start_bx < stop_bx) {
193 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
194 <<
"..... pretrigger at bx = " << first_bx <<
"; waiting drift delay .....";
199 std::map<int, std::map<int, CSCCLCTDigi::ComparatorContainer> > hits_in_patterns;
200 hits_in_patterns.clear();
206 if (
nhits[hstrip] > 0) {
207 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
208 <<
" bx = " << std::setw(2) << latch_bx <<
" --->"
209 <<
" halfstrip = " << std::setw(3) << hstrip <<
" best pid = " << std::setw(2) <<
best_pid[hstrip]
210 <<
" nhits = " <<
nhits[hstrip];
223 best_halfstrip[ilct] = -1;
224 best_quality[ilct] = 0;
235 pretrig_zone[hstrip] =
false;
244 for (
int hs = min_hs; hs <= max_hs; hs++)
245 pretrig_zone[hs] =
true;
247 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
248 <<
" marked pretrigger halfstrip zone [" << min_hs <<
"," << max_hs <<
"]";
258 if (
quality[hstrip] > best_quality[0] && pretrig_zone[hstrip] && !
busyMap[hstrip][first_bx])
261 best_halfstrip[0] = hstrip;
262 best_quality[0] =
quality[hstrip];
264 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
265 <<
" 1st CLCT: halfstrip = " << std::setw(3) << hstrip <<
" quality = " << std::setw(3)
266 <<
quality[hstrip] <<
" best halfstrip = " << std::setw(3) << best_halfstrip[0]
267 <<
" best quality = " << std::setw(3) << best_quality[0];
274 if (best_halfstrip[0] >= 0) {
279 if (
quality[hstrip] > best_quality[1] && pretrig_zone[hstrip] && !
busyMap[hstrip][first_bx])
282 best_halfstrip[1] = hstrip;
283 best_quality[1] =
quality[hstrip];
285 LogTrace(
"CSCUpgradeCathodeLCTProcessor")
286 <<
" 2nd CLCT: halfstrip = " << std::setw(3) << hstrip <<
" quality = " << std::setw(3)
287 <<
quality[hstrip] <<
" best halfstrip = " << std::setw(3) << best_halfstrip[1]
288 <<
" best quality = " << std::setw(3) << best_quality[1];
296 int best_hs = best_halfstrip[ilct];
314 int halfstrip_in_cfeb = keystrip_data[ilct][
CLCT_STRIP] -
326 LogTrace(
"CSCCathodeLCTProcessor") <<
" Final selection: ilct " << ilct <<
" " << thisLCT << std::endl;
331 auto compHits = hits_in_patterns[best_hs][keystrip_data[ilct][
CLCT_PATTERN]];
340 lctList.push_back(thisLCT);
341 lctListBX.push_back(thisLCT);
349 start_bx = first_bx + 1;