Go to the documentation of this file. 1 #ifndef ECAL_FENIX_TCP_H
2 #define ECAL_FENIX_TCP_H
84 std::vector<EBDataFrame> &bid,
85 std::vector<std::vector<int>> &tpframetow,
87 std::vector<EcalTriggerPrimitiveSample> &tptow,
88 std::vector<EcalTriggerPrimitiveSample> &tptow2,
92 std::vector<EEDataFrame> &bid,
93 std::vector<std::vector<int>> &tpframetow,
95 std::vector<EcalTriggerPrimitiveSample> &tptow,
96 std::vector<EcalTriggerPrimitiveSample> &tptow2,
100 void process_part1(std::vector<std::vector<int>> &tpframetow,
int nStr,
int bitMask);
111 std::vector<EcalTriggerPrimitiveSample> &tptow,
112 std::vector<EcalTriggerPrimitiveSample> &tptow2,
122 std::vector<EcalTriggerPrimitiveSample> &tptow,
123 std::vector<EcalTriggerPrimitiveSample> &tptow2,
Linearisation for Tcp input: 16 bits output: 12 bits +1 going to fgvb (???)
std::vector< int > adder_out_
void process_part2_barrel(std::vector< std::vector< int >> &, int nStr, int bitMask, const EcalTPGFineGrainEBGroup *ecaltpgFgEBGroup, const EcalTPGLutGroup *ecaltpgLutGroup, const EcalTPGLutIdMap *ecaltpgLut, const EcalTPGFineGrainEBIdMap *ecaltpgFineGrainEB, const EcalTPGTowerStatus *ecaltpgBadTT, const EcalTPGSpike *ecaltpgSpike, std::vector< EcalTriggerPrimitiveSample > &tptow, std::vector< EcalTriggerPrimitiveSample > &tptow2, EcalTrigTowerDetId towid)
const EcalTPGFineGrainEBGroup * ecaltpgFgEBGroup_
EcalFenixTcpsFgvbEB * getsFGVBEB() const
void process_part2_endcap(std::vector< std::vector< int >> &, int nStr, int bitMask, const EcalTPGLutGroup *ecaltpgLutGroup, const EcalTPGLutIdMap *ecaltpgLut, const EcalTPGFineGrainTowerEE *ecaltpgFineGrainTowerEE, const EcalTPGTowerStatus *ecaltpgBadTT, std::vector< EcalTriggerPrimitiveSample > &tptow, std::vector< EcalTriggerPrimitiveSample > &tptow2, bool isInInnerRings, EcalTrigTowerDetId towid)
std::vector< int > maxOf2_out_
calculation of Fgvb for Fenix Tcp, format barrel calculates fgvb for the barrel
calculation of strip Fgvb for Fenix Tcp, format barrel calculates fgvb for the barrel
EcalFenixBypassLin * getBypasslin(int i) const
void process(const edm::EventSetup &setup, std::vector< EBDataFrame > &bid, std::vector< std::vector< int >> &tpframetow, int nStr, std::vector< EcalTriggerPrimitiveSample > &tptow, std::vector< EcalTriggerPrimitiveSample > &tptow2, bool isInInnerRings, EcalTrigTowerDetId thisTower)
const EcalTPGLutGroup * ecaltpgLutGroup_
EcalFenixFgvbEB * getFGVBEB() const
EcalFenixEtTot * getAdder() const
std::vector< int > fgvb_out_
std::vector< std::vector< int > > bypasslin_out_
EcalFenixTcpFormat * formatter_
const EcalTPGSpike * ecaltpgSpike_
EcalFenixTcpFgvbEE * getFGVBEE() const
const EcalTPGFineGrainEBIdMap * ecaltpgFineGrainEB_
calculation of Fgvb for Fenix Tcp, format endcap calculates fgvb for the endcap
EcalFenixTcpFormat * getFormatter() const
EcalFenixTcpsFgvbEB * sfgvbEB_
class for calculation of Et for Fenix tcp calculates the sum
const EcalTPGFineGrainTowerEE * ecaltpgFineGrainTowerEE_
EcalFenixTcp(const edm::EventSetup &setup, bool tcpFormat, bool debug, bool famos, int binOfMax, int maxNrSamples, int nbMaxStrips)
const EcalTPGLutIdMap * ecaltpgLut_
EcalFenixFgvbEB * fgvbEB_
class representing the Fenix chip, format strip
void setPointers(const EcalTPGFineGrainEBGroup *ecaltpgFgEBGroup, const EcalTPGLutGroup *ecaltpgLutGroup, const EcalTPGLutIdMap *ecaltpgLut, const EcalTPGFineGrainEBIdMap *ecaltpgFineGrainEB, const EcalTPGFineGrainTowerEE *ecaltpgFineGrainTowerEE, const EcalTPGTowerStatus *ecaltpgBadTT, const EcalTPGSpike *ecaltpgSpike)
void process_part1(std::vector< std::vector< int >> &tpframetow, int nStr, int bitMask)
const EcalTPGTowerStatus * ecaltpgBadTT_
EcalFenixMaxof2 * getMaxOf2() const
std::vector< EcalFenixBypassLin * > bypasslin_
std::vector< int > strip_fgvb_out_
EcalFenixMaxof2 * maxOf2_
EcalFenixTcpFgvbEE * fgvbEE_