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SiStripFedCablingBuilderFromDb.cc
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1 
11 #include <cstdlib>
12 #include <iostream>
13 #include <sstream>
14 #include <iomanip>
15 
16 using namespace std;
17 using namespace sistrip;
18 
19 // -----------------------------------------------------------------------------
23  findingRecord<SiStripFedCablingRcd>();
24 
25  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
26  << " Constructing object...";
27 
28  // Defined cabling "source" (connections, devices, detids)
29  string source = pset.getUntrackedParameter<string>("CablingSource", "UNDEFINED");
31 
32  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
33  << " CablingSource configurable set to \"" << source << "\""
34  << ". CablingSource member data set to: \"" << SiStripEnumsAndStrings::cablingSource(source_)
35  << "\"";
36 }
37 
38 // -----------------------------------------------------------------------------
41  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
42  << " Destructing object...";
43 }
44 
45 // -----------------------------------------------------------------------------
48  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
49  << " Constructing FED cabling...";
50 
51  // Create FED cabling object
52  SiStripFedCabling* fed_cabling = new SiStripFedCabling();
53 
54  // Build and retrieve SiStripConfigDb object using service
55  db_ = edm::Service<SiStripConfigDb>().operator->();
56 
57  // Check pointer
58  if (db_) {
59  edm::LogVerbatim(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
60  << " Pointer to SiStripConfigDb: 0x" << std::setw(8) << std::setfill('0') << std::hex
61  << db_ << std::dec;
62  } else {
63  edm::LogError(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
64  << " NULL pointer to SiStripConfigDb returned by DB \"service\"!"
65  << " Cannot build FED cabling object!";
66  return fed_cabling;
67  }
68 
69  // Check if DB connection is made
70  if (db_->deviceFactory() || db_->databaseCache()) {
71  // Build FEC cabling object
72  SiStripFecCabling fec_cabling;
73  buildFecCabling(db_, fec_cabling, source_);
74 
75  // Populate FED cabling object
76  getFedCabling(fec_cabling, *fed_cabling);
77 
78  // Call virtual method that writes FED cabling object to conditions DB
79  writeFedCablingToCondDb(*fed_cabling);
80 
81  // Prints FED cabling
82  //stringstream ss;
83  //ss << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
84  //<< " Printing cabling map..." << endl
85  //<< *fed_cabling;
86  //LogTrace(mlCabling_) << ss.str();
87 
88  } else {
89  edm::LogError(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
90  << " NULL pointers to DeviceFactory and DatabaseCache returned by SiStripConfigDb!"
91  << " Cannot build FED cabling object!";
92  }
93 
94  return fed_cabling;
95 }
96 
97 // -----------------------------------------------------------------------------
100  SiStripFecCabling& fec_cabling,
104  } else if (source == sistrip::CABLING_FROM_DEVICES) {
105  buildFecCablingFromDevices(db, fec_cabling);
106  } else if (source == sistrip::CABLING_FROM_DETIDS) {
107  buildFecCablingFromDetIds(db, fec_cabling);
109  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
110  << " Unexpected value for CablingSource: \"" << SiStripEnumsAndStrings::cablingSource(source)
111  << "\" Querying DB in order to build cabling from one of connections, devices or DetIds...";
112  buildFecCabling(db, fec_cabling);
113  return;
114 
115  } else {
116  edm::LogError(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
117  << " Cannot build SiStripFecCabling object!"
118  << " sistrip::CablingSource has value: " << SiStripEnumsAndStrings::cablingSource(source);
119  return;
120  }
121 
122  // Debug
123  const NumberOfDevices& devs = fec_cabling.countDevices();
124  std::stringstream ss;
125  ss << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
126  << " Built SiStripFecCabling object with following devices:" << endl
127  << devs;
128  edm::LogVerbatim(mlCabling_) << ss.str() << endl;
129 }
130 
131 // -----------------------------------------------------------------------------
134  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
135  << " Building cabling object...";
136 
137  if (!db->getFedConnections().empty()) {
139  } else if (!db->getDeviceDescriptions().empty()) {
140  buildFecCablingFromDevices(db, fec_cabling);
141  } else if (!db->getDcuDetIds().empty()) {
142  buildFecCablingFromDetIds(db, fec_cabling);
143  } else {
144  edm::LogError(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
145  << " Cannot build SiStripFecCabling object!"
146  << " FedConnections, DeviceDescriptions and DcuDetIds vectors are all empty!";
147  return;
148  }
149 
150  // Debug
151  const NumberOfDevices& devices = fec_cabling.countDevices();
152  std::stringstream ss;
153  ss << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
154  << " Built SiStripFecCabling object with following devices:" << std::endl
155  << devices;
156  edm::LogVerbatim(mlCabling_) << ss.str() << endl;
157 }
158 
159 // -----------------------------------------------------------------------------
196  SiStripFecCabling& fec_cabling) {
197  edm::LogVerbatim(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
198  << " Building FEC cabling from FED connections descriptions...";
199 
200  // ---------- Some initialization ----------
201 
202  //fec_cabling.clear(); //@@ Need to add method to "clear" FecCabling?
203 
204  // ---------- Retrieve connection descriptions from database ----------
205 
206  SiStripConfigDb::FedConnectionsRange conns = db->getFedConnections();
207  if (conns.empty()) {
208  edm::LogError(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
209  << " Unable to build FEC cabling!"
210  << " No entries in FedConnections vector!";
211  return;
212  }
213 
214  // ---------- Retrieve DCU-DetId vector from database ----------
215 
216  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
217  << " Retrieving DCU-DetId vector from database...";
218  SiStripConfigDb::DcuDetIdsRange range = db->getDcuDetIds();
219  const SiStripConfigDb::DcuDetIdsV dcu_detid_vector(range.begin(), range.end());
220  if (!dcu_detid_vector.empty()) {
221  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
222  << " Found " << dcu_detid_vector.size()
223  << " entries in DCU-DetId vector retrieved from database!";
224  } else {
225  edm::LogWarning(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
226  << " No entries in DCU-DetId vector retrieved from database!";
227  }
228 
229  // ---------- Populate FEC cabling object with retrieved info ----------
230 
231  SiStripConfigDb::FedConnectionsV::const_iterator ifed = conns.begin();
232  SiStripConfigDb::FedConnectionsV::const_iterator jfed = conns.end();
233  for (; ifed != jfed; ++ifed) {
234  if (!(*ifed)) {
235  edm::LogWarning(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
236  << " NULL pointer to FedConnection!";
237  continue;
238  }
239 
240  //uint16_t fec_id = static_cast<uint16_t>( (*ifed)->getFecHardwareId() );
241  uint16_t fec_crate =
242  static_cast<uint16_t>((*ifed)->getFecCrateId() + sistrip::FEC_CRATE_OFFSET); //@@ temporary offset!
243  uint16_t fec_slot = static_cast<uint16_t>((*ifed)->getFecSlot());
244  uint16_t fec_ring =
245  static_cast<uint16_t>((*ifed)->getRingSlot() + sistrip::FEC_RING_OFFSET); //@@ temporary offset!
246  uint16_t ccu_addr = static_cast<uint16_t>((*ifed)->getCcuAddress());
247  uint16_t ccu_chan = static_cast<uint16_t>((*ifed)->getI2cChannel());
248  uint16_t apv0 = static_cast<uint16_t>((*ifed)->getApvAddress());
249  uint16_t apv1 = apv0 + 1; //@@ needs implementing!
250  uint32_t dcu_id = static_cast<uint32_t>((*ifed)->getDcuHardId());
251  uint32_t det_id = 0; //@@ static_cast<uint32_t>( (*ifed)->getDetId() );
252  uint16_t npairs = 0; //@@ static_cast<uint16_t>( (*ifed)->getApvPairs() );
253  uint16_t fed_id = static_cast<uint16_t>((*ifed)->getFedId());
254  uint16_t fed_ch = static_cast<uint16_t>((*ifed)->getFedChannel());
255  uint16_t length = 0; //@@ static_cast<uint16_t>( (*ifed)->getFiberLength() );
256 
258  fec_crate, fec_slot, fec_ring, ccu_addr, ccu_chan, apv0, apv1, dcu_id, det_id, npairs, fed_id, fed_ch, length);
259 
260  uint16_t fed_crate = sistrip::invalid_;
261  uint16_t fed_slot = sistrip::invalid_;
262  fed_crate = static_cast<uint16_t>((*ifed)->getFedCrateId());
263  fed_slot = static_cast<uint16_t>((*ifed)->getFedSlot());
264  conn.fedCrate(fed_crate);
265  conn.fedSlot(fed_slot);
266 
267  fec_cabling.addDevices(conn);
268  }
269 
270  // ---------- Assign DCU and DetIds and then FED cabling ----------
271 
272  assignDcuAndDetIds(fec_cabling, dcu_detid_vector);
273 }
274 
275 // -----------------------------------------------------------------------------
319  SiStripFecCabling& fec_cabling) {
320  edm::LogVerbatim(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
321  << " Building FEC cabling object from device descriptions...";
322 
323  // ---------- Some initialization ----------
324 
325  // fec_cabling.clear(); //@@ Need to add method to "clear" FecCabling?
326 
327  // ---------- Retrieve APV descriptions from database ----------
328 
329  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
330  << " Retrieving APV descriptions from database...";
331  SiStripConfigDb::DeviceDescriptionsRange apv_desc = db->getDeviceDescriptions(APV25);
332  if (!apv_desc.empty()) {
333  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
334  << " Retrieved " << apv_desc.size() << " APV descriptions from database!";
335  } else {
336  edm::LogError(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
337  << " Unable to build FEC cabling!"
338  << " No APV descriptions found!";
339  return;
340  }
341 
342  // ---------- Retrieve DCU descriptions from database ----------
343 
344  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
345  << " Retrieving DCU descriptions from database...";
346  SiStripConfigDb::DeviceDescriptionsRange dcu_desc = db->getDeviceDescriptions(DCU);
347 
348  if (!dcu_desc.empty()) {
349  uint16_t feh = 0;
350  uint16_t ccu = 0;
351  SiStripConfigDb::DeviceDescriptionsV::const_iterator idcu;
352  for (idcu = dcu_desc.begin(); idcu != dcu_desc.end(); idcu++) {
353  dcuDescription* dcu = dynamic_cast<dcuDescription*>(*idcu);
354  if (!dcu) {
355  continue;
356  }
357  if (dcu->getDcuType() == "FEH") {
358  feh++;
359  } else {
360  ccu++;
361  }
362  }
363 
364  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
365  << " Retrieved " << feh << " DCU-FEH descriptions from database!"
366  << " (and a further " << ccu << " DCUs for CCU modules, etc...)";
367 
368  } else {
369  edm::LogWarning(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
370  << " No DCU descriptions found!";
371  }
372 
373  // ---------- Retrieve DCU-DetId vector from database ----------
374 
375  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
376  << " Retrieving DCU-DetId vector from database...";
377  SiStripConfigDb::DcuDetIdsRange range = db->getDcuDetIds();
378  const SiStripConfigDb::DcuDetIdsV dcu_detid_vector(range.begin(), range.end());
379  if (!dcu_detid_vector.empty()) {
380  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
381  << " Found " << dcu_detid_vector.size()
382  << " entries in DCU-DetId vector retrieved from database!";
383  } else {
384  edm::LogWarning(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
385  << " No entries in DCU-DetId vector retrieved from database!";
386  }
387 
388  // ---------- Retrieve FED ids from database ----------
389 
390  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
391  << " Retrieving FED ids from database...";
392  SiStripConfigDb::FedIdsRange fed_ids = db->getFedIds();
393 
394  if (!fed_ids.empty()) {
395  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
396  << " Retrieved " << fed_ids.size() << " FED ids from database!";
397  } else {
398  edm::LogWarning(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
399  << " No FED ids found!";
400  }
401 
402  // ---------- Populate FEC cabling object with retrieved info ----------
403 
404  edm::LogVerbatim(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
405  << " Building FEC cabling object from APV and DCU descriptions...";
406 
407  SiStripConfigDb::DeviceDescriptionsV::const_iterator iapv;
408  for (iapv = apv_desc.begin(); iapv != apv_desc.end(); iapv++) {
409  if (!(*iapv)) {
410  edm::LogWarning(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
411  << " NULL pointer to DeviceDescription (of type APV25)!";
412  continue;
413  }
414 
415  SiStripConfigDb::DeviceAddress addr = db->deviceAddress(**iapv);
417  addr.fecSlot_,
418  addr.fecRing_ + sistrip::FEC_RING_OFFSET, //@@ temp
419  addr.ccuAddr_,
420  addr.ccuChan_,
421  addr.i2cAddr_);
422  fec_cabling.addDevices(conn);
423  }
424 
425  SiStripConfigDb::DeviceDescriptionsV::const_iterator idcu;
426  for (idcu = dcu_desc.begin(); idcu != dcu_desc.end(); idcu++) {
427  if (!(*idcu)) {
428  edm::LogWarning(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
429  << " NULL pointer to DeviceDescription (of type DCU)!";
430  continue;
431  }
432 
433  SiStripConfigDb::DeviceAddress addr = db->deviceAddress(**idcu);
434  dcuDescription* dcu = dynamic_cast<dcuDescription*>(*idcu);
435  if (!dcu) {
436  continue;
437  }
438  if (dcu->getDcuType() != "FEH") {
439  continue;
440  }
442  addr.fecSlot_,
443  addr.fecRing_ + sistrip::FEC_RING_OFFSET, //@@ temp,
444  addr.ccuAddr_,
445  addr.ccuChan_,
446  0,
447  0, // APV I2C addresses not used
448  dcu->getDcuHardId());
449  fec_cabling.dcuId(conn);
450  }
451 
452  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
453  << " Finished building FEC cabling object from APV and DCU descriptions!";
454 
455  NumberOfDevices devs1 = fec_cabling.countDevices();
456  std::stringstream ss1;
457  ss1 << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
458  << " Number of devices in FEC cabling object:" << std::endl;
459  devs1.print(ss1);
460  LogTrace(mlCabling_) << ss1.str();
461 
462  // ---------- Counters used in assigning "dummy" FED ids and channels ----------
463 
464  std::vector<uint16_t>::const_iterator ifed = fed_ids.begin();
465  uint16_t fed_ch = 0;
466 
467  // ---------- Assign "dummy" FED crates/slots/ids/chans to constructed modules ----------
468 
469  std::vector<uint32_t> used_keys;
470 
471  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
472  << " Randomly assigning FED ids/channels to APV pairs in front-end modules...";
473 
474  if (fed_ids.empty()) {
475  edm::LogError(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
476  << " No FED ids retrieved from database! Unable to cable system!";
477  } else {
478  bool complete = false;
479  std::vector<SiStripFecCrate>::const_iterator icrate = fec_cabling.crates().begin();
480  std::vector<SiStripFecCrate>::const_iterator jcrate = fec_cabling.crates().end();
481  while (!complete && icrate != jcrate) {
482  std::vector<SiStripFec>::const_iterator ifec = icrate->fecs().begin();
483  std::vector<SiStripFec>::const_iterator jfec = icrate->fecs().end();
484  while (!complete && ifec != jfec) {
485  std::vector<SiStripRing>::const_iterator iring = ifec->rings().begin();
486  std::vector<SiStripRing>::const_iterator jring = ifec->rings().end();
487  while (!complete && iring != jring) {
488  std::vector<SiStripCcu>::const_iterator iccu = iring->ccus().begin();
489  std::vector<SiStripCcu>::const_iterator jccu = iring->ccus().end();
490  while (!complete && iccu != jccu) {
491  std::vector<SiStripModule>::const_iterator imod = iccu->modules().begin();
492  std::vector<SiStripModule>::const_iterator jmod = iccu->modules().end();
493  while (!complete && imod != jmod) {
494  // Set number of APV pairs based on devices found
495  const_cast<SiStripModule&>(*imod).nApvPairs(0);
496 
497  used_keys.push_back(
498  SiStripFecKey(imod->fecCrate(), imod->fecSlot(), imod->fecRing(), imod->ccuAddr(), imod->ccuChan())
499  .key());
500 
501  // // Add middle LLD channel if missing (to guarantee all FED channels are cabled!)
502  // if ( imod->nApvPairs() == 2 ) {
503  // const_cast<SiStripModule&>(*imod).nApvPairs(3);
504  // FedChannelConnection temp( imod->fecCrate(),
505  // imod->fecSlot(),
506  // imod->fecRing(),
507  // imod->ccuAddr(),
508  // imod->ccuChan(),
509  // SiStripFecKey::i2cAddr(2,true),
510  // SiStripFecKey::i2cAddr(2,false) );
511  // const_cast<SiStripModule&>(*imod).addDevices( temp );
512  // }
513  // const_cast<SiStripModule&>(*imod).nApvPairs(0);
514 
515  // Iterate through APV pairs
516  for (uint16_t ipair = 0; ipair < imod->nApvPairs(); ipair++) {
517  // Check FED id and channel
518  if (ifed == fed_ids.end()) {
519  fed_ch++;
520  ifed = fed_ids.begin();
521  }
522  if (fed_ch == 96) {
523  edm::LogWarning(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
524  << " Insufficient FED channels to cable all devices in control system!";
525  complete = true;
526  break;
527  }
528 
529  // Set "dummy" FED id and channel
530  pair<uint16_t, uint16_t> addr = imod->activeApvPair(imod->lldChannel(ipair));
531  SiStripModule::FedChannel fed_channel((*ifed) / 16 + 1, // 16 FEDs per crate, numbering starts from 1
532  (*ifed) % 16 + 2, // FED slot starts from 2
533  *ifed,
534  fed_ch);
535  const_cast<SiStripModule&>(*imod).fedCh(addr.first, fed_channel);
536  ifed++;
537  }
538 
539  imod++;
540  }
541  iccu++;
542  }
543  iring++;
544  }
545  ifec++;
546  }
547  icrate++;
548  }
549  }
550 
551  std::sort(used_keys.begin(), used_keys.end());
552 
553  NumberOfDevices devs2 = fec_cabling.countDevices();
554  std::stringstream ss2;
555  ss2 << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
556  << " Number of devices in FEC cabling object:" << std::endl;
557  devs2.print(ss2);
558  LogTrace(mlCabling_) << ss2.str();
559 
560  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
561  << " Finished randomly assigning FED ids/channels to APV pairs in front-end modules...";
562 
563  // ---------- Assign "dummy" devices to remaining FED ids/chans ----------
564 
566  << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
567  << " Assigning APV pairs in dummy front-end modules to any remaining \"uncabled\" FED ids/channels...";
568 
569  if (fed_ids.empty()) {
570  edm::LogError(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
571  << " No FED ids retrieved from database! Unable to cable system!";
572  } else {
573  uint16_t module = 0;
574  bool complete = false;
575  while (!complete) {
576  for (uint16_t lld = sistrip::LLD_CHAN_MIN; lld < sistrip::LLD_CHAN_MAX + 1; lld++) {
577  // Check FED id and channel
578  if (ifed == fed_ids.end()) {
579  fed_ch++;
580  ifed = fed_ids.begin();
581  }
582  if (fed_ch == 96) {
583  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
584  << " All FED channels are now cabled!";
585  complete = true;
586  break;
587  }
588 
589  // commented because key is not used
590  //uint32_t key = SiStripFecKey( fecCrate( module ),
591  // fecSlot( module ),
592  // fecRing( module ),
593  // ccuAddr( module ),
594  // ccuChan( module ) ).key();
595 
596  //if ( std::find( used_keys.begin(), used_keys.end(), key ) != used_keys.end() ) { break; }
597 
599  fecSlot(module),
600  fecRing(module),
601  ccuAddr(module),
602  ccuChan(module),
603  SiStripFecKey::i2cAddr(lld, true),
604  SiStripFecKey::i2cAddr(lld, false),
607  3, // npairs
608  *ifed,
609  fed_ch);
610  uint16_t fed_crate = (*ifed) / 16 + 1; // 16 FEDs per crate, numbering starts from 1
611  uint16_t fed_slot = (*ifed) % 16 + 2; // FED slot starts from 2
612  temp.fedCrate(fed_crate);
613  temp.fedSlot(fed_slot);
614  fec_cabling.addDevices(temp);
615  ifed++;
616  }
617  module++;
618  }
619  }
620 
622  << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
623  << " Finished assigning APV pairs in dummy front-end modules to any remaining \"uncabled\" FED ids/channels...";
624 
625  NumberOfDevices devs3 = fec_cabling.countDevices();
626  std::stringstream ss3;
627  ss3 << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
628  << " Number of devices in FEC cabling object:" << std::endl;
629  devs3.print(ss3);
630  LogTrace(mlCabling_) << ss3.str();
631 
632  // ---------- Assign DCU and DetIds and then FED cabling ----------
633 
634  assignDcuAndDetIds(fec_cabling, dcu_detid_vector);
635 }
636 
637 // -----------------------------------------------------------------------------
676  SiStripFecCabling& fec_cabling) {
677  edm::LogVerbatim(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
678  << " Building FEC cabling object from DetIds...";
679 
680  // ---------- Some initialization ----------
681 
682  // fec_cabling.clear();
683 
684  // chans_per_ring = chans_per_ccu * ccus_per_ring = 100 (TOB gives lower limit of 60)
685  uint32_t chans_per_ccu = 10;
686  uint32_t ccus_per_ring = 10;
687  uint32_t rings_per_fec = 8;
688  uint32_t fecs_per_crate = 11;
689 
690  // ---------- Retrieve necessary descriptions from database ----------
691 
692  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
693  << " Retrieving DCU-DetId vector from database...";
694  SiStripConfigDb::DcuDetIdsRange range = db->getDcuDetIds();
695  const SiStripConfigDb::DcuDetIdsV dcu_detid_vector(range.begin(), range.end());
696  if (!dcu_detid_vector.empty()) {
697  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
698  << " Found " << dcu_detid_vector.size()
699  << " entries in DCU-DetId vector retrieved from database!";
700  } else {
701  edm::LogWarning(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
702  << " No entries in DCU-DetId vector retrieved from database!"
703  << " Unable to build FEC cabling!";
704  return;
705  }
706 
707  // ---------- Populate FEC cabling object with DCU, DetId and "dummy" control info ----------
708 
709  uint32_t imodule = 0;
710  SiStripConfigDb::DcuDetIdsV::const_iterator iter;
711  for (iter = dcu_detid_vector.begin(); iter != dcu_detid_vector.end(); iter++) {
712  if (!(iter->second)) {
713  edm::LogWarning(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
714  << " NULL pointer to TkDcuInfo!";
715  continue;
716  }
717 
718  uint16_t fec_crate = (imodule / (chans_per_ccu * ccus_per_ring * rings_per_fec * fecs_per_crate)) + 1;
719  uint16_t fec_slot = (imodule / (chans_per_ccu * ccus_per_ring * rings_per_fec)) % fecs_per_crate + 2;
720  uint16_t fec_ring = (imodule / (chans_per_ccu * ccus_per_ring)) % rings_per_fec + 1;
721  uint16_t ccu_addr = (imodule / (chans_per_ccu)) % ccus_per_ring + 1;
722  uint16_t ccu_chan = (imodule) % chans_per_ccu + 16;
723 
724  uint32_t dcu_id = iter->second->getDcuHardId(); //
725  uint32_t det_id = iter->second->getDetId();
726  uint16_t npairs = iter->second->getApvNumber() / 2;
727  uint16_t length = (uint16_t)iter->second->getFibreLength(); //@@ should be double!
728 
729  // --- Check if DCU, DetId and nApvPairs are null ---
730 
731  if (!dcu_id) {
732  dcu_id = SiStripFecKey(fec_crate, fec_slot, fec_ring, ccu_addr, ccu_chan).key();
733  }
734  if (!det_id) {
735  det_id = 0xFFFF + imodule;
736  }
737  if (!npairs) {
738  npairs = rand() / 2 ? 2 : 3;
739  }
740 
741  // --- Construct FedChannelConnection objects ---
742 
743  for (uint16_t ipair = 0; ipair < npairs; ipair++) {
744  uint16_t iapv = (ipair == 1 && npairs == 2 ? 36 : 32 + 2 * ipair);
745  FedChannelConnection conn(fec_crate,
746  fec_slot,
747  fec_ring,
748  ccu_addr,
749  ccu_chan,
750  iapv,
751  iapv + 1,
752  dcu_id,
753  det_id,
754  npairs,
755  0,
756  0, // FED id and channel
757  length,
758  true,
759  true,
760  true,
761  true);
762  fec_cabling.addDevices(conn);
763  }
764 
765  imodule++;
766  }
767 
768  // ---------- Assign "dummy" FED ids/chans to Modules of FEC cabling object ----------
769 
770  uint32_t fed_id = 50;
771  uint32_t fed_ch = 0;
772  for (vector<SiStripFecCrate>::const_iterator icrate = fec_cabling.crates().begin();
773  icrate != fec_cabling.crates().end();
774  icrate++) {
775  for (vector<SiStripFec>::const_iterator ifec = icrate->fecs().begin(); ifec != icrate->fecs().end(); ifec++) {
776  for (vector<SiStripRing>::const_iterator iring = ifec->rings().begin(); iring != ifec->rings().end(); iring++) {
777  for (vector<SiStripCcu>::const_iterator iccu = iring->ccus().begin(); iccu != iring->ccus().end(); iccu++) {
778  for (vector<SiStripModule>::const_iterator imod = iccu->modules().begin(); imod != iccu->modules().end();
779  imod++) {
780  if (96 - fed_ch < imod->nApvPairs()) {
781  fed_id++;
782  fed_ch = 0;
783  } // move to next FED
784  for (uint16_t ipair = 0; ipair < imod->nApvPairs(); ipair++) {
785  pair<uint16_t, uint16_t> addr = imod->activeApvPair((*imod).lldChannel(ipair));
786  SiStripModule::FedChannel fed_channel(
787  (fed_id - 50) / 16 + 1, // 16 FEDs per crate, numbering starts from 1
788  (fed_id - 50) % 16 + 2, // FED slot starts from 2
789  fed_id,
790  fed_ch);
791  const_cast<SiStripModule&>(*imod).fedCh(addr.first, fed_channel);
792  fed_ch++;
793  }
794  }
795  }
796  }
797  }
798  }
799 }
800 
801 // -----------------------------------------------------------------------------
804  const std::vector<std::pair<uint32_t, TkDcuInfo*> >& _in) {
805  std::vector<std::pair<uint32_t, TkDcuInfo*> > in = _in;
806  // ---------- Check if entries found in DCU-DetId vector ----------
807 
808  if (in.empty()) {
809  edm::LogError(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
810  << " No entries in DCU-DetId vector!";
811  }
812 
813  // ---------- Assign DCU and DetId to Modules in FEC cabling object ----------
814 
815  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
816  << " Assigning DCU ids and DetIds to constructed modules...";
817 
818  uint16_t channels = 0;
819  uint16_t six = 0;
820  uint16_t four = 0;
821  uint16_t unknown = 0;
822  uint16_t missing = 0;
823 
824  for (vector<SiStripFecCrate>::const_iterator icrate = fec_cabling.crates().begin();
825  icrate != fec_cabling.crates().end();
826  icrate++) {
827  for (vector<SiStripFec>::const_iterator ifec = icrate->fecs().begin(); ifec != icrate->fecs().end(); ifec++) {
828  for (vector<SiStripRing>::const_iterator iring = ifec->rings().begin(); iring != ifec->rings().end(); iring++) {
829  for (vector<SiStripCcu>::const_iterator iccu = iring->ccus().begin(); iccu != iring->ccus().end(); iccu++) {
830  for (vector<SiStripModule>::const_iterator imod = iccu->modules().begin(); imod != iccu->modules().end();
831  imod++) {
832  SiStripModule& module = const_cast<SiStripModule&>(*imod);
833 
834  //@@ TEMP FIX UNTIL LAURENT DEBUGS FedChannelConnectionDescription CLASS
835  module.nApvPairs(0);
836 
837  // --- Check for null DCU ---
838 
839  if (!module.dcuId()) {
841  icrate->fecCrate(), ifec->fecSlot(), iring->fecRing(), iccu->ccuAddr(), imod->ccuChan());
842  uint32_t module_key = path.key();
843  module.dcuId(module_key); // Assign DCU id equal to control key
844  stringstream ss;
845  ss << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
846  << " Found NULL DcuId! Setting 'dummy' value based control key 0x" << hex << setw(8) << setfill('0')
847  << module_key << dec;
848  edm::LogWarning(mlCabling_) << ss.str();
849  }
850 
851  // --- Check for null DetId ---
852 
853  if (!module.detId()) {
854  // --- Search for DcuId in map ---
855 
856  SiStripConfigDb::DcuDetIdsV::iterator iter = in.end();
857  iter = SiStripConfigDb::findDcuDetId(in.begin(), in.end(), module.dcuId());
858  if (iter != in.end()) {
859  if (!(iter->second)) {
860  edm::LogWarning(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
861  << " NULL pointer to TkDcuInfo!";
862  continue;
863  }
864 
865  // --- Assign DetId and set nApvPairs based on APVs found in given Module ---
866 
867  module.detId(iter->second->getDetId());
868  module.nApvPairs(0);
869 
870  // count expected channels
871  uint16_t pairs = iter->second->getApvNumber() / 2;
872  channels += pairs;
873  if (pairs == 2) {
874  four++;
875  } else if (pairs == 3) {
876  six++;
877  } else {
878  unknown++;
879  }
880 
881  // --- Check number of APV pairs is valid and consistent with cached map ---
882 
883  if (module.nApvPairs() != 2 && module.nApvPairs() != 3) {
884  missing += (iter->second->getApvNumber() / 2 - module.nApvPairs());
885  stringstream ss1;
886  ss1 << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]" << std::endl
887  << " Module with DCU id 0x" << hex << setw(8) << setfill('0') << module.dcuId() << dec
888  << " and DetId 0x" << hex << setw(8) << setfill('0') << module.detId() << dec
889  << " has unexpected number of APV pairs (" << module.nApvPairs() << ")." << std::endl
890  << " Some APV pairs may have not been detected by the FEC scan." << std::endl
891  << " Setting to value found in static map (" << iter->second->getApvNumber() / 2 << ")...";
892  edm::LogWarning(mlCabling_) << ss1.str();
893  module.nApvPairs(iter->second->getApvNumber() / 2);
894 
895  } else if (module.nApvPairs() < iter->second->getApvNumber() / 2) {
896  missing += (iter->second->getApvNumber() / 2 - module.nApvPairs());
897  stringstream ss2;
898  ss2 << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]" << std::endl
899  << " Module with DCU id 0x" << hex << setw(8) << setfill('0') << module.dcuId() << dec
900  << " and DetId 0x" << hex << setw(8) << setfill('0') << module.detId() << dec
901  << " has number of APV pairs (" << module.nApvPairs()
902  << ") that does not match value found in DCU-DetId vector (" << iter->second->getApvNumber() / 2
903  << ")." << std::endl
904  << " Some APV pairs may have not been detected by"
905  << " the FEC scan or the DCU-DetId vector may be incorrect." << std::endl
906  << " Setting to value found in static map (" << iter->second->getApvNumber() / 2 << ")...";
907  edm::LogWarning(mlCabling_) << ss2.str();
908  module.nApvPairs(iter->second->getApvNumber() / 2);
909  }
910 
911  // --- Check for null fibre length ---
912 
913  if (!module.length()) {
914  module.length(static_cast<uint16_t>(iter->second->getFibreLength()));
915  }
916 
917  // --- Remove TkDcuInfo object from cached map ---
918 
919  in.erase(iter);
920 
921  } // Set for DCU in static table
922  } // Check for null DetId
923 
924  } // Module loop
925  } // CCU loop
926  } // FEC ring loop
927  } // FEC loop
928  } // FEC crate loop
929 
930  std::stringstream sss;
931  sss << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]" << std::endl
932  << " Connections in DCU-DetId map : " << channels << std::endl
933  << " 4-APV modules : " << four << std::endl
934  << " 6-APV modules : " << six << std::endl
935  << " Unknown number of APV pairs : " << unknown << std::endl
936  << " Total found APV pairs : " << (channels - missing) << std::endl
937  << " Total missing APV pairs : " << missing << std::endl;
938  edm::LogVerbatim(mlCabling_) << sss.str();
939 
940  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
941  << " Finished assigning DCU ids and DetIds to constructed modules...";
942 
943  // ---------- "Randomly" assign DetIds to Modules with DCU ids not found in static table ----------
944 
945  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
946  << " Assigning \"random\" DetIds to modules with DCU ids not found in static table...";
947 
948  uint32_t detid = 0x10000; // Incremented "dummy" DetId
949  for (vector<SiStripFecCrate>::const_iterator icrate = fec_cabling.crates().begin();
950  icrate != fec_cabling.crates().end();
951  icrate++) {
952  for (vector<SiStripFec>::const_iterator ifec = icrate->fecs().begin(); ifec != icrate->fecs().end(); ifec++) {
953  for (vector<SiStripRing>::const_iterator iring = ifec->rings().begin(); iring != ifec->rings().end(); iring++) {
954  for (vector<SiStripCcu>::const_iterator iccu = iring->ccus().begin(); iccu != iring->ccus().end(); iccu++) {
955  for (vector<SiStripModule>::const_iterator imod = iccu->modules().begin(); imod != iccu->modules().end();
956  imod++) {
957  SiStripModule& module = const_cast<SiStripModule&>(*imod);
958 
959  // --- Check for null DetId and search for DCU in cached map ---
960 
961  if (!module.detId()) {
962  SiStripConfigDb::DcuDetIdsV::iterator iter = in.end();
963  iter = SiStripConfigDb::findDcuDetId(in.begin(), in.end(), module.dcuId());
964  if (iter != in.end()) {
965  // --- Search for "random" module with consistent number of APV pairs ---
966 
967  SiStripConfigDb::DcuDetIdsV::iterator idcu;
968  if (in.empty()) {
969  idcu = in.end();
970  } else {
971  idcu = in.begin();
972  while (idcu != in.end()) {
973  if (idcu->second) {
974  if (static_cast<uint32_t>(idcu->second->getApvNumber()) ==
975  static_cast<uint32_t>(2 * module.nApvPairs())) {
976  break;
977  }
978  }
979  idcu++;
980  }
981  }
982 
983  // --- Assign "random" DetId if number of APV pairs is consistent ---
984 
985  if (idcu != in.end()) {
986  if (!(idcu->second)) {
987  edm::LogWarning(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
988  << " NULL pointer to TkDcuInfo!";
989  continue;
990  }
991 
992  module.detId(idcu->second->getDetId());
993  in.erase(idcu);
994 
995  stringstream ss;
996  ss << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
997  << " Did not find module with DCU id 0x" << hex << setw(8) << setfill('0') << module.dcuId() << dec
998  << " in DCU-DetId vector!" << endl
999  << " Assigned 'random' DetId 0x" << hex << setw(8) << setfill('0') << module.detId() << dec;
1000  edm::LogWarning(mlCabling_) << ss.str();
1001 
1002  } else { // --- Else, assign "dummy" DetId based on counter ---
1003 
1004  // If no match found, then assign DetId using incremented counter
1005  module.detId(detid);
1006  detid++;
1007 
1008  stringstream ss;
1009  if (in.empty()) {
1010  ss << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
1011  << " Did not find module with DCU id 0x" << hex << setw(8) << setfill('0') << module.dcuId()
1012  << dec << " in DCU-DetId vector!"
1013  << " Could not assign 'random' DetId as DCU-DetID map is empty!"
1014  << " Assigned DetId based on incremented counter, with value 0x" << hex << setw(8)
1015  << setfill('0') << module.detId() << dec;
1016  } else {
1017  ss << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
1018  << " Did not find module with DCU id 0x" << hex << setw(8) << setfill('0') << module.dcuId()
1019  << dec << " in DCU-DetId vector!"
1020  << " Could not assign 'random' DetId as no modules had appropriate number of APV pairs ("
1021  << module.nApvPairs() << "). Assigned DetId based on incremented counter, with value 0x" << hex
1022  << setw(8) << setfill('0') << module.detId() << dec;
1023  }
1024  edm::LogWarning(mlCabling_) << ss.str();
1025  }
1026  }
1027  }
1028 
1029  } // Module loop
1030  } // CCU loop
1031  } // FEC ring loop
1032  } // FEC loop
1033  } // FEC crate loop
1034 
1035  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
1036  << " Finished assigning \"random\" DetIds to modules with DCU ids not found in static table...";
1037 
1038  LogTrace(mlCabling_) << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
1039  << " Assigning \"random\" DetIds to modules with DCU ids not found in static table...";
1040 
1041  // ---------- Check for unassigned DetIds ----------
1042 
1043  if (!in.empty()) {
1044  stringstream ss;
1045  ss << "[SiStripFedCablingBuilderFromDb::" << __func__ << "]"
1046  << " Not all DetIds have been assigned to a DcuId! " << in.size() << " DetIds are unassigned!";
1047  edm::LogWarning(mlCabling_) << ss.str();
1048  }
1049 }
1050 
1051 // -----------------------------------------------------------------------------
1054  SiStripFedCabling& fed_cabling) {
1055  vector<FedChannelConnection> conns;
1056  fec_cabling.connections(conns);
1057  fed_cabling.buildFedCabling(conns);
1058 }
1059 
1060 // -----------------------------------------------------------------------------
1063  SiStripFecCabling& fec_cabling) {
1064  fec_cabling.buildFecCabling(fed_cabling);
1065 }
1066 
1067 // -----------------------------------------------------------------------------
1068 //
1070  const edm::IOVSyncValue& iov_sync,
1071  edm::ValidityInterval& iov_validity) {
1072  edm::ValidityInterval infinity(iov_sync.beginOfTime(), iov_sync.endOfTime());
1073  iov_validity = infinity;
1074 }
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Definition: SiStripFedCablingBuilderFromDb.cc:803
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Definition: ValidityInterval.h:28
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Definition: SiStripModule.h:24
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Definition: SiStripFedCabling.h:25
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Definition: EventSetupRecordKey.h:30
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Definition: DcuDetIds.cc:412
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Definition: dqmiodatasetharvest.py:119
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Definition: contentValuesCheck.py:33
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Definition: SiStripCondDataRecords.h:22
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Definition: generateTowerEtThresholdLUT.py:57
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Definition: NumberOfDevices.h:14
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static void buildFecCablingFromDetIds(SiStripConfigDb *const, SiStripFecCabling &)
Definition: SiStripFedCablingBuilderFromDb.cc:675
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Definition: SiStripConfigDb.cc:191
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Definition: SiStripConfigDb.h:47
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Definition: SiStripFecCabling.h:89
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Abstract base class for producer of SiStripFedCabling record.
Definition: SiStripFedCablingESProducer.h:17
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Definition: SiStripFecKey.h:45
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Definition: IOVSyncValue.h:31
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Definition: MessageLogger.h:141
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Class containning control, module, detector and connection information, at the level of a FED channel...
Definition: FedChannelConnection.h:26
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Definition: SiStripFecCabling.cc:22
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