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ApvTimingHistosUsingDb.cc
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1 
8 #include <iostream>
9 
10 using namespace sistrip;
11 
12 // -----------------------------------------------------------------------------
15  DQMStore* bei,
16  SiStripConfigDb* const db )
17  : CommissioningHistograms( pset.getParameter<edm::ParameterSet>("ApvTimingParameters"),
18  bei,
22  ApvTimingHistograms( pset.getParameter<edm::ParameterSet>("ApvTimingParameters"),
23  bei )
24 {
26  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
27  << " Constructing object...";
28  skipFecUpdate_ = this->pset().getParameter<bool>("SkipFecUpdate");
29  skipFedUpdate_ = this->pset().getParameter<bool>("SkipFedUpdate");
30  if (skipFecUpdate_)
32  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
33  << " Skipping update of FEC parameters.";
34  if (skipFedUpdate_)
36  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
37  << " Skipping update of FED parameters.";
38 
39  allowSelectiveUpload_ = this->pset().existsAs<bool>("doSelectiveUpload")?this->pset().getParameter<bool>("doSelectiveUpload"):false;
42  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
43  << " Enabling selective update of FED parameters.";
44 
45 }
46 
47 // -----------------------------------------------------------------------------
51  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
52  << " Destructing object...";
53 }
54 
55 // -----------------------------------------------------------------------------
59  << "[ApvTimingHistosUsingDb::" << __func__ << "]";
60 
61  if ( !db() ) {
63  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
64  << " NULL pointer to SiStripConfigDb interface!"
65  << " Aborting upload...";
66  return;
67  }
68 
69  if ( !skipFecUpdate_ ) {
70 
71  // Retrieve and update PLL device descriptions
73  bool upload = update( devices );
74 
75  // Check if new PLL settings are valid
76  if ( !upload ) {
78  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
79  << " Found invalid PLL settings (coarse > 15)"
80  << " Aborting update to database...";
81  return;
82  }
83 
84  // Upload PLL device descriptions
85  if ( doUploadConf() ) {
87  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
88  << " Uploading PLL settings to DB...";
91  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
92  << " Upload of PLL settings to DB finished!";
93  } else {
95  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
96  << " TEST only! No PLL settings will be uploaded to DB...";
97  }
98 
99  } else {
101  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
102  << " No upload of PLL settings to DB, as defined by .cfg file!";
103  }
104 
105  if ( !skipFedUpdate_ ) {
106 
107  // Update FED descriptions with new ticker thresholds
109  update( feds );
110 
111  // Update FED descriptions with new ticker thresholds
112  if ( doUploadConf() ) {
114  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
115  << " Uploading FED ticker thresholds to DB...";
118  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
119  << " Upload of FED ticker thresholds to DB finished!";
120  } else {
122  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
123  << " TEST only! No FED ticker thresholds will be uploaded to DB...";
124  }
125 
126  } else {
128  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
129  << " No Upload of FED ticker thresholds to DB, as defined by .cfg file!";
130  }
131 
132 }
133 
134 // -----------------------------------------------------------------------------
137 
138  // Iterate through devices and update device descriptions
139  uint16_t updated = 0;
140  std::vector<SiStripFecKey> invalid;
141  SiStripConfigDb::DeviceDescriptionsV::const_iterator idevice;
142 
143  for ( idevice = devices.begin(); idevice != devices.end(); idevice++ ) {
144 
145  // Check device type
146  if ( (*idevice)->getDeviceType() != PLL ) { continue; }
147 
148  // Cast to retrieve appropriate description object
149  pllDescription* desc = dynamic_cast<pllDescription*>( *idevice );
150  if ( !desc ) { continue; }
151 
152  // Retrieve device addresses from device description
153  const SiStripConfigDb::DeviceAddress& addr = db()->deviceAddress(*desc);
154  SiStripFecKey fec_path;
155 
156  // PLL delay settings
157  uint32_t coarse = sistrip::invalid_;
158  uint32_t fine = sistrip::invalid_;
159 
160  // Iterate through LLD channels
161  for ( uint16_t ichan = 0; ichan < sistrip::CHANS_PER_LLD; ichan++ ) {
162 
163  // Construct key from device description
164  SiStripFecKey fec_key( addr.fecCrate_,
165  addr.fecSlot_,
166  addr.fecRing_,
167  addr.ccuAddr_,
168  addr.ccuChan_,
169  ichan+1 );
170  fec_path = fec_key;
171 
172  // Locate appropriate analysis object
173  Analyses::const_iterator iter = data(allowSelectiveUpload_).find( fec_key.key() );
174  if ( iter != data(allowSelectiveUpload_).end() ) {
175 
176  ApvTimingAnalysis* anal = dynamic_cast<ApvTimingAnalysis*>( iter->second );
177  if ( !anal ) {
179  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
180  << " NULL pointer to analysis object!";
181  continue;
182  }
183 
184  // Calculate coarse and fine delays
185  int32_t delay = static_cast<int32_t>( rint( anal->delay() )*24./25 );
186  // first set course delay
187  coarse = static_cast<uint16_t>( desc->getDelayCoarse() + (delay/24) )
188  + ( static_cast<uint16_t>( desc->getDelayFine() ) + (delay%24) ) / 24;
189  delay = delay % 24; // only bother with fine delay now
190  if ( ( static_cast<uint16_t>( desc->getDelayFine() ) + delay ) % 24 < 0 ) {
191  coarse -= 1;
192  delay += 24;
193  }
194  fine = ( static_cast<uint16_t>( desc->getDelayFine() ) + delay ) % 24;
195 
196  // Record PPLs maximum coarse setting
197  if ( coarse > 15 ) { invalid.push_back(fec_key); }
198 
199  } else {
200  if ( deviceIsPresent(fec_key) ) {
202  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
203  << " Unable to find FEC key with params crate/FEC/ring/CCU/module/LLD: "
204  << fec_key.fecCrate() << "/"
205  << fec_key.fecSlot() << "/"
206  << fec_key.fecRing() << "/"
207  << fec_key.ccuAddr() << "/"
208  << fec_key.ccuChan() << "/"
209  << fec_key.channel();
210  }
211  }
212 
213  // Exit LLD channel loop if coarse and fine delays are known
214  if ( coarse != sistrip::invalid_ &&
215  fine != sistrip::invalid_ ) { break; }
216 
217  } // lld channel loop
218 
219  // Update PLL settings
220  if ( coarse != sistrip::invalid_ &&
221  fine != sistrip::invalid_ ) {
222 
223  std::stringstream ss;
224  if ( edm::isDebugEnabled() ) {
225  ss << "[ApvTimingHistosUsingDb::" << __func__ << "]"
226  << " Updating coarse/fine PLL settings"
227  << " for crate/FEC/ring/CCU/module "
228  << fec_path.fecCrate() << "/"
229  << fec_path.fecSlot() << "/"
230  << fec_path.fecRing() << "/"
231  << fec_path.ccuAddr() << "/"
232  << fec_path.ccuChan()
233  << " from "
234  << static_cast<uint16_t>( desc->getDelayCoarse() ) << "/"
235  << static_cast<uint16_t>( desc->getDelayFine() );
236  }
237  desc->setDelayCoarse(coarse);
238  desc->setDelayFine(fine);
239  updated++;
240  if ( edm::isDebugEnabled() ) {
241  ss << " to "
242  << static_cast<uint16_t>( desc->getDelayCoarse() ) << "/"
243  << static_cast<uint16_t>( desc->getDelayFine() );
244  LogTrace(mlDqmClient_) << ss.str();
245  }
246 
247  } else {
249  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
250  << " Invalid PLL delay settings course/fine = "
251  << coarse << "/" << fine
252  << " for crate/FEC/ring/CCU/module "
253  << fec_path.fecCrate() << "/"
254  << fec_path.fecSlot() << "/"
255  << fec_path.fecRing() << "/"
256  << fec_path.ccuAddr() << "/"
257  << fec_path.ccuChan();
258  }
259 
260  }
261 
262  // Check if invalid settings were found
263  if ( !invalid.empty() ) {
264  std::stringstream ss;
265  ss << "[ApvTimingHistosUsingDb::" << __func__ << "]"
266  << " Found PLL coarse setting of >15"
267  << " (not allowed!) for "
268  << invalid.size()
269  << " channels";
270  ss << " (Example is crate/FEC/ring/CCU/module/LLD: "
271  << invalid.front().fecCrate() << "/"
272  << invalid.front().fecSlot() << "/"
273  << invalid.front().fecRing() << "/"
274  << invalid.front().ccuAddr() << "/"
275  << invalid.front().ccuChan() << "/"
276  << invalid.front().channel();
277  edm::LogWarning(mlDqmClient_) << ss.str();
278  return false;
279  }
280 
282  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
283  << " Updated PLL settings for "
284  << updated << " modules";
285  return true;
286 
287 }
288 
289 // -----------------------------------------------------------------------------
292 
293  // Retrieve FED ids from cabling
294  auto ids = cabling()->fedIds();
295 
296  // Iterate through feds and update fed descriptions
297  uint16_t updated = 0;
298  for ( auto ifed = feds.begin(); ifed != feds.end(); ++ifed ) {
299 
300  // If FED id not found in list (from cabling), then continue
301  if ( find( ids.begin(), ids.end(), (*ifed)->getFedId() ) == ids.end() ) { continue; }
302 
303  for ( uint16_t ichan = 0; ichan < sistrip::FEDCH_PER_FED; ichan++ ) {
304 
305  // Build FED and FEC keys
306  const FedChannelConnection& conn = cabling()->fedConnection( (*ifed)->getFedId(), ichan );
307  if ( conn.fecCrate() == sistrip::invalid_ ||
308  conn.fecSlot() == sistrip::invalid_ ||
309  conn.fecRing() == sistrip::invalid_ ||
310  conn.ccuAddr() == sistrip::invalid_ ||
311  conn.ccuChan() == sistrip::invalid_ ||
312  conn.lldChannel() == sistrip::invalid_ ) { continue; }
313  SiStripFedKey fed_key( conn.fedId(),
314  SiStripFedKey::feUnit( conn.fedCh() ),
315  SiStripFedKey::feChan( conn.fedCh() ) );
316  SiStripFecKey fec_key( conn.fecCrate(),
317  conn.fecSlot(),
318  conn.fecRing(),
319  conn.ccuAddr(),
320  conn.ccuChan(),
321  conn.lldChannel() );
322 
323  // Locate appropriate analysis object
324  Analyses::const_iterator iter = data(allowSelectiveUpload_).find( fec_key.key() );
325  if ( iter != data(allowSelectiveUpload_).end() ) {
326 
327  ApvTimingAnalysis* anal = dynamic_cast<ApvTimingAnalysis*>( iter->second );
328  if ( !anal ) {
330  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
331  << " NULL pointer to analysis object!";
332  continue;
333  }
334 
335  // Update frame finding threshold
336  Fed9U::Fed9UAddress addr( ichan );
337  uint16_t old_threshold = static_cast<uint16_t>( (*ifed)->getFrameThreshold( addr ) );
338  if ( anal->isValid() ) {
339  (*ifed)->setFrameThreshold( addr, anal->frameFindingThreshold() );
340  updated++;
341  }
342  uint16_t new_threshold = static_cast<uint16_t>( (*ifed)->getFrameThreshold( addr ) );
343 
344  // Debug
345  std::stringstream ss;
346  ss << "[ApvTimingHistosUsingDb::" << __func__ << "]";
347  if ( anal->isValid() ) {
348  ss << " Updating the frame-finding threshold"
349  << " from " << old_threshold
350  << " to " << new_threshold
351  << " using tick mark base/peak/height "
352  << anal->base() << "/"
353  << anal->peak() << "/"
354  << anal->height();
355  } else {
356  ss << " Cannot update the frame-finding threshold"
357  << " from " << old_threshold
358  << " to a new value using invalid analysis ";
359  }
360  ss << " for crate/FEC/ring/CCU/module/LLD "
361  << fec_key.fecCrate() << "/"
362  << fec_key.fecSlot() << "/"
363  << fec_key.fecRing() << "/"
364  << fec_key.ccuAddr() << "/"
365  << fec_key.ccuChan()
366  << fec_key.channel()
367  << " and FED id/ch "
368  << fed_key.fedId() << "/"
369  << fed_key.fedChannel();
370  anal->print(ss);
371  //LogTrace(mlDqmClient_) << ss.str();
372 
373  } else {
374  if ( deviceIsPresent(fec_key) ) {
375  std::stringstream ss;
376  ss << "[ApvTimingHistosUsingDb::" << __func__ << "]"
377  << " Unable to find analysis object and update ticker thresholds"
378  << " for key/crate/FEC/ring/CCU/module/LLD "
379  << std::hex << std::setw(8) << std::setfill('0') << fec_key.key() << std::dec
380  << fec_key.fecCrate() << "/"
381  << fec_key.fecSlot() << "/"
382  << fec_key.fecRing() << "/"
383  << fec_key.ccuAddr() << "/"
384  << fec_key.ccuChan() << "/"
385  << fec_key.channel()
386  << " and FED key/id/ch "
387  << std::hex << std::setw(8) << std::setfill('0') << fed_key.key() << std::dec
388  << fed_key.fedId() << "/"
389  << fed_key.fedChannel();
390  edm::LogWarning(mlDqmClient_) << ss.str();
391  }
392  }
393  }
394  }
395 
397  << "[ApvTimingHistosUsingDb::" << __func__ << "]"
398  << " Updated ticker thresholds for " << updated
399  << " channels on " << ids.size() << " FEDs!";
400 
401 }
402 
403 // -----------------------------------------------------------------------------
406  Analysis analysis ) {
407 
408  ApvTimingAnalysis* anal = dynamic_cast<ApvTimingAnalysis*>( analysis->second );
409  if ( !anal ) { return; }
410 
411  SiStripFecKey fec_key( anal->fecKey() );
412  SiStripFedKey fed_key( anal->fedKey() );
413 
414  for ( uint16_t iapv = 0; iapv < 2; ++iapv ) {
415 
416 // std::stringstream ss;
417 // if ( anal->isValid() ) { ss << " TEST VALID "; }
418 // else { ss << " TEST INVALID "; }
419 // ss << std::hex << anal->fecKey() << std::dec << " "
420 // << anal->base() << " "
421 // << anal->peak() << " "
422 // << anal->height() << " "
423 // << ( anal->base() + anal->height() * ApvTimingAnalysis::frameFindingThreshold_ ) << " "
424 // << anal->frameFindingThreshold();
425 // edm::LogError("TEST") << ss.str();
426 
427  // Create description
428  TimingAnalysisDescription* tmp;
429  tmp = new TimingAnalysisDescription( anal->time(),
430  anal->refTime(),
431  anal->delay(),
432  anal->height(),
433  anal->base(),
434  anal->peak(),
435  anal->frameFindingThreshold(),
436  anal->optimumSamplingPoint(),
438  true, //@@ APV timing analysis (not FED timing)
439  fec_key.fecCrate(),
440  fec_key.fecSlot(),
441  fec_key.fecRing(),
442  fec_key.ccuAddr(),
443  fec_key.ccuChan(),
444  SiStripFecKey::i2cAddr( fec_key.lldChan(), !iapv ),
445  db()->dbParams().partitions().begin()->second.partitionName(),
446  db()->dbParams().partitions().begin()->second.runNumber(),
447  anal->isValid(),
448  "",
449  fed_key.fedId(),
450  fed_key.feUnit(),
451  fed_key.feChan(),
452  fed_key.fedApv() );
453 
454  // Add comments
455  typedef std::vector<std::string> Strings;
456  Strings errors = anal->getErrorCodes();
457  Strings::const_iterator istr = errors.begin();
458  Strings::const_iterator jstr = errors.end();
459  for ( ; istr != jstr; ++istr ) { tmp->addComments( *istr ); }
460 
461  // Store description
462  desc.push_back( tmp );
463 
464  }
465 
466 }
def upload(url, args, files)
const uint16_t & fecSlot() const
T getParameter(std::string const &) const
bool isDebugEnabled()
const uint16_t & fecCrate() const
bool existsAs(std::string const &parameterName, bool trackiness=true) const
checks if a parameter exists as a given type
Definition: ParameterSet.h:161
const uint32_t & fedKey() const
void uploadConfigurations() override
Analyses & data(bool getMaskedData=false)
const uint16_t & fecRing() const
FedChannelConnection fedConnection(uint16_t fed_id, uint16_t fed_ch) const
A container class for generic run and event-related info, information required by the commissioning a...
Definition: SiStripFedKey.h:56
const uint16_t & fedCh() const
const edm::ParameterSet & pset() const
bool deviceIsPresent(const SiStripFecKey &)
FedDescriptionsRange getFedDescriptions(std::string partition="")
std::vector< std::string > Strings
Definition: MsgTools.h:18
const float & refTime() const
FedDescriptions::range FedDescriptionsRange
static const float tickMarkHeightThreshold_
static const char mlDqmClient_[]
ApvTimingHistosUsingDb(const edm::ParameterSet &pset, DQMStore *, SiStripConfigDb *const )
const uint16_t & fecSlot() const
const float & optimumSamplingPoint() const
uint16_t lldChannel() const
void find(edm::Handle< EcalRecHitCollection > &hits, DetId thisDet, std::vector< EcalRecHitCollection::const_iterator > &hit, bool debug=false)
Definition: FindCaloHit.cc:20
const uint16_t & i2cAddr() const
const uint16_t & fedId() const
sistrip classes
bool update(SiStripConfigDb::DeviceDescriptionsRange)
const float & base() const
const uint32_t & key() const
Definition: SiStripKey.h:125
Utility class that identifies a position within the strip tracker control structure, down to the level of an APV25.
Definition: SiStripFecKey.h:45
const_iterator_range partitions() const
const uint16_t & fecRing() const
Class containning control, module, detector and connection information, at the level of a FED channel...
FedsConstIterRange fedIds() const
DeviceDescriptions::range DeviceDescriptionsRange
static const uint16_t CHANS_PER_LLD
An interface class to the DeviceFactory.
const uint16_t & ccuChan() const
bool isValid() const override
void print(std::stringstream &, uint32_t not_used=0) override
const uint32_t & fecKey() const
DeviceAddress deviceAddress(const deviceDescription &)
uint16_t fedChannel() const
const float & peak() const
const uint16_t & ccuAddr() const
const float & time() const
#define LogTrace(id)
const float & delay() const
const uint16_t & fecCrate() const
uint16_t frameFindingThreshold() const
const uint16_t & feUnit() const
const SiStripDbParams & dbParams() const
const uint16_t & channel() const
Definition: SiStripKey.h:128
void uploadFedDescriptions(std::string partition="")
const uint16_t & ccuAddr() const
static const uint16_t invalid_
Definition: Constants.h:16
std::vector< std::vector< double > > tmp
Definition: MVATrainer.cc:100
HLT enums.
static const uint16_t FEDCH_PER_FED
std::vector< AnalysisDescription * > AnalysisDescriptionsV
const uint16_t & feChan() const
const uint16_t & ccuChan() const
const uint16_t & fedId() const
Definition: errors.py:1
SiStripConfigDb *const db() const
DeviceDescriptionsRange getDeviceDescriptions(std::string partition="")
void uploadDeviceDescriptions(std::string partition="")
Analysis for timing run using APV tick marks.
SiStripFedCabling *const cabling() const
const VString & getErrorCodes() const
const float & height() const
void create(SiStripConfigDb::AnalysisDescriptionsV &, Analysis) override