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L1GlobalTriggerFDL.cc
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1 
16 // this class header
18 
19 // system include files
20 #include <iostream>
21 
22 // user include files
26 
29 
32 
35 
37 
40 
41 // forward declarations
42 
43 // constructor
45  : // logical switches
46  m_firstEv(true), m_firstEvLumiSegment(true), m_firstEvRun(true),
47  m_isDebugEnabled(edm::isDebugEnabled()) {
48 
49  // create empty FDL word
50  m_gtFdlWord = new L1GtFdlWord();
51 
52  // can not reserve memory here for prescale counters - no access to EventSetup
53 }
54 
55 // destructor
57 
58  reset();
59  delete m_gtFdlWord;
60 }
61 
62 // Operations
63 
64 // run FDL
66  edm::Event &iEvent, const std::vector<int> &prescaleFactorsAlgoTrig,
67  const std::vector<int> &prescaleFactorsTechTrig,
68  const std::vector<unsigned int> &triggerMaskAlgoTrig,
69  const std::vector<unsigned int> &triggerMaskTechTrig,
70  const std::vector<unsigned int> &triggerMaskVetoAlgoTrig,
71  const std::vector<unsigned int> &triggerMaskVetoTechTrig,
72  const std::vector<L1GtBoard> &boardMaps, const int totalBxInEvent,
73  const int iBxInEvent, const unsigned int numberPhysTriggers,
74  const unsigned int numberTechnicalTriggers,
75  const unsigned int numberDaqPartitions, const L1GlobalTriggerGTL *ptrGTL,
76  const L1GlobalTriggerPSB *ptrPSB, const int pfAlgoSetIndex,
77  const int pfTechSetIndex, const bool algorithmTriggersUnprescaled,
78  const bool algorithmTriggersUnmasked,
79  const bool technicalTriggersUnprescaled,
80  const bool technicalTriggersUnmasked,
81  const bool technicalTriggersVetoUnmasked) {
82 
83  // FIXME get rid of bitset in GTL in order to use only EventSetup
84  const unsigned int numberPhysTriggersSet =
86 
87  // get gtlDecisionWord from GTL
88  std::bitset<numberPhysTriggersSet> gtlDecisionWord = ptrGTL->getAlgorithmOR();
89 
90  // convert decision word from std::bitset to std::vector<bool>
91  DecisionWord algoDecisionWord(numberPhysTriggers);
92 
93  for (unsigned int iBit = 0; iBit < numberPhysTriggers; ++iBit) {
94 
95  bool bitValue = gtlDecisionWord.test(iBit);
96  algoDecisionWord[iBit] = bitValue;
97  }
98 
99  // prescale counters are reset at the beginning of the luminosity segment
100 
101  if (m_firstEv) {
102 
103  // prescale counters: numberPhysTriggers counters per bunch cross
104  m_prescaleCounterAlgoTrig.reserve(numberPhysTriggers * totalBxInEvent);
105 
106  for (int iBxInEvent = 0; iBxInEvent <= totalBxInEvent; ++iBxInEvent) {
107 
108  m_prescaleCounterAlgoTrig.push_back(prescaleFactorsAlgoTrig);
109  }
110 
111  // prescale counters: numberTechnicalTriggers counters per bunch cross
112  m_prescaleCounterTechTrig.reserve(numberTechnicalTriggers * totalBxInEvent);
113 
114  for (int iBxInEvent = 0; iBxInEvent <= totalBxInEvent; ++iBxInEvent) {
115 
116  m_prescaleCounterTechTrig.push_back(prescaleFactorsTechTrig);
117  }
118 
119  m_firstEv = false;
120  }
121 
122  // TODO FIXME find the beginning of the luminosity segment
123  if (m_firstEvLumiSegment) {
124 
126  for (int iBxInEvent = 0; iBxInEvent <= totalBxInEvent; ++iBxInEvent) {
127  m_prescaleCounterAlgoTrig.push_back(prescaleFactorsAlgoTrig);
128  }
129 
131  for (int iBxInEvent = 0; iBxInEvent <= totalBxInEvent; ++iBxInEvent) {
132  m_prescaleCounterTechTrig.push_back(prescaleFactorsTechTrig);
133  }
134 
135  m_firstEvLumiSegment = false;
136  }
137 
138  // prescale the algorithm, if necessary
139 
140  // iBxInEvent is ... -2 -1 0 1 2 ... while counters are 0 1 2 3 4 ...
141  int inBxInEvent = totalBxInEvent / 2 + iBxInEvent;
142 
143  for (unsigned int iBit = 0; iBit < numberPhysTriggers; ++iBit) {
144 
145  if ((!algorithmTriggersUnprescaled) &&
146  (prescaleFactorsAlgoTrig.at(iBit) != 1)) {
147 
148  bool bitValue = algoDecisionWord.at(iBit);
149  if (bitValue) {
150 
151  (m_prescaleCounterAlgoTrig.at(inBxInEvent).at(iBit))--;
152  if (m_prescaleCounterAlgoTrig.at(inBxInEvent).at(iBit) == 0) {
153 
154  // bit already true in algoDecisionWord, just reset counter
155  m_prescaleCounterAlgoTrig.at(inBxInEvent).at(iBit) =
156  prescaleFactorsAlgoTrig.at(iBit);
157 
158  // LogTrace("L1GlobalTrigger")
159  //<< "\nPrescaled algorithm: " << iBit << ". Reset counter to "
160  //<< prescaleFactorsAlgoTrig.at(iBit) << "\n"
161  //<< std::endl;
162 
163  } else {
164 
165  // change bit to false
166  algoDecisionWord[iBit] = false;
167  ;
168 
169  // LogTrace("L1GlobalTrigger")
170  //<< "\nPrescaled algorithm: " << iBit << ". Result set to false"
171  //<< std::endl;
172  }
173  }
174  }
175  }
176 
177  // algo decision word written in the FDL readout before the trigger mask
178  // in order to allow multiple DAQ partitions
179 
180  //
181  // technical triggers
182  //
183 
184  std::vector<bool> techDecisionWord = *(ptrPSB->getGtTechnicalTriggers());
185 
186  // prescale the technical trigger, if necessary
187 
188  for (unsigned int iBit = 0; iBit < numberTechnicalTriggers; ++iBit) {
189 
190  if ((!technicalTriggersUnprescaled) &&
191  (prescaleFactorsTechTrig.at(iBit) != 1)) {
192 
193  bool bitValue = techDecisionWord.at(iBit);
194  if (bitValue) {
195 
196  (m_prescaleCounterTechTrig.at(inBxInEvent).at(iBit))--;
197  if (m_prescaleCounterTechTrig.at(inBxInEvent).at(iBit) == 0) {
198 
199  // bit already true in techDecisionWord, just reset counter
200  m_prescaleCounterTechTrig.at(inBxInEvent).at(iBit) =
201  prescaleFactorsTechTrig.at(iBit);
202 
203  // LogTrace("L1GlobalTrigger")
204  //<< "\nPrescaled algorithm: " << iBit << ". Reset counter to "
205  //<< prescaleFactorsTechTrig.at(iBit) << "\n"
206  //<< std::endl;
207 
208  } else {
209 
210  // change bit to false
211  techDecisionWord[iBit] = false;
212 
213  // LogTrace("L1GlobalTrigger")
214  //<< "\nPrescaled technical trigger: " << iBit << ". Result set to
215  // false"
216  //<< std::endl;
217  }
218  }
219  }
220  }
221 
222  // technical trigger decision word written in the FDL readout before the
223  // trigger mask in order to allow multiple DAQ partitions
224 
225  //
226  // compute the final decision word per DAQ partition
227  //
228 
229  boost::uint16_t finalOrValue = 0;
230 
231  for (unsigned int iDaq = 0; iDaq < numberDaqPartitions; ++iDaq) {
232 
233  bool daqPartitionFinalOR = false;
234 
235  // starts with technical trigger veto mask to minimize computation
236  // no algorithm trigger veto mask is implemented up to now in hardware,
237  // therefore do not implement it here
238  bool vetoTechTrig = false;
239 
240  // vetoTechTrig can change only when using trigger veto masks
241  if (!technicalTriggersVetoUnmasked) {
242 
243  for (unsigned int iBit = 0; iBit < numberTechnicalTriggers; ++iBit) {
244 
245  int triggerMaskVetoTechTrigBit =
246  triggerMaskVetoTechTrig[iBit] & (1 << iDaq);
247  // LogTrace("L1GlobalTrigger")
248  //<< "\nTechnical trigger bit: " << iBit
249  //<< " mask = " << triggerMaskVetoTechTrigBit
250  //<< " DAQ partition " << iDaq
251  //<< std::endl;
252 
253  if (triggerMaskVetoTechTrigBit && techDecisionWord[iBit]) {
254 
255  daqPartitionFinalOR = false;
256  vetoTechTrig = true;
257 
258  // LogTrace("L1GlobalTrigger")
259  //<< "\nVeto mask technical trigger: " << iBit
260  // << ". FinalOR for DAQ partition " << iDaq << " set to false"
261  //<< std::endl;
262 
263  break;
264  }
265  }
266  }
267 
268  // apply algorithm and technical trigger masks only if no veto from
269  // technical trigger
270  if (!vetoTechTrig) {
271 
272  // algorithm trigger mask
273  bool algoFinalOr = false;
274 
275  for (unsigned int iBit = 0; iBit < numberPhysTriggers; ++iBit) {
276 
277  bool iBitDecision = false;
278 
279  int triggerMaskAlgoTrigBit = -1;
280 
281  if (algorithmTriggersUnmasked) {
282  triggerMaskAlgoTrigBit = 0;
283  } else {
284  triggerMaskAlgoTrigBit = triggerMaskAlgoTrig[iBit] & (1 << iDaq);
285  }
286  // LogTrace("L1GlobalTrigger")
287  //<< "\nAlgorithm trigger bit: " << iBit
288  //<< " mask = " << triggerMaskAlgoTrigBit
289  //<< " DAQ partition " << iDaq
290  //<< std::endl;
291 
292  if (triggerMaskAlgoTrigBit) {
293  iBitDecision = false;
294 
295  // LogTrace("L1GlobalTrigger")
296  //<< "\nMasked algorithm trigger: " << iBit << ". Result set to false"
297  //<< std::endl;
298  } else {
299  iBitDecision = algoDecisionWord[iBit];
300  }
301 
302  algoFinalOr = algoFinalOr || iBitDecision;
303  }
304 
305  // set the technical trigger mask: block the corresponding algorithm if
306  // bit value is 1
307 
308  bool techFinalOr = false;
309 
310  for (unsigned int iBit = 0; iBit < numberTechnicalTriggers; ++iBit) {
311 
312  bool iBitDecision = false;
313 
314  int triggerMaskTechTrigBit = -1;
315 
316  if (technicalTriggersUnmasked) {
317  triggerMaskTechTrigBit = 0;
318  } else {
319  triggerMaskTechTrigBit = triggerMaskTechTrig[iBit] & (1 << iDaq);
320  }
321  // LogTrace("L1GlobalTrigger")
322  //<< "\nTechnical trigger bit: " << iBit
323  //<< " mask = " << triggerMaskTechTrigBit
324  //<< std::endl;
325 
326  if (triggerMaskTechTrigBit) {
327 
328  iBitDecision = false;
329 
330  // LogTrace("L1GlobalTrigger")
331  //<< "\nMasked technical trigger: " << iBit << ". Result set to false"
332  //<< std::endl;
333  } else {
334  iBitDecision = techDecisionWord[iBit];
335  }
336 
337  techFinalOr = techFinalOr || iBitDecision;
338  }
339 
340  daqPartitionFinalOR = algoFinalOr || techFinalOr;
341 
342  } else {
343 
344  daqPartitionFinalOR = false; // vetoTechTrig
345  }
346 
347  // push it in finalOrValue
348  boost::uint16_t daqPartitionFinalORValue =
349  static_cast<boost::uint16_t>(daqPartitionFinalOR);
350 
351  finalOrValue = finalOrValue | (daqPartitionFinalORValue << iDaq);
352  }
353 
354  // fill everything we know in the L1GtFdlWord
355 
356  typedef std::vector<L1GtBoard>::const_iterator CItBoardMaps;
357  for (CItBoardMaps itBoard = boardMaps.begin(); itBoard != boardMaps.end();
358  ++itBoard) {
359 
360  if ((itBoard->gtBoardType() == FDL)) {
361 
362  m_gtFdlWord->setBoardId(itBoard->gtBoardId());
363 
364  // BxInEvent
365  m_gtFdlWord->setBxInEvent(iBxInEvent);
366 
367  // bunch crossing
368 
369  // fill in emulator the same bunch crossing (12 bits - hardwired number of
370  // bits...) and the same local bunch crossing for all boards
371  int bxCross = iEvent.bunchCrossing();
372  boost::uint16_t bxCrossHw = 0;
373  if ((bxCross & 0xFFF) == bxCross) {
374  bxCrossHw = static_cast<boost::uint16_t>(bxCross);
375  } else {
376  bxCrossHw = 0; // Bx number too large, set to 0!
377  if (m_verbosity) {
378  LogDebug("L1GlobalTrigger")
379  << "\nBunch cross number [hex] = " << std::hex << bxCross
380  << "\n larger than 12 bits. Set to 0! \n"
381  << std::dec << std::endl;
382  }
383  }
384 
385  m_gtFdlWord->setBxNr(bxCrossHw);
386 
387  // set event number since last L1 reset generated in FDL
389  static_cast<boost::uint32_t>(iEvent.id().event()));
390 
391  // technical trigger decision word
392  m_gtFdlWord->setGtTechnicalTriggerWord(techDecisionWord);
393 
394  // algorithm trigger decision word
395  m_gtFdlWord->setGtDecisionWord(algoDecisionWord);
396 
397  // index of prescale factor set - technical triggers and algo
399  static_cast<boost::uint16_t>(pfTechSetIndex));
401  static_cast<boost::uint16_t>(pfAlgoSetIndex));
402 
403  // NoAlgo bit FIXME
404 
405  // finalOR
406  m_gtFdlWord->setFinalOR(finalOrValue);
407 
408  // orbit number
410  static_cast<boost::uint32_t>(iEvent.orbitNumber()));
411 
412  // luminosity segment number
414  static_cast<boost::uint16_t>(iEvent.luminosityBlock()));
415 
416  // local bunch crossing - set identical with absolute BxNr
417  m_gtFdlWord->setLocalBxNr(bxCrossHw);
418  }
419  }
420 }
421 
422 // fill the FDL block in the L1 GT DAQ record for iBxInEvent
424  const int iBxInEvent, const boost::uint16_t &activeBoardsGtDaq,
425  const int recordLength0, const int recordLength1,
426  const unsigned int altNrBxBoardDaq, const std::vector<L1GtBoard> &boardMaps,
427  L1GlobalTriggerReadoutRecord *gtDaqReadoutRecord) {
428 
429  typedef std::vector<L1GtBoard>::const_iterator CItBoardMaps;
430  for (CItBoardMaps itBoard = boardMaps.begin(); itBoard != boardMaps.end();
431  ++itBoard) {
432 
433  int iPosition = itBoard->gtPositionDaqRecord();
434  if (iPosition > 0) {
435 
436  int iActiveBit = itBoard->gtBitDaqActiveBoards();
437  bool activeBoard = false;
438  bool writeBoard = false;
439 
440  int recLength = -1;
441 
442  if (iActiveBit >= 0) {
443  activeBoard = activeBoardsGtDaq & (1 << iActiveBit);
444 
445  int altNrBxBoard = (altNrBxBoardDaq & (1 << iActiveBit)) >> iActiveBit;
446 
447  if (altNrBxBoard == 1) {
448  recLength = recordLength1;
449  } else {
450  recLength = recordLength0;
451  }
452 
453  int lowBxInEvent = (recLength + 1) / 2 - recLength;
454  int uppBxInEvent = (recLength + 1) / 2 - 1;
455 
456  if ((iBxInEvent >= lowBxInEvent) && (iBxInEvent <= uppBxInEvent)) {
457  writeBoard = true;
458  }
459  }
460 
461  if (activeBoard && writeBoard && (itBoard->gtBoardType() == FDL)) {
462 
463  gtDaqReadoutRecord->setGtFdlWord(*m_gtFdlWord);
464  }
465  }
466  }
467 }
468 
469 // fill the FDL block in the L1 GT EVM record for iBxInEvent
471  const int iBxInEvent, const boost::uint16_t &activeBoardsGtEvm,
472  const int recordLength0, const int recordLength1,
473  const unsigned int altNrBxBoardEvm, const std::vector<L1GtBoard> &boardMaps,
474  L1GlobalTriggerEvmReadoutRecord *gtEvmReadoutRecord) {
475 
476  typedef std::vector<L1GtBoard>::const_iterator CItBoardMaps;
477  for (CItBoardMaps itBoard = boardMaps.begin(); itBoard != boardMaps.end();
478  ++itBoard) {
479 
480  int iPosition = itBoard->gtPositionEvmRecord();
481  if (iPosition > 0) {
482 
483  int iActiveBit = itBoard->gtBitEvmActiveBoards();
484  bool activeBoard = false;
485 
486  if (iActiveBit >= 0) {
487  activeBoard = activeBoardsGtEvm & (1 << iActiveBit);
488  }
489 
490  if (activeBoard && (itBoard->gtBoardType() == FDL)) {
491 
492  gtEvmReadoutRecord->setGtFdlWord(*m_gtFdlWord);
493  }
494  }
495  }
496 }
497 
498 // clear FDL
500 
501  m_gtFdlWord->reset();
502 
503  // do NOT reset the prescale counters
504 }
#define LogDebug(id)
EventNumber_t event() const
Definition: EventID.h:41
bool isDebugEnabled()
void setBoardId(const cms_uint16_t &boardIdValue)
set BoardId from a BoardId value
Definition: L1GtFdlWord.h:75
void setFinalOR(const cms_uint16_t &finalORValue)
Definition: L1GtFdlWord.h:311
L1GtFdlWord * m_gtFdlWord
int bunchCrossing() const
Definition: EventBase.h:64
void setEventNr(const cms_uint32_t &eventNrValue)
Definition: L1GtFdlWord.h:135
edm::LuminosityBlockNumber_t luminosityBlock() const
Definition: EventBase.h:61
void setGtDecisionWord(const DecisionWord &gtDecisionWordValue)
Definition: L1GtFdlWord.h:176
void setLocalBxNr(const cms_uint16_t &localBxNrValue)
Definition: L1GtFdlWord.h:377
void fillEvmFdlBlock(const int iBxInEvent, const boost::uint16_t &activeBoardsGtEvm, const int recordLength0, const int recordLength1, const unsigned int altNrBxBoardEvm, const std::vector< L1GtBoard > &boardMaps, L1GlobalTriggerEvmReadoutRecord *gtEvmReadoutRecord)
fill the FDL block in the L1 GT EVM record for iBxInEvent
void setGtFdlWord(const L1GtFdlWord &, int bxInEventValue)
int iEvent
Definition: GenABIO.cc:224
void setGtTechnicalTriggerWord(const TechnicalTriggerWord &gtTechnicalTriggerWordValue)
Definition: L1GtFdlWord.h:154
const std::vector< bool > * getGtTechnicalTriggers() const
pointer to technical trigger bits
void setLumiSegmentNr(const cms_uint16_t &lumiSegmentNrValue)
Definition: L1GtFdlWord.h:357
std::vector< std::vector< int > > m_prescaleCounterAlgoTrig
prescale counters: NumberPhysTriggers counters per bunch cross in event
std::vector< bool > DecisionWord
typedefs
int m_verbosity
verbosity level
void reset()
reset the content of a L1GtFdlWord
Definition: L1GtFdlWord.cc:732
static const unsigned int NumberPhysTriggers
L1GlobalTriggerFDL()
constructor
int orbitNumber() const
Definition: EventBase.h:65
void setGtPrescaleFactorIndexAlgo(const cms_uint16_t &gtPrescaleFactorIndexAlgoValue)
Definition: L1GtFdlWord.h:272
void setGtPrescaleFactorIndexTech(const cms_uint16_t &gtPrescaleFactorIndexTechValue)
Definition: L1GtFdlWord.h:253
void reset()
clear FDL
void setGtFdlWord(const L1GtFdlWord &, int bxInEvent)
virtual ~L1GlobalTriggerFDL()
destructor
const std::bitset< L1GlobalTriggerReadoutSetup::NumberPhysTriggers > & getAlgorithmOR() const
return algorithm OR decision
edm::EventID id() const
Definition: EventBase.h:59
HLT enums.
void run(edm::Event &iEvent, const std::vector< int > &prescaleFactorsAlgoTrig, const std::vector< int > &prescaleFactorsTechTrig, const std::vector< unsigned int > &triggerMaskAlgoTrig, const std::vector< unsigned int > &triggerMaskTechTrig, const std::vector< unsigned int > &triggerMaskVetoAlgoTrig, const std::vector< unsigned int > &triggerMaskVetoTechTrig, const std::vector< L1GtBoard > &boardMaps, const int totalBxInEvent, const int iBxInEvent, const unsigned int numberPhysTriggers, const unsigned int numberTechnicalTriggers, const unsigned int numberDaqPartitions, const L1GlobalTriggerGTL *ptrGTL, const L1GlobalTriggerPSB *ptrPSB, const int pfAlgoSetIndex, const int pfTechSetIndex, const bool algorithmTriggersUnprescaled, const bool algorithmTriggersUnmasked, const bool technicalTriggersUnprescaled, const bool technicalTriggersUnmasked, const bool technicalTriggersVetoUnmasked)
run the FDL
void setOrbitNr(const cms_uint32_t &orbitNrValue)
Definition: L1GtFdlWord.h:337
void setBxInEvent(const int bxInEventValue)
Definition: L1GtFdlWord.h:95
std::vector< std::vector< int > > m_prescaleCounterTechTrig
prescale counters: technical trigger counters per bunch cross in event
void setBxNr(const cms_uint16_t &bxNrValue)
Definition: L1GtFdlWord.h:115
void fillDaqFdlBlock(const int iBxInEvent, const boost::uint16_t &activeBoardsGtDaq, const int recordLength0, const int recordLength1, const unsigned int altNrBxBoardDaq, const std::vector< L1GtBoard > &boardMaps, L1GlobalTriggerReadoutRecord *gtDaqReadoutRecord)
fill the FDL block in the L1 GT DAQ record for iBxInEvent