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SiStripSpyDigiConverterModule.cc
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1 #include <string>
2 #include <memory>
3 #include <vector>
4 #include <utility>
5 #include "boost/cstdint.hpp"
6 
15 
20 
23 
24 class SiStripFedCabling;
25 
35 namespace sistrip {
36 
38  {
39  public:
41  ~SpyDigiConverterModule() override;
42  void produce( edm::Event&, const edm::EventSetup& ) override;
43 
44  private:
47  const bool storeAPVAddress_;
51  const uint32_t expectedHeaderBit_;
52 
53  //utilities for cabling etc...
55  };
56 
57 } // end of sistrip namespace.
58 
59 
60 
61 namespace sistrip {
62 
64  productLabel_(pset.getParameter<edm::InputTag>("InputProductLabel")),
65  storeAPVAddress_(pset.getParameter<bool>("StoreAPVAddress")),
66  storePayloadDigis_(pset.getParameter<bool>("StorePayloadDigis")),
67  storeReorderedDigis_(pset.getParameter<bool>("StoreReorderedDigis")),
68  storeModuleDigis_(pset.getParameter<bool>("StoreModuleDigis")),
69  discardDigisWithAPVAddressError_(pset.getParameter<bool>("DiscardDigisWithWrongAPVAddress")),
70  expectedHeaderBit_(pset.getParameter<uint32_t>("ExpectedPositionOfFirstHeaderBit"))
71  {
72  productToken_ = consumes<sistrip::SpyDigiConverter::DSVRawDigis>(productLabel_);
73  if ( edm::isDebugEnabled() ) {
74  LogTrace("SiStripSpyDigiConverter")
75  << "[sistrip::SpyDigiConverterModule::" << __func__ << "]"
76  << " Constructing object...";
77  }
78 
79  if (storePayloadDigis_) produces< edm::DetSetVector<SiStripRawDigi> >("SpyPayload");
80  if (storeReorderedDigis_) produces< edm::DetSetVector<SiStripRawDigi> >("SpyReordered");
81  if (storeModuleDigis_) produces< edm::DetSetVector<SiStripRawDigi> >("SpyVirginRaw");
82 
83  if (storeAPVAddress_) {
84  produces< std::vector<uint32_t> >("APVAddress");
85  //produces<uint8_t>("APVAddress");
86  }
87 
88 
89  frameQuality_.minDigiRange = static_cast<uint16_t>(pset.getParameter<uint32_t>("MinDigiRange"));
90  frameQuality_.maxDigiRange = static_cast<uint16_t>(pset.getParameter<uint32_t>("MaxDigiRange"));
91  frameQuality_.minZeroLight = static_cast<uint16_t>(pset.getParameter<uint32_t>("MinZeroLight"));
92  frameQuality_.maxZeroLight = static_cast<uint16_t>(pset.getParameter<uint32_t>("MaxZeroLight"));
93  frameQuality_.minTickHeight = static_cast<uint16_t>(pset.getParameter<uint32_t>("MinTickHeight"));
94  frameQuality_.maxTickHeight = static_cast<uint16_t>(pset.getParameter<uint32_t>("MaxTickHeight"));
95 
96 
97  } // end of constructor.
98 
99 
101  if ( edm::isDebugEnabled() ) {
102  LogTrace("SiStripSpyDigiConverter")
103  << "[sistrip::SpyDigiConverterModule::" << __func__ << "]"
104  << " Destructing object...";
105  }
106  } // end of destructor.
107 
115 
116  static bool lFirstEvent = true;
117 
118  const SiStripFedCabling* lCabling = utility_.getCabling( setup );
119 
121 
122  //retrieve the scope mode digis
124  event.getByToken(productToken_, scopeDigisHandle);
125 
126  //32-bit to accomodate known CMSSW container
127  std::unique_ptr< std::vector<uint32_t> > pAPVAddresses(new std::vector<uint32_t>);
128 
129  std::unique_ptr<sistrip::SpyDigiConverter::DSVRawDigis> payloadDigis, reorderedDigis, moduleDigis;
130 
131  //get the majority value for expected position of first header bit
132  //from first event, compare to expected one, else output warning.
133  if (lFirstEvent){
134  uint16_t lFirstHeaderBit;
135  sistrip::SpyUtilities::getMajorityHeader(scopeDigisHandle.product(),lFirstHeaderBit);
136 
137  if (lFirstHeaderBit != static_cast<uint16_t>(expectedHeaderBit_)) {
138  edm::LogWarning("") << " -- Majority position for firstHeaderBit in first event ("
139  << lFirstHeaderBit
140  << ") is not where expected: "
141  << static_cast<uint16_t>(expectedHeaderBit_)
142  << std::endl;
143  }
144 
145  }
146 
147 
148 
149  //extract frame digis and APV addresses
150  payloadDigis = sistrip::SpyDigiConverter::extractPayloadDigis(scopeDigisHandle.product(),
151  pAPVAddresses.get(),
153  frameQuality_,
154  static_cast<uint16_t>(expectedHeaderBit_));
155 
156  // Reorder
158  reorderedDigis = sistrip::SpyDigiConverter::reorderDigis(payloadDigis.get());
159  }
160 
161  // Merge into modules
162  if (storeModuleDigis_) {
163  moduleDigis = sistrip::SpyDigiConverter::mergeModuleChannels(reorderedDigis.get(), *lCabling);
164  }
165 
166  //add to event
167  if (storePayloadDigis_) event.put(std::move(payloadDigis),"SpyPayload");
168  if (storeReorderedDigis_) event.put(std::move(reorderedDigis),"SpyReordered");
169  if (storeModuleDigis_) event.put(std::move(moduleDigis),"SpyVirginRaw");
170  if (storeAPVAddress_) {
171  event.put(std::move(pAPVAddresses), "APVAddress");
172  }
173 
174 
175  lFirstEvent = false;
176 
177  } // end of SpyDigiConverter::produce method.
178 
179 } // end of sistrip namespace.
180 
181 
T getParameter(std::string const &) const
bool isDebugEnabled()
void produce(edm::Event &, const edm::EventSetup &) override
sistrip::SpyDigiConverterModule SiStripSpyDigiConverterModule
static std::unique_ptr< DSVRawDigis > reorderDigis(const DSVRawDigis *inputPayloadDigis)
def setup(process, global_tag, zero_tesla=False)
Definition: GeneralSetup.py:2
sistrip classes
static std::unique_ptr< DSVRawDigis > extractPayloadDigis(const DSVRawDigis *inputScopeDigis, std::vector< uint32_t > *pAPVAddresses, const bool discardDigisWithAPVAddrErr, const sistrip::SpyUtilities::FrameQuality &aQuality, const uint16_t expectedPos)
Extract frames from the scope digis.
#define DEFINE_FWK_MODULE(type)
Definition: MakerMacros.h:16
edm::EDGetTokenT< sistrip::SpyDigiConverter::DSVRawDigis > productToken_
static std::unique_ptr< DSVRawDigis > mergeModuleChannels(const DSVRawDigis *inputPhysicalOrderChannelDigis, const SiStripFedCabling &cabling)
const bool storeAPVAddress_
True = store APVE address for each channel.
#define LogTrace(id)
T const * product() const
Definition: Handle.h:74
const SiStripFedCabling * getCabling(const edm::EventSetup &)
Updates the cabling object from the DB.
Contains cabling info at the device level, including DetId, APV pair numbers, hardware addresses...
sistrip::SpyUtilities::FrameQuality frameQuality_
HLT enums.
static void getMajorityHeader(const edm::DetSetVector< SiStripRawDigi > *aInputDigis, uint16_t &firstHeaderBit, bool printResult=true)
SpyDigiConverterModule(const edm::ParameterSet &)
def move(src, dest)
Definition: eostools.py:511
Definition: event.py:1
A plug-in module that takes the spy channel scope mode digis as input from the Event and creates EDPr...