/afs/cern.ch/work/a/aaltunda/public/www/CMSSW_6_2_5/src/L1Trigger/DTTriggerServerPhi/interface/DTTSCand.h

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//-------------------------------------------------
//
//
//--------------------------------------------------
#ifndef DT_TS_CAND_H
#define DT_TS_CAND_H

//------------------------------------
// Collaborating Class Declarations --
//------------------------------------
class DTConfigTSPhi;

//----------------------
// Base Class Headers --
//----------------------
#include "L1Trigger/DTTriggerServerPhi/interface/DTTSS.h"
#include "L1Trigger/DTTraco/interface/DTTracoTrigData.h"
#include "L1TriggerConfig/DTTPGConfig/interface/BitArray.h"

//---------------
// C++ Headers --
//---------------
#include <string>

//              ---------------------
//              -- Class Interface --
//              ---------------------

class DTTSCand {

  public:

    DTTSCand(DTTSS*, const DTTracoTrigData*, int, int);

    DTTSCand();

    DTTSCand(const DTTSCand& tscand);
  
    DTTSCand& operator=(const DTTSCand& tscand);

    ~DTTSCand();

    void setBitsTss();

    void setBitsBkmod();

    void setBitsTsm();

    // SM sector collector: it becomes bit 14
    void setSecondTrack() { _dataword.set(14); _isCarry=1; }

    void resetCarry() { _isCarry=0; }

    void clearBits(){ _dataword.assign(5,3,0x7); }

    void clearBitsBkmod(){ _dataword.assign(0,7,0xff); }

    inline void clear();

    inline DTConfigTSPhi* config() const { return _tss->config(); }

    inline const DTTracoTrigData* tracoTr() const { return _tctrig; }

    inline int TcPos() const { return _tcPos; }

    inline DTTSS* tss() const { return _tss; }

    inline int tssNumber() const { return _tss->number(); }

    inline int tracoNumber() const { return _tctrig->tracoNumber(); }

    inline int isFirst() const { return _dataword.element(14)==0; }

    inline int isHtrig() const { return _tctrig->pvCode()==8 || 
                                        _tctrig->pvCode()==80; }
    inline int isInner() const { return _tctrig->pvCode()>8; }

    inline int isCorr() const { return _tctrig->pvCorr(); }

    inline int isCarry() const { return _isCarry; }

    inline int isHHorHL() const { return _tctrig->pvCorr() && _tctrig->pvCode()==80; }
 
    inline int isLH() const { return _tctrig->pvCorr() && _tctrig->pvCode()==8; }
 
    inline int isLL() const { return _tctrig->pvCorr() && !_tctrig->pvCode()==8 &&
                                                          !_tctrig->pvCode()==80; }  
    inline int isH0() const { return !_tctrig->pvCorr() && _tctrig->pvCode()==80; }
 
    inline int is0H() const { return !_tctrig->pvCorr() && _tctrig->pvCode()==8; }
 
    inline int isL0() const {  return !_tctrig->pvCorr() && _tctrig->pvCode()<80 &&
                                                            _tctrig->pvCode()>8; }
    inline int is0L() const {  return !_tctrig->pvCorr() && _tctrig->pvCode()<8; }

    inline unsigned dataword() const { return _dataword.dataWord(0)&0x1ff; }

    bool operator < (const DTTSCand& c) const { return _dataword<c._dataword; }

    bool operator <= (const DTTSCand& c) const { return _dataword<=c._dataword; }

    // Operator <<= used for sorting in TSM back-up mode
    // SM double TSM  bool operator <<= (const DTTSCand& c) const { return _datawordbk<c._datawordbk; }

    void print() const;

  private:
  DTTSS* _tss;
  const DTTracoTrigData* _tctrig;
    BitArray<15> _dataword;   // the word on which sorting is done. reserve space enough for Preview and full data
  // SM double TSM  BitArray<9> _datawordbk; // the word on which sorting is done (back-up mode)
  int _tcPos;            // TRACO position in TSS
  // SM double TSM   int _bkmod;            // TSM back-up mode flag
  int _isCarry;          // info for TSM

};

#endif