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CSCTFSectorProcessor.cc
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4 
6 
10 #include <stdlib.h>
11 #include <sstream>
12 #include <strings.h>
13 
14 const std::string CSCTFSectorProcessor::FPGAs[5] = {"F1","F2","F3","F4","F5"};
15 
17  const unsigned& sector,
18  const edm::ParameterSet& pset,
19  bool tmb07,
20  const L1MuTriggerScales* scales,
21  const L1MuTriggerPtScale* ptScale)
22 {
23  m_endcap = endcap;
24  m_sector = sector;
25  TMB07 = tmb07;
26 
27  // allows a configurable option to handle unganged ME1a
28  m_gangedME1a = pset.getUntrackedParameter<bool>("gangedME1a", true);
29 
30  // Parameter below should always present in ParameterSet:
31  m_latency = pset.getParameter<unsigned>("CoreLatency");
32  m_minBX = pset.getParameter<int>("MinBX");
33  m_maxBX = pset.getParameter<int>("MaxBX");
34  initializeFromPSet = pset.getParameter<bool>("initializeFromPSet");
35  if( m_maxBX-m_minBX >= 7 ) edm::LogWarning("CSCTFTrackBuilder::ctor")<<" BX window width >= 7BX. Resetting m_maxBX="<<(m_maxBX=m_minBX+6);
36 
37  // All following parameters may appear in either ParameterSet of in EventSetup; uninitialize:
38  m_bxa_depth = -1;
39  m_allowALCTonly = -1;
40  m_allowCLCTonly = -1;
41  m_preTrigger = -1;
42 
43  for(int index=0; index<7; index++) m_etawin[index] = -1;
44  for(int index=0; index<8; index++) m_etamin[index] = -1;
45  for(int index=0; index<8; index++) m_etamax[index] = -1;
46 
47  m_mindphip=-1;
48  m_mindetap=-1;
49 
53 
57 
61 
65  m_mindphip_halo=-1;
66  m_mindetap_halo=-1;
67 
68  m_widePhi=-1;
69 
70  m_straightp=-1;
71  m_curvedp=-1;
72 
73  m_mbaPhiOff=-1;
74  m_mbbPhiOff=-1;
75 
76  kill_fiber = -1;
77  QualityEnableME1a = -1;
78  QualityEnableME1b = -1;
79  QualityEnableME1c = -1;
80  QualityEnableME1d = -1;
81  QualityEnableME1e = -1;
82  QualityEnableME1f = -1;
83  QualityEnableME2a = -1;
84  QualityEnableME2b = -1;
85  QualityEnableME2c = -1;
86  QualityEnableME3a = -1;
87  QualityEnableME3b = -1;
88  QualityEnableME3c = -1;
89  QualityEnableME4a = -1;
90  QualityEnableME4b = -1;
91  QualityEnableME4c = -1;
92 
93  run_core = -1;
94  trigger_on_ME1a = -1;
95  trigger_on_ME1b = -1;
96  trigger_on_ME2 = -1;
97  trigger_on_ME3 = -1;
98  trigger_on_ME4 = -1;
99  trigger_on_MB1a = -1;
100  trigger_on_MB1d = -1;
101 
102  singlesTrackOutput = 999;
103  rescaleSinglesPhi = -1;
104 
105  m_firmSP = -1;
106  m_firmFA = -1;
107  m_firmDD = -1;
108  m_firmVM = -1;
109 
110  initFail_ = false;
111 
112  isCoreVerbose = pset.getParameter<bool>("isCoreVerbose");
113 
114  if(initializeFromPSet) readParameters(pset);
115 
116 
117  // Sector Receiver LUTs initialization
118  edm::ParameterSet srLUTset = pset.getParameter<edm::ParameterSet>("SRLUT");
119  for(int i = 1; i <= 4; ++i)
120  {
121  if(i == 1)
122  for(int j = 0; j < 2; j++)
123  {
124  srLUTs_[FPGAs[j]] = new CSCSectorReceiverLUT(endcap, sector, j+1, i, srLUTset, TMB07);
125  }
126  else
127  srLUTs_[FPGAs[i]] = new CSCSectorReceiverLUT(endcap, sector, 0, i, srLUTset, TMB07);
128  }
129 
130  core_ = new CSCTFSPCoreLogic();
131 
132  // Pt LUTs initialization
133  if(initializeFromPSet){
134  edm::ParameterSet ptLUTset = pset.getParameter<edm::ParameterSet>("PTLUT");
135  ptLUT_ = new CSCTFPtLUT(ptLUTset, scales, ptScale);
136  LogDebug("CSCTFSectorProcessor") << "Using stand-alone PT LUT for endcap="<<m_endcap<<", sector="<<m_sector;
137  } else {
138  ptLUT_=0;
139  LogDebug("CSCTFSectorProcessor") << "Looking for PT LUT in EventSetup for endcap="<<m_endcap<<", sector="<<m_sector;
140  }
141 
142  // firmware map initialization
143  // all the information are based on the firmware releases
144  // documented at http://www.phys.ufl.edu/~uvarov/SP05/SP05.htm
145 
146  // map is <m_firmSP, core_version>
147  // it may happen that the same core is used for different firmware
148  // versions, e.g. change in the wrapper only
149 
150  // this mapping accounts for runs starting from 132440
151  // schema is year+month+day
152  firmSP_Map.insert(std::pair<int,int>(20100210,20100122));
153  firmSP_Map.insert(std::pair<int,int>(20100617,20100122));
154  firmSP_Map.insert(std::pair<int,int>(20100629,20100122));
155 
156  firmSP_Map.insert(std::pair<int,int>(20100728,20100728));
157 
158  firmSP_Map.insert(std::pair<int,int>(20100901,20100901));
159 
160  //testing firmwares
161  firmSP_Map.insert(std::pair<int,int>(20101011,20101011));
162  firmSP_Map.insert(std::pair<int,int>(20101210,20101210));
163  firmSP_Map.insert(std::pair<int,int>(20110204,20110118));
164  firmSP_Map.insert(std::pair<int,int>(20110322,20110118));
165  // 2012 core with non linear dphi
166  firmSP_Map.insert(std::pair<int,int>(20120131,20120131));
167  firmSP_Map.insert(std::pair<int,int>(20120227,20120131));
168  //2012 core: 4 station track at |eta|>2.1 -> ME2-ME3-ME4
169  firmSP_Map.insert(std::pair<int,int>(20120313,20120313));
170  firmSP_Map.insert(std::pair<int,int>(20120319,20120313));
171 }
172 
173 
175  initFail_ = false;
176  if(!initializeFromPSet){
177  // Only pT lut can be initialized from EventSetup, all front LUTs are initialized locally from their parametrizations
178  LogDebug("CSCTFSectorProcessor") <<"Initializing endcap: "<<m_endcap<<" sector:"<<m_sector << "SP:" << (m_endcap-1)*6+(m_sector-1);
179  LogDebug("CSCTFSectorProcessor") << "Initializing pT LUT from EventSetup";
180 
181  ptLUT_ = new CSCTFPtLUT(c);
182 
183  // Extract from EventSetup alternative (to the one, used in constructor) ParameterSet
185  c.get<L1MuCSCTFConfigurationRcd>().get(config);
186  // And initialize only those parameters, which left uninitialized during construction
187  readParameters(config.product()->parameters((m_endcap-1)*6+(m_sector-1)));
188  }
189 
190  // ---------------------------------------------------------------------------
191  // This part is added per Vasile's request.
192  // It will help people understanding the emulator configuration
193  LogDebug("CSCTFSectorProcessor") << "\n !!! CSCTF EMULATOR CONFIGURATION !!!"
194  << "\n\nCORE CONFIGURATION"
195  << "\n Coincidence Trigger? " << run_core
196  << "\n Singles in ME1a? " << trigger_on_ME1a
197  << "\n Singles in ME1b? " << trigger_on_ME1b
198  << "\n Singles in ME2? " << trigger_on_ME2
199  << "\n Singles in ME3? " << trigger_on_ME3
200  << "\n Singles in ME4? " << trigger_on_ME4
201  << "\n Singles in MB1a? " << trigger_on_MB1a
202  << "\n Singles in MB1d? " << trigger_on_MB1d
203 
204  << "\n BX Analyzer depth: assemble coinc. track with stubs in +/-" << m_bxa_depth << " Bxs"
205  << "\n Is Wide Phi Extrapolation (DeltaPhi valid up to ~15 degrees, otherwise ~7.67 degrees)? " << m_widePhi
206  << "\n PreTrigger=" << m_preTrigger
207 
208  << "\n CoreLatency=" << m_latency
209  << "\n Is Phi for singles rescaled? " << rescaleSinglesPhi
210 
211  << "\n\nVARIOUS CONFIGURATION PARAMETERS"
212  << "\n Allow ALCT only? " << m_allowALCTonly
213  << "\n Allow CLCT only? " << m_allowCLCTonly
214 
215  << "\nQualityEnableME1a (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME1a
216  << "\nQualityEnableME1b (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME1b
217  << "\nQualityEnableME1c (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME1c
218  << "\nQualityEnableME1d (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME1d
219  << "\nQualityEnableME1e (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME1e
220  << "\nQualityEnableME1f (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME1f
221  << "\nQualityEnableME2a (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME2a
222  << "\nQualityEnableME2b (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME2b
223  << "\nQualityEnableME2c (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME2c
224  << "\nQualityEnableME3a (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME3a
225  << "\nQualityEnableME3b (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME3b
226  << "\nQualityEnableME3c (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME3c
227  << "\nQualityEnableME4a (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME4a
228  << "\nQualityEnableME4b (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME4b
229  << "\nQualityEnableME4c (in general accept all LCT qualities, i.e. 0xFFFF is expected)=" << QualityEnableME4c
230 
231  << "\nkill_fiber=" << kill_fiber
232  << "\nSingles Output Link=" << singlesTrackOutput
233 
234  //the DAT_ETA registers meaning are explained at Table 2 of
235  //http://www.phys.ufl.edu/~uvarov/SP05/LU-SP_ReferenceGuide_090915_Update.pdf
236 
237  << "\n\nDAT_ETA REGISTERS"
238  << "\nMinimum eta difference for track cancellation logic=" << m_mindetap
239  << "\nMinimum eta difference for halo track cancellation logic=" << m_mindetap_halo
240 
241  << "\nMinimum eta for ME1-ME2 collision tracks=" << m_etamin[0]
242  << "\nMinimum eta for ME1-ME3 collision tracks=" << m_etamin[1]
243  << "\nMinimum eta for ME2-ME3 collision tracks=" << m_etamin[2]
244  << "\nMinimum eta for ME2-ME4 collision tracks=" << m_etamin[3]
245  << "\nMinimum eta for ME3-ME4 collision tracks=" << m_etamin[4]
246  << "\nMinimum eta for ME1-ME2 collision tracks in overlap region=" << m_etamin[5]
247  << "\nMinimum eta for ME2-MB1 collision tracks=" << m_etamin[6]
248  << "\nMinimum eta for ME1-ME4 collision tracks=" << m_etamin[7]
249 
250  << "\nMinimum eta difference for ME1-ME2 (except ME1/1) halo tracks=" << m_mindeta12_accp
251  << "\nMinimum eta difference for ME1-ME3 (except ME1/1) halo tracks=" << m_mindeta13_accp
252  << "\nMinimum eta difference for ME1/1-ME2 halo tracks=" << m_mindeta112_accp
253  << "\nMinimum eta difference for ME1/1-ME3 halo tracks=" << m_mindeta113_accp
254 
255  << "\nMaximum eta for ME1-ME2 collision tracks=" << m_etamax[0]
256  << "\nMaximum eta for ME1-ME3 collision tracks=" << m_etamax[1]
257  << "\nMaximum eta for ME2-ME3 collision tracks=" << m_etamax[2]
258  << "\nMaximum eta for ME2-ME4 collision tracks=" << m_etamax[3]
259  << "\nMaximum eta for ME3-ME4 collision tracks=" << m_etamax[4]
260  << "\nMaximum eta for ME1-ME2 collision tracks in overlap region=" << m_etamax[5]
261  << "\nMaximum eta for ME2-MB1 collision tracks=" << m_etamax[6]
262  << "\nMaximum eta for ME1-ME4 collision tracks=" << m_etamax[7]
263 
264  << "\nMaximum eta difference for ME1-ME2 (except ME1/1) halo tracks=" << m_maxdeta12_accp
265  << "\nMaximum eta difference for ME1-ME3 (except ME1/1) halo tracks=" << m_maxdeta13_accp
266  << "\nMaximum eta difference for ME1/1-ME2 halo tracks=" << m_maxdeta112_accp
267  << "\nMaximum eta difference for ME1/1-ME3 halo tracks=" << m_maxdeta113_accp
268 
269  << "\nEta window for ME1-ME2 collision tracks=" << m_etawin[0]
270  << "\nEta window for ME1-ME3 collision tracks=" << m_etawin[1]
271  << "\nEta window for ME2-ME3 collision tracks=" << m_etawin[2]
272  << "\nEta window for ME2-ME4 collision tracks=" << m_etawin[3]
273  << "\nEta window for ME3-ME4 collision tracks=" << m_etawin[4]
274  << "\nEta window for ME1-ME2 collision tracks in overlap region=" << m_etawin[5]
275  << "\nEta window for ME1-ME4 collision tracks=" << m_etawin[6]
276 
277  << "\nMaximum phi difference for ME1-ME2 (except ME1/1) halo tracks=" << m_maxdphi12_accp
278  << "\nMaximum phi difference for ME1-ME3 (except ME1/1) halo tracks=" << m_maxdphi13_accp
279  << "\nMaximum phi difference for ME1/1-ME2 halo tracks=" << m_maxdphi112_accp
280  << "\nMaximum phi difference for ME1/1-ME3 halo tracks=" << m_maxdphi113_accp
281 
282  << "\nMinimum phi difference for track cancellation logic=" << m_mindphip
283  << "\nMinimum phi difference for halo track cancellation logic=" << m_mindphip_halo
284 
285  << "\nParameter for the correction of misaligned 1-2-3-4 straight tracks =" << m_straightp
286  << "\nParameter for the correction of misaligned 1-2-3-4 curved tracks=" << m_curvedp
287  << "\nPhi Offset for MB1A=" << m_mbaPhiOff
288  << "\nPhi Offset for MB1D=" << m_mbbPhiOff
289 
290  << "\nFirmware SP year+month+day:" << m_firmSP
291  << "\nFirmware FA year+month+day:" << m_firmFA
292  << "\nFirmware DD year+month+day:" << m_firmDD
293  << "\nFirmware VM year+month+day:" << m_firmVM;
294 
295 
297 
298  // set core verbosity: for debugging only purpouses
299  // in general the output is handled to Alex Madorsky
300  core_ -> SetVerbose(isCoreVerbose);
301 
302  // Set the SP firmware
303  core_ -> SetSPFirmwareVersion (m_firmSP);
304 
305  // Set the firmware for the CORE
306  int firmVersCore = firmSP_Map.find(m_firmSP)->second;
307  core_ -> SetCoreFirmwareVersion (firmVersCore);
308  edm::LogInfo( "CSCTFSectorProcessor" ) << "\nCore Firmware is set to " << core_ -> GetCoreFirmwareVersion();
309  // ---------------------------------------------------------------------------
310 
311  // Check if parameters were not initialized in both: constuctor (from .cf? file) and initialize method (from EventSetup)
312  if(m_bxa_depth<0)
313  {
314  initFail_ = true;
315  edm::LogError("CSCTFSectorProcessor")<<"BXAdepth parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
316  }
317  if(m_allowALCTonly<0)
318  {
319  initFail_ = true;
320  edm::LogError("CSCTFSectorProcessor")<<"AllowALCTonly parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
321  }
322  if(m_allowCLCTonly<0)
323  {
324  initFail_ = true;
325  edm::LogError("CSCTFSectorProcessor")<<"AllowCLCTonly parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
326  }
327  if(m_preTrigger<0)
328  {
329  initFail_ = true;
330  edm::LogError("CSCTFSectorProcessor")<<"PreTrigger parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
331  }
332  if(m_mindphip<0)
333  {
334  initFail_ = true;
335  edm::LogError("CSCTFSectorProcessor")<<"mindphip parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
336  }
337  if(m_mindetap<0)
338  {
339  initFail_ = true;
340  edm::LogError("CSCTFSectorProcessor")<<"mindeta parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
341  }
342  if(m_straightp<0)
343  {
344  initFail_ = true;
345  edm::LogError("CSCTFSectorProcessor")<<"straightp parameter left unitialized for endcap="<<m_endcap<<", sector="<<m_sector;
346  }
347  if(m_curvedp<0)
348  {
349  initFail_ = true;
350  edm::LogError("CSCTFSectorProcessor")<<"curvedp parameter left unitialized for endcap="<<m_endcap<<",sector="<<m_sector;
351  }
352  if(m_mbaPhiOff<0)
353  {
354  initFail_ = true;
355  edm::LogError("CSCTFSectorProcessor")<<"mbaPhiOff parameter left unitialized for endcap="<<m_endcap<<",sector="<<m_sector;
356  }
357  if(m_mbbPhiOff<0)
358  {
359  initFail_ = true;
360  edm::LogError("CSCTFSectorProcessor")<<"mbbPhiOff parameter left unitialized for endcap="<<m_endcap<<",sector="<<m_sector;
361  }
362  if(m_mindeta12_accp<0)
363  {
364  initFail_ = true;
365  edm::LogError("CSCTFSectorProcessor")<<"mindeta_accp12 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
366  }
367  if(m_maxdeta12_accp<0)
368  {
369  initFail_ = true;
370  edm::LogError("CSCTFSectorProcessor")<<"maxdeta_accp12 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
371  }
372  if(m_maxdphi12_accp<0)
373  {
374  initFail_ = true;
375  edm::LogError("CSCTFSectorProcessor")<<"maxdphi_accp12 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
376  }
377  if(m_mindeta13_accp<0)
378  {
379  initFail_ = true;
380  edm::LogError("CSCTFSectorProcessor")<<"mindeta_accp13 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
381  }
382  if(m_maxdeta13_accp<0)
383  {
384  initFail_ = true;
385  edm::LogError("CSCTFSectorProcessor")<<"maxdeta_accp13 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
386  }
387  if(m_maxdphi13_accp<0)
388  {
389  initFail_ = true;
390  edm::LogError("CSCTFSectorProcessor")<<"maxdphi_accp13 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
391  }
392  if(m_mindeta112_accp<0)
393  {
394  initFail_ = true;
395  edm::LogError("CSCTFSectorProcessor")<<"mindeta_accp112 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
396  }
397  if(m_maxdeta112_accp<0)
398  {
399  initFail_ = true;
400  edm::LogError("CSCTFSectorProcessor")<<"maxdeta_accp112 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
401  }
402  if(m_maxdphi112_accp<0)
403  {
404  initFail_ = true;
405  edm::LogError("CSCTFSectorProcessor")<<"maxdphi_accp112 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
406  }
407  if(m_mindeta113_accp<0)
408  {
409  initFail_ = true;
410  edm::LogError("CSCTFSectorProcessor")<<"mindeta_accp113 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
411  }
412  if(m_maxdeta113_accp<0)
413  {
414  initFail_ = true;
415  edm::LogError("CSCTFSectorProcessor")<<"maxdeta_accp113 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
416  }
417  if(m_maxdphi113_accp<0)
418  {
419  initFail_ = true;
420  edm::LogError("CSCTFSectorProcessor")<<"maxdphi_accp113 parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
421  }
422  if(m_mindphip_halo<0)
423  {
424  initFail_ = true;
425  edm::LogError("CSCTFSectorProcessor")<<"mindphip_halo parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
426  }
427  if(m_mindetap_halo<0)
428  {
429  initFail_ = true;
430  edm::LogError("CSCTFSectorProcessor")<<"mindetep_halo parameter left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
431  }
432 
433  if(m_widePhi<0)
434  {
435  initFail_ = true;
436  edm::LogError("CSCTFSectorProcessor")<<"widePhi parameter left unitialized for endcap="<<m_endcap<<", sector="<<m_sector;
437  }
438 
439  for(int index=0; index<8; index++)
440  if(m_etamax[index]<0)
441  {
442  initFail_ = true;
443  edm::LogError("CSCTFSectorProcessor")<<"Some ("<<(8-index)<<") of EtaMax parameters left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
444  }
445  for(int index=0; index<8; index++)
446  if(m_etamin[index]<0)
447  {
448  initFail_ = true;
449  edm::LogError("CSCTFSectorProcessor")<<"Some ("<<(8-index)<<") of EtaMin parameters left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
450  }
451  for(int index=0; index<7; index++)
452  if(m_etawin[index]<0)
453  {
454  initFail_ = true;
455  edm::LogError("CSCTFSectorProcessor")<<"Some ("<<(6-index)<<") of EtaWindows parameters left uninitialized for endcap="<<m_endcap<<", sector="<<m_sector;
456  }
457  if(kill_fiber<0)
458  {
459  initFail_ = true;
460  edm::LogError("CSCTFTrackBuilder")<<"kill_fiber parameter left uninitialized";
461  }
462  if(run_core<0)
463  {
464  initFail_ = true;
465  edm::LogError("CSCTFTrackBuilder")<<"run_core parameter left uninitialized";
466  }
467  if(trigger_on_ME1a<0)
468  {
469  initFail_ = true;
470  edm::LogError("CSCTFTrackBuilder")<<"trigger_on_ME1a parameter left uninitialized";
471  }
472  if(trigger_on_ME1b<0)
473  {
474  initFail_ = true;
475  edm::LogError("CSCTFTrackBuilder")<<"trigger_on_ME1b parameter left uninitialized";
476  }
477  if(trigger_on_ME2 <0)
478  {
479  initFail_ = true;
480  edm::LogError("CSCTFTrackBuilder")<<"trigger_on_ME2 parameter left uninitialized";
481  }
482  if(trigger_on_ME3 <0)
483  {
484  initFail_ = true;
485  edm::LogError("CSCTFTrackBuilder")<<"trigger_on_ME3 parameter left uninitialized";
486  }
487  if(trigger_on_ME4 <0)
488  {
489  initFail_ = true;
490  edm::LogError("CSCTFTrackBuilder")<<"trigger_on_ME4 parameter left uninitialized";
491  }
492  if(trigger_on_MB1a<0)
493  {
494  initFail_ = true;
495  edm::LogError("CSCTFTrackBuilder")<<"trigger_on_MB1a parameter left uninitialized";
496  }
497  if(trigger_on_MB1d<0)
498  {
499  initFail_ = true;
500  edm::LogError("CSCTFTrackBuilder")<<"trigger_on_MB1d parameter left uninitialized";
501  }
504  {
505  if(singlesTrackOutput==999)
506  {
507  initFail_ = true;
508  edm::LogError("CSCTFTrackBuilder")<<"singlesTrackOutput parameter left uninitialized";
509  }
510  if(rescaleSinglesPhi<0)
511  {
512  initFail_ = true;
513  edm::LogError("CSCTFTrackBuilder")<<"rescaleSinglesPhi parameter left uninitialized";
514  }
515  }
516  if(QualityEnableME1a<0)
517  {
518  initFail_ = true;
519  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME1a parameter left uninitialized";
520  }
521  if(QualityEnableME1b<0)
522  {
523  initFail_ = true;
524  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME1b parameter left uninitialized";
525  }
526  if(QualityEnableME1c<0)
527  {
528  initFail_ = true;
529  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME1c parameter left uninitialized";
530  }
531  if(QualityEnableME1d<0)
532  {
533  initFail_ = true;
534  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME1d parameter left uninitialized";
535  }
536  if(QualityEnableME1e<0)
537  {
538  initFail_ = true;
539  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME1e parameter left uninitialized";
540  }
541  if(QualityEnableME1f<0)
542  {
543  initFail_ = true;
544  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME1f parameter left uninitialized";
545  }
546  if(QualityEnableME2a<0)
547  {
548  initFail_ = true;
549  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME2a parameter left uninitialized";
550  }
551  if(QualityEnableME2b<0)
552  {
553  initFail_ = true;
554  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME2b parameter left uninitialized";
555  }
556  if(QualityEnableME2c<0)
557  {
558  initFail_ = true;
559  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME2c parameter left uninitialized";
560  }
561  if(QualityEnableME3a<0)
562  {
563  initFail_ = true;
564  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME3a parameter left uninitialized";
565  }
566  if(QualityEnableME3b<0)
567  {
568  initFail_ = true;
569  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME3b parameter left uninitialized";
570  }
571  if(QualityEnableME3c<0)
572  {
573  initFail_ = true;
574  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME3c parameter left uninitialized";
575  }
576  if(QualityEnableME4a<0)
577  {
578  initFail_ = true;
579  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME4a parameter left uninitialized";
580  }
581  if(QualityEnableME4b<0)
582  {
583  initFail_ = true;
584  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME4b parameter left uninitialized";
585  }
586  if(QualityEnableME4c<0)
587  {
588  initFail_ = true;
589  edm::LogError("CSCTFTrackBuilder")<<"QualityEnableME4c parameter left uninitialized";
590  }
591 
592  if (m_firmSP<1)
593  {
594  initFail_ = true;
595  edm::LogError("CSCTFSectorProcessor")<< " firmwareSP parameter left uninitialized!!!\n";
596  }
597  if (m_firmFA<1)
598  {
599  initFail_ = true;
600  edm::LogError("CSCTFSectorProcessor")<< " firmwareFA parameter left uninitialized!!!\n";
601  }
602  if (m_firmDD<1)
603  {
604  initFail_ = true;
605  edm::LogError("CSCTFSectorProcessor")<< " firmwareDD parameter left uninitialized!!!\n";
606  }
607  if (m_firmVM<1)
608  {
609  initFail_ = true;
610  edm::LogError("CSCTFSectorProcessor")<< " firmwareVM parameter left uninitialized!!!\n";
611  }
612 
613  if ( (m_firmFA != m_firmDD) ||
614  (m_firmFA != m_firmVM) ||
615  (m_firmDD != m_firmVM) )
616  {
617  initFail_ = true;
618  edm::LogError("CSCTFSectorProcessor::initialize")<< " firmwareFA (=" << m_firmFA << "), "
619  << " firmwareDD (=" << m_firmDD << "), "
620  << " firmwareVM (=" << m_firmVM << ") are NOT identical: it shoultd NOT happen!\n";
621  }
622 
623 }
624 
626  m_bxa_depth = pset.getParameter<unsigned>("BXAdepth");
627  m_allowALCTonly = ( pset.getParameter<bool>("AllowALCTonly") ? 1 : 0 );
628  m_allowCLCTonly = ( pset.getParameter<bool>("AllowCLCTonly") ? 1 : 0 );
629  m_preTrigger = pset.getParameter<unsigned>("PreTrigger");
630 
631  std::vector<unsigned>::const_iterator iter;
632  int index=0;
633  std::vector<unsigned> etawins = pset.getParameter<std::vector<unsigned> >("EtaWindows");
634  for(iter=etawins.begin(),index=0; iter!=etawins.end()&&index<7; iter++,index++) m_etawin[index] = *iter;
635  std::vector<unsigned> etamins = pset.getParameter<std::vector<unsigned> >("EtaMin");
636  for(iter=etamins.begin(),index=0; iter!=etamins.end()&&index<8; iter++,index++) m_etamin[index] = *iter;
637  std::vector<unsigned> etamaxs = pset.getParameter<std::vector<unsigned> >("EtaMax");
638  for(iter=etamaxs.begin(),index=0; iter!=etamaxs.end()&&index<8; iter++,index++) m_etamax[index] = *iter;
639 
640  m_mindphip = pset.getParameter<unsigned>("mindphip");
641  m_mindetap = pset.getParameter<unsigned>("mindetap");
642  m_straightp = pset.getParameter<unsigned>("straightp");
643  m_curvedp = pset.getParameter<unsigned>("curvedp");
644  m_mbaPhiOff = pset.getParameter<unsigned>("mbaPhiOff");
645  m_mbbPhiOff = pset.getParameter<unsigned>("mbbPhiOff");
646  m_widePhi = pset.getParameter<unsigned>("widePhi");
647  m_mindeta12_accp = pset.getParameter<unsigned>("mindeta12_accp");
648  m_maxdeta12_accp = pset.getParameter<unsigned>("maxdeta12_accp");
649  m_maxdphi12_accp = pset.getParameter<unsigned>("maxdphi12_accp");
650  m_mindeta13_accp = pset.getParameter<unsigned>("mindeta13_accp");
651  m_maxdeta13_accp = pset.getParameter<unsigned>("maxdeta13_accp");
652  m_maxdphi13_accp = pset.getParameter<unsigned>("maxdphi13_accp");
653  m_mindeta112_accp = pset.getParameter<unsigned>("mindeta112_accp");
654  m_maxdeta112_accp = pset.getParameter<unsigned>("maxdeta112_accp");
655  m_maxdphi112_accp = pset.getParameter<unsigned>("maxdphi112_accp");
656  m_mindeta113_accp = pset.getParameter<unsigned>("mindeta113_accp");
657  m_maxdeta113_accp = pset.getParameter<unsigned>("maxdeta113_accp");
658  m_maxdphi113_accp = pset.getParameter<unsigned>("maxdphi113_accp");
659  m_mindphip_halo = pset.getParameter<unsigned>("mindphip_halo");
660  m_mindetap_halo = pset.getParameter<unsigned>("mindetap_halo");
661  kill_fiber = pset.getParameter<unsigned>("kill_fiber");
662  run_core = pset.getParameter<bool>("run_core");
663  trigger_on_ME1a = pset.getParameter<bool>("trigger_on_ME1a");
664  trigger_on_ME1b = pset.getParameter<bool>("trigger_on_ME1b");
665  trigger_on_ME2 = pset.getParameter<bool>("trigger_on_ME2");
666  trigger_on_ME3 = pset.getParameter<bool>("trigger_on_ME3");
667  trigger_on_ME4 = pset.getParameter<bool>("trigger_on_ME4");
668  trigger_on_MB1a = pset.getParameter<bool>("trigger_on_MB1a");
669  trigger_on_MB1d = pset.getParameter<bool>("trigger_on_MB1d");
670 
671  singlesTrackOutput = pset.getParameter<unsigned int>("singlesTrackOutput");
672  rescaleSinglesPhi = pset.getParameter<bool>("rescaleSinglesPhi");
673  QualityEnableME1a = pset.getParameter<unsigned int>("QualityEnableME1a");
674  QualityEnableME1b = pset.getParameter<unsigned int>("QualityEnableME1b");
675  QualityEnableME1c = pset.getParameter<unsigned int>("QualityEnableME1c");
676  QualityEnableME1d = pset.getParameter<unsigned int>("QualityEnableME1d");
677  QualityEnableME1e = pset.getParameter<unsigned int>("QualityEnableME1e");
678  QualityEnableME1f = pset.getParameter<unsigned int>("QualityEnableME1f");
679  QualityEnableME2a = pset.getParameter<unsigned int>("QualityEnableME2a");
680  QualityEnableME2b = pset.getParameter<unsigned int>("QualityEnableME2b");
681  QualityEnableME2c = pset.getParameter<unsigned int>("QualityEnableME2c");
682  QualityEnableME3a = pset.getParameter<unsigned int>("QualityEnableME3a");
683  QualityEnableME3b = pset.getParameter<unsigned int>("QualityEnableME3b");
684  QualityEnableME3c = pset.getParameter<unsigned int>("QualityEnableME3c");
685  QualityEnableME4a = pset.getParameter<unsigned int>("QualityEnableME4a");
686  QualityEnableME4b = pset.getParameter<unsigned int>("QualityEnableME4b");
687  QualityEnableME4c = pset.getParameter<unsigned int>("QualityEnableME4c");
688 
689  m_firmSP = pset.getParameter<unsigned int>("firmwareSP");
690  m_firmFA = pset.getParameter<unsigned int>("firmwareFA");
691  m_firmDD = pset.getParameter<unsigned int>("firmwareDD");
692  m_firmVM = pset.getParameter<unsigned int>("firmwareVM");
693 
694 }
695 
697 {
698  for(int i = 0; i < 5; ++i)
699  {
700  if(srLUTs_[FPGAs[i]]) delete srLUTs_[FPGAs[i]]; // delete the pointer
701  srLUTs_[FPGAs[i]] = NULL; // point it at a safe place
702  }
703 
704  delete core_;
705  core_ = NULL;
706 
707  if(ptLUT_) delete ptLUT_;
708  ptLUT_ = NULL;
709 }
710 
711 //returns 0 for no tracks, 1 tracks found, and -1 for "exception" (what used to throw an exception)
712 // on -1, Producer should produce empty collections for event
714 {
715  if(initFail_)
716  return -1;
717 
718  if( !ptLUT_ )
719  {
720  edm::LogError("CSCTFSectorProcessor::run()") << "No CSCTF PTLUTs: Initialize CSC TF LUTs first (missed call to CSCTFTrackProducer::beginJob?\n";
721  return -1;
722  }
723 
724 
725  l1_tracks.clear();
726  dt_stubs.clear();
727  stub_vec_filtered.clear();
728 
729  std::vector<csctf::TrackStub> stub_vec = stubs.get();
730 
734  for(std::vector<csctf::TrackStub>::const_iterator itr=stub_vec.begin(); itr!=stub_vec.end(); itr++)
735  switch( itr->station() ){
736  case 5: stub_vec_filtered.push_back(*itr); break; // DT stubs get filtered by the core controll register
737  case 4:
738  switch( itr->getMPCLink() ){
739  case 3: if( (kill_fiber&0x4000)==0 && QualityEnableME4c&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
740  case 2: if( (kill_fiber&0x2000)==0 && QualityEnableME4b&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
741  case 1: if( (kill_fiber&0x1000)==0 && QualityEnableME4a&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
742  default: edm::LogWarning("CSCTFSectorProcessor::run()") << "No MPC sorting for LCT: link="<<itr->getMPCLink()<<"\n";
743  }
744  break;
745  case 3:
746  switch( itr->getMPCLink() ){
747  case 3: if( (kill_fiber&0x0800)==0 && QualityEnableME3c&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
748  case 2: if( (kill_fiber&0x0400)==0 && QualityEnableME3b&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
749  case 1: if( (kill_fiber&0x0200)==0 && QualityEnableME3a&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
750  default: edm::LogWarning("CSCTFSectorProcessor::run()") << "No MPC sorting for LCT: link="<<itr->getMPCLink()<<"\n";
751  }
752  break;
753  case 2:
754  switch( itr->getMPCLink() ){
755  case 3: if( (kill_fiber&0x0100)==0 && QualityEnableME2c&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
756  case 2: if( (kill_fiber&0x0080)==0 && QualityEnableME2b&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
757  case 1: if( (kill_fiber&0x0040)==0 && QualityEnableME2a&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
758  default: edm::LogWarning("CSCTFSectorProcessor::run()") << "No MPC sorting for LCT: link="<<itr->getMPCLink()<<"\n";
759  }
760  break;
761  case 1:
762  switch( itr->getMPCLink() + (3*(CSCTriggerNumbering::triggerSubSectorFromLabels(CSCDetId(itr->getDetId().rawId())) - 1)) ){
763  case 6: if( (kill_fiber&0x0020)==0 && QualityEnableME1f&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
764  case 5: if( (kill_fiber&0x0010)==0 && QualityEnableME1e&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
765  case 4: if( (kill_fiber&0x0008)==0 && QualityEnableME1d&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
766  case 3: if( (kill_fiber&0x0004)==0 && QualityEnableME1c&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
767  case 2: if( (kill_fiber&0x0002)==0 && QualityEnableME1b&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
768  case 1: if( (kill_fiber&0x0001)==0 && QualityEnableME1a&(1<<itr->getQuality()) ) stub_vec_filtered.push_back(*itr); break;
769  default: edm::LogWarning("CSCTFSectorProcessor::run()") << "No MPC sorting for LCT: link="<<itr->getMPCLink()<<"\n";
770  }
771  break;
772  default: edm::LogWarning("CSCTFSectorProcessor::run()") << "Invalid station # encountered: "<<itr->station()<<"\n";
773  }
774 
783  for(std::vector<csctf::TrackStub>::iterator itr=stub_vec_filtered.begin(); itr!=stub_vec_filtered.end(); itr++)
784  {
785  if(itr->station() != 5)
786  {
787  CSCDetId id(itr->getDetId().rawId());
788  unsigned fpga = (id.station() == 1) ? CSCTriggerNumbering::triggerSubSectorFromLabels(id) - 1 : id.station();
789 
790  lclphidat lclPhi;
791  try {
792  lclPhi = srLUTs_[FPGAs[fpga]]->localPhi(itr->getStrip(), itr->getPattern(), itr->getQuality(), itr->getBend());
793  } catch( cms::Exception &e ) {
794  bzero(&lclPhi,sizeof(lclPhi));
795  edm::LogWarning("CSCTFSectorProcessor:run()") << "Exception from LocalPhi LUT in " << FPGAs[fpga]
796  << "(strip="<<itr->getStrip()<<",pattern="<<itr->getPattern()<<",quality="<<itr->getQuality()<<",bend="<<itr->getBend()<<")" <<std::endl;
797  }
798 
799  gblphidat gblPhi;
800  try {
801  unsigned csc_id = itr->cscid();
802  if (!m_gangedME1a) csc_id = itr->cscidSeparateME1a();
803  gblPhi = srLUTs_[FPGAs[fpga]]->globalPhiME(lclPhi.phi_local, itr->getKeyWG(), csc_id);
804 
805  } catch( cms::Exception &e ) {
806  bzero(&gblPhi,sizeof(gblPhi));
807  edm::LogWarning("CSCTFSectorProcessor:run()") << "Exception from GlobalPhi LUT in " << FPGAs[fpga]
808  << "(phi_local="<<lclPhi.phi_local<<",KeyWG="<<itr->getKeyWG()<<",csc="<<itr->cscid()<<")"<<std::endl;
809  }
810 
811  gbletadat gblEta;
812  try {
813  gblEta = srLUTs_[FPGAs[fpga]]->globalEtaME(lclPhi.phi_bend_local, lclPhi.phi_local, itr->getKeyWG(), itr->cscid());
814  } catch( cms::Exception &e ) {
815  bzero(&gblEta,sizeof(gblEta));
816  edm::LogWarning("CSCTFSectorProcessor:run()") << "Exception from GlobalEta LUT in " << FPGAs[fpga]
817  << "(phi_bend_local="<<lclPhi.phi_bend_local<<",phi_local="<<lclPhi.phi_local<<",KeyWG="<<itr->getKeyWG()<<",csc="<<itr->cscid()<<")"<<std::endl;
818  }
819 
820  gblphidat gblPhiDT;
821  try {
822  gblPhiDT = srLUTs_[FPGAs[fpga]]->globalPhiMB(lclPhi.phi_local, itr->getKeyWG(), itr->cscid());
823  } catch( cms::Exception &e ) {
824  bzero(&gblPhiDT,sizeof(gblPhiDT));
825  edm::LogWarning("CSCTFSectorProcessor:run()") << "Exception from GlobalPhi DT LUT in " << FPGAs[fpga]
826  << "(phi_local="<<lclPhi.phi_local<<",KeyWG="<<itr->getKeyWG()<<",csc="<<itr->cscid()<<")"<<std::endl;
827  }
828 
829  itr->setEtaPacked(gblEta.global_eta);
830 
831  if(itr->station() == 1 ) {
832  //&& itr->cscId() > 6) { //only ring 3
833  itr->setPhiPacked(gblPhiDT.global_phi);// convert the DT to convert
834  dt_stubs.push_back(*itr); // send stubs to DT
835  }
836 
837  //reconvert the ME1 LCT to the CSCTF units.
838  //the same iterator is used to fill two containers,
839  //the CSCTF one (stub_vec_filtered) and LCTs sent to DTTF (dt_stubs)
840  itr->setPhiPacked(gblPhi.global_phi);
841 
842  LogDebug("CSCTFSectorProcessor:run()") << "LCT found, processed by FPGA: " << FPGAs[fpga] << std::endl
843  << " LCT now has (eta, phi) of: (" << itr->etaValue() << "," << itr->phiValue() <<")\n";
844  }
845  }
846 
848 
855  std::vector<csc::L1Track> tftks;
856 
857  if(run_core){
858  core_->loadData(processedStubs, m_endcap, m_sector, m_minBX, m_maxBX);
860  m_etamin[0], m_etamin[1], m_etamin[2], m_etamin[3],
861  m_etamin[4], m_etamin[5], m_etamin[6], m_etamin[7],
862  m_etamax[0], m_etamax[1], m_etamax[2], m_etamax[3],
863  m_etamax[4], m_etamax[5], m_etamax[6], m_etamax[7],
864  m_etawin[0], m_etawin[1], m_etawin[2],
865  m_etawin[3], m_etawin[4], m_etawin[5], m_etawin[6],
875  m_minBX, m_maxBX) )
876  {
877  l1_tracks = core_->tracks();
878  }
879 
880  tftks = l1_tracks.get();
881 
887  std::vector<csc::L1Track>::iterator titr = tftks.begin();
888 
889  for(; titr != tftks.end(); titr++)
890  {
891  ptadd thePtAddress(titr->ptLUTAddress());
892  ptdat thePtData = ptLUT_->Pt(thePtAddress);
893 
894  if(thePtAddress.track_fr)
895  {
896  titr->setRank(thePtData.front_rank);
897  titr->setChargeValidPacked(thePtData.charge_valid_front);
898  }
899  else
900  {
901  titr->setRank(thePtData.rear_rank);
902  titr->setChargeValidPacked(thePtData.charge_valid_rear);
903  }
904 
905  if( ((titr->ptLUTAddress()>>16)&0xf)==15 )
906  {
907  int unmodBx = titr->bx();
908  titr->setBx(unmodBx+2);
909  }
910  }
911  } //end of if(run_core)
912 
913  l1_tracks = tftks;
914 
915 
916  // Add-on for singles:
917  CSCTriggerContainer<csctf::TrackStub> myStubContainer[7]; //[BX]
918  // Loop over CSC LCTs if triggering on them:
920  for(std::vector<csctf::TrackStub>::iterator itr=stub_vec_filtered.begin(); itr!=stub_vec_filtered.end(); itr++){
921  int station = itr->station()-1;
922  if(station != 4){
923  int subSector = CSCTriggerNumbering::triggerSubSectorFromLabels(CSCDetId(itr->getDetId().rawId()));
924  int mpc = ( subSector ? subSector-1 : station+1 );
925  if( (mpc==0&&trigger_on_ME1a) || (mpc==1&&trigger_on_ME1b) ||
926  (mpc==2&&trigger_on_ME2) || (mpc==3&&trigger_on_ME3) ||
927  (mpc==4&&trigger_on_ME4) ||
928  (mpc==5&& ( (trigger_on_MB1a&&subSector%2==1) || (trigger_on_MB1d&&subSector%2==0) ) ) ){
929  int bx = itr->getBX() - m_minBX;
930  if( bx<0 || bx>=7 ) edm::LogWarning("CSCTFTrackBuilder::buildTracks()") << " LCT BX is out of ["<<m_minBX<<","<<m_maxBX<<") range: "<<itr->getBX();
931  else
932  if( itr->isValid() ) myStubContainer[bx].push_back(*itr);
933  }
934  }
935  }
936 
937  // Core's input was loaded in a relative time window BX=[0-7)
938  // To relate it to time window of tracks (centred at BX=0) we introduce a shift:
939  int shift = (m_maxBX + m_minBX)/2 - m_minBX;
940 
941  // Now we put tracks from singles in a certain bx
942  // if there were no tracks from the core in this endcap/sector/bx
943  CSCTriggerContainer<csc::L1Track> tracksFromSingles;
944  for(int bx=0; bx<7; bx++)
945  if( myStubContainer[bx].get().size() ){ // VP in this bx
946  bool coreTrackExists = false;
947  // tracks are not ordered to be accessible by bx => loop them all
948  std::vector<csc::L1Track> tracks = l1_tracks.get();
949  for(std::vector<csc::L1Track>::iterator trk=tracks.begin(); trk<tracks.end(); trk++)
950  if( (trk->BX() == bx-shift && trk->outputLink() == singlesTrackOutput)
951  || (((trk->ptLUTAddress()>>16)&0xf)==15 && trk->BX()-2 == bx-shift) ){
952  coreTrackExists = true;
953  break;
954  }
955  if( coreTrackExists == false ){
957  csc::L1Track track(trackId);
958  track.setBx(bx-shift);
960  //CSCCorrelatedLCTDigiCollection singles;
961  std::vector<csctf::TrackStub> stubs = myStubContainer[bx].get();
962  // Select best quality stub, and assign its eta/phi coordinates to the track
963  int qualityME=0, qualityMB=0, ME=100, MB=100, linkME=7;
964  std::vector<csctf::TrackStub>::const_iterator bestStub=stubs.end();
965  for(std::vector<csctf::TrackStub>::const_iterator st_iter=stubs.begin(); st_iter!=stubs.end(); st_iter++){
966  int station = st_iter->station()-1;
967  int subSector = CSCTriggerNumbering::triggerSubSectorFromLabels(CSCDetId(st_iter->getDetId().rawId()));
968  int mpc = ( subSector ? subSector-1 : station+1 );
969  // Sort MB stubs first (priority: quality OR MB1a > MB1b for the same quality)
970  if( mpc==5 && (st_iter->getQuality()>qualityMB || (st_iter->getQuality()==qualityMB&&subSector<MB)) ){
971  qualityMB = st_iter->getQuality();
972  MB = subSector;
973  if(ME>4) bestStub = st_iter; // do not select this stub if ME already had any candidate
974  }
975  // Sort ME stubs (priority: quality OR ME1a > ME1b > ME2 > ME3 > ME4 for the same quality)
976  if( mpc<5 && (st_iter->getQuality()> qualityME
977  || (st_iter->getQuality()==qualityME && mpc< ME)
978  || (st_iter->getQuality()==qualityME && mpc==ME && st_iter->getMPCLink()<linkME))) {
979  qualityME = st_iter->getQuality();
980  ME = mpc;
981  linkME = st_iter->getMPCLink();
982  bestStub = st_iter;
983  }
984  }
985  unsigned rescaled_phi = 999;
986  if (m_firmSP <= 20100210) {
987  // buggy implementation of the phi for singles in the wrapper...
988  // at the end data/emulator have to agree: e.g. wrong in the same way
989  // BUG: getting the lowest 7 bits instead the 7 most significant ones.
990  rescaled_phi = unsigned(24*(bestStub->phiPacked()&0x7f)/128.);
991  }
992  else {
993  // correct implementation :-)
994  rescaled_phi = unsigned(24*(bestStub->phiPacked()>>5)/128.);
995  }
996 
997  unsigned unscaled_phi = bestStub->phiPacked()>>7 ;
998  track.setLocalPhi(rescaleSinglesPhi?rescaled_phi:unscaled_phi);
999  track.setEtaPacked((bestStub->etaPacked()>>2)&0x1f);
1000  switch( bestStub->station() ){
1001  case 1: track.setStationIds(bestStub->getMPCLink(),0,0,0,0); break;
1002  case 2: track.setStationIds(0,bestStub->getMPCLink(),0,0,0); break;
1003  case 3: track.setStationIds(0,0,bestStub->getMPCLink(),0,0); break;
1004  case 4: track.setStationIds(0,0,0,bestStub->getMPCLink(),0); break;
1005  case 5: track.setStationIds(0,0,0,0,bestStub->getMPCLink()); break;
1006  default: edm::LogError("CSCTFSectorProcessor::run()") << "Illegal LCT link="<<bestStub->station()<<"\n"; break;
1007  }
1008  // singles.insertDigi(CSCDetId(st_iter->getDetId().rawId()),*st_iter);
1009  //tracksFromSingles.push_back(L1CSCTrack(track,singles));
1010  track.setPtLUTAddress( (1<<16) | ((bestStub->etaPacked()<<9)&0xf000) );
1011  ptadd thePtAddress( track.ptLUTAddress() );
1012  ptdat thePtData = ptLUT_->Pt(thePtAddress);
1013  if( thePtAddress.track_fr ){
1014  track.setRank(thePtData.front_rank);
1015  track.setChargeValidPacked(thePtData.charge_valid_front);
1016  } else {
1017  track.setRank(thePtData.rear_rank);
1018  track.setChargeValidPacked(thePtData.charge_valid_rear);
1019  }
1020  tracksFromSingles.push_back(track);
1021  }
1022  }
1023  std::vector<csc::L1Track> single_tracks = tracksFromSingles.get();
1024  if( single_tracks.size() ) l1_tracks.push_many(single_tracks);
1025  // End of add-on for singles
1026 
1027  return (l1_tracks.get().size() > 0);
1028 }
1029 
1030 // according to the firmware versions print some more information
1031 void CSCTFSectorProcessor::printDisclaimer(int firmSP, int firmFA){
1032 
1033  edm::LogInfo( "CSCTFSectorProcessor" ) << "\n\n"
1034  << "******************************* \n"
1035  << "*** DISCLAIMER *** \n"
1036  << "******************************* \n"
1037  << "\n Firmware SP version (year+month+day)=" << firmSP
1038  << "\n Firmware FA/VM/DD version (year+month+day)=" << firmFA;
1039  if (firmSP==20100210)
1040  edm::LogInfo( "CSCTFSectorProcessor" ) << " -> KNOWN BUGS IN THE FIRMWARE:\n"
1041  << "\t * Wrong phi assignment for singles\n"
1042  << "\t * Wrapper passes to the core only even quality DT stubs\n"
1043  << "\n -> BUGS ARE GOING TO BE EMULATED BY THE SOFTWARE\n\n";
1044 
1045  else
1046  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t * Correct phi assignment for singles\n";
1047 
1048  if (firmSP==20100629){
1049  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t * Correct MB quality masking in the wrapper\n"
1050  << "\t * Core is 20100122\n";
1051  }
1052 
1053  if (firmSP==20100728)
1054  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t * Inverted MB clocks\n";
1055 
1056  if (firmSP==20100901)
1057  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t * Inverted charge bit\n";
1058 
1059  if (firmSP==20101011)
1060  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t **** WARNING THIS FIRMWARE IS UNDER TEST ****\n"
1061  << "\t * Added CSC-DT assembling tracks ME1-MB2/1 \n";
1062  if (firmSP==20101210)
1063  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t **** WARNING THIS FIRMWARE IS UNDER TEST ****\n"
1064  << "\t * New Ghost Busting Algorithm Removing Tracks\n"
1065  << "\t Sharing at Least One LCT\n";
1066 
1067  if (firmSP==20110118)
1068  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t **** WARNING THIS FIRMWARE IS UNDER TEST ****\n"
1069  << "\t * New Ghost Busting Algorithm Removing Tracks\n"
1070  << "\t Sharing at Least One LCT\n"
1071  << "\t * Passing CLCT and PhiBend for PT LUTs\n";
1072  if (firmSP==20120131)
1073  edm::LogInfo( "CSCTFSectorProcessor" ) << "\t **** WARNING THIS FIRMWARE IS UNDER TEST ****\n"
1074  << "\t * non-linear dphi12 dphi23, use deta for PTLUTs \n";
1075 }
#define LogDebug(id)
T getParameter(std::string const &) const
T getUntrackedParameter(std::string const &, T const &) const
void setLocalPhi(const unsigned &lphi)
Definition: L1Track.h:36
int i
Definition: DBlmapReader.cc:9
std::vector< T > get() const
ptdat Pt(const ptadd &) const
Definition: CSCTFPtLUT.cc:171
CSCTriggerContainer< csctf::TrackStub > dt_stubs
CSCTFSPCoreLogic * core_
void readParameters(const edm::ParameterSet &pset)
std::vector< csctf::TrackStub > stub_vec_filtered
void initialize(const edm::EventSetup &c)
KK.
void push_back(const T data)
#define NULL
Definition: scimark2.h:8
void setPtLUTAddress(const unsigned &adr)
Definition: L1Track.h:58
void printDisclaimer(int firmSP, int firmFA)
static const std::string FPGAs[5]
void setChargeValidPacked(unsigned valid)
Set Charge Valid.
void push_many(const std::vector< T > data)
MB
Load tools to build workspace.
int run(const CSCTriggerContainer< csctf::TrackStub > &)
void setRank(const unsigned &rank)
Definition: L1Track.h:33
Definition: ME.h:11
void setBx(int bx)
Set Bunch Crossing.
bool run(const unsigned &endcap, const unsigned &sector, const unsigned &latency, const unsigned &etamin1, const unsigned &etamin2, const unsigned &etamin3, const unsigned &etamin4, const unsigned &etamin5, const unsigned &etamin6, const unsigned &etamin7, const unsigned &etamin8, const unsigned &etamax1, const unsigned &etamax2, const unsigned &etamax3, const unsigned &etamax4, const unsigned &etamax5, const unsigned &etamax6, const unsigned &etamax7, const unsigned &etamax8, const unsigned &etawin1, const unsigned &etawin2, const unsigned &etawin3, const unsigned &etawin4, const unsigned &etawin5, const unsigned &etawin6, const unsigned &etawin7, const unsigned &mindphip, const unsigned &mindetap, const unsigned &mindeta12_accp, const unsigned &maxdeta12_accp, const unsigned &maxdphi12_accp, const unsigned &mindeta13_accp, const unsigned &maxdeta13_accp, const unsigned &maxdphi13_accp, const unsigned &mindeta112_accp, const unsigned &maxdeta112_accp, const unsigned &maxdphi112_accp, const unsigned &mindeta113_accp, const unsigned &maxdeta113_accp, const unsigned &maxdphi113_accp, const unsigned &mindphip_halo, const unsigned &mindetap_halo, const unsigned &straightp, const unsigned &curvedp, const unsigned &mbaPhiOff, const unsigned &mbbPhiOff, const unsigned &m_extend_length, const unsigned &m_allowALCTonly, const unsigned &m_allowCLCTonly, const unsigned &m_preTrigger, const unsigned &m_widePhi, const int &minBX, const int &maxBX)
unsigned ptLUTAddress() const
Definition: L1Track.h:56
int j
Definition: DBlmapReader.cc:9
CSCTriggerContainer< csc::L1Track > l1_tracks
std::map< std::string, CSCSectorReceiverLUT * > srLUTs_
class pt_address ptadd
class pt_data ptdat
CSCTFSectorProcessor(const unsigned &endcap, const unsigned &sector, const edm::ParameterSet &pset, bool tmb07, const L1MuTriggerScales *scales, const L1MuTriggerPtScale *ptScale)
class global_phi_data gblphidat
const T & get() const
Definition: EventSetup.h:55
void setOutputLink(unsigned oPL)
Definition: L1Track.h:62
T const * product() const
Definition: ESHandle.h:62
class local_phi_data lclphidat
Data Types.
static int triggerSubSectorFromLabels(int station, int chamber)
CSCTriggerContainer< csc::L1Track > tracks() const
MonitorElement ME
void setEtaPacked(unsigned eta)
Set Eta: 6-bit code.
static unsigned int const shift
void setStationIds(const unsigned &me1, const unsigned &me2, const unsigned &me3, const unsigned &me4, const unsigned &mb1)
Definition: L1Track.cc:123
void loadData(const CSCTriggerContainer< csctf::TrackStub > &, const unsigned &endcap, const unsigned &sector, const int &minBX, const int &maxBX)
CSCTriggerContainer< csc::L1Track > tracks()
class global_eta_data gbletadat
std::map< int, int > firmSP_Map